Loop Id: 841 | Module: libgromacs_mpi.so.9.0.0 | Source: simd_kernel.h:273-555 [...] | Coverage: 0.13% |
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Loop Id: 841 | Module: libgromacs_mpi.so.9.0.0 | Source: simd_kernel.h:273-555 [...] | Coverage: 0.13% |
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0x52d320 VSHUFF64X2 $-0x12,%ZMM21,%ZMM21,%ZMM0 |
0x52d327 VADDPS %ZMM0,%ZMM21,%ZMM0 |
0x52d32d VEXTRACTF128 $0x1,%YMM0,%XMM1 |
0x52d333 VADDPS %XMM1,%XMM0,%XMM0 |
0x52d337 VPERMILPD $0x1,%XMM0,%XMM1 |
0x52d33d VADDPS %XMM1,%XMM0,%XMM0 |
0x52d341 VMOVSHDUP %XMM0,%XMM1 |
0x52d345 VADDSS %XMM1,%XMM0,%XMM0 |
0x52d349 MOV 0x38(%RSP),%RAX |
0x52d34e VADDSS (%RAX),%XMM0,%XMM0 |
0x52d352 VMOVSS %XMM0,(%RAX) |
0x52d356 MOV 0x78(%RSP),%RCX |
0x52d35b ADD $0x10,%RCX |
0x52d35f CMP 0x48(%RSP),%RCX |
0x52d364 JE 52fcec |
0x52d36a MOV (%RCX),%R13D |
0x52d36d MOV 0x4(%RCX),%R9D |
0x52d371 MOV %R9D,%EAX |
0x52d374 AND $0x7f,%EAX |
0x52d377 LEA (%RAX,%RAX,2),%R11 |
0x52d37b MOV 0x8(%RCX),%EDI |
0x52d37e MOV %RCX,%RDX |
0x52d381 MOV %EDI,0xc0(%RSP) |
0x52d388 MOVSXD %EDI,%RCX |
0x52d38b MOV %RAX,0x68(%RSP) |
0x52d390 CMP $0x16,%EAX |
0x52d393 MOV $-0x1,%EAX |
0x52d398 CMOVE %R13D,%EAX |
0x52d39c MOV %EAX,0x4(%RSP) |
0x52d3a0 SAL $0x2,%R13D |
0x52d3a4 MOV %R13D,%EAX |
0x52d3a7 AND $-0x8,%EAX |
0x52d3aa LEA (%RAX,%RAX,2),%EBX |
0x52d3ad MOV %R13D,%EDI |
0x52d3b0 AND $0x4,%EDI |
0x52d3b3 OR %EDI,%EBX |
0x52d3b5 MOV %R9D,%R15D |
0x52d3b8 AND $0x200,%R15D |
0x52d3bf MOV %R15D,%R8D |
0x52d3c2 SHR $0x9,%R8D |
0x52d3c6 MOV %R9D,%R12D |
0x52d3c9 AND $0x180,%R12D |
0x52d3d0 CMP $0x80,%R12D |
0x52d3d7 MOV %RDX,0x78(%RSP) |
0x52d3dc MOVSXD 0xc(%RDX),%RDX |
0x52d3e0 MOV %RDX,0x140(%RSP) |
0x52d3e8 MOV 0x50(%RSP),%RDX |
0x52d3ed VBROADCASTSS (%RDX,%R11,4),%ZMM2 |
0x52d3f4 VBROADCASTSS 0x4(%RDX,%R11,4),%ZMM1 |
0x52d3fc MOV %R11,0x70(%RSP) |
0x52d401 VBROADCASTSS 0x8(%RDX,%R11,4),%ZMM0 |
0x52d409 SETNE %R12B |
0x52d40d TEST %R15D,%R15D |
0x52d410 MOV %R9,0x30(%RSP) |
0x52d415 JE 52d4c9 |
0x52d41b MOV 0x4(%RSP),%R15D |
0x52d420 SAR $0x1,%R15D |
0x52d423 MOV 0x28(%RSP),%RDX |
0x52d428 CMP %R15D,(%RDX,%RCX,8) |
0x52d42c JNE 52d4c9 |
0x52d432 MOVSXD %R13D,%RDX |
0x52d435 MOV 0x20(%RSP),%R9 |
0x52d43a VMOVSS (%R9,%RDX,4),%XMM4 |
0x52d440 VMOVAPS 0x360(%RSP),%XMM7 |
0x52d449 VMULSS %XMM7,%XMM4,%XMM5 |
0x52d44d VMULSS %XMM5,%XMM4,%XMM4 |
0x52d451 MOV 0x18(%RSP),%R11 |
0x52d456 VMOVSS 0x14(%RSP),%XMM3 |
0x52d45c VFMADD213SS (%R11),%XMM3,%XMM4 |
0x52d461 SAL $0x2,%RDX |
0x52d465 VMOVSS %XMM4,(%R11) |
0x52d46a MOV %RDX,%R15 |
0x52d46d OR $0x4,%R15 |
0x52d471 VMOVSS (%R9,%R15,1),%XMM5 |
0x52d477 VMULSS %XMM7,%XMM5,%XMM6 |
0x52d47b VMULSS %XMM6,%XMM5,%XMM5 |
0x52d47f VFMADD213SS %XMM4,%XMM3,%XMM5 |
0x52d484 VMOVSS %XMM5,(%R11) |
0x52d489 MOV %RDX,%R15 |
0x52d48c OR $0x8,%R15 |
0x52d490 VMOVSS (%R9,%R15,1),%XMM4 |
0x52d496 VMULSS %XMM7,%XMM4,%XMM6 |
0x52d49a VMULSS %XMM6,%XMM4,%XMM4 |
0x52d49e VFMADD213SS %XMM5,%XMM3,%XMM4 |
0x52d4a3 VMOVSS %XMM4,(%R11) |
0x52d4a8 OR $0xc,%RDX |
0x52d4ac VMOVSS (%R9,%RDX,1),%XMM5 |
0x52d4b2 MOV 0x30(%RSP),%R9 |
0x52d4b7 VMULSS %XMM7,%XMM5,%XMM6 |
0x52d4bb VMULSS %XMM6,%XMM5,%XMM5 |
0x52d4bf VFMADD213SS %XMM4,%XMM3,%XMM5 |
0x52d4c4 VMOVSS %XMM5,(%R11) |
0x52d4c9 MOVSXD %EBX,%RBX |
0x52d4cc VBROADCASTSS (%RSI,%RBX,4),%YMM13 |
0x52d4d2 VBROADCASTSS 0x4(%RSI,%RBX,4),%YMM15 |
0x52d4d9 VBROADCASTSS 0x8(%RSI,%RBX,4),%YMM11 |
0x52d4e0 VBROADCASTSS 0xc(%RSI,%RBX,4),%YMM14 |
0x52d4e7 VBROADCASTSS 0x20(%RSI,%RBX,4),%YMM9 |
0x52d4ee VBROADCASTSS 0x24(%RSI,%RBX,4),%YMM12 |
0x52d4f5 VBROADCASTSS 0x28(%RSI,%RBX,4),%YMM7 |
0x52d4fc VBROADCASTSS 0x2c(%RSI,%RBX,4),%YMM10 |
0x52d503 VBROADCASTSS 0x40(%RSI,%RBX,4),%YMM5 |
0x52d50a VBROADCASTSS 0x44(%RSI,%RBX,4),%YMM8 |
0x52d511 AND %R8B,%R12B |
0x52d514 VBROADCASTSS 0x48(%RSI,%RBX,4),%YMM4 |
0x52d51b VBROADCASTSS 0x4c(%RSI,%RBX,4),%YMM6 |
0x52d522 TEST $0x200,%R9D |
0x52d529 MOV 0x20(%RSP),%R8 |
0x52d52e JE 52d57c |
0x52d530 MOVSXD %R13D,%RDX |
0x52d533 VBROADCASTSS (%R8,%RDX,4),%YMM16 |
0x52d53a VBROADCASTSS 0x4(%R8,%RDX,4),%YMM17 |
0x52d542 VINSERTF64X4 $0x1,%YMM17,%ZMM16,%ZMM16 |
0x52d549 VMOVAPS 0x8c0(%RSP),%ZMM3 |
0x52d551 VMULPS %ZMM16,%ZMM3,%ZMM16 |
0x52d557 VMOVAPS %ZMM16,0x5c0(%RSP) |
0x52d55f VBROADCASTSS 0x8(%R8,%RDX,4),%YMM16 |
0x52d567 VBROADCASTSS 0xc(%R8,%RDX,4),%YMM17 |
0x52d56f VINSERTF64X4 $0x1,%YMM17,%ZMM16,%ZMM16 |
0x52d576 VMULPS %ZMM16,%ZMM3,%ZMM22 |
0x52d57c LEA (%RDI,%RAX,2),%EAX |
0x52d57f LEA 0x8(%RBX),%RDX |
0x52d583 MOV %RDX,0x58(%RSP) |
0x52d588 LEA 0x10(%RBX),%RDX |
0x52d58c MOV %RDX,0x60(%RSP) |
0x52d591 VINSERTF64X4 $0x1,%YMM15,%ZMM13,%ZMM13 |
0x52d598 VADDPS %ZMM13,%ZMM2,%ZMM23 |
0x52d59e VINSERTF64X4 $0x1,%YMM14,%ZMM11,%ZMM11 |
0x52d5a5 VADDPS %ZMM11,%ZMM2,%ZMM25 |
0x52d5ab VINSERTF64X4 $0x1,%YMM12,%ZMM9,%ZMM2 |
0x52d5b2 VADDPS %ZMM2,%ZMM1,%ZMM26 |
0x52d5b8 VINSERTF64X4 $0x1,%YMM10,%ZMM7,%ZMM2 |
0x52d5bf VADDPS %ZMM2,%ZMM1,%ZMM28 |
0x52d5c5 VINSERTF64X4 $0x1,%YMM8,%ZMM5,%ZMM1 |
0x52d5cc VADDPS %ZMM1,%ZMM0,%ZMM31 |
0x52d5d2 VINSERTF64X4 $0x1,%YMM6,%ZMM4,%ZMM1 |
0x52d5d9 VADDPS %ZMM1,%ZMM0,%ZMM11 |
0x52d5df CLTQ |
0x52d5e1 MOV %EAX,%EDX |
0x52d5e3 OR $0x8,%EDX |
0x52d5e6 MOVSXD %EDX,%RDI |
0x52d5e9 VBROADCASTSS (%R14,%RAX,4),%YMM0 |
0x52d5ef VBROADCASTSS 0x4(%R14,%RAX,4),%YMM1 |
0x52d5f6 VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM30 |
0x52d5fd VBROADCASTSS (%R14,%RDI,4),%YMM0 |
0x52d603 VBROADCASTSS 0x4(%R14,%RDI,4),%YMM1 |
0x52d60a VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM13 |
0x52d611 TEST %R12B,%R12B |
0x52d614 MOV 0x28(%RSP),%R15 |
0x52d619 VMOVAPS %ZMM22,0x740(%RSP) |
0x52d621 VMOVAPS %ZMM23,0x700(%RSP) |
0x52d629 VMOVAPS %ZMM25,0x6c0(%RSP) |
0x52d631 VMOVAPS %ZMM26,0x680(%RSP) |
0x52d639 VMOVAPS %ZMM28,0x640(%RSP) |
0x52d641 VMOVAPS %ZMM31,0x600(%RSP) |
0x52d649 VMOVAPS %ZMM11,0x480(%RSP) |
0x52d651 VMOVAPS %ZMM30,0x440(%RSP) |
0x52d659 VMOVAPS %ZMM13,0x400(%RSP) |
0x52d661 MOV 0x4(%RSP),%R11D |
0x52d666 JE 52dde0 |
0x52d66c VXORPS %XMM17,%XMM17,%XMM17 |
0x52d672 VXORPS %XMM24,%XMM24,%XMM24 |
0x52d678 VXORPS %XMM10,%XMM10,%XMM10 |
0x52d67d VXORPS %XMM12,%XMM12,%XMM12 |
0x52d682 VXORPS %XMM14,%XMM14,%XMM14 |
0x52d687 VXORPS %XMM27,%XMM27,%XMM27 |
0x52d68d VXORPS %XMM0,%XMM0,%XMM0 |
0x52d691 VMOVAPS %ZMM0,0x80(%RSP) |
0x52d699 VXORPS %XMM21,%XMM21,%XMM21 |
0x52d69f MOV 0x140(%RSP),%R12 |
0x52d6a7 MOV 0xc0(%RSP),%EAX |
0x52d6ae CMP %R12D,%EAX |
0x52d6b1 MOV 0x8(%RSP),%RDI |
0x52d6b6 JGE 52ea51 |
0x52d6bc VMOVAPS %ZMM0,0x80(%RSP) |
0x52d6c4 JMP 52dc8e |
(847) 0x52d6d0 KANDD %K0,%K4,%K4 |
(847) 0x52d6d5 KANDD %K1,%K5,%K5 |
(847) 0x52d6da VMOVAPS 0x1c0(%RSP),%ZMM26 |
(847) 0x52d6e2 VPTESTNMD %ZMM6,%ZMM6,%K7 |
(847) 0x52d6e8 VBROADCASTSS -0x1d13ba(%RIP),%ZMM6 |
(847) 0x52d6f2 VPTESTMD %ZMM5,%ZMM5,%K6 |
(847) 0x52d6f8 VMAXPS %ZMM6,%ZMM7,%ZMM22 |
(847) 0x52d6fe VMAXPS %ZMM6,%ZMM8,%ZMM21 |
(847) 0x52d704 VMOVAPS %ZMM22,%ZMM5{%K4}{z} |
(847) 0x52d70a VMOVAPS 0x540(%RSP),%ZMM0 |
(847) 0x52d712 VMULPS %ZMM5,%ZMM0,%ZMM13 |
(847) 0x52d718 VMOVAPS %ZMM21,%ZMM5{%K5}{z} |
(847) 0x52d71e VMULPS %ZMM5,%ZMM0,%ZMM12 |
(847) 0x52d724 VMULPS %ZMM13,%ZMM13,%ZMM24 |
(847) 0x52d72a VBROADCASTSS -0x1d0f48(%RIP),%ZMM28 |
(847) 0x52d734 VBROADCASTSS -0x1d10b2(%RIP),%ZMM14 |
(847) 0x52d73e VMOVAPS %ZMM14,%ZMM18 |
(847) 0x52d744 VFMADD213PS %ZMM28,%ZMM24,%ZMM18 |
(847) 0x52d74a VBROADCASTSS -0x1d131c(%RIP),%ZMM31 |
(847) 0x52d754 VBROADCASTSS -0x1d1456(%RIP),%ZMM5 |
(847) 0x52d75e VMOVAPS %ZMM5,%ZMM6 |
(847) 0x52d764 VFMADD213PS %ZMM31,%ZMM24,%ZMM6 |
(847) 0x52d76a VBROADCASTSS -0x1d15e8(%RIP),%ZMM27 |
(847) 0x52d774 VBROADCASTSS -0x1d14be(%RIP),%ZMM3 |
(847) 0x52d77e VBROADCASTSS -0x1d11e0(%RIP),%ZMM20 |
(847) 0x52d788 VFMADD213PS %ZMM27,%ZMM24,%ZMM18 |
(847) 0x52d78e VMOVAPS %ZMM20,%ZMM23 |
(847) 0x52d794 VFMADD213PS %ZMM3,%ZMM24,%ZMM23 |
(847) 0x52d79a VBROADCASTSS -0x1d11b8(%RIP),%ZMM16 |
(847) 0x52d7a4 VBROADCASTSS -0x1d1046(%RIP),%ZMM7 |
(847) 0x52d7ae VMOVAPS %ZMM7,%ZMM8 |
(847) 0x52d7b4 VFMADD213PS %ZMM16,%ZMM24,%ZMM8 |
(847) 0x52d7ba VBROADCASTSS -0x1d1578(%RIP),%ZMM0 |
(847) 0x52d7c4 VFMADD213PS %ZMM0,%ZMM24,%ZMM23 |
(847) 0x52d7ca VBROADCASTSS -0x1d15bc(%RIP),%ZMM1 |
(847) 0x52d7d4 VFMADD213PS %ZMM1,%ZMM24,%ZMM8 |
(847) 0x52d7da VBROADCASTSS -0x1d12fc(%RIP),%ZMM2 |
(847) 0x52d7e4 VFMADD213PS %ZMM2,%ZMM24,%ZMM23 |
(847) 0x52d7ea VMULPS %ZMM12,%ZMM12,%ZMM9 |
(847) 0x52d7f0 VFMADD213PS %ZMM28,%ZMM9,%ZMM14 |
(847) 0x52d7f6 VFMADD213PS %ZMM31,%ZMM9,%ZMM5 |
(847) 0x52d7fc VFMADD213PS %ZMM3,%ZMM9,%ZMM20 |
(847) 0x52d802 VFMADD213PS %ZMM16,%ZMM9,%ZMM7 |
(847) 0x52d808 VFMADD213PS %ZMM0,%ZMM9,%ZMM20 |
(847) 0x52d80e VFMADD213PS %ZMM1,%ZMM9,%ZMM7 |
(847) 0x52d814 VFMADD213PS %ZMM2,%ZMM9,%ZMM20 |
(847) 0x52d81a VBROADCASTSS -0x1d1404(%RIP),%ZMM0 |
(847) 0x52d824 VBROADCASTSS -0x1d1092(%RIP),%ZMM1 |
(847) 0x52d82e VMOVAPS %ZMM1,%ZMM2 |
(847) 0x52d834 VBROADCASTSS -0x1d12fa(%RIP),%ZMM3 |
(847) 0x52d83e VFMADD213PS %ZMM0,%ZMM24,%ZMM2 |
(847) 0x52d844 VMOVAPS %ZMM3,%ZMM16 |
(847) 0x52d84a VFMADD213PS %ZMM27,%ZMM24,%ZMM16 |
(847) 0x52d850 VBROADCASTSS -0x1d1066(%RIP),%ZMM28 |
(847) 0x52d85a VBROADCASTSS -0x1d1428(%RIP),%ZMM31 |
(847) 0x52d864 VMOVAPS %ZMM31,%ZMM4 |
(847) 0x52d86a VFMADD213PS %ZMM28,%ZMM24,%ZMM4 |
(847) 0x52d870 VBROADCASTSS -0x1d1692(%RIP),%ZMM10 |
(847) 0x52d87a VBROADCASTSS -0x1d133c(%RIP),%ZMM11 |
(847) 0x52d884 VMOVAPS %ZMM11,%ZMM15 |
(847) 0x52d88a VFMADD213PS %ZMM10,%ZMM24,%ZMM15 |
(847) 0x52d890 VBROADCASTSS -0x1d14d2(%RIP),%ZMM17 |
(847) 0x52d89a VFMADD213PS %ZMM17,%ZMM24,%ZMM4 |
(847) 0x52d8a0 VBROADCASTSS -0x1d1176(%RIP),%ZMM19 |
(847) 0x52d8aa VFMADD213PS %ZMM19,%ZMM24,%ZMM15 |
(847) 0x52d8b0 VBROADCASTSS -0x1d1082(%RIP),%ZMM25 |
(847) 0x52d8ba VFMADD213PS %ZMM25,%ZMM24,%ZMM4 |
(847) 0x52d8c0 VFMADD213PS %ZMM0,%ZMM9,%ZMM1 |
(847) 0x52d8c6 VFMADD213PS %ZMM27,%ZMM9,%ZMM14 |
(847) 0x52d8cc VFMADD213PS %ZMM27,%ZMM9,%ZMM3 |
(847) 0x52d8d2 VFMADD213PS %ZMM28,%ZMM9,%ZMM31 |
(847) 0x52d8d8 VFMADD213PS %ZMM10,%ZMM9,%ZMM11 |
(847) 0x52d8de VFMADD213PS %ZMM17,%ZMM9,%ZMM31 |
(847) 0x52d8e4 VRSQRT14PS %ZMM22,%ZMM0 |
(847) 0x52d8ea VFMADD213PS %ZMM19,%ZMM9,%ZMM11 |
(847) 0x52d8f0 VBROADCASTSS -0x1d147e(%RIP),%ZMM10 |
(847) 0x52d8fa VFMADD213PS %ZMM25,%ZMM9,%ZMM31 |
(847) 0x52d900 VBROADCASTSS -0x1d17b6(%RIP),%ZMM9 |
(847) 0x52d90a VMULPS %ZMM0,%ZMM22,%ZMM17 |
(847) 0x52d910 VFMADD213PS %ZMM9,%ZMM0,%ZMM17 |
(847) 0x52d916 VRSQRT14PS %ZMM21,%ZMM19 |
(847) 0x52d91c VMULPS %ZMM19,%ZMM21,%ZMM21 |
(847) 0x52d922 VFMADD213PS %ZMM9,%ZMM19,%ZMM21 |
(847) 0x52d928 VMULPS %ZMM10,%ZMM0,%ZMM0 |
(847) 0x52d92e VMULPS %ZMM10,%ZMM19,%ZMM9 |
(847) 0x52d934 VMULPS %ZMM17,%ZMM0,%ZMM0{%K4}{z} |
(847) 0x52d93a VMULPS %ZMM21,%ZMM9,%ZMM9{%K5}{z} |
(847) 0x52d940 VFMADD231PS %ZMM6,%ZMM13,%ZMM18 |
(847) 0x52d946 VFMADD231PS %ZMM8,%ZMM13,%ZMM23 |
(847) 0x52d94c VFMADD231PS %ZMM5,%ZMM12,%ZMM14 |
(847) 0x52d952 VRCP14PS %ZMM18,%ZMM5 |
(847) 0x52d958 VFMADD231PS %ZMM7,%ZMM12,%ZMM20 |
(847) 0x52d95e VBROADCASTSS -0x1d1428(%RIP),%ZMM6 |
(847) 0x52d968 VFMADD231PS %ZMM2,%ZMM13,%ZMM16 |
(847) 0x52d96e VRCP14PS %ZMM16,%ZMM2 |
(847) 0x52d974 VFNMADD213PS %ZMM6,%ZMM2,%ZMM16 |
(847) 0x52d97a VMULPS %ZMM16,%ZMM2,%ZMM2 |
(847) 0x52d980 VFMADD231PS %ZMM15,%ZMM13,%ZMM4 |
(847) 0x52d986 VRCP14PS %ZMM14,%ZMM7 |
(847) 0x52d98c VMULPS %ZMM2,%ZMM4,%ZMM2 |
(847) 0x52d992 VFNMADD213PS %ZMM6,%ZMM5,%ZMM18 |
(847) 0x52d998 VFMADD231PS %ZMM1,%ZMM12,%ZMM3 |
(847) 0x52d99e VRCP14PS %ZMM3,%ZMM1 |
(847) 0x52d9a4 VFNMADD213PS %ZMM6,%ZMM7,%ZMM14 |
(847) 0x52d9aa VFNMADD213PS %ZMM6,%ZMM1,%ZMM3 |
(847) 0x52d9b0 VMULPS %ZMM3,%ZMM1,%ZMM1 |
(847) 0x52d9b6 VFMADD231PS %ZMM11,%ZMM12,%ZMM31 |
(847) 0x52d9bc VMOVAPS 0x580(%RSP),%ZMM8 |
(847) 0x52d9c4 VMULPS %ZMM2,%ZMM8,%ZMM2 |
(847) 0x52d9ca VMULPS %ZMM1,%ZMM31,%ZMM1 |
(847) 0x52d9d0 VMULPS %ZMM1,%ZMM8,%ZMM1 |
(847) 0x52d9d6 VMOVAPS %ZMM29,%ZMM3{%K6}{z} |
(847) 0x52d9dc VADDPS %ZMM2,%ZMM3,%ZMM2 |
(847) 0x52d9e2 VXORPS %XMM6,%XMM6,%XMM6 |
(847) 0x52d9e6 VBLENDMPS %ZMM6,%ZMM29,%ZMM3{%K7} |
(847) 0x52d9ec VADDPS %ZMM1,%ZMM3,%ZMM1 |
(847) 0x52d9f2 VMULPS %ZMM18,%ZMM5,%ZMM3 |
(847) 0x52d9f8 VMULPS %ZMM3,%ZMM23,%ZMM3 |
(847) 0x52d9fe VMOVAPS %ZMM0,%ZMM4{%K6}{z} |
(847) 0x52da04 VMULPS %ZMM3,%ZMM8,%ZMM3 |
(847) 0x52da0a VFMADD213PS %ZMM4,%ZMM13,%ZMM3 |
(847) 0x52da10 VSUBPS %ZMM2,%ZMM4,%ZMM2 |
(847) 0x52da16 VBROADCASTF64X4 (%R8,%R13,4),%ZMM4 |
(847) 0x52da1d VMULPS %ZMM14,%ZMM7,%ZMM5 |
(847) 0x52da23 VBLENDMPS %ZMM6,%ZMM9,%ZMM6{%K7} |
(847) 0x52da29 VSUBPS %ZMM1,%ZMM6,%ZMM1 |
(847) 0x52da2f MOV %R12,%RAX |
(847) 0x52da32 SAL $0x6,%R12 |
(847) 0x52da36 VMULPS %ZMM5,%ZMM20,%ZMM5 |
(847) 0x52da3c VBROADCASTF64X4 (%R14,%R12,1),%ZMM7 |
(847) 0x52da43 VADDPS 0x440(%RSP),%ZMM7,%ZMM7 |
(847) 0x52da4b VMULPS %ZMM5,%ZMM8,%ZMM5 |
(847) 0x52da51 VFMADD213PS %ZMM6,%ZMM12,%ZMM5 |
(847) 0x52da57 VMULPS %ZMM7,%ZMM0,%ZMM6 |
(847) 0x52da5d VMULPS %ZMM6,%ZMM6,%ZMM6 |
(847) 0x52da63 VMULPS %ZMM6,%ZMM6,%ZMM8 |
(847) 0x52da69 VMULPS %ZMM8,%ZMM6,%ZMM6{%K6}{z} |
(847) 0x52da6f VMULPS %ZMM7,%ZMM7,%ZMM7 |
(847) 0x52da75 VMULPS %ZMM7,%ZMM7,%ZMM8 |
(847) 0x52da7b VMULPS %ZMM8,%ZMM7,%ZMM7 |
(847) 0x52da81 VMULPS 0x5c0(%RSP),%ZMM4,%ZMM8 |
(847) 0x52da89 VMULPS %ZMM2,%ZMM8,%ZMM2{%K4}{z} |
(847) 0x52da8f VADDPS 0x80(%RSP),%ZMM2,%ZMM2 |
(847) 0x52da97 VMOVAPS 0x740(%RSP),%ZMM22 |
(847) 0x52da9f VMULPS %ZMM4,%ZMM22,%ZMM4 |
(847) 0x52daa5 VMULPS %ZMM1,%ZMM4,%ZMM1{%K5}{z} |
(847) 0x52daab VADDPS %ZMM1,%ZMM2,%ZMM1 |
(847) 0x52dab1 VMOVAPS %ZMM1,0x80(%RSP) |
(847) 0x52dab9 SAL $0x4,%RAX |
(847) 0x52dabd OR $0x8,%EAX |
(847) 0x52dac0 CLTQ |
(847) 0x52dac2 VMULPS %ZMM3,%ZMM8,%ZMM1 |
(847) 0x52dac8 VBROADCASTF64X4 (%R14,%RAX,4),%ZMM2 |
(847) 0x52dacf VMULPS 0x400(%RSP),%ZMM2,%ZMM2 |
(847) 0x52dad7 VMULPS %ZMM5,%ZMM4,%ZMM3 |
(847) 0x52dadd VMULPS %ZMM6,%ZMM2,%ZMM4 |
(847) 0x52dae3 VMULPS %ZMM7,%ZMM2,%ZMM2 |
(847) 0x52dae9 VMULPS %ZMM9,%ZMM9,%ZMM5 |
(847) 0x52daef VMULPS %ZMM3,%ZMM5,%ZMM3 |
(847) 0x52daf5 VMOVAPS 0x180(%RSP),%ZMM18 |
(847) 0x52dafd VMOVAPS %ZMM18,%ZMM5 |
(847) 0x52db03 VFMADD213PS %ZMM4,%ZMM2,%ZMM5 |
(847) 0x52db09 VMULPS %ZMM4,%ZMM6,%ZMM6 |
(847) 0x52db0f VSUBPS %ZMM4,%ZMM6,%ZMM4 |
(847) 0x52db15 VADDPS %ZMM4,%ZMM1,%ZMM1 |
(847) 0x52db1b VMULPS %ZMM0,%ZMM0,%ZMM0 |
(847) 0x52db21 VMULPS %ZMM1,%ZMM0,%ZMM0 |
(847) 0x52db27 VMULPS %ZMM2,%ZMM7,%ZMM1 |
(847) 0x52db2d VFMADD213PS %ZMM6,%ZMM26,%ZMM1 |
(847) 0x52db33 VMULPS -0x1d134d(%RIP){1to16},%ZMM5,%ZMM2 |
(847) 0x52db3d KANDW %K6,%K4,%K4 |
(847) 0x52db41 VFMADD132PS -0x1d1317(%RIP){1to16},%ZMM2,%ZMM1{%K4}{z} |
(847) 0x52db4b VMOVAPS 0x100(%RSP),%ZMM21 |
(847) 0x52db53 VADDPS %ZMM1,%ZMM21,%ZMM21 |
(847) 0x52db59 VMULPS 0x3c0(%RSP),%ZMM0,%ZMM1 |
(847) 0x52db61 VMULPS 0x4c0(%RSP),%ZMM0,%ZMM2 |
(847) 0x52db69 VMULPS 0x780(%RSP),%ZMM0,%ZMM0 |
(847) 0x52db71 VMULPS %ZMM3,%ZMM30,%ZMM4 |
(847) 0x52db77 VMULPS 0x380(%RSP),%ZMM3,%ZMM5 |
(847) 0x52db7f VMULPS 0x7c0(%RSP),%ZMM3,%ZMM3 |
(847) 0x52db87 VMOVAPS 0x280(%RSP),%ZMM14 |
(847) 0x52db8f VADDPS %ZMM1,%ZMM14,%ZMM14 |
(847) 0x52db95 VMOVAPS 0x200(%RSP),%ZMM27 |
(847) 0x52db9d VADDPS %ZMM4,%ZMM27,%ZMM27 |
(847) 0x52dba3 VADDPS %ZMM1,%ZMM4,%ZMM1 |
(847) 0x52dba9 VMOVAPS 0xc0(%RSP),%ZMM10 |
(847) 0x52dbb1 VADDPS %ZMM2,%ZMM10,%ZMM10 |
(847) 0x52dbb7 VMOVAPS 0x2c0(%RSP),%ZMM12 |
(847) 0x52dbbf VADDPS %ZMM5,%ZMM12,%ZMM12 |
(847) 0x52dbc5 VMOVAPS 0x300(%RSP),%ZMM17 |
(847) 0x52dbcd VADDPS %ZMM0,%ZMM17,%ZMM17 |
(847) 0x52dbd3 VMOVAPS 0x240(%RSP),%ZMM24 |
(847) 0x52dbdb VADDPS %ZMM3,%ZMM24,%ZMM24 |
(847) 0x52dbe1 VADDPS %ZMM2,%ZMM5,%ZMM2 |
(847) 0x52dbe7 VADDPS %ZMM0,%ZMM3,%ZMM0 |
(847) 0x52dbed VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 |
(847) 0x52dbf4 VADDPS %YMM3,%YMM1,%YMM1 |
(847) 0x52dbf8 VMOVAPS (%R10,%R9,4),%YMM3 |
(847) 0x52dbfe VSUBPS %YMM1,%YMM3,%YMM1 |
(847) 0x52dc02 VMOVAPS 0x20(%R10,%R9,4),%YMM3 |
(847) 0x52dc09 VMOVAPS 0x40(%R10,%R9,4),%YMM4 |
(847) 0x52dc10 VMOVAPS %YMM1,(%R10,%R9,4) |
(847) 0x52dc16 VEXTRACTF64X4 $0x1,%ZMM2,%YMM1 |
(847) 0x52dc1d VADDPS %YMM1,%YMM2,%YMM1 |
(847) 0x52dc21 VSUBPS %YMM1,%YMM3,%YMM1 |
(847) 0x52dc25 VMOVAPS %YMM1,0x20(%R10,%R9,4) |
(847) 0x52dc2c VEXTRACTF64X4 $0x1,%ZMM0,%YMM1 |
(847) 0x52dc33 VADDPS %YMM1,%YMM0,%YMM0 |
(847) 0x52dc37 VSUBPS %YMM0,%YMM4,%YMM0 |
(847) 0x52dc3b VMOVAPS %YMM0,0x40(%R10,%R9,4) |
(847) 0x52dc42 INC %RCX |
(847) 0x52dc45 MOV 0x140(%RSP),%R12 |
(847) 0x52dc4d CMP %RCX,%R12 |
(847) 0x52dc50 VMOVAPS 0x500(%RSP),%ZMM19 |
(847) 0x52dc58 VMOVAPS 0x700(%RSP),%ZMM23 |
(847) 0x52dc60 VMOVAPS 0x6c0(%RSP),%ZMM25 |
(847) 0x52dc68 VMOVAPS 0x680(%RSP),%ZMM26 |
(847) 0x52dc70 VMOVAPS 0x640(%RSP),%ZMM28 |
(847) 0x52dc78 VMOVAPS 0x600(%RSP),%ZMM31 |
(847) 0x52dc80 VMOVAPS 0x480(%RSP),%ZMM11 |
(847) 0x52dc88 JE 52fb60 |
(847) 0x52dc8e MOV 0x80(%RDI),%RAX |
(847) 0x52dc95 CMPL $-0x1,0x4(%RAX,%RCX,8) |
(847) 0x52dc9a JE 52ea4f |
(847) 0x52dca0 MOVSXD (%R15,%RCX,8),%R12 |
(847) 0x52dca4 LEA (,%R12,8),%R13 |
(847) 0x52dcac VPBROADCASTD 0x4(%R15,%RCX,8),%ZMM0 |
(847) 0x52dcb4 LEA (,%R13,2),%R9 |
(847) 0x52dcbc ADD %R13,%R9 |
(847) 0x52dcbf VPANDD 0x840(%RSP),%ZMM0,%ZMM5 |
(847) 0x52dcc7 VPANDD 0x800(%RSP),%ZMM0,%ZMM6 |
(847) 0x52dccf VBROADCASTF64X4 (%RSI,%R9,4),%ZMM0 |
(847) 0x52dcd6 MOVSXD %R9D,%RAX |
(847) 0x52dcd9 VBROADCASTF64X4 0x20(%RSI,%RAX,4),%ZMM2 |
(847) 0x52dce1 VBROADCASTF64X4 0x40(%RSI,%RAX,4),%ZMM7 |
(847) 0x52dce9 VSUBPS %ZMM0,%ZMM23,%ZMM1 |
(847) 0x52dcef VSUBPS %ZMM0,%ZMM25,%ZMM30 |
(847) 0x52dcf5 VSUBPS %ZMM2,%ZMM26,%ZMM3 |
(847) 0x52dcfb VSUBPS %ZMM2,%ZMM28,%ZMM0 |
(847) 0x52dd01 VSUBPS %ZMM7,%ZMM31,%ZMM4 |
(847) 0x52dd07 VSUBPS %ZMM7,%ZMM11,%ZMM2 |
(847) 0x52dd0d VMULPS %ZMM1,%ZMM1,%ZMM7 |
(847) 0x52dd13 VMULPS %ZMM3,%ZMM3,%ZMM8 |
(847) 0x52dd19 VADDPS %ZMM8,%ZMM7,%ZMM7 |
(847) 0x52dd1f VMULPS %ZMM4,%ZMM4,%ZMM8 |
(847) 0x52dd25 VADDPS %ZMM8,%ZMM7,%ZMM7 |
(847) 0x52dd2b VMULPS %ZMM30,%ZMM30,%ZMM8 |
(847) 0x52dd31 VMULPS %ZMM0,%ZMM0,%ZMM9 |
(847) 0x52dd37 VADDPS %ZMM9,%ZMM8,%ZMM8 |
(847) 0x52dd3d VMULPS %ZMM2,%ZMM2,%ZMM9 |
(847) 0x52dd43 VADDPS %ZMM9,%ZMM8,%ZMM8 |
(847) 0x52dd49 VCMPPS $0x1,%ZMM19,%ZMM7,%K4 |
(847) 0x52dd50 VCMPPS $0x1,%ZMM19,%ZMM8,%K5 |
(847) 0x52dd57 LEA (%R12,%R12,1),%EAX |
(847) 0x52dd5b CMP %R11D,%EAX |
(847) 0x52dd5e VMOVAPS %ZMM21,0x100(%RSP) |
(847) 0x52dd66 VMOVAPS %ZMM17,0x300(%RSP) |
(847) 0x52dd6e VMOVAPS %ZMM24,0x240(%RSP) |
(847) 0x52dd76 VMOVAPS %ZMM10,0xc0(%RSP) |
(847) 0x52dd7e VMOVAPS %ZMM12,0x2c0(%RSP) |
(847) 0x52dd86 VMOVAPS %ZMM27,0x200(%RSP) |
(847) 0x52dd8e VMOVAPS %ZMM14,0x280(%RSP) |
(847) 0x52dd96 VMOVAPS %ZMM1,0x3c0(%RSP) |
(847) 0x52dd9e VMOVAPS %ZMM0,0x380(%RSP) |
(847) 0x52dda6 VMOVAPS %ZMM3,0x4c0(%RSP) |
(847) 0x52ddae VMOVAPS %ZMM2,0x7c0(%RSP) |
(847) 0x52ddb6 VMOVAPS %ZMM4,0x780(%RSP) |
(847) 0x52ddbe JE 52d6d0 |
(847) 0x52ddc4 OR $0x1,%EAX |
(847) 0x52ddc7 CMP %R11D,%EAX |
(847) 0x52ddca JNE 52d6da |
(847) 0x52ddd0 KANDD %K2,%K4,%K4 |
(847) 0x52ddd5 KANDD %K3,%K5,%K5 |
(847) 0x52ddda JMP 52d6da |
0x52dde0 VBROADCASTSS 0x8(%R14,%RAX,4),%YMM0 |
0x52dde7 VBROADCASTSS 0xc(%R14,%RAX,4),%YMM1 |
0x52ddee VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM15 |
0x52ddf5 VBROADCASTSS 0x8(%R14,%RDI,4),%YMM0 |
0x52ddfc VBROADCASTSS 0xc(%R14,%RDI,4),%YMM1 |
0x52de03 VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM16 |
0x52de0a TEST $0x200,%R9D |
0x52de11 VMOVAPS %ZMM15,0x3c0(%RSP) |
0x52de19 VMOVAPS %ZMM16,0x380(%RSP) |
0x52de21 JE 52e660 |
0x52de27 VXORPS %XMM17,%XMM17,%XMM17 |
0x52de2d VXORPS %XMM24,%XMM24,%XMM24 |
0x52de33 VXORPS %XMM10,%XMM10,%XMM10 |
0x52de38 VXORPS %XMM12,%XMM12,%XMM12 |
0x52de3d VXORPS %XMM14,%XMM14,%XMM14 |
0x52de42 VXORPS %XMM27,%XMM27,%XMM27 |
0x52de48 VXORPS %XMM0,%XMM0,%XMM0 |
0x52de4c VMOVAPS %ZMM0,0x80(%RSP) |
0x52de54 VXORPS %XMM21,%XMM21,%XMM21 |
0x52de5a MOV 0x140(%RSP),%RDX |
0x52de62 MOV 0xc0(%RSP),%EAX |
0x52de69 CMP %EDX,%EAX |
0x52de6b MOV 0x8(%RSP),%RDI |
0x52de70 JGE 52f0d9 |
0x52de76 VMOVAPS %ZMM0,0x80(%RSP) |
0x52de7e JMP 52e504 |
(845) 0x52de90 KANDD %K0,%K4,%K4 |
(845) 0x52de95 KANDD %K1,%K5,%K5 |
(845) 0x52de9a VPTESTNMD %ZMM1,%ZMM1,%K6 |
(845) 0x52dea0 VPTESTNMD %ZMM0,%ZMM0,%K7 |
(845) 0x52dea6 VBROADCASTSS -0x1d1b78(%RIP),%ZMM0 |
(845) 0x52deb0 VMAXPS %ZMM0,%ZMM2,%ZMM1 |
(845) 0x52deb6 VRSQRT14PS %ZMM1,%ZMM2 |
(845) 0x52debc VMAXPS %ZMM0,%ZMM4,%ZMM0 |
(845) 0x52dec2 VMULPS %ZMM2,%ZMM1,%ZMM3 |
(845) 0x52dec8 VBROADCASTSS -0x1d1a56(%RIP),%ZMM4 |
(845) 0x52ded2 VBROADCASTSS -0x1d1d88(%RIP),%ZMM5 |
(845) 0x52dedc VMULPS %ZMM4,%ZMM2,%ZMM6 |
(845) 0x52dee2 VFMADD213PS %ZMM5,%ZMM2,%ZMM3 |
(845) 0x52dee8 VRSQRT14PS %ZMM0,%ZMM2 |
(845) 0x52deee VMULPS %ZMM2,%ZMM0,%ZMM7 |
(845) 0x52def4 VMULPS %ZMM4,%ZMM2,%ZMM4 |
(845) 0x52defa VFMADD213PS %ZMM5,%ZMM2,%ZMM7 |
(845) 0x52df00 VMULPS %ZMM3,%ZMM6,%ZMM24{%K4}{z} |
(845) 0x52df06 VMULPS %ZMM7,%ZMM4,%ZMM14{%K5}{z} |
(845) 0x52df0c VMOVAPS %ZMM1,%ZMM1{%K4}{z} |
(845) 0x52df12 VMOVAPS 0x540(%RSP),%ZMM2 |
(845) 0x52df1a VMULPS %ZMM1,%ZMM2,%ZMM4 |
(845) 0x52df20 VMOVAPS %ZMM0,%ZMM0{%K5}{z} |
(845) 0x52df26 VMULPS %ZMM0,%ZMM2,%ZMM13 |
(845) 0x52df2c VBROADCASTSS -0x1d174a(%RIP),%ZMM1 |
(845) 0x52df36 VBROADCASTSS -0x1d18b4(%RIP),%ZMM18 |
(845) 0x52df40 VMULPS %ZMM4,%ZMM4,%ZMM9 |
(845) 0x52df46 VMOVAPS %ZMM18,%ZMM20 |
(845) 0x52df4c VFMADD213PS %ZMM1,%ZMM9,%ZMM20 |
(845) 0x52df52 VBROADCASTSS -0x1d1b24(%RIP),%ZMM3 |
(845) 0x52df5c VBROADCASTSS -0x1d1c5e(%RIP),%ZMM23 |
(845) 0x52df66 VMOVAPS %ZMM23,%ZMM0 |
(845) 0x52df6c VFMADD213PS %ZMM3,%ZMM9,%ZMM0 |
(845) 0x52df72 VMOVAPS %ZMM0,0x900(%RSP) |
(845) 0x52df7a VBROADCASTSS -0x1d1df8(%RIP),%ZMM0 |
(845) 0x52df84 VFMADD213PS %ZMM0,%ZMM9,%ZMM20 |
(845) 0x52df8a VBROADCASTSS -0x1d1cd4(%RIP),%ZMM5 |
(845) 0x52df94 VBROADCASTSS -0x1d19f6(%RIP),%ZMM21 |
(845) 0x52df9e VMOVAPS %ZMM21,%ZMM22 |
(845) 0x52dfa4 VBROADCASTSS -0x1d19c2(%RIP),%ZMM6 |
(845) 0x52dfae VBROADCASTSS -0x1d1850(%RIP),%ZMM27 |
(845) 0x52dfb8 VFMADD213PS %ZMM5,%ZMM9,%ZMM22 |
(845) 0x52dfbe VMOVAPS %ZMM27,%ZMM28 |
(845) 0x52dfc4 VFMADD213PS %ZMM6,%ZMM9,%ZMM28 |
(845) 0x52dfca VBROADCASTSS -0x1d1d88(%RIP),%ZMM7 |
(845) 0x52dfd4 VBROADCASTSS -0x1d1dc6(%RIP),%ZMM8 |
(845) 0x52dfde VFMADD213PS %ZMM7,%ZMM9,%ZMM22 |
(845) 0x52dfe4 VFMADD213PS %ZMM8,%ZMM9,%ZMM28 |
(845) 0x52dfea VBROADCASTSS -0x1d1b0c(%RIP),%ZMM10 |
(845) 0x52dff4 VFMADD213PS %ZMM10,%ZMM9,%ZMM22 |
(845) 0x52dffa VMULPS %ZMM13,%ZMM13,%ZMM2 |
(845) 0x52e000 VFMADD213PS %ZMM1,%ZMM2,%ZMM18 |
(845) 0x52e006 VFMADD213PS %ZMM3,%ZMM2,%ZMM23 |
(845) 0x52e00c VFMADD213PS %ZMM5,%ZMM2,%ZMM21 |
(845) 0x52e012 VFMADD213PS %ZMM6,%ZMM2,%ZMM27 |
(845) 0x52e018 VFMADD213PS %ZMM7,%ZMM2,%ZMM21 |
(845) 0x52e01e VFMADD213PS %ZMM8,%ZMM2,%ZMM27 |
(845) 0x52e024 VFMADD213PS %ZMM10,%ZMM2,%ZMM21 |
(845) 0x52e02a VBROADCASTSS -0x1d1c14(%RIP),%ZMM3 |
(845) 0x52e034 VBROADCASTSS -0x1d18a2(%RIP),%ZMM5 |
(845) 0x52e03e VMOVAPS %ZMM5,%ZMM8 |
(845) 0x52e044 VFMADD213PS %ZMM3,%ZMM9,%ZMM8 |
(845) 0x52e04a VBROADCASTSS -0x1d1b10(%RIP),%ZMM7 |
(845) 0x52e054 VMOVAPS %ZMM7,%ZMM6 |
(845) 0x52e05a VBROADCASTSS -0x1d1870(%RIP),%ZMM15 |
(845) 0x52e064 VBROADCASTSS -0x1d1c32(%RIP),%ZMM11 |
(845) 0x52e06e VFMADD213PS %ZMM0,%ZMM9,%ZMM6 |
(845) 0x52e074 VMOVAPS %ZMM11,%ZMM12 |
(845) 0x52e07a VFMADD213PS %ZMM15,%ZMM9,%ZMM12 |
(845) 0x52e080 VBROADCASTSS -0x1d1ea2(%RIP),%ZMM16 |
(845) 0x52e08a VBROADCASTSS -0x1d1b4c(%RIP),%ZMM10 |
(845) 0x52e094 VMOVAPS %ZMM10,%ZMM1 |
(845) 0x52e09a VFMADD213PS %ZMM16,%ZMM9,%ZMM1 |
(845) 0x52e0a0 VBROADCASTSS -0x1d1ce2(%RIP),%ZMM17 |
(845) 0x52e0aa VFMADD213PS %ZMM17,%ZMM9,%ZMM12 |
(845) 0x52e0b0 VBROADCASTSS -0x1d1986(%RIP),%ZMM19 |
(845) 0x52e0ba VFMADD213PS %ZMM19,%ZMM9,%ZMM1 |
(845) 0x52e0c0 VBROADCASTSS -0x1d1892(%RIP),%ZMM25 |
(845) 0x52e0ca VFMADD213PS %ZMM25,%ZMM9,%ZMM12 |
(845) 0x52e0d0 VFMADD213PS %ZMM3,%ZMM2,%ZMM5 |
(845) 0x52e0d6 VFMADD213PS %ZMM0,%ZMM2,%ZMM18 |
(845) 0x52e0dc VFMADD213PS %ZMM0,%ZMM2,%ZMM7 |
(845) 0x52e0e2 VFMADD213PS %ZMM15,%ZMM2,%ZMM11 |
(845) 0x52e0e8 VFMADD213PS %ZMM16,%ZMM2,%ZMM10 |
(845) 0x52e0ee MOV %R13,%RAX |
(845) 0x52e0f1 SAL $0x6,%R13 |
(845) 0x52e0f5 VBROADCASTF64X4 (%R14,%R13,1),%ZMM0 |
(845) 0x52e0fc VFMADD213PS %ZMM17,%ZMM2,%ZMM11 |
(845) 0x52e102 VFMADD213PS %ZMM19,%ZMM2,%ZMM10 |
(845) 0x52e108 VFMADD213PS %ZMM25,%ZMM2,%ZMM11 |
(845) 0x52e10e VADDPS %ZMM0,%ZMM30,%ZMM2 |
(845) 0x52e114 VADDPS 0x3c0(%RSP),%ZMM0,%ZMM0 |
(845) 0x52e11c VMULPS %ZMM2,%ZMM24,%ZMM3 |
(845) 0x52e122 VMULPS %ZMM3,%ZMM3,%ZMM3 |
(845) 0x52e128 VMULPS %ZMM3,%ZMM3,%ZMM9 |
(845) 0x52e12e VMULPS %ZMM9,%ZMM3,%ZMM3 |
(845) 0x52e134 VMULPS %ZMM0,%ZMM14,%ZMM9 |
(845) 0x52e13a VMULPS %ZMM9,%ZMM9,%ZMM9 |
(845) 0x52e140 VMULPS %ZMM9,%ZMM9,%ZMM15 |
(845) 0x52e146 VMULPS %ZMM15,%ZMM9,%ZMM9 |
(845) 0x52e14c VMULPS %ZMM2,%ZMM2,%ZMM2 |
(845) 0x52e152 VMULPS %ZMM2,%ZMM2,%ZMM15 |
(845) 0x52e158 VMULPS %ZMM15,%ZMM2,%ZMM2 |
(845) 0x52e15e VMULPS %ZMM0,%ZMM0,%ZMM0 |
(845) 0x52e164 VMULPS %ZMM0,%ZMM0,%ZMM15 |
(845) 0x52e16a VMULPS %ZMM15,%ZMM0,%ZMM0 |
(845) 0x52e170 SAL $0x4,%RAX |
(845) 0x52e174 OR $0x8,%EAX |
(845) 0x52e177 CLTQ |
(845) 0x52e179 VBROADCASTF64X4 (%R14,%RAX,4),%ZMM15 |
(845) 0x52e180 VXORPS %XMM26,%XMM26,%XMM26 |
(845) 0x52e186 VMOVAPS %ZMM26,%ZMM3{%K7} |
(845) 0x52e18c VMULPS 0x400(%RSP),%ZMM15,%ZMM16 |
(845) 0x52e194 VMULPS %ZMM3,%ZMM16,%ZMM17 |
(845) 0x52e19a VMULPS %ZMM17,%ZMM3,%ZMM3 |
(845) 0x52e1a0 VMULPS %ZMM2,%ZMM16,%ZMM16 |
(845) 0x52e1a6 VMULPS %ZMM16,%ZMM2,%ZMM2 |
(845) 0x52e1ac VMOVAPS 0x180(%RSP),%ZMM31 |
(845) 0x52e1b4 VFMADD213PS %ZMM17,%ZMM31,%ZMM16 |
(845) 0x52e1ba VMOVAPS 0x1c0(%RSP),%ZMM30 |
(845) 0x52e1c2 VFMADD213PS %ZMM3,%ZMM30,%ZMM2 |
(845) 0x52e1c8 VBROADCASTSS -0x1d19e2(%RIP),%ZMM19 |
(845) 0x52e1d2 VBROADCASTSS -0x1d19a8(%RIP),%ZMM25 |
(845) 0x52e1dc VMULPS %ZMM19,%ZMM16,%ZMM16 |
(845) 0x52e1e2 VFMADD231PS %ZMM2,%ZMM25,%ZMM16 |
(845) 0x52e1e8 VMULPS 0x380(%RSP),%ZMM15,%ZMM2 |
(845) 0x52e1f0 VMOVAPS %ZMM26,%ZMM9{%K6} |
(845) 0x52e1f6 VMULPS %ZMM9,%ZMM2,%ZMM15 |
(845) 0x52e1fc VMULPS %ZMM0,%ZMM2,%ZMM2 |
(845) 0x52e202 VMULPS %ZMM2,%ZMM0,%ZMM0 |
(845) 0x52e208 VFMADD213PS %ZMM15,%ZMM31,%ZMM2 |
(845) 0x52e20e VMULPS %ZMM19,%ZMM2,%ZMM2 |
(845) 0x52e214 VMULPS %ZMM15,%ZMM9,%ZMM9 |
(845) 0x52e21a VFMADD213PS %ZMM9,%ZMM30,%ZMM0 |
(845) 0x52e220 VMOVAPS 0x440(%RSP),%ZMM30 |
(845) 0x52e228 VFMADD231PS %ZMM0,%ZMM25,%ZMM2 |
(845) 0x52e22e VFMADD231PS 0x900(%RSP),%ZMM4,%ZMM20 |
(845) 0x52e236 VFMADD231PS %ZMM28,%ZMM4,%ZMM22 |
(845) 0x52e23c VFMADD231PS %ZMM23,%ZMM13,%ZMM18 |
(845) 0x52e242 VRCP14PS %ZMM20,%ZMM0 |
(845) 0x52e248 VFMADD231PS %ZMM8,%ZMM4,%ZMM6 |
(845) 0x52e24e VBROADCASTSS -0x1d1d18(%RIP),%ZMM8 |
(845) 0x52e258 VRCP14PS %ZMM6,%ZMM19 |
(845) 0x52e25e VFMADD231PS %ZMM27,%ZMM13,%ZMM21 |
(845) 0x52e264 VFNMADD213PS %ZMM8,%ZMM19,%ZMM6 |
(845) 0x52e26a VMULPS %ZMM6,%ZMM19,%ZMM6 |
(845) 0x52e270 VRCP14PS %ZMM18,%ZMM19 |
(845) 0x52e276 VFMADD231PS %ZMM1,%ZMM4,%ZMM12 |
(845) 0x52e27c VMULPS %ZMM6,%ZMM12,%ZMM1 |
(845) 0x52e282 VFMADD231PS %ZMM5,%ZMM13,%ZMM7 |
(845) 0x52e288 VRCP14PS %ZMM7,%ZMM5 |
(845) 0x52e28e VFNMADD213PS %ZMM8,%ZMM0,%ZMM20 |
(845) 0x52e294 VFNMADD213PS %ZMM8,%ZMM19,%ZMM18 |
(845) 0x52e29a VFNMADD213PS %ZMM8,%ZMM5,%ZMM7 |
(845) 0x52e2a0 VMULPS %ZMM7,%ZMM5,%ZMM5 |
(845) 0x52e2a6 VFMADD231PS %ZMM10,%ZMM13,%ZMM11 |
(845) 0x52e2ac VMOVAPS 0x580(%RSP),%ZMM7 |
(845) 0x52e2b4 VMULPS %ZMM1,%ZMM7,%ZMM1 |
(845) 0x52e2ba VMULPS %ZMM5,%ZMM11,%ZMM5 |
(845) 0x52e2c0 VBLENDMPS %ZMM26,%ZMM29,%ZMM6{%K7} |
(845) 0x52e2c6 VADDPS %ZMM1,%ZMM6,%ZMM1 |
(845) 0x52e2cc VBLENDMPS %ZMM26,%ZMM29,%ZMM6{%K6} |
(845) 0x52e2d2 VMULPS %ZMM5,%ZMM7,%ZMM5 |
(845) 0x52e2d8 VADDPS %ZMM5,%ZMM6,%ZMM5 |
(845) 0x52e2de VMULPS %ZMM20,%ZMM0,%ZMM0 |
(845) 0x52e2e4 VMULPS %ZMM0,%ZMM22,%ZMM0 |
(845) 0x52e2ea VBLENDMPS %ZMM26,%ZMM24,%ZMM6{%K7} |
(845) 0x52e2f0 VMULPS %ZMM0,%ZMM7,%ZMM0 |
(845) 0x52e2f6 VFMADD213PS %ZMM6,%ZMM4,%ZMM0 |
(845) 0x52e2fc VSUBPS %ZMM1,%ZMM6,%ZMM1 |
(845) 0x52e302 VMULPS %ZMM18,%ZMM19,%ZMM4 |
(845) 0x52e308 VBLENDMPS %ZMM26,%ZMM14,%ZMM6{%K6} |
(845) 0x52e30e VMULPS %ZMM4,%ZMM21,%ZMM4 |
(845) 0x52e314 VMULPS %ZMM4,%ZMM7,%ZMM4 |
(845) 0x52e31a VFMADD213PS %ZMM6,%ZMM13,%ZMM4 |
(845) 0x52e320 VMOVAPS %ZMM31,%ZMM18 |
(845) 0x52e326 VBROADCASTF64X4 (%R8,%R9,4),%ZMM7 |
(845) 0x52e32d VSUBPS %ZMM5,%ZMM6,%ZMM5 |
(845) 0x52e333 VMULPS 0x5c0(%RSP),%ZMM7,%ZMM6 |
(845) 0x52e33b VMULPS %ZMM1,%ZMM6,%ZMM1{%K4}{z} |
(845) 0x52e341 VADDPS 0x80(%RSP),%ZMM1,%ZMM1 |
(845) 0x52e349 VMOVAPS 0x740(%RSP),%ZMM22 |
(845) 0x52e351 VMULPS %ZMM7,%ZMM22,%ZMM7 |
(845) 0x52e357 VMULPS %ZMM5,%ZMM7,%ZMM5{%K5}{z} |
(845) 0x52e35d VADDPS %ZMM5,%ZMM1,%ZMM1 |
(845) 0x52e363 VMOVAPS %ZMM1,0x80(%RSP) |
(845) 0x52e36b VMOVAPS %ZMM26,%ZMM16{%K7} |
(845) 0x52e371 VMOVAPS %ZMM16,%ZMM1{%K4}{z} |
(845) 0x52e377 VADDPS 0x100(%RSP),%ZMM1,%ZMM1 |
(845) 0x52e37f VMOVAPS %ZMM26,%ZMM2{%K6} |
(845) 0x52e385 VMOVAPS %ZMM2,%ZMM2{%K5}{z} |
(845) 0x52e38b VADDPS %ZMM2,%ZMM1,%ZMM21 |
(845) 0x52e391 VMULPS %ZMM0,%ZMM6,%ZMM0 |
(845) 0x52e397 VSUBPS %ZMM17,%ZMM3,%ZMM1 |
(845) 0x52e39d VADDPS %ZMM1,%ZMM0,%ZMM0 |
(845) 0x52e3a3 VMULPS %ZMM24,%ZMM24,%ZMM1 |
(845) 0x52e3a9 VMULPS %ZMM0,%ZMM1,%ZMM0 |
(845) 0x52e3af VMULPS %ZMM4,%ZMM7,%ZMM1 |
(845) 0x52e3b5 VSUBPS %ZMM15,%ZMM9,%ZMM2 |
(845) 0x52e3bb VADDPS %ZMM2,%ZMM1,%ZMM1 |
(845) 0x52e3c1 VMULPS %ZMM14,%ZMM14,%ZMM2 |
(845) 0x52e3c7 VMULPS %ZMM1,%ZMM2,%ZMM1 |
(845) 0x52e3cd VMULPS 0x7c0(%RSP),%ZMM0,%ZMM2 |
(845) 0x52e3d5 VMULPS 0x9c0(%RSP),%ZMM0,%ZMM3 |
(845) 0x52e3dd VMULPS 0x940(%RSP),%ZMM0,%ZMM0 |
(845) 0x52e3e5 VMULPS 0x4c0(%RSP),%ZMM1,%ZMM4 |
(845) 0x52e3ed VMULPS 0x780(%RSP),%ZMM1,%ZMM5 |
(845) 0x52e3f5 VMULPS 0x980(%RSP),%ZMM1,%ZMM1 |
(845) 0x52e3fd VMOVAPS 0x280(%RSP),%ZMM14 |
(845) 0x52e405 VADDPS %ZMM2,%ZMM14,%ZMM14 |
(845) 0x52e40b VMOVAPS 0x200(%RSP),%ZMM27 |
(845) 0x52e413 VADDPS %ZMM4,%ZMM27,%ZMM27 |
(845) 0x52e419 VADDPS %ZMM4,%ZMM2,%ZMM2 |
(845) 0x52e41f VMOVAPS 0xc0(%RSP),%ZMM10 |
(845) 0x52e427 VADDPS %ZMM3,%ZMM10,%ZMM10 |
(845) 0x52e42d VMOVAPS 0x2c0(%RSP),%ZMM12 |
(845) 0x52e435 VADDPS %ZMM5,%ZMM12,%ZMM12 |
(845) 0x52e43b VMOVAPS 0x300(%RSP),%ZMM17 |
(845) 0x52e443 VADDPS %ZMM0,%ZMM17,%ZMM17 |
(845) 0x52e449 VMOVAPS 0x240(%RSP),%ZMM24 |
(845) 0x52e451 VADDPS %ZMM1,%ZMM24,%ZMM24 |
(845) 0x52e457 VADDPS %ZMM5,%ZMM3,%ZMM3 |
(845) 0x52e45d VADDPS %ZMM1,%ZMM0,%ZMM0 |
(845) 0x52e463 VEXTRACTF64X4 $0x1,%ZMM2,%YMM1 |
(845) 0x52e46a VADDPS %YMM1,%YMM2,%YMM1 |
(845) 0x52e46e VMOVAPS (%R10,%R12,4),%YMM2 |
(845) 0x52e474 VSUBPS %YMM1,%YMM2,%YMM1 |
(845) 0x52e478 VMOVAPS 0x20(%R10,%R12,4),%YMM2 |
(845) 0x52e47f VMOVAPS 0x40(%R10,%R12,4),%YMM4 |
(845) 0x52e486 VMOVAPS %YMM1,(%R10,%R12,4) |
(845) 0x52e48c VEXTRACTF64X4 $0x1,%ZMM3,%YMM1 |
(845) 0x52e493 VADDPS %YMM1,%YMM3,%YMM1 |
(845) 0x52e497 VSUBPS %YMM1,%YMM2,%YMM1 |
(845) 0x52e49b VMOVAPS %YMM1,0x20(%R10,%R12,4) |
(845) 0x52e4a2 VEXTRACTF64X4 $0x1,%ZMM0,%YMM1 |
(845) 0x52e4a9 VADDPS %YMM1,%YMM0,%YMM0 |
(845) 0x52e4ad VSUBPS %YMM0,%YMM4,%YMM0 |
(845) 0x52e4b1 VMOVAPS %YMM0,0x40(%R10,%R12,4) |
(845) 0x52e4b8 INC %RCX |
(845) 0x52e4bb MOV 0x140(%RSP),%RDX |
(845) 0x52e4c3 CMP %RCX,%RDX |
(845) 0x52e4c6 VMOVAPS 0x500(%RSP),%ZMM19 |
(845) 0x52e4ce VMOVAPS 0x700(%RSP),%ZMM23 |
(845) 0x52e4d6 VMOVAPS 0x6c0(%RSP),%ZMM25 |
(845) 0x52e4de VMOVAPS 0x680(%RSP),%ZMM26 |
(845) 0x52e4e6 VMOVAPS 0x640(%RSP),%ZMM28 |
(845) 0x52e4ee VMOVAPS 0x600(%RSP),%ZMM31 |
(845) 0x52e4f6 VMOVAPS 0x480(%RSP),%ZMM11 |
(845) 0x52e4fe JE 52fb60 |
(845) 0x52e504 MOV 0x80(%RDI),%RAX |
(845) 0x52e50b CMPL $-0x1,0x4(%RAX,%RCX,8) |
(845) 0x52e510 JE 52f0d7 |
(845) 0x52e516 MOVSXD (%R15,%RCX,8),%R13 |
(845) 0x52e51a LEA (,%R13,8),%R9 |
(845) 0x52e522 VPBROADCASTD 0x4(%R15,%RCX,8),%ZMM1 |
(845) 0x52e52a LEA (%R9,%R9,2),%R12 |
(845) 0x52e52e VPANDD 0x840(%RSP),%ZMM1,%ZMM0 |
(845) 0x52e536 VPANDD 0x800(%RSP),%ZMM1,%ZMM1 |
(845) 0x52e53e VBROADCASTF64X4 (%RSI,%R12,4),%ZMM2 |
(845) 0x52e545 MOVSXD %R12D,%RAX |
(845) 0x52e548 VBROADCASTF64X4 0x20(%RSI,%RAX,4),%ZMM3 |
(845) 0x52e550 VBROADCASTF64X4 0x40(%RSI,%RAX,4),%ZMM4 |
(845) 0x52e558 VSUBPS %ZMM2,%ZMM23,%ZMM6 |
(845) 0x52e55e VSUBPS %ZMM2,%ZMM25,%ZMM5 |
(845) 0x52e564 VSUBPS %ZMM3,%ZMM26,%ZMM8 |
(845) 0x52e56a VSUBPS %ZMM3,%ZMM28,%ZMM7 |
(845) 0x52e570 VSUBPS %ZMM4,%ZMM31,%ZMM13 |
(845) 0x52e576 VSUBPS %ZMM4,%ZMM11,%ZMM9 |
(845) 0x52e57c VMULPS %ZMM6,%ZMM6,%ZMM2 |
(845) 0x52e582 VMULPS %ZMM8,%ZMM8,%ZMM3 |
(845) 0x52e588 VADDPS %ZMM3,%ZMM2,%ZMM2 |
(845) 0x52e58e VMULPS %ZMM13,%ZMM13,%ZMM3 |
(845) 0x52e594 VADDPS %ZMM3,%ZMM2,%ZMM2 |
(845) 0x52e59a VMULPS %ZMM5,%ZMM5,%ZMM3 |
(845) 0x52e5a0 VMULPS %ZMM7,%ZMM7,%ZMM4 |
(845) 0x52e5a6 VADDPS %ZMM4,%ZMM3,%ZMM3 |
(845) 0x52e5ac VMULPS %ZMM9,%ZMM9,%ZMM4 |
(845) 0x52e5b2 VADDPS %ZMM4,%ZMM3,%ZMM4 |
(845) 0x52e5b8 VCMPPS $0x1,%ZMM19,%ZMM2,%K4 |
(845) 0x52e5bf VCMPPS $0x1,%ZMM19,%ZMM4,%K5 |
(845) 0x52e5c6 LEA (%R13,%R13,1),%EAX |
(845) 0x52e5cb CMP %R11D,%EAX |
(845) 0x52e5ce VMOVAPS %ZMM21,0x100(%RSP) |
(845) 0x52e5d6 VMOVAPS %ZMM17,0x300(%RSP) |
(845) 0x52e5de VMOVAPS %ZMM24,0x240(%RSP) |
(845) 0x52e5e6 VMOVAPS %ZMM10,0xc0(%RSP) |
(845) 0x52e5ee VMOVAPS %ZMM12,0x2c0(%RSP) |
(845) 0x52e5f6 VMOVAPS %ZMM14,0x280(%RSP) |
(845) 0x52e5fe VMOVAPS %ZMM27,0x200(%RSP) |
(845) 0x52e606 VMOVAPS %ZMM5,0x4c0(%RSP) |
(845) 0x52e60e VMOVAPS %ZMM6,0x7c0(%RSP) |
(845) 0x52e616 VMOVAPS %ZMM7,0x780(%RSP) |
(845) 0x52e61e VMOVAPS %ZMM8,0x9c0(%RSP) |
(845) 0x52e626 VMOVAPS %ZMM9,0x980(%RSP) |
(845) 0x52e62e VMOVAPS %ZMM13,0x940(%RSP) |
(845) 0x52e636 JE 52de90 |
(845) 0x52e63c OR $0x1,%EAX |
(845) 0x52e63f CMP %R11D,%EAX |
(845) 0x52e642 JNE 52de9a |
(845) 0x52e648 KANDD %K2,%K4,%K4 |
(845) 0x52e64d KANDD %K3,%K5,%K5 |
(845) 0x52e652 JMP 52de9a |
0x52e660 VXORPS %XMM0,%XMM0,%XMM0 |
0x52e664 VMOVAPS %ZMM0,0x80(%RSP) |
0x52e66c VXORPS %XMM17,%XMM17,%XMM17 |
0x52e672 VXORPS %XMM24,%XMM24,%XMM24 |
0x52e678 VXORPS %XMM10,%XMM10,%XMM10 |
0x52e67d VXORPS %XMM12,%XMM12,%XMM12 |
0x52e682 VXORPS %XMM14,%XMM14,%XMM14 |
0x52e687 VXORPS %XMM27,%XMM27,%XMM27 |
0x52e68d VXORPS %XMM21,%XMM21,%XMM21 |
0x52e693 MOV 0x140(%RSP),%R11 |
0x52e69b MOV 0xc0(%RSP),%EAX |
0x52e6a2 CMP %R11D,%EAX |
0x52e6a5 MOV 0x8(%RSP),%RDI |
0x52e6aa JGE 52f7ef |
(843) 0x52e6b0 MOV 0x80(%RDI),%RAX |
(843) 0x52e6b7 CMPL $-0x1,0x4(%RAX,%RCX,8) |
(843) 0x52e6bc JE 52f7e5 |
(843) 0x52e6c2 MOVSXD (%R15,%RCX,8),%RAX |
(843) 0x52e6c6 LEA (,%RAX,8),%RDX |
(843) 0x52e6ce LEA (%RDX,%RDX,2),%R9 |
(843) 0x52e6d2 VPBROADCASTD 0x4(%R15,%RCX,8),%ZMM3 |
(843) 0x52e6da VBROADCASTF64X4 (%RSI,%R9,4),%ZMM0 |
(843) 0x52e6e1 MOVSXD %R9D,%RDX |
(843) 0x52e6e4 VBROADCASTF64X4 0x20(%RSI,%RDX,4),%ZMM1 |
(843) 0x52e6ec VBROADCASTF64X4 0x40(%RSI,%RDX,4),%ZMM6 |
(843) 0x52e6f4 VSUBPS %ZMM0,%ZMM23,%ZMM2 |
(843) 0x52e6fa VSUBPS %ZMM0,%ZMM25,%ZMM0 |
(843) 0x52e700 VMOVAPS %ZMM0,0x100(%RSP) |
(843) 0x52e708 VSUBPS %ZMM1,%ZMM26,%ZMM4 |
(843) 0x52e70e VSUBPS %ZMM1,%ZMM28,%ZMM18 |
(843) 0x52e714 VSUBPS %ZMM6,%ZMM31,%ZMM5 |
(843) 0x52e71a VSUBPS %ZMM6,%ZMM11,%ZMM6 |
(843) 0x52e720 VMULPS %ZMM2,%ZMM2,%ZMM7 |
(843) 0x52e726 VMULPS %ZMM4,%ZMM4,%ZMM8 |
(843) 0x52e72c VADDPS %ZMM8,%ZMM7,%ZMM7 |
(843) 0x52e732 VMULPS %ZMM5,%ZMM5,%ZMM8 |
(843) 0x52e738 VADDPS %ZMM8,%ZMM7,%ZMM7 |
(843) 0x52e73e VMULPS %ZMM0,%ZMM0,%ZMM8 |
(843) 0x52e744 VMULPS %ZMM18,%ZMM18,%ZMM9 |
(843) 0x52e74a VADDPS %ZMM9,%ZMM8,%ZMM8 |
(843) 0x52e750 VMULPS %ZMM6,%ZMM6,%ZMM9 |
(843) 0x52e756 VADDPS %ZMM9,%ZMM8,%ZMM8 |
(843) 0x52e75c VCMPPS $0x1,%ZMM19,%ZMM7,%K4 |
(843) 0x52e763 VCMPPS $0x1,%ZMM19,%ZMM8,%K6 |
(843) 0x52e76a VPTESTMD 0x840(%RSP),%ZMM3,%K5{%K4} |
(843) 0x52e772 VPTESTMD 0x800(%RSP),%ZMM3,%K4{%K6} |
(843) 0x52e77a VBROADCASTSS -0x1d244c(%RIP),%ZMM3 |
(843) 0x52e784 VMAXPS %ZMM3,%ZMM7,%ZMM7 |
(843) 0x52e78a VRSQRT14PS %ZMM7,%ZMM9 |
(843) 0x52e790 VMAXPS %ZMM3,%ZMM8,%ZMM3 |
(843) 0x52e796 VMULPS %ZMM9,%ZMM7,%ZMM7 |
(843) 0x52e79c VBROADCASTSS -0x1d232a(%RIP),%ZMM8 |
(843) 0x52e7a6 VMOVAPS %ZMM10,0xc0(%RSP) |
(843) 0x52e7ae VBROADCASTSS -0x1d2664(%RIP),%ZMM10 |
(843) 0x52e7b8 VMULPS %ZMM8,%ZMM9,%ZMM11 |
(843) 0x52e7be VFMADD213PS %ZMM10,%ZMM9,%ZMM7 |
(843) 0x52e7c4 VRSQRT14PS %ZMM3,%ZMM9 |
(843) 0x52e7ca VMULPS %ZMM9,%ZMM3,%ZMM3 |
(843) 0x52e7d0 VMULPS %ZMM8,%ZMM9,%ZMM8 |
(843) 0x52e7d6 VFMADD213PS %ZMM10,%ZMM9,%ZMM3 |
(843) 0x52e7dc VMULPS %ZMM7,%ZMM11,%ZMM7{%K5}{z} |
(843) 0x52e7e2 VMULPS %ZMM3,%ZMM8,%ZMM3{%K4}{z} |
(843) 0x52e7e8 MOV %RAX,%RDX |
(843) 0x52e7eb SAL $0x4,%RDX |
(843) 0x52e7ef SAL $0x6,%RAX |
(843) 0x52e7f3 VBROADCASTF64X4 (%R14,%RAX,1),%ZMM8 |
(843) 0x52e7fa OR $0x8,%EDX |
(843) 0x52e7fd MOVSXD %EDX,%RAX |
(843) 0x52e800 VBROADCASTF64X4 (%R14,%RAX,4),%ZMM9 |
(843) 0x52e807 VADDPS %ZMM8,%ZMM30,%ZMM10 |
(843) 0x52e80d VADDPS %ZMM8,%ZMM15,%ZMM8 |
(843) 0x52e813 VMULPS %ZMM9,%ZMM13,%ZMM11 |
(843) 0x52e819 VMULPS %ZMM9,%ZMM16,%ZMM9 |
(843) 0x52e81f VMOVAPS %ZMM12,%ZMM30 |
(843) 0x52e825 VMULPS %ZMM7,%ZMM10,%ZMM12 |
(843) 0x52e82b VMULPS %ZMM3,%ZMM8,%ZMM13 |
(843) 0x52e831 VMULPS %ZMM12,%ZMM12,%ZMM12 |
(843) 0x52e837 VMULPS %ZMM13,%ZMM13,%ZMM13 |
(843) 0x52e83d VMOVAPS %ZMM14,%ZMM1 |
(843) 0x52e843 VMULPS %ZMM12,%ZMM12,%ZMM14 |
(843) 0x52e849 VMULPS %ZMM14,%ZMM12,%ZMM12 |
(843) 0x52e84f VMULPS %ZMM13,%ZMM13,%ZMM14 |
(843) 0x52e855 VMULPS %ZMM14,%ZMM13,%ZMM13 |
(843) 0x52e85b VMULPS %ZMM12,%ZMM11,%ZMM14 |
(843) 0x52e861 VMULPS %ZMM13,%ZMM9,%ZMM15 |
(843) 0x52e867 VMULPS %ZMM14,%ZMM12,%ZMM12 |
(843) 0x52e86d VMULPS %ZMM10,%ZMM10,%ZMM10 |
(843) 0x52e873 VMULPS %ZMM8,%ZMM8,%ZMM8 |
(843) 0x52e879 VMULPS %ZMM10,%ZMM10,%ZMM16 |
(843) 0x52e87f VMULPS %ZMM16,%ZMM10,%ZMM10 |
(843) 0x52e885 VMULPS %ZMM8,%ZMM8,%ZMM16 |
(843) 0x52e88b VMULPS %ZMM16,%ZMM8,%ZMM8 |
(843) 0x52e891 VMULPS %ZMM10,%ZMM11,%ZMM11 |
(843) 0x52e897 VMULPS %ZMM8,%ZMM9,%ZMM9 |
(843) 0x52e89d VMULPS %ZMM11,%ZMM10,%ZMM10 |
(843) 0x52e8a3 VMULPS %ZMM9,%ZMM8,%ZMM8 |
(843) 0x52e8a9 VMOVAPS 0x180(%RSP),%ZMM16 |
(843) 0x52e8b1 VFMADD213PS %ZMM14,%ZMM16,%ZMM11 |
(843) 0x52e8b7 VFMADD213PS %ZMM15,%ZMM16,%ZMM9 |
(843) 0x52e8bd VMOVAPS %ZMM22,%ZMM0 |
(843) 0x52e8c3 VMOVAPS %ZMM29,%ZMM20 |
(843) 0x52e8c9 VMOVAPS 0x1c0(%RSP),%ZMM29 |
(843) 0x52e8d1 VFMADD213PS %ZMM12,%ZMM29,%ZMM10 |
(843) 0x52e8d7 VBROADCASTSS -0x1d20f1(%RIP),%ZMM16 |
(843) 0x52e8e1 VMULPS %ZMM16,%ZMM11,%ZMM11 |
(843) 0x52e8e7 VMULPS %ZMM16,%ZMM9,%ZMM9 |
(843) 0x52e8ed VBROADCASTSS -0x1d20c3(%RIP),%ZMM16 |
(843) 0x52e8f7 VFMADD231PS %ZMM10,%ZMM16,%ZMM11{%K5}{z} |
(843) 0x52e8fd VMULPS %ZMM15,%ZMM13,%ZMM10 |
(843) 0x52e903 VMOVAPS 0x400(%RSP),%ZMM13 |
(843) 0x52e90b VFMADD213PS %ZMM10,%ZMM29,%ZMM8 |
(843) 0x52e911 VMOVAPS %ZMM20,%ZMM29 |
(843) 0x52e917 VFMADD231PS %ZMM8,%ZMM16,%ZMM9{%K4}{z} |
(843) 0x52e91d VMOVAPS 0x380(%RSP),%ZMM16 |
(843) 0x52e925 VADDPS %ZMM11,%ZMM21,%ZMM8 |
(843) 0x52e92b VMOVAPS 0x480(%RSP),%ZMM11 |
(843) 0x52e933 VADDPS %ZMM9,%ZMM8,%ZMM21 |
(843) 0x52e939 VSUBPS %ZMM14,%ZMM12,%ZMM8 |
(843) 0x52e93f VMOVAPS %ZMM1,%ZMM14 |
(843) 0x52e945 VMOVAPS %ZMM30,%ZMM12 |
(843) 0x52e94b VMOVAPS 0x440(%RSP),%ZMM30 |
(843) 0x52e953 VMULPS %ZMM7,%ZMM7,%ZMM7 |
(843) 0x52e959 VMULPS %ZMM8,%ZMM7,%ZMM7 |
(843) 0x52e95f VSUBPS %ZMM15,%ZMM10,%ZMM8 |
(843) 0x52e965 VMOVAPS 0x3c0(%RSP),%ZMM15 |
(843) 0x52e96d VMOVAPS 0xc0(%RSP),%ZMM10 |
(843) 0x52e975 VMULPS %ZMM3,%ZMM3,%ZMM3 |
(843) 0x52e97b VMULPS %ZMM8,%ZMM3,%ZMM3 |
(843) 0x52e981 VMULPS %ZMM7,%ZMM2,%ZMM2 |
(843) 0x52e987 VMULPS %ZMM7,%ZMM4,%ZMM4 |
(843) 0x52e98d VMULPS %ZMM7,%ZMM5,%ZMM5 |
(843) 0x52e993 VMULPS 0x100(%RSP),%ZMM3,%ZMM0 |
(843) 0x52e99b VMULPS %ZMM3,%ZMM18,%ZMM1 |
(843) 0x52e9a1 VMULPS %ZMM3,%ZMM6,%ZMM3 |
(843) 0x52e9a7 VADDPS %ZMM2,%ZMM14,%ZMM14 |
(843) 0x52e9ad VADDPS %ZMM0,%ZMM27,%ZMM27 |
(843) 0x52e9b3 VADDPS %ZMM0,%ZMM2,%ZMM0 |
(843) 0x52e9b9 VADDPS %ZMM4,%ZMM10,%ZMM10 |
(843) 0x52e9bf VADDPS %ZMM1,%ZMM12,%ZMM12 |
(843) 0x52e9c5 VADDPS %ZMM5,%ZMM17,%ZMM17 |
(843) 0x52e9cb VADDPS %ZMM3,%ZMM24,%ZMM24 |
(843) 0x52e9d1 VADDPS %ZMM1,%ZMM4,%ZMM1 |
(843) 0x52e9d7 VADDPS %ZMM3,%ZMM5,%ZMM2 |
(843) 0x52e9dd VEXTRACTF64X4 $0x1,%ZMM0,%YMM3 |
(843) 0x52e9e4 VADDPS %YMM3,%YMM0,%YMM0 |
(843) 0x52e9e8 VMOVAPS (%R10,%R9,4),%YMM3 |
(843) 0x52e9ee VSUBPS %YMM0,%YMM3,%YMM0 |
(843) 0x52e9f2 VMOVAPS 0x20(%R10,%R9,4),%YMM3 |
(843) 0x52e9f9 VMOVAPS 0x40(%R10,%R9,4),%YMM4 |
(843) 0x52ea00 VMOVAPS %YMM0,(%R10,%R9,4) |
(843) 0x52ea06 VEXTRACTF64X4 $0x1,%ZMM1,%YMM0 |
(843) 0x52ea0d VADDPS %YMM0,%YMM1,%YMM0 |
(843) 0x52ea11 VSUBPS %YMM0,%YMM3,%YMM0 |
(843) 0x52ea15 VMOVAPS %YMM0,0x20(%R10,%R9,4) |
(843) 0x52ea1c VEXTRACTF64X4 $0x1,%ZMM2,%YMM0 |
(843) 0x52ea23 VADDPS %YMM0,%YMM2,%YMM0 |
(843) 0x52ea27 VSUBPS %YMM0,%YMM4,%YMM0 |
(843) 0x52ea2b VMOVAPS %YMM0,0x40(%R10,%R9,4) |
(843) 0x52ea32 INC %RCX |
(843) 0x52ea35 CMP %RCX,%R11 |
(843) 0x52ea38 JNE 52e6b0 |
0x52ea3e VXORPS %XMM0,%XMM0,%XMM0 |
0x52ea42 VMOVAPS %ZMM0,0x80(%RSP) |
0x52ea4a JMP 52fb52 |
0x52ea4f MOV %ECX,%EAX |
0x52ea51 CMP %R12D,%EAX |
0x52ea54 JGE 52fb60 |
0x52ea5a MOVSXD %EAX,%RCX |
0x52ea5d NOPL (%RAX) |
(846) 0x52ea60 VMOVAPS %ZMM14,0x280(%RSP) |
(846) 0x52ea68 VMOVAPS %ZMM12,0x2c0(%RSP) |
(846) 0x52ea70 VMOVAPS %ZMM10,0xc0(%RSP) |
(846) 0x52ea78 VMOVAPS %ZMM17,0x300(%RSP) |
(846) 0x52ea80 VMOVAPS %ZMM21,0x100(%RSP) |
(846) 0x52ea88 MOVSXD (%R15,%RCX,8),%R11 |
(846) 0x52ea8c LEA (,%R11,8),%RAX |
(846) 0x52ea94 LEA (%RAX,%RAX,2),%R9 |
(846) 0x52ea98 VBROADCASTF64X4 (%RSI,%R9,4),%ZMM0 |
(846) 0x52ea9f MOVSXD %R9D,%RAX |
(846) 0x52eaa2 VBROADCASTF64X4 0x20(%RSI,%RAX,4),%ZMM1 |
(846) 0x52eaaa VBROADCASTF64X4 0x40(%RSI,%RAX,4),%ZMM3 |
(846) 0x52eab2 VSUBPS %ZMM0,%ZMM23,%ZMM5 |
(846) 0x52eab8 VMOVAPS %ZMM5,0x240(%RSP) |
(846) 0x52eac0 VSUBPS %ZMM0,%ZMM25,%ZMM2 |
(846) 0x52eac6 VMOVAPS %ZMM2,0x200(%RSP) |
(846) 0x52eace VSUBPS %ZMM1,%ZMM26,%ZMM4 |
(846) 0x52ead4 VSUBPS %ZMM1,%ZMM28,%ZMM1 |
(846) 0x52eada VMOVAPS %ZMM1,0x140(%RSP) |
(846) 0x52eae2 VSUBPS %ZMM3,%ZMM31,%ZMM10 |
(846) 0x52eae8 VMOVAPS 0x480(%RSP),%ZMM0 |
(846) 0x52eaf0 VSUBPS %ZMM3,%ZMM0,%ZMM11 |
(846) 0x52eaf6 VMULPS %ZMM5,%ZMM5,%ZMM3 |
(846) 0x52eafc VMULPS %ZMM4,%ZMM4,%ZMM5 |
(846) 0x52eb02 VADDPS %ZMM5,%ZMM3,%ZMM3 |
(846) 0x52eb08 VMULPS %ZMM10,%ZMM10,%ZMM5 |
(846) 0x52eb0e VMULPS %ZMM2,%ZMM2,%ZMM6 |
(846) 0x52eb14 VMULPS %ZMM1,%ZMM1,%ZMM7 |
(846) 0x52eb1a VADDPS %ZMM5,%ZMM3,%ZMM3 |
(846) 0x52eb20 VADDPS %ZMM7,%ZMM6,%ZMM5 |
(846) 0x52eb26 VMULPS %ZMM11,%ZMM11,%ZMM6 |
(846) 0x52eb2c VADDPS %ZMM6,%ZMM5,%ZMM5 |
(846) 0x52eb32 VBROADCASTSS -0x1d2804(%RIP),%ZMM6 |
(846) 0x52eb3c VCMPPS $0x1,%ZMM19,%ZMM3,%K4 |
(846) 0x52eb43 VCMPPS $0x1,%ZMM19,%ZMM5,%K5 |
(846) 0x52eb4a VMAXPS %ZMM6,%ZMM3,%ZMM20 |
(846) 0x52eb50 VMAXPS %ZMM6,%ZMM5,%ZMM21 |
(846) 0x52eb56 VBROADCASTSS -0x1d2374(%RIP),%ZMM3 |
(846) 0x52eb60 VMOVAPS %ZMM20,%ZMM5{%K4}{z} |
(846) 0x52eb66 VMOVAPS %ZMM21,%ZMM6{%K5}{z} |
(846) 0x52eb6c VBROADCASTSS -0x1d24ea(%RIP),%ZMM14 |
(846) 0x52eb76 VBROADCASTSS -0x1d2748(%RIP),%ZMM15 |
(846) 0x52eb80 VMOVAPS 0x540(%RSP),%ZMM0 |
(846) 0x52eb88 VMULPS %ZMM5,%ZMM0,%ZMM13 |
(846) 0x52eb8e VMULPS %ZMM6,%ZMM0,%ZMM12 |
(846) 0x52eb94 VMOVAPS %ZMM14,%ZMM18 |
(846) 0x52eb9a VBROADCASTSS -0x1d289c(%RIP),%ZMM5 |
(846) 0x52eba4 VMOVAPS %ZMM27,%ZMM1 |
(846) 0x52ebaa VBROADCASTSS -0x1d2a28(%RIP),%ZMM27 |
(846) 0x52ebb4 VMOVAPS %ZMM24,%ZMM2 |
(846) 0x52ebba VMULPS %ZMM13,%ZMM13,%ZMM24 |
(846) 0x52ebc0 VFMADD213PS %ZMM3,%ZMM24,%ZMM18 |
(846) 0x52ebc6 VMOVAPS %ZMM5,%ZMM6 |
(846) 0x52ebcc VBROADCASTSS -0x1d2916(%RIP),%ZMM16 |
(846) 0x52ebd6 VBROADCASTSS -0x1d2638(%RIP),%ZMM22 |
(846) 0x52ebe0 VMOVAPS %ZMM22,%ZMM23 |
(846) 0x52ebe6 VFMADD213PS %ZMM15,%ZMM24,%ZMM6 |
(846) 0x52ebec VFMADD213PS %ZMM16,%ZMM24,%ZMM23 |
(846) 0x52ebf2 VBROADCASTSS -0x1d2610(%RIP),%ZMM17 |
(846) 0x52ebfc VBROADCASTSS -0x1d249e(%RIP),%ZMM7 |
(846) 0x52ec06 VMOVAPS %ZMM7,%ZMM8 |
(846) 0x52ec0c VFMADD213PS %ZMM27,%ZMM24,%ZMM18 |
(846) 0x52ec12 VFMADD213PS %ZMM17,%ZMM24,%ZMM8 |
(846) 0x52ec18 VBROADCASTSS -0x1d29d6(%RIP),%ZMM19 |
(846) 0x52ec22 VBROADCASTSS -0x1d2a14(%RIP),%ZMM25 |
(846) 0x52ec2c VFMADD213PS %ZMM19,%ZMM24,%ZMM23 |
(846) 0x52ec32 VBROADCASTSS -0x1d2754(%RIP),%ZMM28 |
(846) 0x52ec3c VMULPS %ZMM12,%ZMM12,%ZMM9 |
(846) 0x52ec42 VFMADD213PS %ZMM3,%ZMM9,%ZMM14 |
(846) 0x52ec48 VFMADD213PS %ZMM15,%ZMM9,%ZMM5 |
(846) 0x52ec4e VFMADD213PS %ZMM25,%ZMM24,%ZMM8 |
(846) 0x52ec54 VFMADD213PS %ZMM16,%ZMM9,%ZMM22 |
(846) 0x52ec5a VFMADD213PS %ZMM17,%ZMM9,%ZMM7 |
(846) 0x52ec60 VFMADD213PS %ZMM19,%ZMM9,%ZMM22 |
(846) 0x52ec66 VBROADCASTSS -0x1d2850(%RIP),%ZMM3 |
(846) 0x52ec70 VFMADD213PS %ZMM25,%ZMM9,%ZMM7 |
(846) 0x52ec76 VBROADCASTSS -0x1d24e4(%RIP),%ZMM15 |
(846) 0x52ec80 VMOVAPS %ZMM15,%ZMM16 |
(846) 0x52ec86 VFMADD213PS %ZMM3,%ZMM24,%ZMM16 |
(846) 0x52ec8c VBROADCASTSS -0x1d2752(%RIP),%ZMM17 |
(846) 0x52ec96 VMOVAPS %ZMM17,%ZMM19 |
(846) 0x52ec9c VFMADD213PS %ZMM28,%ZMM24,%ZMM23 |
(846) 0x52eca2 VFMADD213PS %ZMM27,%ZMM24,%ZMM19 |
(846) 0x52eca8 VBROADCASTSS -0x1d24be(%RIP),%ZMM25 |
(846) 0x52ecb2 VBROADCASTSS -0x1d2880(%RIP),%ZMM26 |
(846) 0x52ecbc VMOVAPS %ZMM26,%ZMM31 |
(846) 0x52ecc2 VFMADD213PS %ZMM28,%ZMM9,%ZMM22 |
(846) 0x52ecc8 VFMADD213PS %ZMM25,%ZMM24,%ZMM31 |
(846) 0x52ecce VBROADCASTSS -0x1d2af0(%RIP),%ZMM28 |
(846) 0x52ecd8 VBROADCASTSS -0x1d279a(%RIP),%ZMM29 |
(846) 0x52ece2 VFMADD213PS %ZMM27,%ZMM9,%ZMM14 |
(846) 0x52ece8 VFMADD213PS %ZMM3,%ZMM9,%ZMM15 |
(846) 0x52ecee VMOVAPS %ZMM29,%ZMM3 |
(846) 0x52ecf4 VFMADD213PS %ZMM28,%ZMM24,%ZMM3 |
(846) 0x52ecfa VFMADD213PS %ZMM27,%ZMM9,%ZMM17 |
(846) 0x52ed00 VBROADCASTSS -0x1d2942(%RIP),%ZMM27 |
(846) 0x52ed0a VFMADD213PS %ZMM27,%ZMM24,%ZMM31 |
(846) 0x52ed10 VBROADCASTSS -0x1d25e6(%RIP),%ZMM30 |
(846) 0x52ed1a VFMADD213PS %ZMM30,%ZMM24,%ZMM3 |
(846) 0x52ed20 VBROADCASTSS -0x1d24f2(%RIP),%ZMM0 |
(846) 0x52ed2a VFMADD213PS %ZMM0,%ZMM24,%ZMM31 |
(846) 0x52ed30 VFMADD213PS %ZMM25,%ZMM9,%ZMM26 |
(846) 0x52ed36 VFMADD213PS %ZMM28,%ZMM9,%ZMM29 |
(846) 0x52ed3c VMOVAPS 0x640(%RSP),%ZMM28 |
(846) 0x52ed44 VFMADD213PS %ZMM27,%ZMM9,%ZMM26 |
(846) 0x52ed4a VMOVAPS %ZMM1,%ZMM27 |
(846) 0x52ed50 VRSQRT14PS %ZMM20,%ZMM24 |
(846) 0x52ed56 VFMADD213PS %ZMM30,%ZMM9,%ZMM29 |
(846) 0x52ed5c VMOVAPS 0x880(%RSP),%ZMM1 |
(846) 0x52ed64 VBROADCASTSS -0x1d28f2(%RIP),%ZMM25 |
(846) 0x52ed6e VFMADD213PS %ZMM0,%ZMM9,%ZMM26 |
(846) 0x52ed74 VBROADCASTSS -0x1d2c2a(%RIP),%ZMM0 |
(846) 0x52ed7e VMULPS %ZMM24,%ZMM20,%ZMM9 |
(846) 0x52ed84 VRSQRT14PS %ZMM21,%ZMM20 |
(846) 0x52ed8a VMULPS %ZMM20,%ZMM21,%ZMM21 |
(846) 0x52ed90 VFMADD213PS %ZMM0,%ZMM24,%ZMM9 |
(846) 0x52ed96 VFMADD213PS %ZMM0,%ZMM20,%ZMM21 |
(846) 0x52ed9c VMULPS %ZMM25,%ZMM24,%ZMM0 |
(846) 0x52eda2 VMOVAPS %ZMM2,%ZMM24 |
(846) 0x52eda8 VMULPS %ZMM25,%ZMM20,%ZMM20 |
(846) 0x52edae VMOVAPS 0x6c0(%RSP),%ZMM25 |
(846) 0x52edb6 VMULPS %ZMM9,%ZMM0,%ZMM0{%K4}{z} |
(846) 0x52edbc VMULPS %ZMM21,%ZMM20,%ZMM9{%K5}{z} |
(846) 0x52edc2 VMOVAPS 0x100(%RSP),%ZMM21 |
(846) 0x52edca VFMADD231PS %ZMM6,%ZMM13,%ZMM18 |
(846) 0x52edd0 VFMADD231PS %ZMM8,%ZMM13,%ZMM23 |
(846) 0x52edd6 VFMADD231PS %ZMM5,%ZMM12,%ZMM14 |
(846) 0x52eddc VBROADCASTSS -0x1d28a6(%RIP),%ZMM5 |
(846) 0x52ede6 VFMADD231PS %ZMM16,%ZMM13,%ZMM19 |
(846) 0x52edec VFMADD231PS %ZMM7,%ZMM12,%ZMM22 |
(846) 0x52edf2 VRCP14PS %ZMM19,%ZMM6 |
(846) 0x52edf8 VRCP14PS %ZMM18,%ZMM7 |
(846) 0x52edfe VFNMADD213PS %ZMM5,%ZMM6,%ZMM19 |
(846) 0x52ee04 VMULPS %ZMM19,%ZMM6,%ZMM6 |
(846) 0x52ee0a VMOVAPS 0x500(%RSP),%ZMM19 |
(846) 0x52ee12 VFMADD231PS %ZMM3,%ZMM13,%ZMM31 |
(846) 0x52ee18 VRCP14PS %ZMM14,%ZMM3 |
(846) 0x52ee1e VMULPS %ZMM6,%ZMM31,%ZMM6 |
(846) 0x52ee24 VMOVAPS 0x600(%RSP),%ZMM31 |
(846) 0x52ee2c VMOVAPS 0x180(%RSP),%ZMM30 |
(846) 0x52ee34 VFMADD231PS %ZMM15,%ZMM12,%ZMM17 |
(846) 0x52ee3a VRCP14PS %ZMM17,%ZMM8 |
(846) 0x52ee40 VFNMADD213PS %ZMM5,%ZMM7,%ZMM18 |
(846) 0x52ee46 VFNMADD213PS %ZMM5,%ZMM3,%ZMM14 |
(846) 0x52ee4c VFNMADD213PS %ZMM5,%ZMM8,%ZMM17 |
(846) 0x52ee52 MOV %R11,%RAX |
(846) 0x52ee55 VMULPS %ZMM17,%ZMM8,%ZMM5 |
(846) 0x52ee5b MOV %R11,%RDX |
(846) 0x52ee5e SAL $0x6,%R11 |
(846) 0x52ee62 VBROADCASTF64X4 (%R14,%R11,1),%ZMM8 |
(846) 0x52ee69 VFMADD231PS %ZMM29,%ZMM12,%ZMM26 |
(846) 0x52ee6f VMOVAPS %ZMM1,%ZMM29 |
(846) 0x52ee75 VMOVAPS 0x580(%RSP),%ZMM2 |
(846) 0x52ee7d VMULPS %ZMM5,%ZMM26,%ZMM5 |
(846) 0x52ee83 VMOVAPS 0x680(%RSP),%ZMM26 |
(846) 0x52ee8b VADDPS 0x440(%RSP),%ZMM8,%ZMM8 |
(846) 0x52ee93 VMULPS %ZMM8,%ZMM0,%ZMM15 |
(846) 0x52ee99 VMULPS %ZMM15,%ZMM15,%ZMM15 |
(846) 0x52ee9f VMULPS %ZMM15,%ZMM15,%ZMM16 |
(846) 0x52eea5 VMULPS %ZMM16,%ZMM15,%ZMM15 |
(846) 0x52eeab VMULPS %ZMM8,%ZMM8,%ZMM8 |
(846) 0x52eeb1 VMULPS %ZMM8,%ZMM8,%ZMM16 |
(846) 0x52eeb7 VMULPS %ZMM16,%ZMM8,%ZMM8 |
(846) 0x52eebd VMULPS %ZMM18,%ZMM7,%ZMM7 |
(846) 0x52eec3 VMOVAPS %ZMM30,%ZMM18 |
(846) 0x52eec9 SAL $0x5,%RAX |
(846) 0x52eecd VMULPS %ZMM7,%ZMM23,%ZMM7 |
(846) 0x52eed3 VMOVAPS 0x700(%RSP),%ZMM23 |
(846) 0x52eedb VBROADCASTF64X4 (%R8,%RAX,1),%ZMM16 |
(846) 0x52eee2 VMULPS %ZMM14,%ZMM3,%ZMM3 |
(846) 0x52eee8 VMULPS 0x5c0(%RSP),%ZMM16,%ZMM14 |
(846) 0x52eef0 VMULPS %ZMM6,%ZMM2,%ZMM6 |
(846) 0x52eef6 VADDPS %ZMM6,%ZMM1,%ZMM6 |
(846) 0x52eefc SAL $0x4,%RDX |
(846) 0x52ef00 OR $0x8,%EDX |
(846) 0x52ef03 MOVSXD %EDX,%RAX |
(846) 0x52ef06 VMULPS %ZMM3,%ZMM22,%ZMM3 |
(846) 0x52ef0c VMOVAPS 0x740(%RSP),%ZMM22 |
(846) 0x52ef14 VSUBPS %ZMM6,%ZMM0,%ZMM6 |
(846) 0x52ef1a VBROADCASTF64X4 (%R14,%RAX,4),%ZMM17 |
(846) 0x52ef21 VMULPS 0x400(%RSP),%ZMM17,%ZMM17 |
(846) 0x52ef29 VMULPS %ZMM7,%ZMM2,%ZMM7 |
(846) 0x52ef2f VFMADD213PS %ZMM0,%ZMM13,%ZMM7 |
(846) 0x52ef35 VMULPS %ZMM6,%ZMM14,%ZMM6{%K4}{z} |
(846) 0x52ef3b VMULPS %ZMM15,%ZMM17,%ZMM13 |
(846) 0x52ef41 VMULPS %ZMM8,%ZMM17,%ZMM17 |
(846) 0x52ef47 VMULPS %ZMM7,%ZMM14,%ZMM7 |
(846) 0x52ef4d VMOVAPS %ZMM30,%ZMM14 |
(846) 0x52ef53 VFMADD213PS %ZMM13,%ZMM17,%ZMM14 |
(846) 0x52ef59 VMULPS %ZMM17,%ZMM8,%ZMM8 |
(846) 0x52ef5f VMOVAPS 0x300(%RSP),%ZMM17 |
(846) 0x52ef67 VADDPS 0x80(%RSP),%ZMM6,%ZMM6 |
(846) 0x52ef6f VMULPS %ZMM16,%ZMM22,%ZMM16 |
(846) 0x52ef75 VMULPS %ZMM5,%ZMM2,%ZMM5 |
(846) 0x52ef7b VADDPS %ZMM5,%ZMM1,%ZMM5 |
(846) 0x52ef81 VSUBPS %ZMM5,%ZMM9,%ZMM5 |
(846) 0x52ef87 VMULPS %ZMM5,%ZMM16,%ZMM5{%K5}{z} |
(846) 0x52ef8d VADDPS %ZMM5,%ZMM6,%ZMM1 |
(846) 0x52ef93 VMOVAPS %ZMM1,0x80(%RSP) |
(846) 0x52ef9b VMULPS %ZMM3,%ZMM2,%ZMM3 |
(846) 0x52efa1 VFMADD213PS %ZMM9,%ZMM12,%ZMM3 |
(846) 0x52efa7 VMOVAPS 0x2c0(%RSP),%ZMM12 |
(846) 0x52efaf VMULPS %ZMM3,%ZMM16,%ZMM3 |
(846) 0x52efb5 VMULPS %ZMM9,%ZMM9,%ZMM5 |
(846) 0x52efbb VMULPS %ZMM3,%ZMM5,%ZMM3 |
(846) 0x52efc1 VMULPS %ZMM13,%ZMM15,%ZMM5 |
(846) 0x52efc7 VFMADD132PS 0x1c0(%RSP),%ZMM5,%ZMM8 |
(846) 0x52efcf VSUBPS %ZMM13,%ZMM5,%ZMM5 |
(846) 0x52efd5 VADDPS %ZMM5,%ZMM7,%ZMM5 |
(846) 0x52efdb VMULPS %ZMM0,%ZMM0,%ZMM0 |
(846) 0x52efe1 VMULPS -0x1d27fb(%RIP){1to16},%ZMM14,%ZMM6 |
(846) 0x52efeb VMOVAPS 0x280(%RSP),%ZMM14 |
(846) 0x52eff3 VMULPS %ZMM5,%ZMM0,%ZMM0 |
(846) 0x52eff9 VFMADD132PS -0x1d27cf(%RIP){1to16},%ZMM6,%ZMM8{%K4}{z} |
(846) 0x52f003 VMULPS 0x240(%RSP),%ZMM0,%ZMM2 |
(846) 0x52f00b VMULPS %ZMM0,%ZMM4,%ZMM4 |
(846) 0x52f011 VMULPS %ZMM0,%ZMM10,%ZMM0 |
(846) 0x52f017 VMOVAPS 0xc0(%RSP),%ZMM10 |
(846) 0x52f01f VMULPS 0x200(%RSP),%ZMM3,%ZMM5 |
(846) 0x52f027 VMULPS 0x140(%RSP),%ZMM3,%ZMM1 |
(846) 0x52f02f VMULPS %ZMM3,%ZMM11,%ZMM3 |
(846) 0x52f035 VADDPS %ZMM2,%ZMM14,%ZMM14 |
(846) 0x52f03b VADDPS %ZMM5,%ZMM27,%ZMM27 |
(846) 0x52f041 VADDPS %ZMM2,%ZMM5,%ZMM2 |
(846) 0x52f047 VADDPS %ZMM4,%ZMM10,%ZMM10 |
(846) 0x52f04d VADDPS %ZMM1,%ZMM12,%ZMM12 |
(846) 0x52f053 VADDPS %ZMM4,%ZMM1,%ZMM1 |
(846) 0x52f059 VADDPS %ZMM0,%ZMM17,%ZMM17 |
(846) 0x52f05f VADDPS %ZMM3,%ZMM24,%ZMM24 |
(846) 0x52f065 VADDPS %ZMM8,%ZMM21,%ZMM21 |
(846) 0x52f06b VADDPS %ZMM0,%ZMM3,%ZMM0 |
(846) 0x52f071 VEXTRACTF64X4 $0x1,%ZMM2,%YMM3 |
(846) 0x52f078 VADDPS %YMM3,%YMM2,%YMM2 |
(846) 0x52f07c VMOVAPS (%R10,%R9,4),%YMM3 |
(846) 0x52f082 VSUBPS %YMM2,%YMM3,%YMM2 |
(846) 0x52f086 VMOVAPS 0x20(%R10,%R9,4),%YMM3 |
(846) 0x52f08d VMOVAPS 0x40(%R10,%R9,4),%YMM4 |
(846) 0x52f094 VMOVAPS %YMM2,(%R10,%R9,4) |
(846) 0x52f09a VEXTRACTF64X4 $0x1,%ZMM1,%YMM2 |
(846) 0x52f0a1 VADDPS %YMM2,%YMM1,%YMM1 |
(846) 0x52f0a5 VSUBPS %YMM1,%YMM3,%YMM1 |
(846) 0x52f0a9 VMOVAPS %YMM1,0x20(%R10,%R9,4) |
(846) 0x52f0b0 VEXTRACTF64X4 $0x1,%ZMM0,%YMM1 |
(846) 0x52f0b7 VADDPS %YMM1,%YMM0,%YMM0 |
(846) 0x52f0bb VSUBPS %YMM0,%YMM4,%YMM0 |
(846) 0x52f0bf VMOVAPS %YMM0,0x40(%R10,%R9,4) |
(846) 0x52f0c6 INC %RCX |
(846) 0x52f0c9 CMP %RCX,%R12 |
(846) 0x52f0cc JNE 52ea60 |
0x52f0d2 JMP 52fb60 |
0x52f0d7 MOV %ECX,%EAX |
0x52f0d9 CMP %EDX,%EAX |
0x52f0db JGE 52fb60 |
0x52f0e1 MOVSXD %EAX,%RCX |
0x52f0e4 NOPW %CS:(%RAX,%RAX,1) |
(844) 0x52f0f0 VMOVAPS %ZMM21,0x100(%RSP) |
(844) 0x52f0f8 VMOVAPS %ZMM14,0x280(%RSP) |
(844) 0x52f100 VMOVAPS %ZMM12,0x2c0(%RSP) |
(844) 0x52f108 VMOVAPS %ZMM10,0xc0(%RSP) |
(844) 0x52f110 VMOVAPS %ZMM24,0x240(%RSP) |
(844) 0x52f118 VMOVAPS %ZMM17,0x300(%RSP) |
(844) 0x52f120 MOVSXD (%R15,%RCX,8),%R12 |
(844) 0x52f124 LEA (,%R12,8),%RAX |
(844) 0x52f12c LEA (%RAX,%RAX,2),%R11 |
(844) 0x52f130 MOVSXD %R11D,%R13 |
(844) 0x52f133 VBROADCASTF64X4 0x20(%RSI,%R13,4),%ZMM0 |
(844) 0x52f13b MOV %R12,%R9 |
(844) 0x52f13e MOV %R12,%RAX |
(844) 0x52f141 SAL $0x6,%R12 |
(844) 0x52f145 VBROADCASTF64X4 0x40(%RSI,%R13,4),%ZMM2 |
(844) 0x52f14d VBROADCASTF64X4 (%R14,%R12,1),%ZMM3 |
(844) 0x52f154 VBROADCASTF64X4 (%RSI,%R11,4),%ZMM1 |
(844) 0x52f15b VSUBPS %ZMM1,%ZMM23,%ZMM4 |
(844) 0x52f161 VSUBPS %ZMM1,%ZMM25,%ZMM1 |
(844) 0x52f167 VMOVAPS %ZMM1,0x200(%RSP) |
(844) 0x52f16f VSUBPS %ZMM0,%ZMM26,%ZMM5 |
(844) 0x52f175 VSUBPS %ZMM0,%ZMM28,%ZMM0 |
(844) 0x52f17b VMOVAPS %ZMM0,0x4c0(%RSP) |
(844) 0x52f183 VSUBPS %ZMM2,%ZMM31,%ZMM6 |
(844) 0x52f189 VSUBPS %ZMM2,%ZMM11,%ZMM2 |
(844) 0x52f18f VMULPS %ZMM4,%ZMM4,%ZMM7 |
(844) 0x52f195 VMULPS %ZMM5,%ZMM5,%ZMM8 |
(844) 0x52f19b VADDPS %ZMM8,%ZMM7,%ZMM7 |
(844) 0x52f1a1 VMULPS %ZMM6,%ZMM6,%ZMM8 |
(844) 0x52f1a7 VMULPS %ZMM1,%ZMM1,%ZMM9 |
(844) 0x52f1ad VMULPS %ZMM0,%ZMM0,%ZMM10 |
(844) 0x52f1b3 VADDPS %ZMM10,%ZMM9,%ZMM9 |
(844) 0x52f1b9 VADDPS %ZMM8,%ZMM7,%ZMM7 |
(844) 0x52f1bf VMULPS %ZMM2,%ZMM2,%ZMM8 |
(844) 0x52f1c5 VADDPS %ZMM8,%ZMM9,%ZMM8 |
(844) 0x52f1cb VCMPPS $0x1,%ZMM19,%ZMM7,%K5 |
(844) 0x52f1d2 VBROADCASTSS -0x1d2ea4(%RIP),%ZMM9 |
(844) 0x52f1dc VCMPPS $0x1,%ZMM19,%ZMM8,%K4 |
(844) 0x52f1e3 VMAXPS %ZMM9,%ZMM7,%ZMM7 |
(844) 0x52f1e9 VMAXPS %ZMM9,%ZMM8,%ZMM9 |
(844) 0x52f1ef VRSQRT14PS %ZMM7,%ZMM11 |
(844) 0x52f1f5 VMULPS %ZMM11,%ZMM7,%ZMM15 |
(844) 0x52f1fb VBROADCASTSS -0x1d2d89(%RIP),%ZMM12 |
(844) 0x52f205 VRSQRT14PS %ZMM9,%ZMM16 |
(844) 0x52f20b VMULPS %ZMM12,%ZMM11,%ZMM17 |
(844) 0x52f211 VMOVAPS %ZMM18,%ZMM1 |
(844) 0x52f217 VBROADCASTSS -0x1d30cd(%RIP),%ZMM18 |
(844) 0x52f221 VMOVAPS %ZMM7,%ZMM7{%K5}{z} |
(844) 0x52f227 VMOVAPS 0x540(%RSP),%ZMM10 |
(844) 0x52f22f VMULPS %ZMM7,%ZMM10,%ZMM8 |
(844) 0x52f235 VMOVAPS %ZMM9,%ZMM7{%K4}{z} |
(844) 0x52f23b VMULPS %ZMM16,%ZMM9,%ZMM9 |
(844) 0x52f241 VMULPS %ZMM7,%ZMM10,%ZMM7 |
(844) 0x52f247 VBROADCASTSS -0x1d2a65(%RIP),%ZMM19 |
(844) 0x52f251 VBROADCASTSS -0x1d2bcf(%RIP),%ZMM10 |
(844) 0x52f25b VMULPS %ZMM12,%ZMM16,%ZMM20 |
(844) 0x52f261 VMULPS %ZMM8,%ZMM8,%ZMM21 |
(844) 0x52f267 VMOVAPS %ZMM10,%ZMM12 |
(844) 0x52f26d VBROADCASTSS -0x1d2e3f(%RIP),%ZMM22 |
(844) 0x52f277 VBROADCASTSS -0x1d2f79(%RIP),%ZMM23 |
(844) 0x52f281 VMOVAPS %ZMM23,%ZMM24 |
(844) 0x52f287 VFMADD213PS %ZMM19,%ZMM21,%ZMM12 |
(844) 0x52f28d VFMADD213PS %ZMM22,%ZMM21,%ZMM24 |
(844) 0x52f293 VBROADCASTSS -0x1d3111(%RIP),%ZMM25 |
(844) 0x52f29d VBROADCASTSS -0x1d2fe7(%RIP),%ZMM26 |
(844) 0x52f2a7 VFMADD213PS %ZMM18,%ZMM11,%ZMM15 |
(844) 0x52f2ad VBROADCASTSS -0x1d2d0f(%RIP),%ZMM13 |
(844) 0x52f2b7 VMOVAPS %ZMM13,%ZMM14 |
(844) 0x52f2bd VFMADD213PS %ZMM26,%ZMM21,%ZMM14 |
(844) 0x52f2c3 VMOVAPS %ZMM27,%ZMM31 |
(844) 0x52f2c9 VBROADCASTSS -0x1d2ce7(%RIP),%ZMM27 |
(844) 0x52f2d3 VFMADD213PS %ZMM18,%ZMM16,%ZMM9 |
(844) 0x52f2d9 VBROADCASTSS -0x1d2b7b(%RIP),%ZMM16 |
(844) 0x52f2e3 VMOVAPS %ZMM16,%ZMM18 |
(844) 0x52f2e9 VFMADD213PS %ZMM27,%ZMM21,%ZMM18 |
(844) 0x52f2ef VBROADCASTSS -0x1d30ad(%RIP),%ZMM28 |
(844) 0x52f2f9 VFMADD213PS %ZMM25,%ZMM21,%ZMM12 |
(844) 0x52f2ff VFMADD213PS %ZMM28,%ZMM21,%ZMM14 |
(844) 0x52f305 VBROADCASTSS -0x1d30f7(%RIP),%ZMM29 |
(844) 0x52f30f VMULPS %ZMM7,%ZMM7,%ZMM30 |
(844) 0x52f315 VFMADD213PS %ZMM19,%ZMM30,%ZMM10 |
(844) 0x52f31b VFMADD213PS %ZMM29,%ZMM21,%ZMM18 |
(844) 0x52f321 VBROADCASTSS -0x1d2e43(%RIP),%ZMM19 |
(844) 0x52f32b VFMADD213PS %ZMM22,%ZMM30,%ZMM23 |
(844) 0x52f331 VFMADD213PS %ZMM25,%ZMM30,%ZMM10 |
(844) 0x52f337 VFMADD213PS %ZMM26,%ZMM30,%ZMM13 |
(844) 0x52f33d VMULPS %ZMM15,%ZMM17,%ZMM11{%K5}{z} |
(844) 0x52f343 VFMADD213PS %ZMM27,%ZMM30,%ZMM16 |
(844) 0x52f349 VFMADD213PS %ZMM28,%ZMM30,%ZMM13 |
(844) 0x52f34f VFMADD213PS %ZMM29,%ZMM30,%ZMM16 |
(844) 0x52f355 VBROADCASTSS -0x1d2f3f(%RIP),%ZMM15 |
(844) 0x52f35f VMULPS %ZMM9,%ZMM20,%ZMM9{%K4}{z} |
(844) 0x52f365 VBROADCASTSS -0x1d2bd3(%RIP),%ZMM17 |
(844) 0x52f36f VMOVAPS %ZMM17,%ZMM20 |
(844) 0x52f375 VFMADD213PS %ZMM15,%ZMM21,%ZMM20 |
(844) 0x52f37b VBROADCASTSS -0x1d2e41(%RIP),%ZMM22 |
(844) 0x52f385 VMOVAPS %ZMM22,%ZMM26 |
(844) 0x52f38b VFMADD231PS %ZMM24,%ZMM8,%ZMM12 |
(844) 0x52f391 VFMADD213PS %ZMM25,%ZMM21,%ZMM26 |
(844) 0x52f397 VBROADCASTSS -0x1d2bad(%RIP),%ZMM24 |
(844) 0x52f3a1 VBROADCASTSS -0x1d2f6f(%RIP),%ZMM27 |
(844) 0x52f3ab VFMADD231PS %ZMM23,%ZMM7,%ZMM10 |
(844) 0x52f3b1 VFMADD231PS %ZMM20,%ZMM8,%ZMM26 |
(844) 0x52f3b7 VMOVAPS %ZMM27,%ZMM20 |
(844) 0x52f3bd VBROADCASTSS -0x1d31df(%RIP),%ZMM23 |
(844) 0x52f3c7 VBROADCASTSS -0x1d2e89(%RIP),%ZMM28 |
(844) 0x52f3d1 VFMADD213PS %ZMM24,%ZMM21,%ZMM20 |
(844) 0x52f3d7 VFMADD213PS %ZMM15,%ZMM30,%ZMM17 |
(844) 0x52f3dd VMOVAPS %ZMM28,%ZMM15 |
(844) 0x52f3e3 VFMADD213PS %ZMM23,%ZMM21,%ZMM15 |
(844) 0x52f3e9 VFMADD213PS %ZMM25,%ZMM30,%ZMM22 |
(844) 0x52f3ef VBROADCASTSS -0x1d3031(%RIP),%ZMM25 |
(844) 0x52f3f9 VFMADD213PS %ZMM19,%ZMM21,%ZMM14 |
(844) 0x52f3ff VFMADD213PS %ZMM25,%ZMM21,%ZMM20 |
(844) 0x52f405 VFMADD213PS %ZMM24,%ZMM30,%ZMM27 |
(844) 0x52f40b VBROADCASTSS -0x1d2ce1(%RIP),%ZMM24 |
(844) 0x52f415 VFMADD213PS %ZMM24,%ZMM21,%ZMM15 |
(844) 0x52f41b VFMADD213PS %ZMM19,%ZMM30,%ZMM13 |
(844) 0x52f421 VBROADCASTSS -0x1d2bf3(%RIP),%ZMM19 |
(844) 0x52f42b VFMADD213PS %ZMM23,%ZMM30,%ZMM28 |
(844) 0x52f431 VFMADD213PS %ZMM25,%ZMM30,%ZMM27 |
(844) 0x52f437 VFMADD213PS %ZMM24,%ZMM30,%ZMM28 |
(844) 0x52f43d VFMADD213PS %ZMM19,%ZMM21,%ZMM20 |
(844) 0x52f443 SAL $0x4,%RAX |
(844) 0x52f447 OR $0x8,%EAX |
(844) 0x52f44a CLTQ |
(844) 0x52f44c VBROADCASTF64X4 (%R14,%RAX,4),%ZMM21 |
(844) 0x52f453 VFMADD231PS %ZMM18,%ZMM8,%ZMM14 |
(844) 0x52f459 VFMADD213PS %ZMM19,%ZMM30,%ZMM27 |
(844) 0x52f45f VMOVAPS 0x880(%RSP),%ZMM30 |
(844) 0x52f467 VADDPS 0x440(%RSP),%ZMM3,%ZMM18 |
(844) 0x52f46f VADDPS 0x3c0(%RSP),%ZMM3,%ZMM3 |
(844) 0x52f477 VMULPS 0x400(%RSP),%ZMM21,%ZMM19 |
(844) 0x52f47f VMULPS 0x380(%RSP),%ZMM21,%ZMM21 |
(844) 0x52f487 VFMADD231PS %ZMM16,%ZMM7,%ZMM13 |
(844) 0x52f48d VMULPS %ZMM18,%ZMM11,%ZMM16 |
(844) 0x52f493 VMULPS %ZMM3,%ZMM9,%ZMM23 |
(844) 0x52f499 VMULPS %ZMM16,%ZMM16,%ZMM16 |
(844) 0x52f49f VMULPS %ZMM23,%ZMM23,%ZMM23 |
(844) 0x52f4a5 VMULPS %ZMM16,%ZMM16,%ZMM24 |
(844) 0x52f4ab VMULPS %ZMM24,%ZMM16,%ZMM16 |
(844) 0x52f4b1 VMULPS %ZMM23,%ZMM23,%ZMM24 |
(844) 0x52f4b7 VMULPS %ZMM24,%ZMM23,%ZMM23 |
(844) 0x52f4bd VMULPS %ZMM16,%ZMM19,%ZMM24 |
(844) 0x52f4c3 VMULPS %ZMM18,%ZMM18,%ZMM18 |
(844) 0x52f4c9 VMULPS %ZMM3,%ZMM3,%ZMM3 |
(844) 0x52f4cf VMULPS %ZMM23,%ZMM21,%ZMM25 |
(844) 0x52f4d5 VMULPS %ZMM18,%ZMM18,%ZMM29 |
(844) 0x52f4db VMULPS %ZMM29,%ZMM18,%ZMM18 |
(844) 0x52f4e1 VMULPS %ZMM3,%ZMM3,%ZMM29 |
(844) 0x52f4e7 VMULPS %ZMM29,%ZMM3,%ZMM3 |
(844) 0x52f4ed VMULPS %ZMM18,%ZMM19,%ZMM19 |
(844) 0x52f4f3 VMULPS %ZMM24,%ZMM16,%ZMM16 |
(844) 0x52f4f9 VMULPS %ZMM3,%ZMM21,%ZMM21 |
(844) 0x52f4ff VMULPS %ZMM19,%ZMM18,%ZMM18 |
(844) 0x52f505 VMULPS %ZMM21,%ZMM3,%ZMM3 |
(844) 0x52f50b VBROADCASTSS -0x1d2d25(%RIP),%ZMM29 |
(844) 0x52f515 VFMADD213PS %ZMM24,%ZMM1,%ZMM19 |
(844) 0x52f51b VFMADD213PS %ZMM25,%ZMM1,%ZMM21 |
(844) 0x52f521 VMULPS %ZMM29,%ZMM19,%ZMM19 |
(844) 0x52f527 VMULPS %ZMM29,%ZMM21,%ZMM21 |
(844) 0x52f52d VBROADCASTSS -0x1d2d03(%RIP),%ZMM29 |
(844) 0x52f537 VMOVAPS 0x1c0(%RSP),%ZMM0 |
(844) 0x52f53f VFMADD213PS %ZMM16,%ZMM0,%ZMM18 |
(844) 0x52f545 VFMADD231PS %ZMM18,%ZMM29,%ZMM19{%K5}{z} |
(844) 0x52f54b VBROADCASTSS -0x1d3015(%RIP),%ZMM18 |
(844) 0x52f555 VMULPS %ZMM25,%ZMM23,%ZMM23 |
(844) 0x52f55b VFMADD213PS %ZMM23,%ZMM0,%ZMM3 |
(844) 0x52f561 VFMADD231PS %ZMM3,%ZMM29,%ZMM21{%K4}{z} |
(844) 0x52f567 VRCP14PS %ZMM26,%ZMM3 |
(844) 0x52f56d VRCP14PS %ZMM12,%ZMM29 |
(844) 0x52f573 VFNMADD213PS %ZMM18,%ZMM3,%ZMM26 |
(844) 0x52f579 VMULPS %ZMM26,%ZMM3,%ZMM3 |
(844) 0x52f57f VMOVAPS 0x680(%RSP),%ZMM26 |
(844) 0x52f587 VFMADD231PS %ZMM15,%ZMM8,%ZMM20 |
(844) 0x52f58d VRCP14PS %ZMM10,%ZMM15 |
(844) 0x52f593 VMULPS %ZMM3,%ZMM20,%ZMM3 |
(844) 0x52f599 VFMADD231PS %ZMM17,%ZMM7,%ZMM22 |
(844) 0x52f59f VRCP14PS %ZMM22,%ZMM17 |
(844) 0x52f5a5 VFNMADD213PS %ZMM18,%ZMM29,%ZMM12 |
(844) 0x52f5ab VFNMADD213PS %ZMM18,%ZMM15,%ZMM10 |
(844) 0x52f5b1 VFNMADD213PS %ZMM18,%ZMM17,%ZMM22 |
(844) 0x52f5b7 VMULPS %ZMM22,%ZMM17,%ZMM17 |
(844) 0x52f5bd VMOVAPS 0x740(%RSP),%ZMM22 |
(844) 0x52f5c5 VFMADD231PS %ZMM28,%ZMM7,%ZMM27 |
(844) 0x52f5cb VMOVAPS 0x640(%RSP),%ZMM28 |
(844) 0x52f5d3 VMULPS %ZMM12,%ZMM29,%ZMM12 |
(844) 0x52f5d9 VMOVAPS %ZMM30,%ZMM29 |
(844) 0x52f5df VMOVAPS 0x580(%RSP),%ZMM18 |
(844) 0x52f5e7 VMULPS %ZMM12,%ZMM14,%ZMM12 |
(844) 0x52f5ed VMULPS %ZMM10,%ZMM15,%ZMM10 |
(844) 0x52f5f3 SAL $0x5,%R9 |
(844) 0x52f5f7 VMULPS %ZMM10,%ZMM13,%ZMM10 |
(844) 0x52f5fd VBROADCASTF64X4 (%R8,%R9,1),%ZMM13 |
(844) 0x52f604 VMULPS %ZMM17,%ZMM27,%ZMM14 |
(844) 0x52f60a VMOVAPS %ZMM31,%ZMM27 |
(844) 0x52f610 VMOVAPS 0x300(%RSP),%ZMM17 |
(844) 0x52f618 VMULPS 0x5c0(%RSP),%ZMM13,%ZMM15 |
(844) 0x52f620 VMULPS %ZMM3,%ZMM18,%ZMM3 |
(844) 0x52f626 VADDPS %ZMM3,%ZMM30,%ZMM3 |
(844) 0x52f62c VSUBPS %ZMM3,%ZMM11,%ZMM3 |
(844) 0x52f632 VMULPS %ZMM3,%ZMM15,%ZMM3{%K5}{z} |
(844) 0x52f638 VADDPS 0x80(%RSP),%ZMM3,%ZMM3 |
(844) 0x52f640 VMOVAPS 0x600(%RSP),%ZMM31 |
(844) 0x52f648 VMULPS %ZMM13,%ZMM22,%ZMM13 |
(844) 0x52f64e VMULPS %ZMM14,%ZMM18,%ZMM14 |
(844) 0x52f654 VADDPS %ZMM14,%ZMM30,%ZMM14 |
(844) 0x52f65a VSUBPS %ZMM14,%ZMM9,%ZMM14 |
(844) 0x52f660 VMULPS %ZMM14,%ZMM13,%ZMM14{%K4}{z} |
(844) 0x52f666 VADDPS %ZMM14,%ZMM3,%ZMM3 |
(844) 0x52f66c VMOVAPS %ZMM3,0x80(%RSP) |
(844) 0x52f674 VMOVAPS 0x280(%RSP),%ZMM14 |
(844) 0x52f67c VMULPS %ZMM12,%ZMM18,%ZMM3 |
(844) 0x52f682 VMOVAPS 0x2c0(%RSP),%ZMM12 |
(844) 0x52f68a VFMADD213PS %ZMM11,%ZMM8,%ZMM3 |
(844) 0x52f690 VMULPS %ZMM3,%ZMM15,%ZMM3 |
(844) 0x52f696 VMULPS %ZMM10,%ZMM18,%ZMM8 |
(844) 0x52f69c VMOVAPS %ZMM1,%ZMM18 |
(844) 0x52f6a2 VFMADD213PS %ZMM9,%ZMM7,%ZMM8 |
(844) 0x52f6a8 VADDPS 0x100(%RSP),%ZMM19,%ZMM7 |
(844) 0x52f6b0 VMOVAPS 0x500(%RSP),%ZMM19 |
(844) 0x52f6b8 VSUBPS %ZMM24,%ZMM16,%ZMM10 |
(844) 0x52f6be VMOVAPS 0x240(%RSP),%ZMM24 |
(844) 0x52f6c6 VADDPS %ZMM10,%ZMM3,%ZMM3 |
(844) 0x52f6cc VMULPS %ZMM11,%ZMM11,%ZMM10 |
(844) 0x52f6d2 VMOVAPS 0x480(%RSP),%ZMM11 |
(844) 0x52f6da VMULPS %ZMM3,%ZMM10,%ZMM3 |
(844) 0x52f6e0 VMOVAPS 0xc0(%RSP),%ZMM10 |
(844) 0x52f6e8 VMULPS %ZMM8,%ZMM13,%ZMM8 |
(844) 0x52f6ee VADDPS %ZMM21,%ZMM7,%ZMM21 |
(844) 0x52f6f4 VSUBPS %ZMM25,%ZMM23,%ZMM7 |
(844) 0x52f6fa VMOVAPS 0x6c0(%RSP),%ZMM25 |
(844) 0x52f702 VMOVAPS 0x700(%RSP),%ZMM23 |
(844) 0x52f70a VADDPS %ZMM7,%ZMM8,%ZMM7 |
(844) 0x52f710 VMULPS %ZMM9,%ZMM9,%ZMM8 |
(844) 0x52f716 VMULPS %ZMM7,%ZMM8,%ZMM7 |
(844) 0x52f71c VMULPS %ZMM3,%ZMM4,%ZMM4 |
(844) 0x52f722 VMULPS %ZMM3,%ZMM5,%ZMM5 |
(844) 0x52f728 VMULPS %ZMM3,%ZMM6,%ZMM3 |
(844) 0x52f72e VMULPS 0x200(%RSP),%ZMM7,%ZMM1 |
(844) 0x52f736 VMULPS 0x4c0(%RSP),%ZMM7,%ZMM0 |
(844) 0x52f73e VMULPS %ZMM7,%ZMM2,%ZMM2 |
(844) 0x52f744 VADDPS %ZMM4,%ZMM14,%ZMM14 |
(844) 0x52f74a VADDPS %ZMM1,%ZMM27,%ZMM27 |
(844) 0x52f750 VADDPS %ZMM1,%ZMM4,%ZMM1 |
(844) 0x52f756 VADDPS %ZMM5,%ZMM10,%ZMM10 |
(844) 0x52f75c VADDPS %ZMM0,%ZMM12,%ZMM12 |
(844) 0x52f762 VADDPS %ZMM3,%ZMM17,%ZMM17 |
(844) 0x52f768 VADDPS %ZMM2,%ZMM24,%ZMM24 |
(844) 0x52f76e VADDPS %ZMM0,%ZMM5,%ZMM0 |
(844) 0x52f774 VADDPS %ZMM2,%ZMM3,%ZMM2 |
(844) 0x52f77a VEXTRACTF64X4 $0x1,%ZMM1,%YMM3 |
(844) 0x52f781 VADDPS %YMM3,%YMM1,%YMM1 |
(844) 0x52f785 VMOVAPS (%R10,%R11,4),%YMM3 |
(844) 0x52f78b VSUBPS %YMM1,%YMM3,%YMM1 |
(844) 0x52f78f VMOVAPS 0x20(%R10,%R11,4),%YMM3 |
(844) 0x52f796 VMOVAPS 0x40(%R10,%R11,4),%YMM4 |
(844) 0x52f79d VMOVAPS %YMM1,(%R10,%R11,4) |
(844) 0x52f7a3 VEXTRACTF64X4 $0x1,%ZMM0,%YMM1 |
(844) 0x52f7aa VADDPS %YMM1,%YMM0,%YMM0 |
(844) 0x52f7ae VSUBPS %YMM0,%YMM3,%YMM0 |
(844) 0x52f7b2 VMOVAPS %YMM0,0x20(%R10,%R11,4) |
(844) 0x52f7b9 VEXTRACTF64X4 $0x1,%ZMM2,%YMM0 |
(844) 0x52f7c0 VADDPS %YMM0,%YMM2,%YMM0 |
(844) 0x52f7c4 VSUBPS %YMM0,%YMM4,%YMM0 |
(844) 0x52f7c8 VMOVAPS %YMM0,0x40(%R10,%R11,4) |
(844) 0x52f7cf INC %RCX |
(844) 0x52f7d2 CMP %RCX,0x140(%RSP) |
(844) 0x52f7da JNE 52f0f0 |
0x52f7e0 JMP 52fb60 |
0x52f7e5 MOV %ECX,%EAX |
0x52f7e7 VMOVAPS 0x180(%RSP),%ZMM18 |
0x52f7ef CMP %R11D,%EAX |
0x52f7f2 JGE 52fb60 |
0x52f7f8 MOVSXD %EAX,%RCX |
0x52f7fb NOPL (%RAX,%RAX,1) |
(842) 0x52f800 MOVSXD (%R15,%RCX,8),%RAX |
(842) 0x52f804 LEA (,%RAX,8),%RDX |
(842) 0x52f80c LEA (%RDX,%RDX,2),%R9 |
(842) 0x52f810 VBROADCASTF64X4 (%RSI,%R9,4),%ZMM0 |
(842) 0x52f817 MOVSXD %R9D,%RDX |
(842) 0x52f81a VBROADCASTF64X4 0x20(%RSI,%RDX,4),%ZMM1 |
(842) 0x52f822 VBROADCASTF64X4 0x40(%RSI,%RDX,4),%ZMM3 |
(842) 0x52f82a VSUBPS %ZMM0,%ZMM23,%ZMM2 |
(842) 0x52f830 VSUBPS %ZMM0,%ZMM25,%ZMM0 |
(842) 0x52f836 VSUBPS %ZMM1,%ZMM26,%ZMM4 |
(842) 0x52f83c VSUBPS %ZMM1,%ZMM28,%ZMM1 |
(842) 0x52f842 VSUBPS %ZMM3,%ZMM31,%ZMM5 |
(842) 0x52f848 VSUBPS %ZMM3,%ZMM11,%ZMM6 |
(842) 0x52f84e VMULPS %ZMM2,%ZMM2,%ZMM3 |
(842) 0x52f854 VMULPS %ZMM4,%ZMM4,%ZMM7 |
(842) 0x52f85a VADDPS %ZMM7,%ZMM3,%ZMM3 |
(842) 0x52f860 VMULPS %ZMM5,%ZMM5,%ZMM7 |
(842) 0x52f866 VMULPS %ZMM0,%ZMM0,%ZMM8 |
(842) 0x52f86c VADDPS %ZMM7,%ZMM3,%ZMM3 |
(842) 0x52f872 VMULPS %ZMM1,%ZMM1,%ZMM7 |
(842) 0x52f878 VADDPS %ZMM7,%ZMM8,%ZMM7 |
(842) 0x52f87e VMULPS %ZMM6,%ZMM6,%ZMM8 |
(842) 0x52f884 VADDPS %ZMM8,%ZMM7,%ZMM7 |
(842) 0x52f88a VCMPPS $0x1,%ZMM19,%ZMM3,%K5 |
(842) 0x52f891 VCMPPS $0x1,%ZMM19,%ZMM7,%K4 |
(842) 0x52f898 VBROADCASTSS -0x1d356a(%RIP),%ZMM8 |
(842) 0x52f8a2 VMAXPS %ZMM8,%ZMM3,%ZMM3 |
(842) 0x52f8a8 VRSQRT14PS %ZMM3,%ZMM9 |
(842) 0x52f8ae VMAXPS %ZMM8,%ZMM7,%ZMM7 |
(842) 0x52f8b4 VBROADCASTSS -0x1d3442(%RIP),%ZMM8 |
(842) 0x52f8be VMOVAPS %ZMM10,%ZMM18 |
(842) 0x52f8c4 VBROADCASTSS -0x1d377a(%RIP),%ZMM10 |
(842) 0x52f8ce VMULPS %ZMM9,%ZMM3,%ZMM3 |
(842) 0x52f8d4 VMULPS %ZMM8,%ZMM9,%ZMM11 |
(842) 0x52f8da VMOVAPS %ZMM12,%ZMM30 |
(842) 0x52f8e0 VRSQRT14PS %ZMM7,%ZMM12 |
(842) 0x52f8e6 VMULPS %ZMM12,%ZMM7,%ZMM7 |
(842) 0x52f8ec VFMADD213PS %ZMM10,%ZMM9,%ZMM3 |
(842) 0x52f8f2 VMULPS %ZMM8,%ZMM12,%ZMM8 |
(842) 0x52f8f8 VFMADD213PS %ZMM10,%ZMM12,%ZMM7 |
(842) 0x52f8fe MOV %RAX,%RDX |
(842) 0x52f901 SAL $0x6,%RAX |
(842) 0x52f905 VBROADCASTF64X4 (%R14,%RAX,1),%ZMM9 |
(842) 0x52f90c VMULPS %ZMM3,%ZMM11,%ZMM3{%K5}{z} |
(842) 0x52f912 SAL $0x4,%RDX |
(842) 0x52f916 OR $0x8,%EDX |
(842) 0x52f919 MOVSXD %EDX,%RAX |
(842) 0x52f91c VBROADCASTF64X4 (%R14,%RAX,4),%ZMM10 |
(842) 0x52f923 VMULPS %ZMM7,%ZMM8,%ZMM7{%K4}{z} |
(842) 0x52f929 VADDPS 0x440(%RSP),%ZMM9,%ZMM8 |
(842) 0x52f931 VADDPS %ZMM9,%ZMM15,%ZMM9 |
(842) 0x52f937 VMULPS %ZMM10,%ZMM13,%ZMM11 |
(842) 0x52f93d VMULPS %ZMM8,%ZMM3,%ZMM12 |
(842) 0x52f943 VMULPS %ZMM9,%ZMM7,%ZMM13 |
(842) 0x52f949 VMULPS %ZMM10,%ZMM16,%ZMM10 |
(842) 0x52f94f VMULPS %ZMM12,%ZMM12,%ZMM12 |
(842) 0x52f955 VMULPS %ZMM13,%ZMM13,%ZMM13 |
(842) 0x52f95b VMOVAPS %ZMM27,%ZMM29 |
(842) 0x52f961 VMOVAPS %ZMM14,%ZMM27 |
(842) 0x52f967 VMULPS %ZMM12,%ZMM12,%ZMM14 |
(842) 0x52f96d VMULPS %ZMM14,%ZMM12,%ZMM12 |
(842) 0x52f973 VMULPS %ZMM13,%ZMM13,%ZMM14 |
(842) 0x52f979 VMULPS %ZMM14,%ZMM13,%ZMM13 |
(842) 0x52f97f VMULPS %ZMM12,%ZMM11,%ZMM14 |
(842) 0x52f985 VMULPS %ZMM13,%ZMM10,%ZMM15 |
(842) 0x52f98b VMULPS %ZMM8,%ZMM8,%ZMM8 |
(842) 0x52f991 VMULPS %ZMM9,%ZMM9,%ZMM9 |
(842) 0x52f997 VMULPS %ZMM8,%ZMM8,%ZMM16 |
(842) 0x52f99d VMULPS %ZMM16,%ZMM8,%ZMM8 |
(842) 0x52f9a3 VMULPS %ZMM9,%ZMM9,%ZMM16 |
(842) 0x52f9a9 VMULPS %ZMM16,%ZMM9,%ZMM9 |
(842) 0x52f9af VMULPS %ZMM8,%ZMM11,%ZMM11 |
(842) 0x52f9b5 VMULPS %ZMM9,%ZMM10,%ZMM10 |
(842) 0x52f9bb VMULPS %ZMM11,%ZMM8,%ZMM8 |
(842) 0x52f9c1 VMULPS %ZMM14,%ZMM12,%ZMM12 |
(842) 0x52f9c7 VMULPS %ZMM10,%ZMM9,%ZMM9 |
(842) 0x52f9cd VMOVAPS 0x180(%RSP),%ZMM16 |
(842) 0x52f9d5 VFMADD213PS %ZMM14,%ZMM16,%ZMM11 |
(842) 0x52f9db VFMADD213PS %ZMM15,%ZMM16,%ZMM10 |
(842) 0x52f9e1 VBROADCASTSS -0x1d31fb(%RIP),%ZMM16 |
(842) 0x52f9eb VMOVAPS 0x1c0(%RSP),%ZMM20 |
(842) 0x52f9f3 VFMADD213PS %ZMM12,%ZMM20,%ZMM8 |
(842) 0x52f9f9 VMULPS %ZMM16,%ZMM11,%ZMM11 |
(842) 0x52f9ff VMULPS %ZMM16,%ZMM10,%ZMM10 |
(842) 0x52fa05 VBROADCASTSS -0x1d31db(%RIP),%ZMM16 |
(842) 0x52fa0f VFMADD231PS %ZMM8,%ZMM16,%ZMM11{%K5}{z} |
(842) 0x52fa15 VMULPS %ZMM15,%ZMM13,%ZMM8 |
(842) 0x52fa1b VMOVAPS 0x400(%RSP),%ZMM13 |
(842) 0x52fa23 VFMADD213PS %ZMM8,%ZMM20,%ZMM9 |
(842) 0x52fa29 VFMADD231PS %ZMM9,%ZMM16,%ZMM10{%K4}{z} |
(842) 0x52fa2f VMOVAPS 0x380(%RSP),%ZMM16 |
(842) 0x52fa37 VADDPS %ZMM11,%ZMM21,%ZMM9 |
(842) 0x52fa3d VMOVAPS 0x480(%RSP),%ZMM11 |
(842) 0x52fa45 VADDPS %ZMM10,%ZMM9,%ZMM21 |
(842) 0x52fa4b VMOVAPS %ZMM18,%ZMM10 |
(842) 0x52fa51 VSUBPS %ZMM14,%ZMM12,%ZMM9 |
(842) 0x52fa57 VMOVAPS %ZMM27,%ZMM14 |
(842) 0x52fa5d VMOVAPS %ZMM29,%ZMM27 |
(842) 0x52fa63 VMOVAPS %ZMM30,%ZMM12 |
(842) 0x52fa69 VMULPS %ZMM3,%ZMM3,%ZMM3 |
(842) 0x52fa6f VMULPS %ZMM9,%ZMM3,%ZMM3 |
(842) 0x52fa75 VSUBPS %ZMM15,%ZMM8,%ZMM8 |
(842) 0x52fa7b VMOVAPS 0x3c0(%RSP),%ZMM15 |
(842) 0x52fa83 VMULPS %ZMM7,%ZMM7,%ZMM7 |
(842) 0x52fa89 VMULPS %ZMM8,%ZMM7,%ZMM7 |
(842) 0x52fa8f VMULPS %ZMM3,%ZMM2,%ZMM2 |
(842) 0x52fa95 VMULPS %ZMM3,%ZMM4,%ZMM4 |
(842) 0x52fa9b VMULPS %ZMM3,%ZMM5,%ZMM3 |
(842) 0x52faa1 VMULPS %ZMM7,%ZMM0,%ZMM0 |
(842) 0x52faa7 VMULPS %ZMM7,%ZMM1,%ZMM1 |
(842) 0x52faad VMULPS %ZMM7,%ZMM6,%ZMM5 |
(842) 0x52fab3 VADDPS %ZMM2,%ZMM14,%ZMM14 |
(842) 0x52fab9 VADDPS %ZMM0,%ZMM29,%ZMM27 |
(842) 0x52fabf VADDPS %ZMM0,%ZMM2,%ZMM0 |
(842) 0x52fac5 VADDPS %ZMM4,%ZMM18,%ZMM10 |
(842) 0x52facb VADDPS %ZMM1,%ZMM30,%ZMM12 |
(842) 0x52fad1 VADDPS %ZMM3,%ZMM17,%ZMM17 |
(842) 0x52fad7 VADDPS %ZMM5,%ZMM24,%ZMM24 |
(842) 0x52fadd VADDPS %ZMM1,%ZMM4,%ZMM1 |
(842) 0x52fae3 VADDPS %ZMM5,%ZMM3,%ZMM2 |
(842) 0x52fae9 VEXTRACTF64X4 $0x1,%ZMM0,%YMM3 |
(842) 0x52faf0 VADDPS %YMM3,%YMM0,%YMM0 |
(842) 0x52faf4 VMOVAPS (%R10,%R9,4),%YMM3 |
(842) 0x52fafa VSUBPS %YMM0,%YMM3,%YMM0 |
(842) 0x52fafe VMOVAPS 0x20(%R10,%R9,4),%YMM3 |
(842) 0x52fb05 VMOVAPS 0x40(%R10,%R9,4),%YMM4 |
(842) 0x52fb0c VMOVAPS %YMM0,(%R10,%R9,4) |
(842) 0x52fb12 VEXTRACTF64X4 $0x1,%ZMM1,%YMM0 |
(842) 0x52fb19 VADDPS %YMM0,%YMM1,%YMM0 |
(842) 0x52fb1d VSUBPS %YMM0,%YMM3,%YMM0 |
(842) 0x52fb21 VMOVAPS %YMM0,0x20(%R10,%R9,4) |
(842) 0x52fb28 VEXTRACTF64X4 $0x1,%ZMM2,%YMM0 |
(842) 0x52fb2f VADDPS %YMM0,%YMM2,%YMM0 |
(842) 0x52fb33 VSUBPS %YMM0,%YMM4,%YMM0 |
(842) 0x52fb37 VMOVAPS %YMM0,0x40(%R10,%R9,4) |
(842) 0x52fb3e INC %RCX |
(842) 0x52fb41 CMP %RCX,%R11 |
(842) 0x52fb44 JNE 52f800 |
0x52fb4a VMOVAPS 0x880(%RSP),%ZMM29 |
0x52fb52 VMOVAPS 0x180(%RSP),%ZMM18 |
0x52fb5a NOPW (%RAX,%RAX,1) |
0x52fb60 VSHUFF64X2 $-0x78,%ZMM27,%ZMM14,%ZMM0 |
0x52fb67 VSHUFF64X2 $-0x23,%ZMM27,%ZMM14,%ZMM1 |
0x52fb6e VADDPS %ZMM1,%ZMM0,%ZMM0 |
0x52fb74 VPERMILPD $0x55,%ZMM0,%ZMM1 |
0x52fb7b VADDPS %ZMM1,%ZMM0,%ZMM0 |
0x52fb81 VPERMILPS $-0x4f,%ZMM0,%ZMM1 |
0x52fb88 VADDPS %ZMM1,%ZMM0,%ZMM0 |
0x52fb8e MOV $0x1111,%AX |
0x52fb92 KMOVD %EAX,%K4 |
0x52fb96 VCOMPRESSPS %ZMM0,%ZMM0{%K4}{z} |
0x52fb9c VADDPS (%R10,%RBX,4),%XMM0,%XMM1 |
0x52fba2 VMOVAPS %XMM1,(%R10,%RBX,4) |
0x52fba8 MOV 0x68(%RSP),%RAX |
0x52fbad LEA 0x2(%RAX,%RAX,2),%RAX |
0x52fbb2 VPERMILPD $0x1,%XMM0,%XMM1 |
0x52fbb8 VADDPS %XMM1,%XMM0,%XMM0 |
0x52fbbc VSHUFF64X2 $-0x78,%ZMM12,%ZMM10,%ZMM1 |
0x52fbc3 VSHUFF64X2 $-0x23,%ZMM12,%ZMM10,%ZMM2 |
0x52fbca VADDPS %ZMM2,%ZMM1,%ZMM1 |
0x52fbd0 VPERMILPD $0x55,%ZMM1,%ZMM2 |
0x52fbd7 VADDPS %ZMM2,%ZMM1,%ZMM1 |
0x52fbdd VPERMILPS $-0x4f,%ZMM1,%ZMM2 |
0x52fbe4 VADDPS %ZMM2,%ZMM1,%ZMM1 |
0x52fbea VCOMPRESSPS %ZMM1,%ZMM1{%K4}{z} |
0x52fbf0 MOV 0x58(%RSP),%RCX |
0x52fbf5 VADDPS (%R10,%RCX,4),%XMM1,%XMM2 |
0x52fbfb VMOVAPS %XMM2,(%R10,%RCX,4) |
0x52fc01 VPERMILPD $0x1,%XMM1,%XMM2 |
0x52fc07 VSHUFF64X2 $-0x78,%ZMM24,%ZMM17,%ZMM3 |
0x52fc0e VSHUFF64X2 $-0x23,%ZMM24,%ZMM17,%ZMM4 |
0x52fc15 VADDPS %ZMM4,%ZMM3,%ZMM3 |
0x52fc1b VPERMILPD $0x55,%ZMM3,%ZMM4 |
0x52fc22 VADDPS %ZMM4,%ZMM3,%ZMM3 |
0x52fc28 VPERMILPS $-0x4f,%ZMM3,%ZMM4 |
0x52fc2f VADDPS %ZMM4,%ZMM3,%ZMM3 |
0x52fc35 VCOMPRESSPS %ZMM3,%ZMM3{%K4}{z} |
0x52fc3b MOV 0x60(%RSP),%RCX |
0x52fc40 VADDPS (%R10,%RCX,4),%XMM3,%XMM4 |
0x52fc46 VMOVAPS %XMM4,(%R10,%RCX,4) |
0x52fc4c VADDPS %XMM2,%XMM1,%XMM1 |
0x52fc50 VPERMILPD $0x1,%XMM3,%XMM2 |
0x52fc56 VADDPS %XMM2,%XMM3,%XMM2 |
0x52fc5a VMOVSHDUP %XMM2,%XMM3 |
0x52fc5e MOV 0x40(%RSP),%RCX |
0x52fc63 MOV 0x70(%RSP),%RDX |
0x52fc68 VMOVSD (%RCX,%RDX,4),%XMM4 |
0x52fc6d VUNPCKLPS %XMM1,%XMM0,%XMM5 |
0x52fc71 VMOVAPS 0x370(%RSP),%XMM6 |
0x52fc7a VPERMT2PS %XMM1,%XMM6,%XMM0 |
0x52fc80 VADDPS %XMM0,%XMM5,%XMM0 |
0x52fc84 VADDPS %XMM4,%XMM0,%XMM0 |
0x52fc88 VMOVLPS %XMM0,(%RCX,%RDX,4) |
0x52fc8d VADDSS %XMM3,%XMM2,%XMM0 |
0x52fc91 VADDSS (%RCX,%RAX,4),%XMM0,%XMM0 |
0x52fc96 VMOVSS %XMM0,(%RCX,%RAX,4) |
0x52fc9b TESTL $0x200,0x30(%RSP) |
0x52fca3 JE 52d320 |
0x52fca9 VMOVAPD 0x80(%RSP),%ZMM1 |
0x52fcb1 VSHUFF64X2 $-0x12,%ZMM1,%ZMM1,%ZMM0 |
0x52fcb8 VADDPS %ZMM0,%ZMM1,%ZMM0 |
0x52fcbe VEXTRACTF128 $0x1,%YMM0,%XMM1 |
0x52fcc4 VADDPS %XMM1,%XMM0,%XMM0 |
0x52fcc8 VPERMILPD $0x1,%XMM0,%XMM1 |
0x52fcce VADDPS %XMM1,%XMM0,%XMM0 |
0x52fcd2 VMOVSHDUP %XMM0,%XMM1 |
0x52fcd6 VADDSS %XMM1,%XMM0,%XMM0 |
0x52fcda MOV 0x18(%RSP),%RAX |
0x52fcdf VADDSS (%RAX),%XMM0,%XMM0 |
0x52fce3 VMOVSS %XMM0,(%RAX) |
0x52fce7 JMP 52d320 |
/home/eoseret/gromacs-2024.2/src/gromacs/nbnxm/simd_load_store_functions.h: 70 - 109 |
-------------------------------------------------------------------------------- |
70: return (iCluster >> 1); |
[...] |
93: return loadU1DualHsimd(ptr + offset + iRegister * 2); |
[...] |
109: return loadDuplicateHsimd(ptr + offset); |
/home/eoseret/gromacs-2024.2/src/gromacs/nbnxm/simd_kernel_inner.h: 63 - 275 |
-------------------------------------------------------------------------------- |
63: const int cj = l_cj[cjind].cj; |
64: |
65: /* Atom indices (of the first atom in the cluster) */ |
66: const int gmx_unused aj = cj * c_jClusterSize; |
67: |
68: const int ajx = |
69: (c_jClusterSize == c_stride ? aj * DIM : (cj >> 1) * DIM * c_stride + (cj & 1) * c_jClusterSize); |
[...] |
225: aj2 = aj * 2; |
[...] |
275: const SimdReal sqrtEpsilonJ = loadJAtomData<kernelLayout>(ljc, aj2 + c_stride); |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_vector.h: 1064 - 1064 |
-------------------------------------------------------------------------------- |
1064: return *(this->_M_impl._M_start + __n); |
/usr/lib/gcc/x86_64-redhat-linux/11/../../../../include/c++/11/bits/stl_iterator.h: 1054 - 1182 |
-------------------------------------------------------------------------------- |
1054: ++_M_current; |
[...] |
1182: { return __lhs.base() != __rhs.base(); } |
/home/eoseret/gromacs-2024.2/src/gromacs/nbnxm/simd_diagonal_masker.h: 140 - 144 |
-------------------------------------------------------------------------------- |
140: if (jClusterIndex * 2 == iClusterIndex) |
141: { |
142: boolV = genBoolArr<nR>([&](int i) { return boolV[i] && diagonalMaskVV_[0][i]; }); |
143: } |
144: else if (jClusterIndex * 2 + 1 == iClusterIndex) |
/home/eoseret/gromacs-2024.2/src/gromacs/simd/include/gromacs/simd/impl_x86_avx_512/impl_x86_avx_512_util_float.h: 95 - 474 |
-------------------------------------------------------------------------------- |
95: _mm512_shuffle_f32x4(a.simdInternal_, a.simdInternal_, 0xEE)); |
96: t = _mm256_load_ps(m); |
97: t = _mm256_sub_ps(t, _mm512_castps512_ps256(a.simdInternal_)); |
98: _mm256_store_ps(m, t); |
[...] |
370: return { _mm512_castpd_ps(_mm512_broadcast_f64x4(_mm256_load_pd(reinterpret_cast<const double*>(m)))) }; |
371: } |
372: |
373: static inline SimdFloat gmx_simdcall loadU1DualHsimd(const float* m) |
374: { |
375: return { _mm512_shuffle_f32x4( |
[...] |
459: t0 = _mm512_shuffle_f32x4(v0.simdInternal_, v1.simdInternal_, 0x88); |
460: t1 = _mm512_shuffle_f32x4(v0.simdInternal_, v1.simdInternal_, 0xDD); |
461: t0 = _mm512_add_ps(t0, t1); |
462: t0 = _mm512_add_ps(t0, _mm512_permute_ps(t0, 0x4E)); |
463: t0 = _mm512_add_ps(t0, _mm512_permute_ps(t0, 0xB1)); |
464: t0 = _mm512_maskz_compress_ps(avx512Int2Mask(0x1111), t0); |
465: |
466: t3 = _mm512_castps512_ps128(t0); |
467: t2 = _mm_load_ps(m); |
468: t2 = _mm_add_ps(t2, t3); |
469: _mm_store_ps(m, t2); |
470: |
471: t3 = _mm_add_ps(t3, _mm_permute_ps(t3, 0x4E)); |
472: t3 = _mm_add_ps(t3, _mm_permute_ps(t3, 0xB1)); |
473: |
474: return _mm_cvtss_f32(t3); |
/home/eoseret/gromacs-2024.2/src/gromacs/simd/include/gromacs/simd/impl_x86_avx_512/impl_x86_avx_512_simd_float.h: 57 - 461 |
-------------------------------------------------------------------------------- |
57: SimdFloat(float f) : simdInternal_(_mm512_set1_ps(f)) {} |
[...] |
70: SimdFInt32(std::int32_t i) : simdInternal_(_mm512_set1_epi32(i)) {} |
[...] |
181: return { _mm512_add_ps(a.simdInternal_, b.simdInternal_) }; |
182: } |
183: |
184: static inline SimdFloat gmx_simdcall operator-(SimdFloat a, SimdFloat b) |
185: { |
186: return { _mm512_sub_ps(a.simdInternal_, b.simdInternal_) }; |
[...] |
197: return { _mm512_mul_ps(a.simdInternal_, b.simdInternal_) }; |
198: } |
199: |
200: static inline SimdFloat gmx_simdcall fma(SimdFloat a, SimdFloat b, SimdFloat c) |
201: { |
202: return { _mm512_fmadd_ps(a.simdInternal_, b.simdInternal_, c.simdInternal_) }; |
203: } |
204: |
205: static inline SimdFloat gmx_simdcall fms(SimdFloat a, SimdFloat b, SimdFloat c) |
206: { |
207: return { _mm512_fmsub_ps(a.simdInternal_, b.simdInternal_, c.simdInternal_) }; |
208: } |
209: |
210: static inline SimdFloat gmx_simdcall fnma(SimdFloat a, SimdFloat b, SimdFloat c) |
211: { |
212: return { _mm512_fnmadd_ps(a.simdInternal_, b.simdInternal_, c.simdInternal_) }; |
[...] |
224: return { _mm512_rsqrt14_ps(x.simdInternal_) }; |
225: } |
226: |
227: static inline SimdFloat gmx_simdcall rcp(SimdFloat x) |
228: { |
229: return { _mm512_rcp14_ps(x.simdInternal_) }; |
[...] |
269: return { _mm512_max_ps(a.simdInternal_, b.simdInternal_) }; |
[...] |
348: x = _mm512_add_ps(x, _mm512_shuffle_f32x4(x, x, 0xEE)); |
349: x = _mm512_add_ps(x, _mm512_shuffle_f32x4(x, x, 0x11)); |
350: x = _mm512_add_ps(x, _mm512_permute_ps(x, 0xEE)); |
351: x = _mm512_add_ps(x, _mm512_permute_ps(x, 0x11)); |
352: return *reinterpret_cast<float*>(&x); |
[...] |
367: return { _mm512_cmp_ps_mask(a.simdInternal_, b.simdInternal_, _CMP_LT_OQ) }; |
[...] |
383: return { _mm512_kand(a.simdInternal_, b.simdInternal_) }; |
[...] |
398: return { _mm512_mask_mov_ps(_mm512_setzero_ps(), m.simdInternal_, a.simdInternal_) }; |
[...] |
461: return { _mm512_test_epi32_mask(a.simdInternal_, a.simdInternal_) }; |
/home/eoseret/gromacs-2024.2/src/gromacs/nbnxm/simd_kernel.h: 273 - 555 |
-------------------------------------------------------------------------------- |
273: for (const nbnxn_ci_t& ciEntry : nbl->ci) |
274: { |
275: const int ish = (ciEntry.shift & NBNXN_CI_SHIFT); |
276: const int ish3 = ish * 3; |
277: const int cjind0 = ciEntry.cj_ind_start; |
278: const int cjind1 = ciEntry.cj_ind_end; |
279: const int ci = ciEntry.ci; |
280: const int ci_sh = (ish == c_centralShiftIndex ? ci : -1); |
[...] |
298: sci = (ci >> 1) * c_stride; |
299: scix = sci * DIM + (ci & 1) * (c_stride >> 1); |
[...] |
311: const bool do_coul = ((ciEntry.shift & NBNXN_CI_DO_COUL(0)) != 0); |
312: const bool half_LJ = (((ciEntry.shift & NBNXN_CI_HALF_LJ(0)) != 0) || !do_LJ) && do_coul; |
[...] |
333: if (do_self && l_cj[ciEntry.cj_ind_start].cj == cjFromCi<clusterRatio>(ci_sh)) |
[...] |
339: for (int ia = 0; ia < c_iClusterSize; ia++) |
340: { |
341: const real qi = q[sci + ia]; |
[...] |
349: Vc[0] -= facel * qi * qi * Vc_sub_self; |
[...] |
388: if (do_coul) |
[...] |
461: if (half_LJ) |
[...] |
468: while (cjind < cjind1 && nbl->cj.excl(cjind) != NBNXN_INTERACTION_MASK_ALL) |
469: { |
470: #include "simd_kernel_inner.h" |
471: cjind++; |
472: } |
473: } |
474: { |
475: constexpr bool c_needToCheckExclusions = false; |
476: for (; (cjind < cjind1); cjind++) |
[...] |
482: else if (do_coul) |
[...] |
489: while (cjind < cjind1 && nbl->cj.excl(cjind) != NBNXN_INTERACTION_MASK_ALL) |
490: { |
491: #include "simd_kernel_inner.h" |
492: cjind++; |
493: } |
494: } |
495: { |
496: constexpr bool c_needToCheckExclusions = false; |
497: for (; (cjind < cjind1); cjind++) |
[...] |
510: while (cjind < cjind1 && nbl->cj.excl(cjind) != NBNXN_INTERACTION_MASK_ALL) |
511: { |
512: #include "simd_kernel_inner.h" |
513: cjind++; |
514: } |
515: } |
516: { |
517: constexpr bool c_needToCheckExclusions = false; |
518: for (; (cjind < cjind1); cjind++) |
[...] |
543: fshift[ish3 + 0] += fShiftX; |
544: fshift[ish3 + 1] += fShiftY; |
545: fshift[ish3 + 2] += fShiftZ; |
546: } |
547: |
548: if constexpr (calculateEnergies) |
549: { |
550: if (do_coul) |
551: { |
552: *Vc += reduce(vctot_S); |
553: } |
554: |
555: *Vvdw += reduce(Vvdwtot_S); |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►84.96+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►15.04+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►69.17+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►30.83+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►39.89+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►32.79+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►7.65+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
►7.38+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
►6.28+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
►6.01+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►40.28+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►40.28+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►6.48+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
►5.63+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
►3.94+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
►3.38+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►41.89+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►38.38+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►8.92+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
►5.95+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
►3.24+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
►1.62+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►62.78+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►34.26+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►2.04+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►56.85+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►25.36+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►5.11+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
►4.09+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
►3.89+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
►2.45+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
►1.84+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►70.95+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1974 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►29.05+ | .omp_outlined.#0x5f8c30 | kerneldispatch.cpp:305 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | nonbonded_verlet_t::dispatchNo[...] | kerneldispatch.cpp:272 | libgromacs_mpi.so.9.0.0 |
○ | do_nb_verlet(t_forcerec*, inte[...] | sim_util.cpp:455 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:1936 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.27 |
CQA speedup if FP arith vectorized | 1.08 |
CQA speedup if fully vectorized | 1.55 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.24 |
Bottlenecks | micro-operation queue, |
Function | void gmx::nbnxmKernelSimd<(KernelLayout)1, (gmx::KernelCoulombType)1, (VdwCutoffCheck)0, (LJCombinationRule)1, (InteractionModifiers)1, (LJEwald)0, (EnergyOutput)1>(NbnxnPairlistCpu const*, nbnxn_atomdata_t const*, interaction_const_t const*, float const (*) [3], nbnxn_atomdata_output_t*) |
Source | simd_load_store_functions.h:70-70,simd_load_store_functions.h:93-93,stl_iterator.h:1054-1054,stl_iterator.h:1182-1182,impl_x86_avx_512_util_float.h:375-375,impl_x86_avx_512_util_float.h:459-464,impl_x86_avx_512_util_float.h:468-471,impl_x86_avx_512_util_float.h:474-474,impl_x86_avx_512_simd_float.h:57-57,impl_x86_avx_512_simd_float.h:197-197,impl_x86_avx_512_simd_float.h:348-352,impl_x86_avx_512_simd_float.h:383-383,simd_kernel.h:273-280,simd_kernel.h:298-299,simd_kernel.h:311-312,simd_kernel.h:333-333,simd_kernel.h:339-341,simd_kernel.h:349-349,simd_kernel.h:388-388,simd_kernel.h:461-461,simd_kernel.h:468-468,simd_kernel.h:476-476,simd_kernel.h:482-482,simd_kernel.h:489-489,simd_kernel.h:497-497,simd_kernel.h:510-510,simd_kernel.h:518-518,simd_kernel.h:543-545,simd_kernel.h:550-552,simd_kernel.h:555-555 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 54.67 |
CQA cycles if no scalar integer | 43.17 |
CQA cycles if FP arith vectorized | 50.63 |
CQA cycles if fully vectorized | 35.36 |
Front-end cycles | 54.67 |
P0 cycles | 14.75 |
P1 cycles | 14.75 |
P2 cycles | 14.75 |
P3 cycles | 14.75 |
P4 cycles | 10.00 |
P5 cycles | 41.33 |
P6 cycles | 41.33 |
P7 cycles | 41.33 |
P8 cycles | 15.00 |
P9 cycles | 30.67 |
P10 cycles | 32.17 |
P11 cycles | 44.17 |
P12 cycles | 23.50 |
P13 cycles | 23.50 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 310.00 |
Nb uops | 328.00 |
Nb loads | 80.00 |
Nb stores | 38.00 |
Nb stack references | 36.00 |
FLOP/cycle | 6.84 |
Nb FLOP add-sub | 326.00 |
Nb FLOP mul | 40.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 37.90 |
Bytes prefetched | 0.00 |
Bytes loaded | 772.00 |
Bytes stored | 1300.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 59.43 |
Vectorization ratio load | 19.61 |
Vectorization ratio store | 57.89 |
Vectorization ratio mul | 20.00 |
Vectorization ratio add_sub | 82.86 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 60.00 |
Vector-efficiency ratio all | 37.82 |
Vector-efficiency ratio load | 17.65 |
Vector-efficiency ratio store | 53.45 |
Vector-efficiency ratio mul | 25.00 |
Vector-efficiency ratio add_sub | 58.21 |
Vector-efficiency ratio fma | 6.25 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 27.84 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.27 |
CQA speedup if FP arith vectorized | 1.08 |
CQA speedup if fully vectorized | 1.55 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.24 |
Bottlenecks | micro-operation queue, |
Function | void gmx::nbnxmKernelSimd<(KernelLayout)1, (gmx::KernelCoulombType)1, (VdwCutoffCheck)0, (LJCombinationRule)1, (InteractionModifiers)1, (LJEwald)0, (EnergyOutput)1>(NbnxnPairlistCpu const*, nbnxn_atomdata_t const*, interaction_const_t const*, float const (*) [3], nbnxn_atomdata_output_t*) |
Source | simd_load_store_functions.h:70-70,simd_load_store_functions.h:93-93,stl_iterator.h:1054-1054,stl_iterator.h:1182-1182,impl_x86_avx_512_util_float.h:375-375,impl_x86_avx_512_util_float.h:459-464,impl_x86_avx_512_util_float.h:468-471,impl_x86_avx_512_util_float.h:474-474,impl_x86_avx_512_simd_float.h:57-57,impl_x86_avx_512_simd_float.h:197-197,impl_x86_avx_512_simd_float.h:348-352,impl_x86_avx_512_simd_float.h:383-383,simd_kernel.h:273-280,simd_kernel.h:298-299,simd_kernel.h:311-312,simd_kernel.h:333-333,simd_kernel.h:339-341,simd_kernel.h:349-349,simd_kernel.h:388-388,simd_kernel.h:461-461,simd_kernel.h:468-468,simd_kernel.h:476-476,simd_kernel.h:482-482,simd_kernel.h:489-489,simd_kernel.h:497-497,simd_kernel.h:510-510,simd_kernel.h:518-518,simd_kernel.h:543-545,simd_kernel.h:550-552,simd_kernel.h:555-555 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 54.67 |
CQA cycles if no scalar integer | 43.17 |
CQA cycles if FP arith vectorized | 50.63 |
CQA cycles if fully vectorized | 35.36 |
Front-end cycles | 54.67 |
P0 cycles | 14.75 |
P1 cycles | 14.75 |
P2 cycles | 14.75 |
P3 cycles | 14.75 |
P4 cycles | 10.00 |
P5 cycles | 41.33 |
P6 cycles | 41.33 |
P7 cycles | 41.33 |
P8 cycles | 15.00 |
P9 cycles | 30.67 |
P10 cycles | 32.17 |
P11 cycles | 44.17 |
P12 cycles | 23.50 |
P13 cycles | 23.50 |
DIV/SQRT cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 310.00 |
Nb uops | 328.00 |
Nb loads | 80.00 |
Nb stores | 38.00 |
Nb stack references | 36.00 |
FLOP/cycle | 6.84 |
Nb FLOP add-sub | 326.00 |
Nb FLOP mul | 40.00 |
Nb FLOP fma | 4.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 37.90 |
Bytes prefetched | 0.00 |
Bytes loaded | 772.00 |
Bytes stored | 1300.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 59.43 |
Vectorization ratio load | 19.61 |
Vectorization ratio store | 57.89 |
Vectorization ratio mul | 20.00 |
Vectorization ratio add_sub | 82.86 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 60.00 |
Vector-efficiency ratio all | 37.82 |
Vector-efficiency ratio load | 17.65 |
Vector-efficiency ratio store | 53.45 |
Vector-efficiency ratio mul | 25.00 |
Vector-efficiency ratio add_sub | 58.21 |
Vector-efficiency ratio fma | 6.25 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 27.84 |
Path / |
Function | void gmx::nbnxmKernelSimd<(KernelLayout)1, (gmx::KernelCoulombType)1, (VdwCutoffCheck)0, (LJCombinationRule)1, (InteractionModifiers)1, (LJEwald)0, (EnergyOutput)1>(NbnxnPairlistCpu const*, nbnxn_atomdata_t const*, interaction_const_t const*, float const (*) [3], nbnxn_atomdata_output_t*) |
Source file and lines | simd_kernel.h:273-555 |
Module | libgromacs_mpi.so.9.0.0 |
nb instructions | 310 |
nb uops | 328 |
loop length | 1694 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 15 |
used ymm registers | 16 |
used zmm registers | 28 |
nb stack references | 36 |
ADD-SUB / MUL ratio | 3.50 |
micro-operation queue | 54.67 cycles |
front end | 54.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.75 | 14.75 | 14.75 | 14.75 | 10.00 | 39.67 | 39.67 | 39.67 | 14.00 | 29.67 | 29.67 | 29.67 | 23.50 | 23.50 |
cycles | 14.75 | 14.75 | 14.75 | 14.75 | 10.00 | 41.33 | 41.33 | 41.33 | 15.00 | 30.67 | 32.17 | 44.17 | 23.50 | 23.50 |
Cycles executing div or sqrt instructions | NA |
Front-end | 54.67 |
Dispatch | 44.17 |
Overall L1 | 54.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 68% |
load | 21% |
store | 75% |
mul | 20% |
add-sub | 82% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 70% |
all | 59% |
load | 19% |
store | 57% |
mul | 20% |
add-sub | 82% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 60% |
all | 8% |
load | 9% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 42% |
load | 18% |
store | 66% |
mul | 25% |
add-sub | 58% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 31% |
all | 37% |
load | 17% |
store | 53% |
mul | 25% |
add-sub | 58% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 27% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VSHUFF64X2 $-0x12,%ZMM21,%ZMM21,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM0,%ZMM21,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VEXTRACTF128 $0x1,%YMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VPERMILPD $0x1,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVSHDUP %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (12.5%) |
VADDSS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VADDSS (%RAX),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD $0x10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP 0x48(%RSP),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JE 52fcec <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x2b7c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%RCX),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (6.3%) |
MOV 0x4(%RCX),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R9D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7f,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RAX,%RAX,2),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x8(%RCX),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %EDI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
MOVSXD %EDI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMP $0x16,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV $-0x1,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMOVE %R13D,%EAX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %EAX,0x4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
SAL $0x2,%R13D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
MOV %R13D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RAX,%RAX,2),%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R13D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x4,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
OR %EDI,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R9D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x200,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R15D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x9,%R8D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %R9D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (6.3%) |
AND $0x180,%R12D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
CMP $0x80,%R12D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOVSXD 0xc(%RDX),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
MOV %RDX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x50(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VBROADCASTSS (%RDX,%R11,4),%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS 0x4(%RDX,%R11,4),%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
MOV %R11,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VBROADCASTSS 0x8(%RDX,%R11,4),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
SETNE %R12B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
TEST %R15D,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JE 52d4c9 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x359> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x4(%RSP),%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SAR $0x1,%R15D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV 0x28(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %R15D,(%RDX,%RCX,8) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (6.3%) |
JNE 52d4c9 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x359> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %R13D,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x20(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSS (%R9,%RDX,4),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVAPS 0x360(%RSP),%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMULSS %XMM7,%XMM4,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMULSS %XMM5,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
MOV 0x18(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSS 0x14(%RSP),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VFMADD213SS (%R11),%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
SAL $0x2,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
VMOVSS %XMM4,(%R11) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
OR $0x4,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSS (%R9,%R15,1),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMULSS %XMM7,%XMM5,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMULSS %XMM6,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VFMADD213SS %XMM4,%XMM3,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VMOVSS %XMM5,(%R11) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
OR $0x8,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSS (%R9,%R15,1),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMULSS %XMM7,%XMM4,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMULSS %XMM6,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VFMADD213SS %XMM5,%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VMOVSS %XMM4,(%R11) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
OR $0xc,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSS (%R9,%RDX,1),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
MOV 0x30(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMULSS %XMM7,%XMM5,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMULSS %XMM6,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VFMADD213SS %XMM4,%XMM3,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VMOVSS %XMM5,(%R11) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
MOVSXD %EBX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VBROADCASTSS (%RSI,%RBX,4),%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4(%RSI,%RBX,4),%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x8(%RSI,%RBX,4),%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0xc(%RSI,%RBX,4),%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x20(%RSI,%RBX,4),%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x24(%RSI,%RBX,4),%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x28(%RSI,%RBX,4),%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x2c(%RSI,%RBX,4),%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x40(%RSI,%RBX,4),%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x44(%RSI,%RBX,4),%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
AND %R8B,%R12B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VBROADCASTSS 0x48(%RSI,%RBX,4),%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4c(%RSI,%RBX,4),%YMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
TEST $0x200,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV 0x20(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JE 52d57c <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x40c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %R13D,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VBROADCASTSS (%R8,%RDX,4),%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4(%R8,%RDX,4),%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM17,%ZMM16,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VMOVAPS 0x8c0(%RSP),%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMULPS %ZMM16,%ZMM3,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM16,0x5c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS 0x8(%R8,%RDX,4),%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0xc(%R8,%RDX,4),%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM17,%ZMM16,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VMULPS %ZMM16,%ZMM3,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
LEA (%RDI,%RAX,2),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA 0x8(%RBX),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
LEA 0x10(%RBX),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VINSERTF64X4 $0x1,%YMM15,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM13,%ZMM2,%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM14,%ZMM11,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM11,%ZMM2,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM12,%ZMM9,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM10,%ZMM7,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM8,%ZMM5,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM6,%ZMM4,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
CLTQ | scal (12.5%) | |||||||||||||||||
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
OR $0x8,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOVSXD %EDX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VBROADCASTSS (%R14,%RAX,4),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4(%R14,%RAX,4),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM30 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VBROADCASTSS (%R14,%RDI,4),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4(%R14,%RDI,4),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
TEST %R12B,%R12B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x28(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVAPS %ZMM22,0x740(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM23,0x700(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM25,0x6c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM26,0x680(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM28,0x640(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM31,0x600(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM11,0x480(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM30,0x440(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM13,0x400(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
MOV 0x4(%RSP),%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JE 52dde0 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0xc70> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VXORPS %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VXORPS %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV 0x140(%RSP),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xc0(%RSP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %R12D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV 0x8(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JGE 52ea51 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x18e1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP 52dc8e <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0xb1e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VBROADCASTSS 0x8(%R14,%RAX,4),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0xc(%R14,%RAX,4),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VBROADCASTSS 0x8(%R14,%RDI,4),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0xc(%R14,%RDI,4),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
TEST $0x200,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
VMOVAPS %ZMM15,0x3c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM16,0x380(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JE 52e660 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x14f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VXORPS %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VXORPS %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV 0x140(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RSP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %EDX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV 0x8(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JGE 52f0d9 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x1f69> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP 52e504 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x1394> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VXORPS %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV 0x140(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RSP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %R11D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV 0x8(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JGE 52f7ef <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x267f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP 52fb52 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CMP %R12D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
JGE 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %EAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CMP %EDX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
JGE 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %EAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
VMOVAPS 0x180(%RSP),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
CMP %R11D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
JGE 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %EAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VMOVAPS 0x880(%RSP),%ZMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS 0x180(%RSP),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VSHUFF64X2 $-0x78,%ZMM27,%ZMM14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VSHUFF64X2 $-0x23,%ZMM27,%ZMM14,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPD $0x55,%ZMM0,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPS $-0x4f,%ZMM0,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
MOV $0x1111,%AX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
KMOVD %EAX,%K4 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 5 | 1 | N/A |
VCOMPRESSPS %ZMM0,%ZMM0{%K4}{z} | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 1 | 0.50 | 0 | 0 | 0 | 8 | 1.33 | vect (100.0%) |
VADDPS (%R10,%RBX,4),%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVAPS %XMM1,(%R10,%RBX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA 0x2(%RAX,%RAX,2),%RAX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
VPERMILPD $0x1,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VSHUFF64X2 $-0x78,%ZMM12,%ZMM10,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VSHUFF64X2 $-0x23,%ZMM12,%ZMM10,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPD $0x55,%ZMM1,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPS $-0x4f,%ZMM1,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VCOMPRESSPS %ZMM1,%ZMM1{%K4}{z} | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 1 | 0.50 | 0 | 0 | 0 | 8 | 1.33 | vect (100.0%) |
MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VADDPS (%R10,%RCX,4),%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVAPS %XMM2,(%R10,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
VPERMILPD $0x1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VSHUFF64X2 $-0x78,%ZMM24,%ZMM17,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VSHUFF64X2 $-0x23,%ZMM24,%ZMM17,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM4,%ZMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPD $0x55,%ZMM3,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM4,%ZMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPS $-0x4f,%ZMM3,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM4,%ZMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VCOMPRESSPS %ZMM3,%ZMM3{%K4}{z} | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 1 | 0.50 | 0 | 0 | 0 | 8 | 1.33 | vect (100.0%) |
MOV 0x60(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VADDPS (%R10,%RCX,4),%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVAPS %XMM4,(%R10,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
VADDPS %XMM2,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VPERMILPD $0x1,%XMM3,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VADDPS %XMM2,%XMM3,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVSHDUP %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (12.5%) |
MOV 0x40(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x70(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD (%RCX,%RDX,4),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VUNPCKLPS %XMM1,%XMM0,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (12.5%) |
VMOVAPS 0x370(%RSP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VPERMT2PS %XMM1,%XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VADDPS %XMM0,%XMM5,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VADDPS %XMM4,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVLPS %XMM0,(%RCX,%RDX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | vect (12.5%) |
VADDSS %XMM3,%XMM2,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VADDSS (%RCX,%RAX,4),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,(%RCX,%RAX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
TESTL $0x200,0x30(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JE 52d320 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x1b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVAPD 0x80(%RSP),%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VSHUFF64X2 $-0x12,%ZMM1,%ZMM1,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM0,%ZMM1,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VEXTRACTF128 $0x1,%YMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VPERMILPD $0x1,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVSHDUP %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (12.5%) |
VADDSS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VADDSS (%RAX),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
JMP 52d320 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x1b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
Function | void gmx::nbnxmKernelSimd<(KernelLayout)1, (gmx::KernelCoulombType)1, (VdwCutoffCheck)0, (LJCombinationRule)1, (InteractionModifiers)1, (LJEwald)0, (EnergyOutput)1>(NbnxnPairlistCpu const*, nbnxn_atomdata_t const*, interaction_const_t const*, float const (*) [3], nbnxn_atomdata_output_t*) |
Source file and lines | simd_kernel.h:273-555 |
Module | libgromacs_mpi.so.9.0.0 |
nb instructions | 310 |
nb uops | 328 |
loop length | 1694 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 15 |
used ymm registers | 16 |
used zmm registers | 28 |
nb stack references | 36 |
ADD-SUB / MUL ratio | 3.50 |
micro-operation queue | 54.67 cycles |
front end | 54.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.75 | 14.75 | 14.75 | 14.75 | 10.00 | 39.67 | 39.67 | 39.67 | 14.00 | 29.67 | 29.67 | 29.67 | 23.50 | 23.50 |
cycles | 14.75 | 14.75 | 14.75 | 14.75 | 10.00 | 41.33 | 41.33 | 41.33 | 15.00 | 30.67 | 32.17 | 44.17 | 23.50 | 23.50 |
Cycles executing div or sqrt instructions | NA |
Front-end | 54.67 |
Dispatch | 44.17 |
Overall L1 | 54.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 68% |
load | 21% |
store | 75% |
mul | 20% |
add-sub | 82% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 70% |
all | 59% |
load | 19% |
store | 57% |
mul | 20% |
add-sub | 82% |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 60% |
all | 8% |
load | 9% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 42% |
load | 18% |
store | 66% |
mul | 25% |
add-sub | 58% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 31% |
all | 37% |
load | 17% |
store | 53% |
mul | 25% |
add-sub | 58% |
fma | 6% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 27% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VSHUFF64X2 $-0x12,%ZMM21,%ZMM21,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM0,%ZMM21,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VEXTRACTF128 $0x1,%YMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VPERMILPD $0x1,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVSHDUP %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (12.5%) |
VADDSS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VADDSS (%RAX),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD $0x10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP 0x48(%RSP),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JE 52fcec <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x2b7c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%RCX),%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (6.3%) |
MOV 0x4(%RCX),%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R9D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7f,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RAX,%RAX,2),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x8(%RCX),%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %EDI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
MOVSXD %EDI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMP $0x16,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV $-0x1,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMOVE %R13D,%EAX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %EAX,0x4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
SAL $0x2,%R13D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
MOV %R13D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RAX,%RAX,2),%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R13D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x4,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
OR %EDI,%EBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R9D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x200,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R15D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x9,%R8D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %R9D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (6.3%) |
AND $0x180,%R12D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
CMP $0x80,%R12D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %RDX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOVSXD 0xc(%RDX),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
MOV %RDX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x50(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VBROADCASTSS (%RDX,%R11,4),%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS 0x4(%RDX,%R11,4),%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
MOV %R11,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VBROADCASTSS 0x8(%RDX,%R11,4),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
SETNE %R12B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
TEST %R15D,%R15D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JE 52d4c9 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x359> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x4(%RSP),%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SAR $0x1,%R15D | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV 0x28(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %R15D,(%RDX,%RCX,8) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (6.3%) |
JNE 52d4c9 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x359> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %R13D,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x20(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSS (%R9,%RDX,4),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMOVAPS 0x360(%RSP),%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMULSS %XMM7,%XMM4,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMULSS %XMM5,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
MOV 0x18(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSS 0x14(%RSP),%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VFMADD213SS (%R11),%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
SAL $0x2,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
VMOVSS %XMM4,(%R11) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
OR $0x4,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSS (%R9,%R15,1),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMULSS %XMM7,%XMM5,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMULSS %XMM6,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VFMADD213SS %XMM4,%XMM3,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VMOVSS %XMM5,(%R11) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
OR $0x8,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSS (%R9,%R15,1),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
VMULSS %XMM7,%XMM4,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMULSS %XMM6,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VFMADD213SS %XMM5,%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VMOVSS %XMM4,(%R11) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
OR $0xc,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSS (%R9,%RDX,1),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (6.3%) |
MOV 0x30(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMULSS %XMM7,%XMM5,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMULSS %XMM6,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VFMADD213SS %XMM4,%XMM3,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VMOVSS %XMM5,(%R11) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
MOVSXD %EBX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VBROADCASTSS (%RSI,%RBX,4),%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4(%RSI,%RBX,4),%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x8(%RSI,%RBX,4),%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0xc(%RSI,%RBX,4),%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x20(%RSI,%RBX,4),%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x24(%RSI,%RBX,4),%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x28(%RSI,%RBX,4),%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x2c(%RSI,%RBX,4),%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x40(%RSI,%RBX,4),%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x44(%RSI,%RBX,4),%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
AND %R8B,%R12B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VBROADCASTSS 0x48(%RSI,%RBX,4),%YMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4c(%RSI,%RBX,4),%YMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
TEST $0x200,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV 0x20(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JE 52d57c <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x40c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %R13D,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VBROADCASTSS (%R8,%RDX,4),%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4(%R8,%RDX,4),%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM17,%ZMM16,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VMOVAPS 0x8c0(%RSP),%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMULPS %ZMM16,%ZMM3,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM16,0x5c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS 0x8(%R8,%RDX,4),%YMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0xc(%R8,%RDX,4),%YMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM17,%ZMM16,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VMULPS %ZMM16,%ZMM3,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
LEA (%RDI,%RAX,2),%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA 0x8(%RBX),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
LEA 0x10(%RBX),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VINSERTF64X4 $0x1,%YMM15,%ZMM13,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM13,%ZMM2,%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM14,%ZMM11,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM11,%ZMM2,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM12,%ZMM9,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM10,%ZMM7,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM8,%ZMM5,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM31 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VINSERTF64X4 $0x1,%YMM6,%ZMM4,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
CLTQ | scal (12.5%) | |||||||||||||||||
MOV %EAX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
OR $0x8,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOVSXD %EDX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VBROADCASTSS (%R14,%RAX,4),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4(%R14,%RAX,4),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM30 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VBROADCASTSS (%R14,%RDI,4),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0x4(%R14,%RDI,4),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
TEST %R12B,%R12B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x28(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVAPS %ZMM22,0x740(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM23,0x700(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM25,0x6c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM26,0x680(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM28,0x640(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM31,0x600(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM11,0x480(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM30,0x440(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM13,0x400(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
MOV 0x4(%RSP),%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JE 52dde0 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0xc70> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VXORPS %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VXORPS %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV 0x140(%RSP),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xc0(%RSP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %R12D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV 0x8(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JGE 52ea51 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x18e1> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP 52dc8e <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0xb1e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VBROADCASTSS 0x8(%R14,%RAX,4),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0xc(%R14,%RAX,4),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
VBROADCASTSS 0x8(%R14,%RDI,4),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VBROADCASTSS 0xc(%R14,%RDI,4),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
VINSERTF64X4 $0x1,%YMM1,%ZMM0,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | vect (50.0%) |
TEST $0x200,%R9D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
VMOVAPS %ZMM15,0x3c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS %ZMM16,0x380(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JE 52e660 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x14f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VXORPS %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VXORPS %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV 0x140(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RSP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %EDX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV 0x8(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JGE 52f0d9 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x1f69> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP 52e504 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x1394> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VXORPS %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM24,%XMM24,%XMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPS %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV 0x140(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RSP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %R11D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV 0x8(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JGE 52f7ef <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x267f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP 52fb52 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CMP %R12D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
JGE 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %EAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CMP %EDX,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
JGE 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %EAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
VMOVAPS 0x180(%RSP),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
CMP %R11D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
JGE 52fb60 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x29f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVSXD %EAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VMOVAPS 0x880(%RSP),%ZMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS 0x180(%RSP),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VSHUFF64X2 $-0x78,%ZMM27,%ZMM14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VSHUFF64X2 $-0x23,%ZMM27,%ZMM14,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPD $0x55,%ZMM0,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPS $-0x4f,%ZMM0,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
MOV $0x1111,%AX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
KMOVD %EAX,%K4 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 5 | 1 | N/A |
VCOMPRESSPS %ZMM0,%ZMM0{%K4}{z} | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 1 | 0.50 | 0 | 0 | 0 | 8 | 1.33 | vect (100.0%) |
VADDPS (%R10,%RBX,4),%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVAPS %XMM1,(%R10,%RBX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA 0x2(%RAX,%RAX,2),%RAX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
VPERMILPD $0x1,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VSHUFF64X2 $-0x78,%ZMM12,%ZMM10,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VSHUFF64X2 $-0x23,%ZMM12,%ZMM10,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPD $0x55,%ZMM1,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPS $-0x4f,%ZMM1,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VCOMPRESSPS %ZMM1,%ZMM1{%K4}{z} | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 1 | 0.50 | 0 | 0 | 0 | 8 | 1.33 | vect (100.0%) |
MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VADDPS (%R10,%RCX,4),%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVAPS %XMM2,(%R10,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
VPERMILPD $0x1,%XMM1,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VSHUFF64X2 $-0x78,%ZMM24,%ZMM17,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VSHUFF64X2 $-0x23,%ZMM24,%ZMM17,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM4,%ZMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPD $0x55,%ZMM3,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM4,%ZMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPERMILPS $-0x4f,%ZMM3,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.67 | 0.67 | 0.67 | 0 | 0 | 1 | 0.67 | vect (100.0%) |
VADDPS %ZMM4,%ZMM3,%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VCOMPRESSPS %ZMM3,%ZMM3{%K4}{z} | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 1 | 0.50 | 0 | 0 | 0 | 8 | 1.33 | vect (100.0%) |
MOV 0x60(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VADDPS (%R10,%RCX,4),%XMM3,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVAPS %XMM4,(%R10,%RCX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
VADDPS %XMM2,%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VPERMILPD $0x1,%XMM3,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VADDPS %XMM2,%XMM3,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVSHDUP %XMM2,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (12.5%) |
MOV 0x40(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x70(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD (%RCX,%RDX,4),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VUNPCKLPS %XMM1,%XMM0,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (12.5%) |
VMOVAPS 0x370(%RSP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VPERMT2PS %XMM1,%XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VADDPS %XMM0,%XMM5,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VADDPS %XMM4,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVLPS %XMM0,(%RCX,%RDX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | vect (12.5%) |
VADDSS %XMM3,%XMM2,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VADDSS (%RCX,%RAX,4),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,(%RCX,%RAX,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
TESTL $0x200,0x30(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JE 52d320 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x1b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VMOVAPD 0x80(%RSP),%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VSHUFF64X2 $-0x12,%ZMM1,%ZMM1,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 4 | 1 | vect (50.0%) |
VADDPS %ZMM0,%ZMM1,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1 | vect (100.0%) |
VEXTRACTF128 $0x1,%YMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VPERMILPD $0x1,%XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (25.0%) |
VADDPS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
VMOVSHDUP %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | vect (12.5%) |
VADDSS %XMM1,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VADDSS (%RAX),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (6.3%) |
VMOVSS %XMM0,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (6.3%) |
JMP 52d320 <_ZN3gmx15nbnxmKernelSimdIL12KernelLayout1ELNS_17KernelCoulombTypeE1EL14VdwCutoffCheck0EL17LJCombinationRule1EL20InteractionModifiers1EL7LJEwald0EL12EnergyOutput1EEEvPK16NbnxnPairlistCpuPK16nbnxn_atomdata_tPK19interaction_const_tPA3_KfP23nbnxn_atomdata_output_t+0x1b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
Run 1x1 | Number processes: 1Number processes per node: 1OMP_NUM_THREADS: 1 |
---|---|
Run 2x1 | Number processes: 2Number processes per node: 2OMP_NUM_THREADS: 1 |
Run 4x1 | Number processes: 4Number processes per node: 4OMP_NUM_THREADS: 1 |
Run 8x1 | Number processes: 8Number processes per node: 8OMP_NUM_THREADS: 1 |
Run 16x1 | Number processes: 16Number processes per node: 16OMP_NUM_THREADS: 1 |
Run 32x1 | Number processes: 32Number processes per node: 32OMP_NUM_THREADS: 1 |
Run 64x1 | Number processes: 64Number processes per node: 64OMP_NUM_THREADS: 1 |
Run 128x1 | Number processes: 128Number processes per node: 128OMP_NUM_THREADS: 1 |
Run 192x1 | Number processes: 192Number nodes: 1Number processes per node: 192Run Command: <executable> mdrun -s ion_channel.tpr -nsteps 10000 -pin on -deffnm aoccMPI Command: mpirun -genv I_MPI_FABRICS=shm -n <number_processes>Dataset: Run Directory: .OMP_NUM_THREADS: 1 |
(1x1) Efficiency | (1x1) Potential Speed-Up (%) | (2x1) Efficiency | (2x1) Potential Speed-Up (%) | (4x1) Efficiency | (4x1) Potential Speed-Up (%) | (8x1) Efficiency | (8x1) Potential Speed-Up (%) | (16x1) Efficiency | (16x1) Potential Speed-Up (%) | (32x1) Efficiency | (32x1) Potential Speed-Up (%) | (64x1) Efficiency | (64x1) Potential Speed-Up (%) | (128x1) Efficiency | (128x1) Potential Speed-Up (%) | (192x1) Efficiency | (192x1) Potential Speed-Up (%) |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1 | 0 | 0.87 | 0.02 | 0.74 | 0.03 | 0.54 | 0.07 | 0.55 | 0.06 | 0.53 | 0.05 | 0.36 | 0.07 | 0.4 | 0.07 | 0.3 | 0.09 |
Run | Number of threads | Efficiency (ideal is 1) | Speedup | Ideal Speedup | Time (s) | Coverage (%) |
---|---|---|---|---|---|---|
1x1 | 1 | 1 | 1 | 1 | 0.98500025272369 | 0.11816157400608 |
2x1 | 2 | 0.87 | 1.74 | 2 | 0.61999958753586 | 0.12465081363916 |
4x1 | 4 | 0.74 | 2.96 | 4 | 0.3549998998642 | 0.13354632258415 |
8x1 | 8 | 0.54 | 4.3 | 8 | 0.25500005483627 | 0.1478995680809 |
16x1 | 16 | 0.55 | 8.84 | 16 | 0.16499994695187 | 0.1347364783287 |
32x1 | 20 | 0.53 | 17.02 | 32 | 0.1249999627471 | 0.11262069642544 |
64x1 | 40 | 0.36 | 23.27 | 64 | 0.12000000476837 | 0.10651087760925 |
128x1 | 84 | 0.4 | 50.84 | 128 | 0.069999977946281 | 0.11401056498289 |
192x1 | 128 | 0.3 | 56.65 | 192 | 0.055000003427267 | 0.12909254431725 |