Function: std::enable_if<((BondedKernelFlavor)0)==((BondedKernelFlavor)0), float>::type (anonymous n ... | Module: libgromacs_mpi.so.9.0.0 | Source: bonded.cpp:1118-1258 [...] | Coverage (incl. loops): 0.29% | (excl. loops): 0.00% |
---|
Function: std::enable_if<((BondedKernelFlavor)0)==((BondedKernelFlavor)0), float>::type (anonymous n ... | Module: libgromacs_mpi.so.9.0.0 | Source: bonded.cpp:1118-1258 [...] | Coverage (incl. loops): 0.29% | (excl. loops): 0.00% |
---|
/home/eoseret/gromacs-2024.2/src/gromacs/listed_forces/bonded.cpp: 1118 - 1258 |
-------------------------------------------------------------------------------- |
1118: { |
[...] |
1148: set_pbc_simd(pbc, pbc_simd); |
1149: |
1150: /* nbonds is the number of angles times nfa1, here we step GMX_SIMD_REAL_WIDTH angles */ |
1151: for (i = 0; (i < nbonds); i += GMX_SIMD_REAL_WIDTH * nfa1) |
[...] |
1157: for (s = 0; s < GMX_SIMD_REAL_WIDTH; s++) |
1158: { |
1159: type = forceatoms[iu]; |
1160: ai[s] = forceatoms[iu + 1]; |
1161: aj[s] = forceatoms[iu + 2]; |
1162: ak[s] = forceatoms[iu + 3]; |
1163: |
1164: /* At the end fill the arrays with the last atoms and 0 params */ |
1165: if (i + s * nfa1 < nbonds) |
1166: { |
1167: coeff[s] = forceparams[type].harmonic.krA; |
1168: coeff[GMX_SIMD_REAL_WIDTH + s] = forceparams[type].harmonic.rA; |
1169: |
1170: if (iu + nfa1 < nbonds) |
[...] |
1177: coeff[s] = 0; |
1178: coeff[GMX_SIMD_REAL_WIDTH + s] = 0; |
1179: } |
1180: } |
1181: |
1182: /* Store the non PBC corrected distances packed and aligned */ |
1183: gatherLoadUTranspose<3>(reinterpret_cast<const real*>(x), ai, &xi_S, &yi_S, &zi_S); |
1184: gatherLoadUTranspose<3>(reinterpret_cast<const real*>(x), aj, &xj_S, &yj_S, &zj_S); |
1185: gatherLoadUTranspose<3>(reinterpret_cast<const real*>(x), ak, &xk_S, &yk_S, &zk_S); |
[...] |
1258: return 0; |
/home/eoseret/gromacs-2024.2/src/gromacs/simd/include/gromacs/simd/impl_x86_avx_512/impl_x86_avx_512_util_float.h: 68 - 291 |
-------------------------------------------------------------------------------- |
68: return _mm512_slli_epi32(x.simdInternal_, 2); |
[...] |
113: v->simdInternal_ = _mm512_i32gather_ps(offset.simdInternal_, base, sizeof(float) * align_); |
[...] |
194: t5 = _mm512_unpacklo_ps(v0.simdInternal_, v2.simdInternal_); |
195: t6 = _mm512_unpackhi_ps(v0.simdInternal_, v2.simdInternal_); |
196: t7 = _mm512_unpacklo_ps(v1.simdInternal_, _mm512_setzero_ps()); |
197: t8 = _mm512_unpackhi_ps(v1.simdInternal_, _mm512_setzero_ps()); |
198: t[0] = _mm512_unpacklo_ps(t5, t7); // x0 y0 z0 0 | x4 y4 z4 0 |
199: t[1] = _mm512_unpackhi_ps(t5, t7); // x1 y1 z1 0 | x5 y5 z5 0 |
200: t[2] = _mm512_unpacklo_ps(t6, t8); // x2 y2 z2 0 | x6 y6 z6 0 |
201: t[3] = _mm512_unpackhi_ps(t6, t8); // x3 y3 z3 0 | x7 y7 z7 0 |
202: if (align % 4 == 0) |
203: { |
204: for (i = 0; i < 4; i++) |
205: { |
206: _mm_store_ps(base + o[i], |
207: _mm_add_ps(_mm_load_ps(base + o[i]), _mm512_castps512_ps128(t[i]))); |
208: _mm_store_ps(base + o[4 + i], |
209: _mm_add_ps(_mm_load_ps(base + o[4 + i]), _mm512_extractf32x4_ps(t[i], 1))); |
210: _mm_store_ps(base + o[8 + i], |
211: _mm_add_ps(_mm_load_ps(base + o[8 + i]), _mm512_extractf32x4_ps(t[i], 2))); |
212: _mm_store_ps(base + o[12 + i], |
213: _mm_add_ps(_mm_load_ps(base + o[12 + i]), _mm512_extractf32x4_ps(t[i], 3))); |
[...] |
272: t5 = _mm512_unpacklo_ps(v0.simdInternal_, v2.simdInternal_); |
273: t6 = _mm512_unpackhi_ps(v0.simdInternal_, v2.simdInternal_); |
274: t7 = _mm512_unpacklo_ps(v1.simdInternal_, _mm512_setzero_ps()); |
275: t8 = _mm512_unpackhi_ps(v1.simdInternal_, _mm512_setzero_ps()); |
276: t[0] = _mm512_unpacklo_ps(t5, t7); // x0 y0 z0 0 | x4 y4 z4 0 |
277: t[1] = _mm512_unpackhi_ps(t5, t7); // x1 y1 z1 0 | x5 y5 z5 0 |
278: t[2] = _mm512_unpacklo_ps(t6, t8); // x2 y2 z2 0 | x6 y6 z6 0 |
279: t[3] = _mm512_unpackhi_ps(t6, t8); // x3 y3 z3 0 | x7 y7 z7 0 |
280: if (align % 4 == 0) |
281: { |
282: for (i = 0; i < 4; i++) |
283: { |
284: _mm_store_ps(base + o[i], |
285: _mm_sub_ps(_mm_load_ps(base + o[i]), _mm512_castps512_ps128(t[i]))); |
286: _mm_store_ps(base + o[4 + i], |
287: _mm_sub_ps(_mm_load_ps(base + o[4 + i]), _mm512_extractf32x4_ps(t[i], 1))); |
288: _mm_store_ps(base + o[8 + i], |
289: _mm_sub_ps(_mm_load_ps(base + o[8 + i]), _mm512_extractf32x4_ps(t[i], 2))); |
290: _mm_store_ps(base + o[12 + i], |
291: _mm_sub_ps(_mm_load_ps(base + o[12 + i]), _mm512_extractf32x4_ps(t[i], 3))); |
/home/eoseret/gromacs-2024.2/src/gromacs/simd/include/gromacs/simd/impl_x86_avx_512/impl_x86_avx_512_simd_float.h: 181 - 451 |
-------------------------------------------------------------------------------- |
181: return { _mm512_add_ps(a.simdInternal_, b.simdInternal_) }; |
182: } |
183: |
184: static inline SimdFloat gmx_simdcall operator-(SimdFloat a, SimdFloat b) |
185: { |
186: return { _mm512_sub_ps(a.simdInternal_, b.simdInternal_) }; |
[...] |
197: return { _mm512_mul_ps(a.simdInternal_, b.simdInternal_) }; |
198: } |
199: |
200: static inline SimdFloat gmx_simdcall fma(SimdFloat a, SimdFloat b, SimdFloat c) |
201: { |
202: return { _mm512_fmadd_ps(a.simdInternal_, b.simdInternal_, c.simdInternal_) }; |
[...] |
212: return { _mm512_fnmadd_ps(a.simdInternal_, b.simdInternal_, c.simdInternal_) }; |
[...] |
224: return { _mm512_rsqrt14_ps(x.simdInternal_) }; |
225: } |
226: |
227: static inline SimdFloat gmx_simdcall rcp(SimdFloat x) |
228: { |
229: return { _mm512_rcp14_ps(x.simdInternal_) }; |
[...] |
252: return { _mm512_maskz_rsqrt14_ps(m.simdInternal_, x.simdInternal_) }; |
[...] |
263: return { _mm512_castsi512_ps(_mm512_andnot_epi32(_mm512_castps_si512(_mm512_set1_ps(GMX_FLOAT_NEGZERO)), |
[...] |
269: return { _mm512_max_ps(a.simdInternal_, b.simdInternal_) }; |
270: } |
271: |
272: static inline SimdFloat gmx_simdcall min(SimdFloat a, SimdFloat b) |
273: { |
274: return { _mm512_min_ps(a.simdInternal_, b.simdInternal_) }; |
275: } |
276: |
277: static inline SimdFloat gmx_simdcall round(SimdFloat x) |
278: { |
279: return { _mm512_roundscale_ps(x.simdInternal_, 0) }; |
[...] |
367: return { _mm512_cmp_ps_mask(a.simdInternal_, b.simdInternal_, _CMP_LT_OQ) }; |
[...] |
408: return { _mm512_mask_blend_ps(sel.simdInternal_, a.simdInternal_, b.simdInternal_) }; |
409: } |
410: |
411: static inline SimdFloat gmx_simdcall copysign(SimdFloat a, SimdFloat b) |
412: { |
413: return { _mm512_castsi512_ps(_mm512_ternarylogic_epi32(_mm512_castps_si512(a.simdInternal_), |
[...] |
451: return { _mm512_mullo_epi32(a.simdInternal_, b.simdInternal_) }; |
0xbc4260 PUSH %RBP |
0xbc4261 MOV %RSP,%RBP |
0xbc4264 PUSH %R15 |
0xbc4266 PUSH %R14 |
0xbc4268 PUSH %R13 |
0xbc426a PUSH %R12 |
0xbc426c PUSH %RBX |
0xbc426d AND $-0x40,%RSP |
0xbc4271 SUB $0x880,%RSP |
0xbc4278 MOV %R8,%RBX |
0xbc427b MOV %RCX,%R14 |
0xbc427e MOV %RDX,%R15 |
0xbc4281 MOV %RSI,%R12 |
0xbc4284 MOV %EDI,%R13D |
0xbc4287 MOV 0x10(%RBP),%RDI |
0xbc428b LEA 0x600(%RSP),%RSI |
0xbc4293 CALL fab030 <@plt_start@+0x7b80> |
0xbc4298 TEST %R13D,%R13D |
0xbc429b JLE bc4f7e |
0xbc42a1 LEA 0x4(%R14),%RAX |
0xbc42a5 VMOVAPS 0x600(%RSP),%ZMM0 |
0xbc42ad VMOVAPS %ZMM0,0x500(%RSP) |
0xbc42b5 VMOVAPS 0x640(%RSP),%ZMM0 |
0xbc42bd VMOVAPS %ZMM0,0x4c0(%RSP) |
0xbc42c5 VMOVAPS 0x680(%RSP),%ZMM0 |
0xbc42cd VMOVAPS %ZMM0,0x480(%RSP) |
0xbc42d5 VMOVAPS 0x6c0(%RSP),%ZMM0 |
0xbc42dd VMOVAPS %ZMM0,0x440(%RSP) |
0xbc42e5 VMOVAPS 0x700(%RSP),%ZMM0 |
0xbc42ed VMOVAPS %ZMM0,0x400(%RSP) |
0xbc42f5 VMOVAPS 0x740(%RSP),%ZMM0 |
0xbc42fd VMOVAPS %ZMM0,0xc0(%RSP) |
0xbc4305 VMOVAPS 0x780(%RSP),%ZMM0 |
0xbc430d VMOVAPS %ZMM0,0x80(%RSP) |
0xbc4315 VMOVAPS 0x7c0(%RSP),%ZMM7 |
0xbc431d LEA 0x8(%R14),%RCX |
0xbc4321 VMOVAPS 0x800(%RSP),%ZMM8 |
0xbc4329 MOV %R13D,%EDX |
0xbc432c VPBROADCASTD -0x86816e(%RIP),%ZMM9 |
0xbc4336 XOR %ESI,%ESI |
0xbc4338 VXORPS %XMM10,%XMM10,%XMM10 |
0xbc433d VBROADCASTSS -0x867ffb(%RIP),%ZMM0 |
0xbc4347 VMOVAPS %ZMM0,0x3c0(%RSP) |
0xbc434f VBROADCASTSS -0x867edd(%RIP),%ZMM12 |
0xbc4359 VBROADCASTSS -0x86820f(%RIP),%ZMM13 |
0xbc4363 VBROADCASTSS -0x867e2d(%RIP),%ZMM0 |
0xbc436d VMOVAPS %ZMM0,0x380(%RSP) |
0xbc4375 VBROADCASTSS -0x8680fb(%RIP),%ZMM0 |
0xbc437f VMOVAPS %ZMM0,0x340(%RSP) |
0xbc4387 VBROADCASTSS -0x868205(%RIP),%ZMM16 |
0xbc4391 VBROADCASTSS -0x8680af(%RIP),%ZMM0 |
0xbc439b VMOVAPS %ZMM0,0x300(%RSP) |
0xbc43a3 VBROADCASTSD -0x866c95(%RIP),%ZMM18 |
0xbc43ad VBROADCASTSS -0x867f07(%RIP),%ZMM19 |
0xbc43b7 VBROADCASTSS -0x868141(%RIP),%ZMM0 |
0xbc43c1 VMOVAPS %ZMM0,0x2c0(%RSP) |
0xbc43c9 VBROADCASTSS -0x867caf(%RIP),%ZMM0 |
0xbc43d3 VMOVAPS %ZMM0,0x280(%RSP) |
0xbc43db VBROADCASTSS -0x867cf5(%RIP),%ZMM0 |
0xbc43e5 VMOVAPS %ZMM0,0x240(%RSP) |
0xbc43ed VBROADCASTSS -0x86821f(%RIP),%ZMM0 |
0xbc43f7 VMOVAPS %ZMM0,0x200(%RSP) |
0xbc43ff VBROADCASTSS -0x868051(%RIP),%ZMM0 |
0xbc4409 VMOVAPS %ZMM0,0x1c0(%RSP) |
0xbc4411 VBROADCASTSS -0x868027(%RIP),%ZMM25 |
0xbc441b VBROADCASTSS -0x8682e5(%RIP),%ZMM0 |
0xbc4425 VMOVAPS %ZMM0,0x180(%RSP) |
0xbc442d VBROADCASTSS -0x86827f(%RIP),%ZMM0 |
0xbc4437 VMOVAPS %ZMM0,0x140(%RSP) |
0xbc443f VBROADCASTSS -0x8682e9(%RIP),%ZMM0 |
0xbc4449 VMOVAPS %ZMM0,0x100(%RSP) |
0xbc4451 JMP bc4ee8 |
0xbc4456 NOPW %CS:(%RAX,%RAX,1) |
(16790) 0xbc4460 VMOVDQA64 0x5c0(%RSP),%ZMM20 |
(16790) 0xbc4468 VPMULLD %ZMM9,%ZMM20,%ZMM11 |
(16790) 0xbc446e VXORPS %XMM14,%XMM14,%XMM14 |
(16790) 0xbc4473 KXNORW %K0,%K0,%K1 |
(16790) 0xbc4477 VGATHERDPS (%R14,%ZMM11,4),%ZMM14{%K1} |
(16790) 0xbc447e VXORPS %XMM15,%XMM15,%XMM15 |
(16790) 0xbc4483 KXNORW %K0,%K0,%K1 |
(16790) 0xbc4487 VGATHERDPS (%RAX,%ZMM11,4),%ZMM15{%K1} |
(16790) 0xbc448e VXORPS %XMM17,%XMM17,%XMM17 |
(16790) 0xbc4494 KXNORW %K0,%K0,%K1 |
(16790) 0xbc4498 VGATHERDPS (%RCX,%ZMM11,4),%ZMM17{%K1} |
(16790) 0xbc449f VMOVDQA64 0x580(%RSP),%ZMM11 |
(16790) 0xbc44a7 VPMULLD %ZMM9,%ZMM11,%ZMM21 |
(16790) 0xbc44ad VXORPS %XMM22,%XMM22,%XMM22 |
(16790) 0xbc44b3 KXNORW %K0,%K0,%K1 |
(16790) 0xbc44b7 VGATHERDPS (%R14,%ZMM21,4),%ZMM22{%K1} |
(16790) 0xbc44be VXORPS %XMM23,%XMM23,%XMM23 |
(16790) 0xbc44c4 KXNORW %K0,%K0,%K1 |
(16790) 0xbc44c8 VGATHERDPS (%RAX,%ZMM21,4),%ZMM23{%K1} |
(16790) 0xbc44cf VXORPS %XMM24,%XMM24,%XMM24 |
(16790) 0xbc44d5 KXNORW %K0,%K0,%K1 |
(16790) 0xbc44d9 VGATHERDPS (%RCX,%ZMM21,4),%ZMM24{%K1} |
(16790) 0xbc44e0 VMOVDQA64 0x540(%RSP),%ZMM31 |
(16790) 0xbc44e8 VPMULLD %ZMM9,%ZMM31,%ZMM21 |
(16790) 0xbc44ee VXORPS %XMM26,%XMM26,%XMM26 |
(16790) 0xbc44f4 KXNORW %K0,%K0,%K1 |
(16790) 0xbc44f8 VGATHERDPS (%R14,%ZMM21,4),%ZMM26{%K1} |
(16790) 0xbc44ff VXORPS %XMM27,%XMM27,%XMM27 |
(16790) 0xbc4505 KXNORW %K0,%K0,%K1 |
(16790) 0xbc4509 VGATHERDPS (%RAX,%ZMM21,4),%ZMM27{%K1} |
(16790) 0xbc4510 VXORPS %XMM28,%XMM28,%XMM28 |
(16790) 0xbc4516 KXNORW %K0,%K0,%K1 |
(16790) 0xbc451a VGATHERDPS (%RCX,%ZMM21,4),%ZMM28{%K1} |
(16790) 0xbc4521 VSUBPS %ZMM22,%ZMM14,%ZMM14 |
(16790) 0xbc4527 VSUBPS %ZMM23,%ZMM15,%ZMM15 |
(16790) 0xbc452d VSUBPS %ZMM24,%ZMM17,%ZMM17 |
(16790) 0xbc4533 VSUBPS %ZMM22,%ZMM26,%ZMM21 |
(16790) 0xbc4539 VSUBPS %ZMM23,%ZMM27,%ZMM22 |
(16790) 0xbc453f VSUBPS %ZMM24,%ZMM28,%ZMM23 |
(16790) 0xbc4545 VMOVAPS 0x3c0(%RSP),%ZMM0 |
(16790) 0xbc454d VMULPS 0x40(%RSP),%ZMM0,%ZMM27 |
(16790) 0xbc4555 VMOVAPS 0x500(%RSP),%ZMM0 |
(16790) 0xbc455d VMULPS %ZMM0,%ZMM17,%ZMM24 |
(16790) 0xbc4563 VRNDSCALEPS $0,%ZMM24,%ZMM24 |
(16790) 0xbc456a VMOVAPS 0x4c0(%RSP),%ZMM1 |
(16790) 0xbc4572 VMULPS %ZMM1,%ZMM24,%ZMM26 |
(16790) 0xbc4578 VSUBPS %ZMM26,%ZMM14,%ZMM26 |
(16790) 0xbc457e VMOVAPS 0x480(%RSP),%ZMM2 |
(16790) 0xbc4586 VMULPS %ZMM2,%ZMM24,%ZMM14 |
(16790) 0xbc458c VSUBPS %ZMM14,%ZMM15,%ZMM15 |
(16790) 0xbc4592 VMOVAPS 0x440(%RSP),%ZMM3 |
(16790) 0xbc459a VMULPS %ZMM3,%ZMM24,%ZMM14 |
(16790) 0xbc45a0 VSUBPS %ZMM14,%ZMM17,%ZMM14 |
(16790) 0xbc45a6 VMOVAPS 0x400(%RSP),%ZMM4 |
(16790) 0xbc45ae VMULPS %ZMM4,%ZMM15,%ZMM17 |
(16790) 0xbc45b4 VRNDSCALEPS $0,%ZMM17,%ZMM17 |
(16790) 0xbc45bb VMOVAPS 0xc0(%RSP),%ZMM5 |
(16790) 0xbc45c3 VMULPS %ZMM5,%ZMM17,%ZMM24 |
(16790) 0xbc45c9 VSUBPS %ZMM24,%ZMM26,%ZMM24 |
(16790) 0xbc45cf VMOVAPS 0x80(%RSP),%ZMM6 |
(16790) 0xbc45d7 VMULPS %ZMM6,%ZMM17,%ZMM17 |
(16790) 0xbc45dd VSUBPS %ZMM17,%ZMM15,%ZMM15 |
(16790) 0xbc45e3 VMULPS %ZMM7,%ZMM24,%ZMM17 |
(16790) 0xbc45e9 VRNDSCALEPS $0,%ZMM17,%ZMM17 |
(16790) 0xbc45f0 VMULPS %ZMM8,%ZMM17,%ZMM17 |
(16790) 0xbc45f6 VSUBPS %ZMM17,%ZMM24,%ZMM17 |
(16790) 0xbc45fc VMULPS %ZMM0,%ZMM23,%ZMM24 |
(16790) 0xbc4602 VRNDSCALEPS $0,%ZMM24,%ZMM24 |
(16790) 0xbc4609 VMULPS %ZMM24,%ZMM1,%ZMM26 |
(16790) 0xbc460f VSUBPS %ZMM26,%ZMM21,%ZMM26 |
(16790) 0xbc4615 VMULPS %ZMM24,%ZMM2,%ZMM21 |
(16790) 0xbc461b VSUBPS %ZMM21,%ZMM22,%ZMM22 |
(16790) 0xbc4621 VMULPS %ZMM24,%ZMM3,%ZMM21 |
(16790) 0xbc4627 VSUBPS %ZMM21,%ZMM23,%ZMM21 |
(16790) 0xbc462d VMULPS %ZMM22,%ZMM4,%ZMM23 |
(16790) 0xbc4633 VRNDSCALEPS $0,%ZMM23,%ZMM23 |
(16790) 0xbc463a VMULPS %ZMM23,%ZMM5,%ZMM24 |
(16790) 0xbc4640 VSUBPS %ZMM24,%ZMM26,%ZMM24 |
(16790) 0xbc4646 VMULPS %ZMM23,%ZMM6,%ZMM23 |
(16790) 0xbc464c VSUBPS %ZMM23,%ZMM22,%ZMM23 |
(16790) 0xbc4652 VMULPS %ZMM24,%ZMM7,%ZMM22 |
(16790) 0xbc4658 VRNDSCALEPS $0,%ZMM22,%ZMM22 |
(16790) 0xbc465f VMULPS %ZMM22,%ZMM8,%ZMM22 |
(16790) 0xbc4665 VSUBPS %ZMM22,%ZMM24,%ZMM24 |
(16790) 0xbc466b VMULPS %ZMM24,%ZMM17,%ZMM22 |
(16790) 0xbc4671 VMULPS %ZMM23,%ZMM15,%ZMM26 |
(16790) 0xbc4677 VADDPS %ZMM22,%ZMM26,%ZMM22 |
(16790) 0xbc467d VMULPS %ZMM21,%ZMM14,%ZMM26 |
(16790) 0xbc4683 VADDPS %ZMM22,%ZMM26,%ZMM28 |
(16790) 0xbc4689 VMULPS %ZMM17,%ZMM17,%ZMM22 |
(16790) 0xbc468f VMULPS %ZMM15,%ZMM15,%ZMM26 |
(16790) 0xbc4695 VADDPS %ZMM22,%ZMM26,%ZMM22 |
(16790) 0xbc469b VMULPS %ZMM14,%ZMM14,%ZMM26 |
(16790) 0xbc46a1 VADDPS %ZMM22,%ZMM26,%ZMM29 |
(16790) 0xbc46a7 VMULPS %ZMM24,%ZMM24,%ZMM22 |
(16790) 0xbc46ad VMULPS %ZMM23,%ZMM23,%ZMM26 |
(16790) 0xbc46b3 VADDPS %ZMM22,%ZMM26,%ZMM22 |
(16790) 0xbc46b9 VRSQRT14PS %ZMM29,%ZMM26 |
(16790) 0xbc46bf VMULPS %ZMM21,%ZMM21,%ZMM30 |
(16790) 0xbc46c5 VADDPS %ZMM22,%ZMM30,%ZMM30 |
(16790) 0xbc46cb VMULPS %ZMM29,%ZMM26,%ZMM22 |
(16790) 0xbc46d1 VMULPS %ZMM12,%ZMM26,%ZMM0 |
(16790) 0xbc46d7 VFMADD213PS %ZMM13,%ZMM26,%ZMM22 |
(16790) 0xbc46dd VMULPS %ZMM22,%ZMM0,%ZMM22 |
(16790) 0xbc46e3 VRSQRT14PS %ZMM30,%ZMM0 |
(16790) 0xbc46e9 VMULPS %ZMM30,%ZMM0,%ZMM26 |
(16790) 0xbc46ef VMULPS %ZMM12,%ZMM0,%ZMM1 |
(16790) 0xbc46f5 VFMADD213PS %ZMM13,%ZMM0,%ZMM26 |
(16790) 0xbc46fb VMULPS %ZMM26,%ZMM1,%ZMM26 |
(16790) 0xbc4701 VMULPS %ZMM22,%ZMM28,%ZMM0 |
(16790) 0xbc4707 VMULPS %ZMM30,%ZMM29,%ZMM1 |
(16790) 0xbc470d VRCP14PS %ZMM1,%ZMM29 |
(16790) 0xbc4713 VMULPS %ZMM26,%ZMM0,%ZMM0 |
(16790) 0xbc4719 VMULPS %ZMM28,%ZMM28,%ZMM28 |
(16790) 0xbc471f VFNMADD213PS 0x380(%RSP),%ZMM29,%ZMM1 |
(16790) 0xbc4727 VMULPS %ZMM1,%ZMM29,%ZMM1 |
(16790) 0xbc472d VMULPS %ZMM1,%ZMM28,%ZMM1 |
(16790) 0xbc4733 VMAXPS 0x340(%RSP),%ZMM0,%ZMM0 |
(16790) 0xbc473b VMINPS %ZMM16,%ZMM0,%ZMM28 |
(16790) 0xbc4741 VMINPS 0x300(%RSP),%ZMM1,%ZMM0 |
(16790) 0xbc4749 VANDPS %ZMM18,%ZMM28,%ZMM1 |
(16790) 0xbc474f VCMPPS $0x1,%ZMM1,%ZMM19,%K1 |
(16790) 0xbc4756 VCMPPS $0x1,%ZMM28,%ZMM10,%K2 |
(16790) 0xbc475d VMOVAPS %ZMM19,%ZMM29 |
(16790) 0xbc4763 VFNMADD213PS %ZMM19,%ZMM1,%ZMM29 |
(16790) 0xbc4769 VCMPPS $0x1,%ZMM16,%ZMM1,%K3 |
(16790) 0xbc4770 VRSQRT14PS %ZMM29,%ZMM1{%K3}{z} |
(16790) 0xbc4776 VMULPS %ZMM29,%ZMM1,%ZMM30 |
(16790) 0xbc477c VMULPS %ZMM12,%ZMM1,%ZMM2 |
(16790) 0xbc4782 VFMADD213PS %ZMM13,%ZMM1,%ZMM30 |
(16790) 0xbc4788 VMULPS %ZMM30,%ZMM2,%ZMM1 |
(16790) 0xbc478e VMOVAPS %ZMM28,%ZMM2 |
(16790) 0xbc4794 VMULPS %ZMM1,%ZMM29,%ZMM2{%K1} |
(16790) 0xbc479a VANDPS %ZMM18,%ZMM2,%ZMM1 |
(16790) 0xbc47a0 VCMPPS $0x1,%ZMM1,%ZMM19,%K3 |
(16790) 0xbc47a7 VSUBPS %ZMM1,%ZMM16,%ZMM29 |
(16790) 0xbc47ad VMULPS %ZMM19,%ZMM29,%ZMM29 |
(16790) 0xbc47b3 VCMPPS $0x1,%ZMM16,%ZMM1,%K4 |
(16790) 0xbc47ba VRSQRT14PS %ZMM29,%ZMM30{%K4}{z} |
(16790) 0xbc47c0 VMULPS %ZMM29,%ZMM30,%ZMM3 |
(16790) 0xbc47c6 VMULPS %ZMM12,%ZMM30,%ZMM4 |
(16790) 0xbc47cc VFMADD213PS %ZMM13,%ZMM30,%ZMM3 |
(16790) 0xbc47d2 VMULPS %ZMM3,%ZMM4,%ZMM3 |
(16790) 0xbc47d8 VMULPS %ZMM1,%ZMM1,%ZMM4 |
(16790) 0xbc47de VMOVAPS %ZMM29,%ZMM4{%K3} |
(16790) 0xbc47e4 VMOVAPS %ZMM1,%ZMM30 |
(16790) 0xbc47ea VMULPS %ZMM3,%ZMM29,%ZMM30{%K3} |
(16790) 0xbc47f0 VMULPS %ZMM4,%ZMM4,%ZMM3 |
(16790) 0xbc47f6 VMOVAPS 0x2c0(%RSP),%ZMM29 |
(16790) 0xbc47fe VFMADD213PS 0x280(%RSP),%ZMM3,%ZMM29 |
(16790) 0xbc4806 VFMADD213PS 0x1c0(%RSP),%ZMM3,%ZMM29 |
(16790) 0xbc480e VMULPS %ZMM29,%ZMM4,%ZMM4 |
(16790) 0xbc4814 VMOVAPS 0x240(%RSP),%ZMM29 |
(16790) 0xbc481c VFMADD213PS 0x200(%RSP),%ZMM3,%ZMM29 |
(16790) 0xbc4824 VFMADD231PS %ZMM29,%ZMM3,%ZMM4 |
(16790) 0xbc482a VFMADD213PS %ZMM30,%ZMM30,%ZMM4 |
(16790) 0xbc4830 VSUBPS %ZMM4,%ZMM25,%ZMM3 |
(16790) 0xbc4836 VSUBPS %ZMM4,%ZMM3,%ZMM4{%K3} |
(16790) 0xbc483c VCMPPS $0xe,0x180(%RSP),%ZMM1,%K3 |
(16790) 0xbc4845 VMOVAPS %ZMM4,%ZMM1{%K3} |
(16790) 0xbc484b VPTERNLOGD $-0x28,0x140(%RSP),%ZMM2,%ZMM1 |
(16790) 0xbc4854 VADDPS %ZMM1,%ZMM1,%ZMM2 |
(16790) 0xbc485a VMOVAPS 0x100(%RSP),%ZMM3 |
(16790) 0xbc4862 VSUBPS %ZMM2,%ZMM3,%ZMM3 |
(16790) 0xbc4868 VSUBPS %ZMM1,%ZMM25,%ZMM1 |
(16790) 0xbc486e VMOVAPS %ZMM2,%ZMM3{%K2} |
(16790) 0xbc4874 VMOVAPS %ZMM3,%ZMM1{%K1} |
(16790) 0xbc487a VSUBPS %ZMM1,%ZMM27,%ZMM1 |
(16790) 0xbc4880 VSUBPS %ZMM0,%ZMM16,%ZMM0 |
(16790) 0xbc4886 VRSQRT14PS %ZMM0,%ZMM2 |
(16790) 0xbc488c VMULPS %ZMM2,%ZMM0,%ZMM0 |
(16790) 0xbc4892 VMULPS %ZMM12,%ZMM2,%ZMM3 |
(16790) 0xbc4898 VFMADD213PS %ZMM13,%ZMM2,%ZMM0 |
(16790) 0xbc489e VMULPS %ZMM0,%ZMM3,%ZMM0 |
(16790) 0xbc48a4 VMULPS (%RSP),%ZMM1,%ZMM1 |
(16790) 0xbc48ab VMULPS %ZMM1,%ZMM0,%ZMM0 |
(16790) 0xbc48b1 VMULPS %ZMM0,%ZMM28,%ZMM30 |
(16790) 0xbc48b7 VMULPS %ZMM0,%ZMM22,%ZMM0 |
(16790) 0xbc48bd VMULPS %ZMM0,%ZMM26,%ZMM27 |
(16790) 0xbc48c3 VMULPS %ZMM30,%ZMM22,%ZMM0 |
(16790) 0xbc48c9 VMULPS %ZMM0,%ZMM22,%ZMM0 |
(16790) 0xbc48cf VMULPS %ZMM0,%ZMM17,%ZMM22 |
(16790) 0xbc48d5 VFNMADD231PS %ZMM24,%ZMM27,%ZMM22 |
(16790) 0xbc48db VMULPS %ZMM0,%ZMM15,%ZMM28 |
(16790) 0xbc48e1 VFNMADD231PS %ZMM23,%ZMM27,%ZMM28 |
(16790) 0xbc48e7 VMULPS %ZMM0,%ZMM14,%ZMM29 |
(16790) 0xbc48ed VFNMADD231PS %ZMM21,%ZMM27,%ZMM29 |
(16790) 0xbc48f3 VPSLLD $0x2,%ZMM20,%ZMM0 |
(16790) 0xbc48fa VMOVDQA -0x858942(%RIP),%YMM6 |
(16790) 0xbc4902 VPERMD %ZMM0,%ZMM6,%ZMM1 |
(16790) 0xbc4908 VUNPCKLPS %ZMM29,%ZMM22,%ZMM2 |
(16790) 0xbc490e VUNPCKLPS %ZMM10,%ZMM28,%ZMM3 |
(16790) 0xbc4914 VUNPCKLPS %ZMM3,%ZMM2,%ZMM4 |
(16790) 0xbc491a VUNPCKHPS %ZMM3,%ZMM2,%ZMM2 |
(16790) 0xbc4920 VEXTRACTF128 $0x1,%YMM4,%XMM3 |
(16790) 0xbc4926 VPMOVSXDQ %YMM1,%ZMM1 |
(16790) 0xbc492c VMOVQ %XMM1,%RDI |
(16790) 0xbc4931 VADDPS (%RBX,%RDI,4),%XMM4,%XMM20 |
(16790) 0xbc4938 VMOVAPS %XMM20,(%RBX,%RDI,4) |
(16790) 0xbc493f VEXTRACTF32X4 $0x2,%ZMM4,%XMM20 |
(16790) 0xbc4946 VPEXTRQ $0x1,%XMM1,%RDI |
(16790) 0xbc494c VADDPS (%RBX,%RDI,4),%XMM3,%XMM3 |
(16790) 0xbc4951 VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4956 VEXTRACTI128 $0x1,%YMM1,%XMM3 |
(16790) 0xbc495c VMOVQ %XMM3,%RDI |
(16790) 0xbc4961 VADDPS (%RBX,%RDI,4),%XMM20,%XMM20 |
(16790) 0xbc4968 VMOVAPS %XMM20,(%RBX,%RDI,4) |
(16790) 0xbc496f VMOVDQA -0x85f077(%RIP),%YMM5 |
(16790) 0xbc4977 VPERMD %ZMM0,%ZMM5,%ZMM0 |
(16790) 0xbc497d VEXTRACTF32X4 $0x3,%ZMM4,%XMM4 |
(16790) 0xbc4984 VPEXTRQ $0x1,%XMM3,%RDI |
(16790) 0xbc498a VADDPS (%RBX,%RDI,4),%XMM4,%XMM3 |
(16790) 0xbc498f VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4994 VEXTRACTI32X4 $0x2,%ZMM1,%XMM3 |
(16790) 0xbc499b VMOVQ %XMM3,%RDI |
(16790) 0xbc49a0 VADDPS (%RBX,%RDI,4),%XMM2,%XMM4 |
(16790) 0xbc49a5 VMOVAPS %XMM4,(%RBX,%RDI,4) |
(16790) 0xbc49aa VUNPCKHPS %ZMM29,%ZMM22,%ZMM4 |
(16790) 0xbc49b0 VPEXTRQ $0x1,%XMM3,%RDI |
(16790) 0xbc49b6 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(16790) 0xbc49bc VADDPS (%RBX,%RDI,4),%XMM3,%XMM3 |
(16790) 0xbc49c1 VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc49c6 VEXTRACTF32X4 $0x2,%ZMM2,%XMM3 |
(16790) 0xbc49cd VEXTRACTI32X4 $0x3,%ZMM1,%XMM1 |
(16790) 0xbc49d4 VMOVQ %XMM1,%RDI |
(16790) 0xbc49d9 VADDPS (%RBX,%RDI,4),%XMM3,%XMM3 |
(16790) 0xbc49de VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc49e3 VUNPCKHPS %ZMM10,%ZMM28,%ZMM3 |
(16790) 0xbc49e9 VPEXTRQ $0x1,%XMM1,%RDI |
(16790) 0xbc49ef VUNPCKLPS %ZMM3,%ZMM4,%ZMM1 |
(16790) 0xbc49f5 VEXTRACTF32X4 $0x3,%ZMM2,%XMM2 |
(16790) 0xbc49fc VADDPS (%RBX,%RDI,4),%XMM2,%XMM2 |
(16790) 0xbc4a01 VUNPCKHPS %ZMM3,%ZMM4,%ZMM3 |
(16790) 0xbc4a07 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4a0c VEXTRACTF128 $0x1,%YMM1,%XMM2 |
(16790) 0xbc4a12 VPMOVSXDQ %YMM0,%ZMM0 |
(16790) 0xbc4a18 VMOVQ %XMM0,%RDI |
(16790) 0xbc4a1d VADDPS (%RBX,%RDI,4),%XMM1,%XMM4 |
(16790) 0xbc4a22 VMOVAPS %XMM4,(%RBX,%RDI,4) |
(16790) 0xbc4a27 VPEXTRQ $0x1,%XMM0,%RDI |
(16790) 0xbc4a2d VEXTRACTF32X4 $0x2,%ZMM1,%XMM4 |
(16790) 0xbc4a34 VADDPS (%RBX,%RDI,4),%XMM2,%XMM2 |
(16790) 0xbc4a39 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4a3e VEXTRACTI128 $0x1,%YMM0,%XMM2 |
(16790) 0xbc4a44 VMOVQ %XMM2,%RDI |
(16790) 0xbc4a49 VADDPS (%RBX,%RDI,4),%XMM4,%XMM4 |
(16790) 0xbc4a4e VMOVAPS %XMM4,(%RBX,%RDI,4) |
(16790) 0xbc4a53 VEXTRACTF32X4 $0x3,%ZMM1,%XMM1 |
(16790) 0xbc4a5a VPEXTRQ $0x1,%XMM2,%RDI |
(16790) 0xbc4a60 VADDPS (%RBX,%RDI,4),%XMM1,%XMM1 |
(16790) 0xbc4a65 VMOVAPS %XMM1,(%RBX,%RDI,4) |
(16790) 0xbc4a6a VEXTRACTI32X4 $0x2,%ZMM0,%XMM1 |
(16790) 0xbc4a71 VMOVQ %XMM1,%RDI |
(16790) 0xbc4a76 VADDPS (%RBX,%RDI,4),%XMM3,%XMM2 |
(16790) 0xbc4a7b VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4a80 VPEXTRQ $0x1,%XMM1,%RDI |
(16790) 0xbc4a86 VEXTRACTF128 $0x1,%YMM3,%XMM1 |
(16790) 0xbc4a8c VADDPS (%RBX,%RDI,4),%XMM1,%XMM1 |
(16790) 0xbc4a91 VMOVAPS %XMM1,(%RBX,%RDI,4) |
(16790) 0xbc4a96 VEXTRACTF32X4 $0x2,%ZMM3,%XMM1 |
(16790) 0xbc4a9d VEXTRACTI32X4 $0x3,%ZMM0,%XMM0 |
(16790) 0xbc4aa4 VMOVQ %XMM0,%RDI |
(16790) 0xbc4aa9 VADDPS (%RBX,%RDI,4),%XMM1,%XMM1 |
(16790) 0xbc4aae VMOVAPS %XMM1,(%RBX,%RDI,4) |
(16790) 0xbc4ab3 VPEXTRQ $0x1,%XMM0,%RDI |
(16790) 0xbc4ab9 VEXTRACTF32X4 $0x3,%ZMM3,%XMM0 |
(16790) 0xbc4ac0 VADDPS (%RBX,%RDI,4),%XMM0,%XMM0 |
(16790) 0xbc4ac5 VMOVAPS %XMM0,(%RBX,%RDI,4) |
(16790) 0xbc4aca VMULPS %ZMM30,%ZMM26,%ZMM0 |
(16790) 0xbc4ad0 VMULPS %ZMM0,%ZMM26,%ZMM0 |
(16790) 0xbc4ad6 VMULPS %ZMM0,%ZMM23,%ZMM20 |
(16790) 0xbc4adc VFNMADD231PS %ZMM15,%ZMM27,%ZMM20 |
(16790) 0xbc4ae2 VMULPS %ZMM0,%ZMM24,%ZMM15 |
(16790) 0xbc4ae8 VFNMADD231PS %ZMM17,%ZMM27,%ZMM15 |
(16790) 0xbc4aee VMULPS %ZMM0,%ZMM21,%ZMM17 |
(16790) 0xbc4af4 VFNMADD231PS %ZMM14,%ZMM27,%ZMM17 |
(16790) 0xbc4afa VADDPS %ZMM15,%ZMM22,%ZMM0 |
(16790) 0xbc4b00 VADDPS %ZMM20,%ZMM28,%ZMM1 |
(16790) 0xbc4b06 VADDPS %ZMM17,%ZMM29,%ZMM2 |
(16790) 0xbc4b0c VPSLLD $0x2,%ZMM11,%ZMM3 |
(16790) 0xbc4b13 VPERMD %ZMM3,%ZMM6,%ZMM4 |
(16790) 0xbc4b19 VUNPCKLPS %ZMM2,%ZMM0,%ZMM14 |
(16790) 0xbc4b1f VUNPCKHPS %ZMM2,%ZMM0,%ZMM11 |
(16790) 0xbc4b25 VUNPCKLPS %ZMM10,%ZMM1,%ZMM0 |
(16790) 0xbc4b2b VUNPCKLPS %ZMM0,%ZMM14,%ZMM2 |
(16790) 0xbc4b31 VUNPCKHPS %ZMM0,%ZMM14,%ZMM0 |
(16790) 0xbc4b37 VEXTRACTF128 $0x1,%YMM2,%XMM14 |
(16790) 0xbc4b3d VPMOVSXDQ %YMM4,%ZMM4 |
(16790) 0xbc4b43 VMOVQ %XMM4,%RDI |
(16790) 0xbc4b48 VMOVAPS (%RBX,%RDI,4),%XMM21 |
(16790) 0xbc4b4f VSUBPS %XMM2,%XMM21,%XMM21 |
(16790) 0xbc4b55 VMOVAPS %XMM21,(%RBX,%RDI,4) |
(16790) 0xbc4b5c VPEXTRQ $0x1,%XMM4,%RDI |
(16790) 0xbc4b62 VMOVAPS (%RBX,%RDI,4),%XMM21 |
(16790) 0xbc4b69 VEXTRACTF32X4 $0x2,%ZMM2,%XMM22 |
(16790) 0xbc4b70 VSUBPS %XMM14,%XMM21,%XMM14 |
(16790) 0xbc4b76 VMOVAPS %XMM14,(%RBX,%RDI,4) |
(16790) 0xbc4b7b VEXTRACTI128 $0x1,%YMM4,%XMM14 |
(16790) 0xbc4b81 VMOVQ %XMM14,%RDI |
(16790) 0xbc4b86 VMOVAPS (%RBX,%RDI,4),%XMM21 |
(16790) 0xbc4b8d VSUBPS %XMM22,%XMM21,%XMM21 |
(16790) 0xbc4b93 VMOVAPS %XMM21,(%RBX,%RDI,4) |
(16790) 0xbc4b9a VPERMD %ZMM3,%ZMM5,%ZMM3 |
(16790) 0xbc4ba0 VEXTRACTF32X4 $0x3,%ZMM2,%XMM2 |
(16790) 0xbc4ba7 VPEXTRQ $0x1,%XMM14,%RDI |
(16790) 0xbc4bad VMOVAPS (%RBX,%RDI,4),%XMM14 |
(16790) 0xbc4bb2 VSUBPS %XMM2,%XMM14,%XMM2 |
(16790) 0xbc4bb6 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4bbb VEXTRACTI32X4 $0x2,%ZMM4,%XMM2 |
(16790) 0xbc4bc2 VMOVQ %XMM2,%RDI |
(16790) 0xbc4bc7 VMOVAPS (%RBX,%RDI,4),%XMM14 |
(16790) 0xbc4bcc VUNPCKHPS %ZMM10,%ZMM1,%ZMM1 |
(16790) 0xbc4bd2 VSUBPS %XMM0,%XMM14,%XMM14 |
(16790) 0xbc4bd6 VMOVAPS %XMM14,(%RBX,%RDI,4) |
(16790) 0xbc4bdb VPEXTRQ $0x1,%XMM2,%RDI |
(16790) 0xbc4be1 VEXTRACTF128 $0x1,%YMM0,%XMM2 |
(16790) 0xbc4be7 VMOVAPS (%RBX,%RDI,4),%XMM14 |
(16790) 0xbc4bec VSUBPS %XMM2,%XMM14,%XMM2 |
(16790) 0xbc4bf0 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4bf5 VEXTRACTF32X4 $0x2,%ZMM0,%XMM2 |
(16790) 0xbc4bfc VEXTRACTI32X4 $0x3,%ZMM4,%XMM4 |
(16790) 0xbc4c03 VMOVQ %XMM4,%RDI |
(16790) 0xbc4c08 VMOVAPS (%RBX,%RDI,4),%XMM14 |
(16790) 0xbc4c0d VSUBPS %XMM2,%XMM14,%XMM2 |
(16790) 0xbc4c11 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4c16 VPEXTRQ $0x1,%XMM4,%RDI |
(16790) 0xbc4c1c VMOVAPS (%RBX,%RDI,4),%XMM2 |
(16790) 0xbc4c21 VUNPCKLPS %ZMM1,%ZMM11,%ZMM4 |
(16790) 0xbc4c27 VEXTRACTF32X4 $0x3,%ZMM0,%XMM0 |
(16790) 0xbc4c2e VSUBPS %XMM0,%XMM2,%XMM0 |
(16790) 0xbc4c32 VMOVAPS %XMM0,(%RBX,%RDI,4) |
(16790) 0xbc4c37 VPMOVSXDQ %YMM3,%ZMM0 |
(16790) 0xbc4c3d VMOVQ %XMM0,%RDI |
(16790) 0xbc4c42 VMOVAPS (%RBX,%RDI,4),%XMM2 |
(16790) 0xbc4c47 VSUBPS %XMM4,%XMM2,%XMM2 |
(16790) 0xbc4c4b VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4c50 VEXTRACTF128 $0x1,%YMM4,%XMM2 |
(16790) 0xbc4c56 VPEXTRQ $0x1,%XMM0,%RDI |
(16790) 0xbc4c5c VMOVAPS (%RBX,%RDI,4),%XMM3 |
(16790) 0xbc4c61 VSUBPS %XMM2,%XMM3,%XMM2 |
(16790) 0xbc4c65 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4c6a VEXTRACTI128 $0x1,%YMM0,%XMM2 |
(16790) 0xbc4c70 VMOVQ %XMM2,%RDI |
(16790) 0xbc4c75 VMOVAPS (%RBX,%RDI,4),%XMM3 |
(16790) 0xbc4c7a VEXTRACTF32X4 $0x2,%ZMM4,%XMM14 |
(16790) 0xbc4c81 VSUBPS %XMM14,%XMM3,%XMM3 |
(16790) 0xbc4c86 VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4c8b VPEXTRQ $0x1,%XMM2,%RDI |
(16790) 0xbc4c91 VEXTRACTF32X4 $0x3,%ZMM4,%XMM2 |
(16790) 0xbc4c98 VMOVAPS (%RBX,%RDI,4),%XMM3 |
(16790) 0xbc4c9d VSUBPS %XMM2,%XMM3,%XMM2 |
(16790) 0xbc4ca1 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4ca6 VUNPCKHPS %ZMM1,%ZMM11,%ZMM1 |
(16790) 0xbc4cac VEXTRACTI32X4 $0x2,%ZMM0,%XMM2 |
(16790) 0xbc4cb3 VMOVQ %XMM2,%RDI |
(16790) 0xbc4cb8 VMOVAPS (%RBX,%RDI,4),%XMM3 |
(16790) 0xbc4cbd VSUBPS %XMM1,%XMM3,%XMM3 |
(16790) 0xbc4cc1 VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4cc6 VPEXTRQ $0x1,%XMM2,%RDI |
(16790) 0xbc4ccc VMOVAPS (%RBX,%RDI,4),%XMM2 |
(16790) 0xbc4cd1 VEXTRACTF128 $0x1,%YMM1,%XMM3 |
(16790) 0xbc4cd7 VSUBPS %XMM3,%XMM2,%XMM2 |
(16790) 0xbc4cdb VEXTRACTF32X4 $0x2,%ZMM1,%XMM3 |
(16790) 0xbc4ce2 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4ce7 VEXTRACTI32X4 $0x3,%ZMM0,%XMM0 |
(16790) 0xbc4cee VMOVQ %XMM0,%RDI |
(16790) 0xbc4cf3 VMOVAPS (%RBX,%RDI,4),%XMM2 |
(16790) 0xbc4cf8 VSUBPS %XMM3,%XMM2,%XMM2 |
(16790) 0xbc4cfc VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4d01 VPEXTRQ $0x1,%XMM0,%RDI |
(16790) 0xbc4d07 VMOVAPS (%RBX,%RDI,4),%XMM0 |
(16790) 0xbc4d0c VEXTRACTF32X4 $0x3,%ZMM1,%XMM1 |
(16790) 0xbc4d13 VSUBPS %XMM1,%XMM0,%XMM0 |
(16790) 0xbc4d17 VMOVAPS %XMM0,(%RBX,%RDI,4) |
(16790) 0xbc4d1c VPSLLD $0x2,%ZMM31,%ZMM0 |
(16790) 0xbc4d23 VPERMD %ZMM0,%ZMM6,%ZMM1 |
(16790) 0xbc4d29 VUNPCKLPS %ZMM17,%ZMM15,%ZMM2 |
(16790) 0xbc4d2f VUNPCKHPS %ZMM17,%ZMM15,%ZMM11 |
(16790) 0xbc4d35 VUNPCKLPS %ZMM10,%ZMM20,%ZMM3 |
(16790) 0xbc4d3b VUNPCKLPS %ZMM3,%ZMM2,%ZMM4 |
(16790) 0xbc4d41 VUNPCKHPS %ZMM3,%ZMM2,%ZMM2 |
(16790) 0xbc4d47 VEXTRACTF128 $0x1,%YMM4,%XMM3 |
(16790) 0xbc4d4d VPMOVSXDQ %YMM1,%ZMM1 |
(16790) 0xbc4d53 VMOVQ %XMM1,%RDI |
(16790) 0xbc4d58 VADDPS (%RBX,%RDI,4),%XMM4,%XMM14 |
(16790) 0xbc4d5d VMOVAPS %XMM14,(%RBX,%RDI,4) |
(16790) 0xbc4d62 VPEXTRQ $0x1,%XMM1,%RDI |
(16790) 0xbc4d68 VEXTRACTF32X4 $0x2,%ZMM4,%XMM14 |
(16790) 0xbc4d6f VADDPS (%RBX,%RDI,4),%XMM3,%XMM3 |
(16790) 0xbc4d74 VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4d79 VEXTRACTI128 $0x1,%YMM1,%XMM3 |
(16790) 0xbc4d7f VMOVQ %XMM3,%RDI |
(16790) 0xbc4d84 VADDPS (%RBX,%RDI,4),%XMM14,%XMM14 |
(16790) 0xbc4d89 VMOVAPS %XMM14,(%RBX,%RDI,4) |
(16790) 0xbc4d8e VEXTRACTF32X4 $0x3,%ZMM4,%XMM4 |
(16790) 0xbc4d95 VPEXTRQ $0x1,%XMM3,%RDI |
(16790) 0xbc4d9b VADDPS (%RBX,%RDI,4),%XMM4,%XMM3 |
(16790) 0xbc4da0 VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4da5 VEXTRACTI32X4 $0x2,%ZMM1,%XMM3 |
(16790) 0xbc4dac VMOVQ %XMM3,%RDI |
(16790) 0xbc4db1 VADDPS (%RBX,%RDI,4),%XMM2,%XMM4 |
(16790) 0xbc4db6 VMOVAPS %XMM4,(%RBX,%RDI,4) |
(16790) 0xbc4dbb VPERMD %ZMM0,%ZMM5,%ZMM0 |
(16790) 0xbc4dc1 VPEXTRQ $0x1,%XMM3,%RDI |
(16790) 0xbc4dc7 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(16790) 0xbc4dcd VADDPS (%RBX,%RDI,4),%XMM3,%XMM3 |
(16790) 0xbc4dd2 VUNPCKHPS %ZMM10,%ZMM20,%ZMM4 |
(16790) 0xbc4dd8 VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4ddd VEXTRACTF32X4 $0x2,%ZMM2,%XMM3 |
(16790) 0xbc4de4 VEXTRACTI32X4 $0x3,%ZMM1,%XMM1 |
(16790) 0xbc4deb VMOVQ %XMM1,%RDI |
(16790) 0xbc4df0 VADDPS (%RBX,%RDI,4),%XMM3,%XMM3 |
(16790) 0xbc4df5 VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4dfa VPEXTRQ $0x1,%XMM1,%RDI |
(16790) 0xbc4e00 VUNPCKLPS %ZMM4,%ZMM11,%ZMM1 |
(16790) 0xbc4e06 VEXTRACTF32X4 $0x3,%ZMM2,%XMM2 |
(16790) 0xbc4e0d VADDPS (%RBX,%RDI,4),%XMM2,%XMM2 |
(16790) 0xbc4e12 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4e17 VPMOVSXDQ %YMM0,%ZMM0 |
(16790) 0xbc4e1d VMOVQ %XMM0,%RDI |
(16790) 0xbc4e22 VADDPS (%RBX,%RDI,4),%XMM1,%XMM2 |
(16790) 0xbc4e27 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4e2c VEXTRACTF128 $0x1,%YMM1,%XMM2 |
(16790) 0xbc4e32 VEXTRACTF32X4 $0x2,%ZMM1,%XMM3 |
(16790) 0xbc4e39 VPEXTRQ $0x1,%XMM0,%RDI |
(16790) 0xbc4e3f VADDPS (%RBX,%RDI,4),%XMM2,%XMM2 |
(16790) 0xbc4e44 VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4e49 VEXTRACTI128 $0x1,%YMM0,%XMM2 |
(16790) 0xbc4e4f VMOVQ %XMM2,%RDI |
(16790) 0xbc4e54 VADDPS (%RBX,%RDI,4),%XMM3,%XMM3 |
(16790) 0xbc4e59 VUNPCKHPS %ZMM4,%ZMM11,%ZMM4 |
(16790) 0xbc4e5f VMOVAPS %XMM3,(%RBX,%RDI,4) |
(16790) 0xbc4e64 VEXTRACTF32X4 $0x3,%ZMM1,%XMM1 |
(16790) 0xbc4e6b VPEXTRQ $0x1,%XMM2,%RDI |
(16790) 0xbc4e71 VADDPS (%RBX,%RDI,4),%XMM1,%XMM1 |
(16790) 0xbc4e76 VMOVAPS %XMM1,(%RBX,%RDI,4) |
(16790) 0xbc4e7b VEXTRACTI32X4 $0x2,%ZMM0,%XMM1 |
(16790) 0xbc4e82 VMOVQ %XMM1,%RDI |
(16790) 0xbc4e87 VADDPS (%RBX,%RDI,4),%XMM4,%XMM2 |
(16790) 0xbc4e8c VMOVAPS %XMM2,(%RBX,%RDI,4) |
(16790) 0xbc4e91 VPEXTRQ $0x1,%XMM1,%RDI |
(16790) 0xbc4e97 VEXTRACTF128 $0x1,%YMM4,%XMM1 |
(16790) 0xbc4e9d VADDPS (%RBX,%RDI,4),%XMM1,%XMM1 |
(16790) 0xbc4ea2 VMOVAPS %XMM1,(%RBX,%RDI,4) |
(16790) 0xbc4ea7 VEXTRACTF32X4 $0x2,%ZMM4,%XMM1 |
(16790) 0xbc4eae VEXTRACTI32X4 $0x3,%ZMM0,%XMM0 |
(16790) 0xbc4eb5 VMOVQ %XMM0,%RDI |
(16790) 0xbc4eba VADDPS (%RBX,%RDI,4),%XMM1,%XMM1 |
(16790) 0xbc4ebf VMOVAPS %XMM1,(%RBX,%RDI,4) |
(16790) 0xbc4ec4 VPEXTRQ $0x1,%XMM0,%RDI |
(16790) 0xbc4eca VEXTRACTF32X4 $0x3,%ZMM4,%XMM0 |
(16790) 0xbc4ed1 VADDPS (%RBX,%RDI,4),%XMM0,%XMM0 |
(16790) 0xbc4ed6 VMOVAPS %XMM0,(%RBX,%RDI,4) |
(16790) 0xbc4edb ADD $0x40,%RSI |
(16790) 0xbc4edf CMP %RDX,%RSI |
(16790) 0xbc4ee2 JAE bc4f7e |
(16790) 0xbc4ee8 XOR %EDI,%EDI |
(16790) 0xbc4eea MOV %ESI,%R8D |
(16790) 0xbc4eed JMP bc4f0d |
0xbc4eef NOP |
(16791) 0xbc4ef0 MOVL $0,(%RSP,%RDI,1) |
(16791) 0xbc4ef7 MOVL $0,0x40(%RSP,%RDI,1) |
(16791) 0xbc4eff ADD $0x4,%RDI |
(16791) 0xbc4f03 CMP $0x40,%RDI |
(16791) 0xbc4f07 JE bc4460 |
(16791) 0xbc4f0d MOVSXD %R8D,%R10 |
(16791) 0xbc4f10 MOVSXD (%R12,%R10,4),%R9 |
(16791) 0xbc4f14 MOV 0x4(%R12,%R10,4),%R11D |
(16791) 0xbc4f19 MOV %R11D,0x5c0(%RSP,%RDI,1) |
(16791) 0xbc4f21 MOV 0x8(%R12,%R10,4),%R11D |
(16791) 0xbc4f26 MOV %R11D,0x580(%RSP,%RDI,1) |
(16791) 0xbc4f2e MOV 0xc(%R12,%R10,4),%R10D |
(16791) 0xbc4f33 MOV %R10D,0x540(%RSP,%RDI,1) |
(16791) 0xbc4f3b LEA (%RSI,%RDI,1),%R10 |
(16791) 0xbc4f3f CMP %RDX,%R10 |
(16791) 0xbc4f42 JAE bc4ef0 |
(16791) 0xbc4f44 LEA (%R9,%R9,2),%R9 |
(16791) 0xbc4f48 SAL $0x4,%R9 |
(16791) 0xbc4f4c VMOVSS 0x4(%R15,%R9,1),%XMM11 |
(16791) 0xbc4f53 VMOVSS %XMM11,(%RSP,%RDI,1) |
(16791) 0xbc4f58 VMOVSS (%R15,%R9,1),%XMM11 |
(16791) 0xbc4f5e VMOVSS %XMM11,0x40(%RSP,%RDI,1) |
(16791) 0xbc4f64 LEA 0x4(%R8),%R9D |
(16791) 0xbc4f68 CMP %R13D,%R9D |
(16791) 0xbc4f6b CMOVL %R9D,%R8D |
(16791) 0xbc4f6f ADD $0x4,%RDI |
(16791) 0xbc4f73 CMP $0x40,%RDI |
(16791) 0xbc4f77 JNE bc4f0d |
(16790) 0xbc4f79 JMP bc4460 |
0xbc4f7e VXORPS %XMM0,%XMM0,%XMM0 |
0xbc4f82 LEA -0x28(%RBP),%RSP |
0xbc4f86 POP %RBX |
0xbc4f87 POP %R12 |
0xbc4f89 POP %R13 |
0xbc4f8b POP %R14 |
0xbc4f8d POP %R15 |
0xbc4f8f POP %RBP |
0xbc4f90 VZEROUPPER |
0xbc4f93 RET |
0xbc4f94 NOPW %CS:(%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►99.94+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►99.88+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►71.30+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►14.41+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
►13.96+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►80.26+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►16.49+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
►2.94+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►81.96+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►16.91+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►96.12+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►3.81+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►80.98+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 | |
►9.37+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
►8.69+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►99.93+ | calculateSimpleBond(int, int, [...] | bonded.cpp:4143 | libgromacs_mpi.so.9.0.0 |
○ | (anonymous namespace)::calc_on[...] | listed_forces.cpp:356 | libgromacs_mpi.so.9.0.0 |
○ | .omp_outlined.#0xbe5d40 | listed_forces.cpp:428 | libgromacs_mpi.so.9.0.0 |
○ | __kmp_invoke_microtask | libomp.so | |
○ | __kmp_fork_call | libomp.so | |
○ | __kmpc_fork_call | libomp.so | |
○ | ListedForces::calculate(gmx_wa[...] | listed_forces.cpp:387 | libgromacs_mpi.so.9.0.0 |
○ | do_force(_IO_FILE*, t_commrec [...] | sim_util.cpp:2047 | libgromacs_mpi.so.9.0.0 |
○ | gmx::LegacySimulator::do_md() | md.cpp:1248 | libgromacs_mpi.so.9.0.0 |
○ | gmx::Mdrunner::mdrunner() | runner.cpp:2311 | libgromacs_mpi.so.9.0.0 |
○ | gmx::gmx_mdrun(int, gmx_hw_inf[...] | mdrun.cpp:280 | gmx_mpi |
○ | gmx::gmx_mdrun(int, char**) | mdrun.cpp:82 | gmx_mpi |
○ | gmx::CommandLineModuleManager:[...] | cmdlinemodulemanager.cpp:569 | libgromacs_mpi.so.9.0.0 |
○ | main | gmx.cpp:58 | gmx_mpi |
○ | __libc_start_call_main | libc.so.6 |
Path / |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 1x1
Source file and lines | bonded.cpp:1118-1258 |
Module | libgromacs_mpi.so.9.0.0 |
nb instructions | 85 |
nb uops | 102 |
loop length | 547 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 10 |
nb stack references | 30 |
micro-operation queue | 17.00 cycles |
front end | 17.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.25 | 2.25 | 2.25 | 2.25 | 2.00 | 16.33 | 16.33 | 16.33 | 0.00 | 9.00 | 9.00 | 0.00 | 19.00 | 19.00 |
cycles | 2.25 | 2.25 | 2.25 | 2.25 | 2.00 | 19.33 | 19.33 | 19.33 | 0.00 | 9.00 | 9.00 | 0.00 | 19.00 | 19.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 17.00 |
Dispatch | 19.33 |
Overall L1 | 19.33 |
all | 12% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 62% |
load | 33% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 55% |
load | 31% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
all | 11% |
load | 9% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 61% |
load | 37% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
all | 54% |
load | 35% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB $0x880,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R8,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV %EDI,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0x10(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
LEA 0x600(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CALL fab030 <@plt_start@+0x7b80> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
TEST %R13D,%R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE bc4f7e <_ZN12_GLOBAL__N_16anglesIL18BondedKernelFlavor0EEENSt9enable_ifIXeqT_LS1_0EEfE4typeEiPKiPK9t_iparamsPA3_KfPA4_fPA3_fPK5t_pbcfPfN3gmx8ArrayRefISA_EEP8t_fcdataP12t_disresdataP12t_oriresdataPi+0xd1e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x4(%R14),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVAPS 0x600(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x500(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x640(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x4c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x680(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x480(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x6c0(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x440(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x700(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x400(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x740(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0xc0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x780(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x7c0(%RSP),%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
LEA 0x8(%R14),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVAPS 0x800(%RSP),%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
MOV %R13D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (6.3%) |
VPBROADCASTD -0x86816e(%RIP),%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 | scal (6.3%) |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
VXORPS %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VBROADCASTSS -0x867ffb(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x3c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x867edd(%RIP),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x86820f(%RIP),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x867e2d(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x380(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x8680fb(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x340(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x868205(%RIP),%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x8680af(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x300(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSD -0x866c95(%RIP),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
VBROADCASTSS -0x867f07(%RIP),%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x868141(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x2c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x867caf(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x280(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x867cf5(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x240(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x86821f(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x200(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x868051(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x1c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x868027(%RIP),%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x8682e5(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x180(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x86827f(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x140(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x8682e9(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x100(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP bc4ee8 <_ZN12_GLOBAL__N_16anglesIL18BondedKernelFlavor0EEENSt9enable_ifIXeqT_LS1_0EEfE4typeEiPKiPK9t_iparamsPA3_KfPA4_fPA3_fPK5t_pbcfPfN3gmx8ArrayRefISA_EEP8t_fcdataP12t_disresdataP12t_oriresdataPi+0xc88> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run 1x1
Source file and lines | bonded.cpp:1118-1258 |
Module | libgromacs_mpi.so.9.0.0 |
nb instructions | 85 |
nb uops | 102 |
loop length | 547 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 10 |
nb stack references | 30 |
micro-operation queue | 17.00 cycles |
front end | 17.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.25 | 2.25 | 2.25 | 2.25 | 2.00 | 16.33 | 16.33 | 16.33 | 0.00 | 9.00 | 9.00 | 0.00 | 19.00 | 19.00 |
cycles | 2.25 | 2.25 | 2.25 | 2.25 | 2.00 | 19.33 | 19.33 | 19.33 | 0.00 | 9.00 | 9.00 | 0.00 | 19.00 | 19.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 17.00 |
Dispatch | 19.33 |
Overall L1 | 19.33 |
all | 12% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 62% |
load | 33% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 55% |
load | 31% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
all | 11% |
load | 9% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 61% |
load | 37% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
all | 54% |
load | 35% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB $0x880,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R8,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV %RSI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV %EDI,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0x10(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
LEA 0x600(%RSP),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CALL fab030 <@plt_start@+0x7b80> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
TEST %R13D,%R13D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE bc4f7e <_ZN12_GLOBAL__N_16anglesIL18BondedKernelFlavor0EEENSt9enable_ifIXeqT_LS1_0EEfE4typeEiPKiPK9t_iparamsPA3_KfPA4_fPA3_fPK5t_pbcfPfN3gmx8ArrayRefISA_EEP8t_fcdataP12t_disresdataP12t_oriresdataPi+0xd1e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x4(%R14),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVAPS 0x600(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x500(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x640(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x4c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x680(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x480(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x6c0(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x440(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x700(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x400(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x740(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0xc0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x780(%RSP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPS %ZMM0,0x80(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VMOVAPS 0x7c0(%RSP),%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
LEA 0x8(%R14),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVAPS 0x800(%RSP),%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
MOV %R13D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (6.3%) |
VPBROADCASTD -0x86816e(%RIP),%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 5 | 0.50 | scal (6.3%) |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
VXORPS %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VBROADCASTSS -0x867ffb(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x3c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x867edd(%RIP),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x86820f(%RIP),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x867e2d(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x380(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x8680fb(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x340(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x868205(%RIP),%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x8680af(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x300(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSD -0x866c95(%RIP),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
VBROADCASTSS -0x867f07(%RIP),%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x868141(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x2c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x867caf(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x280(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x867cf5(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x240(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x86821f(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x200(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x868051(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x1c0(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x868027(%RIP),%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VBROADCASTSS -0x8682e5(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x180(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x86827f(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x140(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
VBROADCASTSS -0x8682e9(%RIP),%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (6.3%) |
VMOVAPS %ZMM0,0x100(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP bc4ee8 <_ZN12_GLOBAL__N_16anglesIL18BondedKernelFlavor0EEENSt9enable_ifIXeqT_LS1_0EEfE4typeEiPKiPK9t_iparamsPA3_KfPA4_fPA3_fPK5t_pbcfPfN3gmx8ArrayRefISA_EEP8t_fcdataP12t_disresdataP12t_oriresdataPi+0xc88> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VXORPS %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
Run 1x1 | Number processes: 1Number processes per node: 1OMP_NUM_THREADS: 1 |
---|---|
Run 2x1 | Number processes: 2Number processes per node: 2OMP_NUM_THREADS: 1 |
Run 4x1 | Number processes: 4Number processes per node: 4OMP_NUM_THREADS: 1 |
Run 8x1 | Number processes: 8Number processes per node: 8OMP_NUM_THREADS: 1 |
Run 16x1 | Number processes: 16Number processes per node: 16OMP_NUM_THREADS: 1 |
Run 32x1 | Number processes: 32Number processes per node: 32OMP_NUM_THREADS: 1 |
Run 64x1 | Number processes: 64Number processes per node: 64OMP_NUM_THREADS: 1 |
Run 128x1 | Number processes: 128Number processes per node: 128OMP_NUM_THREADS: 1 |
Run 192x1 | Number processes: 192Number nodes: 1Number processes per node: 192Run Command: <executable> mdrun -s ion_channel.tpr -nsteps 10000 -pin on -deffnm aoccMPI Command: mpirun -genv I_MPI_FABRICS=shm -n <number_processes>Dataset: Run Directory: .OMP_NUM_THREADS: 1 |
(1x1) Efficiency | (1x1) Potential Speed-Up (%) | (2x1) Efficiency | (2x1) Potential Speed-Up (%) | (4x1) Efficiency | (4x1) Potential Speed-Up (%) | (8x1) Efficiency | (8x1) Potential Speed-Up (%) | (16x1) Efficiency | (16x1) Potential Speed-Up (%) | (32x1) Efficiency | (32x1) Potential Speed-Up (%) | (64x1) Efficiency | (64x1) Potential Speed-Up (%) | (128x1) Efficiency | (128x1) Potential Speed-Up (%) | (192x1) Efficiency | (192x1) Potential Speed-Up (%) |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1 | 0 | 1.13 | 0 | 1.15 | 0 | 1.05 | 0 | 1.19 | 0 | 1.32 | 0 | 1.4 | 0 | 1.27 | 0 | 1.26 | 0 |
Run | Number of threads | Efficiency (ideal is 1) | Speedup | Ideal Speedup | Time (s) | Coverage (%) |
---|---|---|---|---|---|---|
1x1 | 1 | 1 | 1 | 1 | 9.3849868774414 | 1.1258319616318 |
2x1 | 2 | 1.13 | 2.27 | 2 | 4.6799964904785 | 0.9133637547493 |
4x1 | 4 | 1.15 | 4.59 | 4 | 2.510005235672 | 0.82134544849396 |
8x1 | 8 | 1.05 | 8.38 | 8 | 1.3899989128113 | 0.72374057769775 |
16x1 | 16 | 1.19 | 19.1 | 16 | 0.89000082015991 | 0.5939736366272 |
32x1 | 19 | 1.32 | 42.1 | 32 | 0.67999970912933 | 0.43374311923981 |
64x1 | 36 | 1.4 | 89.41 | 64 | 0.36000010371208 | 0.26410323381424 |
128x1 | 72 | 1.27 | 162.01 | 128 | 0.29000011086464 | 0.34086319804192 |
192x1 | 104 | 1.26 | 241.7 | 192 | 0.18999995291233 | 0.28825935721397 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼std::enable_if<((BondedKernelFlavor)0)==((BondedKernelFlavor)0), float>::type (anonymous namespace)::angles<(BondedKernelFlavor)0>(int, int const*, t_iparams const*, float const (*) [3], float (*) [4], float (*) [3], t_pbc const*, float, float*, gmx::Array...– | 0.29 | 0.04 |
▼Loop 16790 - bonded.cpp:1151-1185 - libgromacs_mpi.so.9.0.0– | 0.26 | 0.06 |
○Loop 16791 - bonded.cpp:1157-1178 - libgromacs_mpi.so.9.0.0 | 0.03 | 0.01 |