Loop Id: 2479 | Module: exec | Source: par_csr_matop.c:937-989 [...] | Coverage: 1.6% |
---|
Loop Id: 2479 | Module: exec | Source: par_csr_matop.c:937-989 [...] | Coverage: 1.6% |
---|
0x55a2c0 MOV -0x48(%RBP),%R9 |
0x55a2c4 MOV -0xc8(%RBP),%RCX |
0x55a2cb MOV -0xd0(%RBP),%RSI |
0x55a2d2 MOV -0xc0(%RBP),%R10 |
0x55a2d9 MOV (%RCX,%R9,8),%RDI |
0x55a2dd VMOVSD (%RSI,%R9,8),%XMM7 |
0x55a2e3 LEA 0x8(,%RDI,8),%R9 |
0x55a2eb MOV (%R10,%RDI,8),%RAX |
0x55a2ef LEA (%R10,%R9,1),%R14 |
0x55a2f3 MOV (%R14),%R10 |
0x55a2f6 CMP %R10,%RAX |
0x55a2f9 JGE 55a32f |
0x55a2fb NOPL (%RAX,%RAX,1) |
(2481) 0x55a300 MOV (%R11,%RAX,8),%RCX |
(2481) 0x55a304 VMULSD (%R13,%RAX,8),%XMM7,%XMM8 |
(2481) 0x55a30b LEA (%R8,%RCX,8),%RSI |
(2481) 0x55a30f MOV (%RSI),%R15 |
(2481) 0x55a312 CMP %R15,%R12 |
(2481) 0x55a315 JG 55a500 |
(2481) 0x55a31b LEA (%RBX,%R15,8),%RCX |
(2481) 0x55a31f INC %RAX |
(2481) 0x55a322 VADDSD (%RCX),%XMM8,%XMM9 |
(2481) 0x55a326 VMOVSD %XMM9,(%RCX) |
(2481) 0x55a32a CMP %R10,%RAX |
(2481) 0x55a32d JL 55a300 |
0x55a32f CMPQ $0,-0xb8(%RBP) |
0x55a337 JNE 55a530 |
0x55a33d INCQ -0x48(%RBP) |
0x55a341 MOV -0xb0(%RBP),%R14 |
0x55a348 MOV -0xa0(%RBP),%RSI |
0x55a34f MOV -0x48(%RBP),%RAX |
0x55a353 CMP %RAX,0x8(%R14,%RSI,8) |
0x55a358 JG 55a2c0 |
(2481) 0x55a500 MOV -0x38(%RBP),%R10 |
(2481) 0x55a504 MOV %RDX,(%RSI) |
(2481) 0x55a507 INC %RAX |
(2481) 0x55a50a VMOVSD %XMM8,(%RBX,%RDX,8) |
(2481) 0x55a50f MOV %RCX,(%R10,%RDX,8) |
(2481) 0x55a513 INC %RDX |
(2481) 0x55a516 MOV (%R14),%R10 |
(2481) 0x55a519 CMP %RAX,%R10 |
(2481) 0x55a51c JG 55a300 |
0x55a522 CMPQ $0,-0xb8(%RBP) |
0x55a52a JE 55a33d |
0x55a530 MOV -0xf8(%RBP),%R14 |
0x55a537 MOV (%R14,%RDI,8),%RAX |
0x55a53b LEA (%R14,%R9,1),%R14 |
0x55a53f MOV (%R14),%R10 |
0x55a542 CMP %R10,%RAX |
0x55a545 JGE 55a33d |
0x55a54b MOV -0xa8(%RBP),%RSI |
0x55a552 NOPW (%RAX,%RAX,1) |
(2480) 0x55a558 MOV -0x90(%RBP),%RDI |
(2480) 0x55a55f MOV -0x88(%RBP),%R15 |
(2480) 0x55a566 MOV (%RDI,%RAX,8),%R9 |
(2480) 0x55a56a MOV -0x58(%RBP),%RDI |
(2480) 0x55a56e MOV (%R15,%R9,8),%RCX |
(2480) 0x55a572 MOV -0x98(%RBP),%R15 |
(2480) 0x55a579 VMULSD (%R15,%RAX,8),%XMM7,%XMM10 |
(2480) 0x55a57f ADD %RCX,%RDI |
(2480) 0x55a582 LEA (%R8,%RDI,8),%RDI |
(2480) 0x55a586 MOV (%RDI),%R9 |
(2480) 0x55a589 CMP %R9,-0x40(%RBP) |
(2480) 0x55a58d JG 55a5b8 |
(2480) 0x55a58f MOV -0x50(%RBP),%RCX |
(2480) 0x55a593 INC %RAX |
(2480) 0x55a596 LEA (%RCX,%R9,8),%RDI |
(2480) 0x55a59a VADDSD (%RDI),%XMM10,%XMM11 |
(2480) 0x55a59e VMOVSD %XMM11,(%RDI) |
(2480) 0x55a5a2 CMP %R10,%RAX |
(2480) 0x55a5a5 JL 55a558 |
0x55a5a7 MOV %RSI,-0xa8(%RBP) |
0x55a5ae JMP 55a33d |
(2480) 0x55a5b8 MOV -0x50(%RBP),%R10 |
(2480) 0x55a5bc MOV -0x80(%RBP),%R9 |
(2480) 0x55a5c0 MOV %RSI,(%RDI) |
(2480) 0x55a5c3 INC %RAX |
(2480) 0x55a5c6 VMOVSD %XMM10,(%R10,%RSI,8) |
(2480) 0x55a5cc MOV %RCX,(%R9,%RSI,8) |
(2480) 0x55a5d0 INC %RSI |
(2480) 0x55a5d3 MOV (%R14),%R10 |
(2480) 0x55a5d6 CMP %RAX,%R10 |
(2480) 0x55a5d9 JG 55a558 |
0x55a5df MOV %RSI,-0xa8(%RBP) |
0x55a5e6 JMP 55a33d |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 937 - 989 |
-------------------------------------------------------------------------------- |
937: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
938: { |
939: i2 = A_diag_j[jj2]; |
940: a_entry = A_diag_data[jj2]; |
[...] |
946: for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++) |
947: { |
948: i3 = B_diag_j[jj3]; |
[...] |
956: if (B_marker[i3] < jj_row_begin_diag) |
957: { |
958: B_marker[i3] = jj_count_diag; |
959: C_diag_data[jj_count_diag] = a_entry*B_diag_data[jj3]; |
960: C_diag_j[jj_count_diag] = i3; |
961: jj_count_diag++; |
962: } |
963: else |
964: { |
965: C_diag_data[B_marker[i3]] += a_entry*B_diag_data[jj3]; |
966: } |
967: } |
968: if (num_cols_offd_B) |
969: { |
970: for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++) |
971: { |
972: i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]]; |
[...] |
980: if (B_marker[i3] < jj_row_begin_offd) |
981: { |
982: B_marker[i3] = jj_count_offd; |
983: C_offd_data[jj_count_offd] = a_entry*B_offd_data[jj3]; |
984: C_offd_j[jj_count_offd] = i3-num_cols_diag_B; |
985: jj_count_offd++; |
986: } |
987: else |
988: { |
989: C_offd_data[B_marker[i3]] += a_entry*B_offd_data[jj3]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.71 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.38 |
Bottlenecks | micro-operation queue, P2, P3, |
Function | hypre_ParMatmul._omp_fn.3 |
Source | par_csr_matop.c:937-989 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 9.50 |
CQA cycles if fully vectorized | 1.19 |
Front-end cycles | 9.50 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 9.50 |
P2 cycles | 9.50 |
P3 cycles | 3.00 |
P4 cycles | 4.00 |
P5 cycles | 4.00 |
P6 cycles | 3.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 9.69 |
Stall cycles (UFS) | 0.20 |
Nb insns | 35.00 |
Nb uops | 37.00 |
Nb loads | 19.00 |
Nb stores | 3.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 18.53 |
Bytes prefetched | 0.00 |
Bytes loaded | 152.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.71 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.38 |
Bottlenecks | micro-operation queue, P2, P3, |
Function | hypre_ParMatmul._omp_fn.3 |
Source | par_csr_matop.c:937-989 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.50 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 9.50 |
CQA cycles if fully vectorized | 1.19 |
Front-end cycles | 9.50 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 9.50 |
P2 cycles | 9.50 |
P3 cycles | 3.00 |
P4 cycles | 4.00 |
P5 cycles | 4.00 |
P6 cycles | 3.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 9.69 |
Stall cycles (UFS) | 0.20 |
Nb insns | 35.00 |
Nb uops | 37.00 |
Nb loads | 19.00 |
Nb stores | 3.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 18.53 |
Bytes prefetched | 0.00 |
Bytes loaded | 152.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_ParMatmul._omp_fn.3 |
Source file and lines | par_csr_matop.c:937-989 |
Module | exec |
nb instructions | 35 |
nb uops | 37 |
loop length | 189 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 9.50 cycles |
front end | 9.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 9.50 | 9.50 | 3.00 | 4.00 | 4.00 | 3.00 |
cycles | 4.00 | 4.00 | 9.50 | 9.50 | 3.00 | 4.00 | 4.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 9.69 |
Stall cycles | 0.20 |
LM full (events) | 0.80 |
Front-end | 9.50 |
Dispatch | 9.50 |
Overall L1 | 9.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xd0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xc0(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%R9,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RSI,%R9,8),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x8(,%RDI,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R10,%RDI,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R10,%R9,1),%R14 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 55a32f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMPQ $0,-0xb8(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 55a530 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INCQ -0x48(%RBP) | 3 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
MOV -0xb0(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RAX,0x8(%R14,%RSI,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JG 55a2c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMPQ $0,-0xb8(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 55a33d | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0xf8(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R9,1),%R14 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 55a33d | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0xa8(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RSI,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 55a33d | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV %RSI,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 55a33d | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | hypre_ParMatmul._omp_fn.3 |
Source file and lines | par_csr_matop.c:937-989 |
Module | exec |
nb instructions | 35 |
nb uops | 37 |
loop length | 189 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 9.50 cycles |
front end | 9.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 9.50 | 9.50 | 3.00 | 4.00 | 4.00 | 3.00 |
cycles | 4.00 | 4.00 | 9.50 | 9.50 | 3.00 | 4.00 | 4.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 9.69 |
Stall cycles | 0.20 |
LM full (events) | 0.80 |
Front-end | 9.50 |
Dispatch | 9.50 |
Overall L1 | 9.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xd0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xc0(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%R9,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RSI,%R9,8),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x8(,%RDI,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R10,%RDI,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R10,%R9,1),%R14 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 55a32f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMPQ $0,-0xb8(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 55a530 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
INCQ -0x48(%RBP) | 3 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
MOV -0xb0(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RAX,0x8(%R14,%RSI,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JG 55a2c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMPQ $0,-0xb8(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 55a33d | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0xf8(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R14,%RDI,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%R14,%R9,1),%R14 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 55a33d | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0xa8(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RSI,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 55a33d | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV %RSI,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 55a33d | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |