Loop Id: 1852 | Module: exec | Source: par_strength.c:492-513 | Coverage: 0.03% |
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Loop Id: 1852 | Module: exec | Source: par_strength.c:492-513 | Coverage: 0.03% |
---|
0x50c9d0 MOV 0xc8(%RSP),%RCX |
0x50c9d8 ADD %RCX,(%R8) |
0x50c9db MOV (%R9),%RDX |
0x50c9de ADD %R11,%RDX |
0x50c9e1 MOV %RDX,(%R9) |
0x50c9e4 MOV -0x8(%RDI),%RAX |
0x50c9e8 MOV (%RDI),%R15 |
0x50c9eb MOV (%R8),%RCX |
0x50c9ee CMP %R15,%RAX |
0x50c9f1 JGE 50ca1a |
0x50c9f3 NOPL (%RAX,%RAX,1) |
(1854) 0x50c9f8 MOV (%RBX,%RAX,8),%RDX |
(1854) 0x50c9fc TEST %RDX,%RDX |
(1854) 0x50c9ff JS 50d110 |
(1854) 0x50ca05 MOV %RDX,(%R14,%RCX,8) |
(1854) 0x50ca09 INC %RAX |
(1854) 0x50ca0c INC %RCX |
(1854) 0x50ca0f MOV (%RDI),%R15 |
(1854) 0x50ca12 CMP %R15,%RAX |
(1854) 0x50ca15 JL 50c9f8 |
0x50ca17 MOV (%R9),%RDX |
0x50ca1a MOV -0x8(%RSI),%RAX |
0x50ca1e MOV (%RSI),%R15 |
0x50ca21 CMP %RAX,%R15 |
0x50ca24 JLE 50ca50 |
0x50ca26 NOPW %CS:(%RAX,%RAX,1) |
(1853) 0x50ca30 MOV (%R12,%RAX,8),%RCX |
(1853) 0x50ca34 TEST %RCX,%RCX |
(1853) 0x50ca37 JS 50d128 |
(1853) 0x50ca3d MOV %RCX,(%R13,%RDX,8) |
(1853) 0x50ca42 INC %RAX |
(1853) 0x50ca45 INC %RDX |
(1853) 0x50ca48 MOV (%RSI),%R15 |
(1853) 0x50ca4b CMP %RAX,%R15 |
(1853) 0x50ca4e JG 50ca30 |
0x50ca50 ADD $0x8,%R8 |
0x50ca54 ADD $0x8,%R9 |
0x50ca58 ADD $0x8,%RDI |
0x50ca5c ADD $0x8,%RSI |
0x50ca60 CMP %R10,%R8 |
0x50ca63 JNE 50c9d0 |
(1854) 0x50d110 INC %RAX |
(1854) 0x50d113 CMP %R15,%RAX |
(1854) 0x50d116 JL 50c9f8 |
0x50d11c JMP 50ca17 |
(1853) 0x50d128 INC %RAX |
(1853) 0x50d12b CMP %R15,%RAX |
(1853) 0x50d12e JL 50ca30 |
0x50d134 JMP 50ca50 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 492 - 513 |
-------------------------------------------------------------------------------- |
492: for (i = start; i < stop; i++) |
493: { |
494: S_diag_i[i] += jS_diag; |
495: S_offd_i[i] += jS_offd; |
496: |
497: jS = S_diag_i[i]; |
498: for (jA = A_diag_i[i]; jA < A_diag_i[i+1]; jA++) |
499: { |
500: if (S_temp_diag_j[jA] > -1) |
501: { |
502: S_diag_j[jS] = S_temp_diag_j[jA]; |
503: jS++; |
504: } |
505: } |
506: |
507: jS = S_offd_i[i]; |
508: for (jA = A_offd_i[i]; jA < A_offd_i[i+1]; jA++) |
509: { |
510: if (S_temp_offd_j[jA] > -1) |
511: { |
512: S_offd_j[jS] = S_temp_offd_j[jA]; |
513: jS++; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.44 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGCreateS._omp_fn.1 |
Source | par_strength.c:492-513 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.50 |
CQA cycles if no scalar integer | 6.50 |
CQA cycles if FP arith vectorized | 6.50 |
CQA cycles if fully vectorized | 0.81 |
Front-end cycles | 6.50 |
DIV/SQRT cycles | 3.50 |
P0 cycles | 3.50 |
P1 cycles | 4.50 |
P2 cycles | 4.50 |
P3 cycles | 2.00 |
P4 cycles | 3.50 |
P5 cycles | 3.50 |
P6 cycles | 2.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 6.65 |
Stall cycles (UFS) | 0.00 |
Nb insns | 25.00 |
Nb uops | 26.00 |
Nb loads | 9.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 13.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 72.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.44 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGCreateS._omp_fn.1 |
Source | par_strength.c:492-513 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.50 |
CQA cycles if no scalar integer | 6.50 |
CQA cycles if FP arith vectorized | 6.50 |
CQA cycles if fully vectorized | 0.81 |
Front-end cycles | 6.50 |
DIV/SQRT cycles | 3.50 |
P0 cycles | 3.50 |
P1 cycles | 4.50 |
P2 cycles | 4.50 |
P3 cycles | 2.00 |
P4 cycles | 3.50 |
P5 cycles | 3.50 |
P6 cycles | 2.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 6.65 |
Stall cycles (UFS) | 0.00 |
Nb insns | 25.00 |
Nb uops | 26.00 |
Nb loads | 9.00 |
Nb stores | 2.00 |
Nb stack references | 1.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 13.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 72.00 |
Bytes stored | 16.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGCreateS._omp_fn.1 |
Source file and lines | par_strength.c:492-513 |
Module | exec |
nb instructions | 25 |
nb uops | 26 |
loop length | 100 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 6.50 cycles |
front end | 6.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.50 | 3.50 | 4.50 | 4.50 | 2.00 | 3.50 | 3.50 | 2.00 |
cycles | 3.50 | 3.50 | 4.50 | 4.50 | 2.00 | 3.50 | 3.50 | 2.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.65 |
Stall cycles | 0.00 |
Front-end | 6.50 |
Dispatch | 4.50 |
Overall L1 | 6.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0xc8(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,(%R8) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
MOV (%R9),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R11,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RDX,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x8(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RDI),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R15,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 50ca1a | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV (%R9),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x8(%RSI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RSI),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RAX,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 50ca50 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD $0x8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R10,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 50c9d0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 50ca17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
JMP 50ca50 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | hypre_BoomerAMGCreateS._omp_fn.1 |
Source file and lines | par_strength.c:492-513 |
Module | exec |
nb instructions | 25 |
nb uops | 26 |
loop length | 100 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 6.50 cycles |
front end | 6.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.50 | 3.50 | 4.50 | 4.50 | 2.00 | 3.50 | 3.50 | 2.00 |
cycles | 3.50 | 3.50 | 4.50 | 4.50 | 2.00 | 3.50 | 3.50 | 2.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 6.65 |
Stall cycles | 0.00 |
Front-end | 6.50 |
Dispatch | 4.50 |
Overall L1 | 6.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0xc8(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %RCX,(%R8) | 2 | 0.25 | 0.25 | 0.83 | 0.83 | 1 | 0.25 | 0.25 | 0.33 | 5 | 1 |
MOV (%R9),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R11,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RDX,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x8(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RDI),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R15,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 50ca1a | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV (%R9),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x8(%RSI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RSI),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RAX,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 50ca50 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD $0x8,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD $0x8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD $0x8,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD $0x8,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R10,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 50c9d0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 50ca17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
JMP 50ca50 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |