Loop Id: 3103 | Module: exec | Source: csr_matvec.c:256-263 | Coverage: 8.7% |
---|
Loop Id: 3103 | Module: exec | Source: csr_matvec.c:256-263 | Coverage: 8.7% |
---|
0x5a0560 MOV %R11,%RSI |
0x5a0563 MOV %RDX,%R15 |
0x5a0566 SUB %RDX,%RSI |
0x5a0569 LEA -0x1(%RSI),%RAX |
0x5a056d CMP $0x6,%RAX |
0x5a0571 JBE 5a1adc |
0x5a0577 MOV %RSI,%R10 |
0x5a057a LEA (,%RDX,8),%RCX |
0x5a0582 VXORPD %XMM0,%XMM0,%XMM0 |
0x5a0586 XOR %EAX,%EAX |
0x5a0588 SHR $0x3,%R10 |
0x5a058c LEA (%R14,%RCX,1),%R9 |
0x5a0590 ADD %R13,%RCX |
0x5a0593 SAL $0x6,%R10 |
0x5a0597 LEA -0x40(%R10),%RDI |
0x5a059b SHR $0x6,%RDI |
0x5a059f INC %RDI |
0x5a05a2 AND $0x7,%EDI |
0x5a05a5 JE 5a06ae |
0x5a05ab CMP $0x1,%RDI |
0x5a05af JE 5a0688 |
0x5a05b5 CMP $0x2,%RDI |
0x5a05b9 JE 5a066b |
0x5a05bf CMP $0x3,%RDI |
0x5a05c3 JE 5a064e |
0x5a05c9 CMP $0x4,%RDI |
0x5a05cd JE 5a0631 |
0x5a05cf CMP $0x5,%RDI |
0x5a05d3 JE 5a0614 |
0x5a05d5 CMP $0x6,%RDI |
0x5a05d9 JE 5a05f7 |
0x5a05db VMOVDQU64 (%RCX),%ZMM15 |
0x5a05e1 KMOVB %K0,%K2 |
0x5a05e5 MOV $0x40,%EAX |
0x5a05ea VGATHERQPD (%RBX,%ZMM15,8),%ZMM3{%K2} |
0x5a05f1 VFMADD231PD (%R9),%ZMM3,%ZMM0 |
0x5a05f7 VMOVDQU64 (%RCX,%RAX,1),%ZMM6 |
0x5a05fe KMOVB %K0,%K1 |
0x5a0602 VGATHERQPD (%RBX,%ZMM6,8),%ZMM7{%K1} |
0x5a0609 VFMADD231PD (%R9,%RAX,1),%ZMM7,%ZMM0 |
0x5a0610 ADD $0x40,%RAX |
0x5a0614 VMOVDQU64 (%RCX,%RAX,1),%ZMM12 |
0x5a061b KMOVB %K0,%K5 |
0x5a061f VGATHERQPD (%RBX,%ZMM12,8),%ZMM11{%K5} |
0x5a0626 VFMADD231PD (%R9,%RAX,1),%ZMM11,%ZMM0 |
0x5a062d ADD $0x40,%RAX |
0x5a0631 VMOVDQU64 (%RCX,%RAX,1),%ZMM5 |
0x5a0638 KMOVB %K0,%K6 |
0x5a063c VGATHERQPD (%RBX,%ZMM5,8),%ZMM2{%K6} |
0x5a0643 VFMADD231PD (%R9,%RAX,1),%ZMM2,%ZMM0 |
0x5a064a ADD $0x40,%RAX |
0x5a064e VMOVDQU64 (%RCX,%RAX,1),%ZMM4 |
0x5a0655 KMOVB %K0,%K3 |
0x5a0659 VGATHERQPD (%RBX,%ZMM4,8),%ZMM13{%K3} |
0x5a0660 VFMADD231PD (%R9,%RAX,1),%ZMM13,%ZMM0 |
0x5a0667 ADD $0x40,%RAX |
0x5a066b VMOVDQU64 (%RCX,%RAX,1),%ZMM10 |
0x5a0672 KMOVB %K0,%K7 |
0x5a0676 VGATHERQPD (%RBX,%ZMM10,8),%ZMM1{%K7} |
0x5a067d VFMADD231PD (%R9,%RAX,1),%ZMM1,%ZMM0 |
0x5a0684 ADD $0x40,%RAX |
0x5a0688 VMOVDQU64 (%RCX,%RAX,1),%ZMM14 |
0x5a068f KMOVB %K0,%K4 |
0x5a0693 VGATHERQPD (%RBX,%ZMM14,8),%ZMM9{%K4} |
0x5a069a VFMADD231PD (%R9,%RAX,1),%ZMM9,%ZMM0 |
0x5a06a1 ADD $0x40,%RAX |
0x5a06a5 CMP %R10,%RAX |
0x5a06a8 JE 5a0793 |
(3104) 0x5a06ae VMOVDQU64 (%RCX,%RAX,1),%ZMM15 |
(3104) 0x5a06b5 KMOVB %K0,%K2 |
(3104) 0x5a06b9 VMOVDQU64 0x40(%RCX,%RAX,1),%ZMM6 |
(3104) 0x5a06c1 KMOVB %K0,%K1 |
(3104) 0x5a06c5 VMOVDQU64 0x80(%RCX,%RAX,1),%ZMM12 |
(3104) 0x5a06cd KMOVB %K0,%K5 |
(3104) 0x5a06d1 VMOVDQU64 0xc0(%RCX,%RAX,1),%ZMM5 |
(3104) 0x5a06d9 KMOVB %K0,%K6 |
(3104) 0x5a06dd VGATHERQPD (%RBX,%ZMM15,8),%ZMM3{%K2} |
(3104) 0x5a06e4 VGATHERQPD (%RBX,%ZMM6,8),%ZMM7{%K1} |
(3104) 0x5a06eb VMOVDQU64 0x100(%RCX,%RAX,1),%ZMM2 |
(3104) 0x5a06f3 KMOVB %K0,%K3 |
(3104) 0x5a06f7 VFMADD231PD (%R9,%RAX,1),%ZMM3,%ZMM0 |
(3104) 0x5a06fe VGATHERQPD (%RBX,%ZMM12,8),%ZMM11{%K5} |
(3104) 0x5a0705 VMOVDQU64 0x140(%RCX,%RAX,1),%ZMM13 |
(3104) 0x5a070d KMOVB %K0,%K7 |
(3104) 0x5a0711 VGATHERQPD (%RBX,%ZMM2,8),%ZMM4{%K3} |
(3104) 0x5a0718 VMOVDQU64 0x180(%RCX,%RAX,1),%ZMM14 |
(3104) 0x5a0720 KMOVB %K0,%K4 |
(3104) 0x5a0724 VMOVDQU64 0x1c0(%RCX,%RAX,1),%ZMM9 |
(3104) 0x5a072c VGATHERQPD (%RBX,%ZMM13,8),%ZMM10{%K7} |
(3104) 0x5a0733 KMOVB %K0,%K2 |
(3104) 0x5a0737 VGATHERQPD (%RBX,%ZMM14,8),%ZMM1{%K4} |
(3104) 0x5a073e VFMADD231PD 0x40(%R9,%RAX,1),%ZMM7,%ZMM0 |
(3104) 0x5a0746 VFMADD132PD 0x80(%R9,%RAX,1),%ZMM0,%ZMM11 |
(3104) 0x5a074e VGATHERQPD (%RBX,%ZMM5,8),%ZMM0{%K6} |
(3104) 0x5a0755 VFMADD132PD 0xc0(%R9,%RAX,1),%ZMM11,%ZMM0 |
(3104) 0x5a075d VFMADD132PD 0x100(%R9,%RAX,1),%ZMM0,%ZMM4 |
(3104) 0x5a0765 VGATHERQPD (%RBX,%ZMM9,8),%ZMM0{%K2} |
(3104) 0x5a076c VFMADD132PD 0x140(%R9,%RAX,1),%ZMM4,%ZMM10 |
(3104) 0x5a0774 VFMADD132PD 0x180(%R9,%RAX,1),%ZMM10,%ZMM1 |
(3104) 0x5a077c VFMADD132PD 0x1c0(%R9,%RAX,1),%ZMM1,%ZMM0 |
(3104) 0x5a0784 ADD $0x200,%RAX |
(3104) 0x5a078a CMP %R10,%RAX |
(3104) 0x5a078d JNE 5a06ae |
0x5a0793 VEXTRACTF64X4 $0x1,%ZMM0,%YMM15 |
0x5a079a MOV %RSI,%R9 |
0x5a079d VADDPD %YMM0,%YMM15,%YMM6 |
0x5a07a1 AND $-0x8,%R9 |
0x5a07a5 VADDPD %YMM0,%YMM15,%YMM9 |
0x5a07a9 ADD %R9,%RDX |
0x5a07ac VEXTRACTF64X2 $0x1,%YMM6,%XMM3 |
0x5a07b3 VADDPD %XMM6,%XMM3,%XMM7 |
0x5a07b7 VUNPCKHPD %XMM7,%XMM7,%XMM12 |
0x5a07bb VADDPD %XMM7,%XMM12,%XMM10 |
0x5a07bf TEST $0x7,%SIL |
0x5a07c3 JE 5a0860 |
0x5a07c9 SUB %R9,%RSI |
0x5a07cc LEA -0x1(%RSI),%RCX |
0x5a07d0 CMP $0x2,%RCX |
0x5a07d4 JBE 5a0813 |
0x5a07d6 ADD %R15,%R9 |
0x5a07d9 KMOVB %K0,%K1 |
0x5a07dd MOV %RSI,%R15 |
0x5a07e0 VMOVDQU (%R13,%R9,8),%YMM11 |
0x5a07e7 AND $-0x4,%R15 |
0x5a07eb ADD %R15,%RDX |
0x5a07ee AND $0x3,%ESI |
0x5a07f1 VGATHERQPD (%RBX,%YMM11,8),%YMM5{%K1} |
0x5a07f8 VFMADD132PD (%R14,%R9,8),%YMM9,%YMM5 |
0x5a07fe VEXTRACTF64X2 $0x1,%YMM5,%XMM2 |
0x5a0805 VADDPD %XMM5,%XMM2,%XMM4 |
0x5a0809 VUNPCKHPD %XMM4,%XMM4,%XMM13 |
0x5a080d VADDPD %XMM4,%XMM13,%XMM10 |
0x5a0811 JE 5a0860 |
0x5a0813 MOV (%R13,%RDX,8),%R9 |
0x5a0818 VMOVSD (%R14,%RDX,8),%XMM14 |
0x5a081e LEA 0x1(%RDX),%R10 |
0x5a0822 LEA (,%RDX,8),%RSI |
0x5a082a VFMADD231SD (%RBX,%R9,8),%XMM14,%XMM10 |
0x5a0830 CMP %R10,%R11 |
0x5a0833 JLE 5a0860 |
0x5a0835 MOV 0x8(%R13,%RSI,1),%RDI |
0x5a083a ADD $0x2,%RDX |
0x5a083e VMOVSD (%RBX,%RDI,8),%XMM1 |
0x5a0843 VFMADD231SD 0x8(%R14,%RSI,1),%XMM1,%XMM10 |
0x5a084a CMP %RDX,%R11 |
0x5a084d JLE 5a0860 |
0x5a084f MOV 0x10(%R13,%RSI,1),%RDX |
0x5a0854 VMOVSD (%RBX,%RDX,8),%XMM9 |
0x5a0859 VFMADD231SD 0x10(%R14,%RSI,1),%XMM9,%XMM10 |
0x5a0860 MOV 0x30(%RSP),%R11 |
0x5a0865 VMOVSD %XMM10,(%R11,%R12,8) |
0x5a086b INC %R12 |
0x5a086e CMP %R12,0x38(%RSP) |
0x5a0873 JE 5a0510 |
0x5a0879 MOV (%R8,%R12,8),%RDX |
0x5a087d MOV 0x8(%R8,%R12,8),%R11 |
0x5a0882 CMP %RDX,%R11 |
0x5a0885 JG 5a0560 |
0x5a1adc VMOVSD %XMM8,%XMM8,%XMM10 |
0x5a1ae1 VXORPD %XMM9,%XMM9,%XMM9 |
0x5a1ae6 XOR %R9D,%R9D |
0x5a1ae9 JMP 5a07c9 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 256 - 263 |
-------------------------------------------------------------------------------- |
256: for (i = iBegin; i < iEnd; i++) |
257: { |
258: tempx = 0.0; |
259: for (jj = A_i[i]; jj < A_i[i+1]; jj++) |
260: { |
261: tempx += A_data[jj] * x_data[A_j[jj]]; |
262: } |
263: y_data[i] = tempx; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.03 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.11 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | P2, P3, |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source | csr_matvec.c:256-263 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 44.50 |
CQA cycles if no scalar integer | 43.00 |
CQA cycles if FP arith vectorized | 44.50 |
CQA cycles if fully vectorized | 39.94 |
Front-end cycles | 40.25 |
DIV/SQRT cycles | 27.00 |
P0 cycles | 27.00 |
P1 cycles | 44.50 |
P2 cycles | 44.50 |
P3 cycles | 1.00 |
P4 cycles | 27.00 |
P5 cycles | 27.00 |
P6 cycles | 1.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 80.54 |
Stall cycles (UFS) | 43.74 |
Nb insns | 127.00 |
Nb uops | 151.00 |
Nb loads | 37.00 |
Nb stores | 1.00 |
Nb stack references | 2.00 |
FLOP/cycle | 3.19 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 63.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.88 |
Bytes prefetched | 0.00 |
Bytes loaded | 1544.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 58.33 |
Vectorization ratio load | 77.42 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 72.73 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 41.94 |
Vector-efficiency ratio all | 48.54 |
Vector-efficiency ratio load | 75.40 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 33.33 |
Vector-efficiency ratio fma | 71.59 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 36.29 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.03 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.11 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | P2, P3, |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source | csr_matvec.c:256-263 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 44.50 |
CQA cycles if no scalar integer | 43.00 |
CQA cycles if FP arith vectorized | 44.50 |
CQA cycles if fully vectorized | 39.94 |
Front-end cycles | 40.25 |
DIV/SQRT cycles | 27.00 |
P0 cycles | 27.00 |
P1 cycles | 44.50 |
P2 cycles | 44.50 |
P3 cycles | 1.00 |
P4 cycles | 27.00 |
P5 cycles | 27.00 |
P6 cycles | 1.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 80.54 |
Stall cycles (UFS) | 43.74 |
Nb insns | 127.00 |
Nb uops | 151.00 |
Nb loads | 37.00 |
Nb stores | 1.00 |
Nb stack references | 2.00 |
FLOP/cycle | 3.19 |
Nb FLOP add-sub | 16.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 63.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.88 |
Bytes prefetched | 0.00 |
Bytes loaded | 1544.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 58.33 |
Vectorization ratio load | 77.42 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | 72.73 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 41.94 |
Vector-efficiency ratio all | 48.54 |
Vector-efficiency ratio load | 75.40 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 33.33 |
Vector-efficiency ratio fma | 71.59 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 36.29 |
Path / |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source file and lines | csr_matvec.c:256-263 |
Module | exec |
nb instructions | 127 |
nb uops | 151 |
loop length | 600 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 14 |
used ymm registers | 6 |
used zmm registers | 15 |
nb stack references | 2 |
micro-operation queue | 40.25 cycles |
front end | 40.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 27.00 | 27.00 | 44.50 | 44.50 | 1.00 | 27.00 | 27.00 | 1.00 |
cycles | 27.00 | 27.00 | 44.50 | 44.50 | 1.00 | 27.00 | 27.00 | 1.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 80.54 |
Stall cycles | 43.74 |
ROB full (events) | 53.98 |
Front-end | 40.25 |
Dispatch | 44.50 |
Overall L1 | 44.50 |
all | 34% |
load | 88% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 72% |
load | 72% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 72% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 81% |
all | 58% |
load | 77% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 72% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 41% |
all | 40% |
load | 84% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 53% |
load | 71% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | 71% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 58% |
all | 48% |
load | 75% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | 71% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 36% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x1(%RSI),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x6,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JBE 5a1adc | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (,%RDX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SHR $0x3,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
LEA (%R14,%RCX,1),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SAL $0x6,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
LEA -0x40(%R10),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
SHR $0x6,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
INC %RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x7,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a06ae | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x1,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0688 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x2,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a066b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x3,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a064e | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0631 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x5,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0614 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x6,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a05f7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVDQU64 (%RCX),%ZMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV $0x40,%EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VGATHERQPD (%RBX,%ZMM15,8),%ZMM3{%K2} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9),%ZMM3,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM6,8),%ZMM7{%K1} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM7,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM12,8),%ZMM11{%K5} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM11,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM5,8),%ZMM2{%K6} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM2,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM4,8),%ZMM13{%K3} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM13,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM10,8),%ZMM1{%K7} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM1,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM14,8),%ZMM9{%K4} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM9,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0793 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VEXTRACTF64X4 $0x1,%ZMM0,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VADDPD %YMM0,%YMM15,%YMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VADDPD %YMM0,%YMM15,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VEXTRACTF64X2 $0x1,%YMM6,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM6,%XMM3,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM7,%XMM7,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD %XMM7,%XMM12,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST $0x7,%SIL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0860 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
SUB %R9,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JBE 5a0813 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
ADD %R15,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
KMOVB %K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVDQU (%R13,%R9,8),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
AND $-0x4,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R15,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x3,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VGATHERQPD (%RBX,%YMM11,8),%YMM5{%K1} | 4 | 1 | 0 | 2 | 2 | 0 | 1 | 0 | 0 | 20 | 4 |
VFMADD132PD (%R14,%R9,8),%YMM9,%YMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VEXTRACTF64X2 $0x1,%YMM5,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM5,%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM4,%XMM4,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD %XMM4,%XMM13,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JE 5a0860 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R13,%RDX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R14,%RDX,8),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x1(%RDX),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDX,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD231SD (%RBX,%R9,8),%XMM14,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R10,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a0860 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x8(%R13,%RSI,1),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD $0x2,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RBX,%RDI,8),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD 0x8(%R14,%RSI,1),%XMM1,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RDX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a0860 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x10(%R13,%RSI,1),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RBX,%RDX,8),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD 0x10(%R14,%RSI,1),%XMM9,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x30(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD %XMM10,(%R11,%R12,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
INC %R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R12,0x38(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 5a0510 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R8,%R12,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%R8,%R12,8),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RDX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JG 5a0560 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVSD %XMM8,%XMM8,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VXORPD %XMM9,%XMM9,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 5a07c9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source file and lines | csr_matvec.c:256-263 |
Module | exec |
nb instructions | 127 |
nb uops | 151 |
loop length | 600 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 14 |
used ymm registers | 6 |
used zmm registers | 15 |
nb stack references | 2 |
micro-operation queue | 40.25 cycles |
front end | 40.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 27.00 | 27.00 | 44.50 | 44.50 | 1.00 | 27.00 | 27.00 | 1.00 |
cycles | 27.00 | 27.00 | 44.50 | 44.50 | 1.00 | 27.00 | 27.00 | 1.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 80.54 |
Stall cycles | 43.74 |
ROB full (events) | 53.98 |
Front-end | 40.25 |
Dispatch | 44.50 |
Overall L1 | 44.50 |
all | 34% |
load | 88% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 72% |
load | 72% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 72% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 81% |
all | 58% |
load | 77% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | 72% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 41% |
all | 40% |
load | 84% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 53% |
load | 71% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | 71% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 58% |
all | 48% |
load | 75% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | 71% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 36% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x1(%RSI),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x6,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JBE 5a1adc | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (,%RDX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SHR $0x3,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
LEA (%R14,%RCX,1),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SAL $0x6,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
LEA -0x40(%R10),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
SHR $0x6,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
INC %RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x7,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a06ae | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x1,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0688 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x2,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a066b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x3,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a064e | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0631 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x5,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0614 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x6,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a05f7 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVDQU64 (%RCX),%ZMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV $0x40,%EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VGATHERQPD (%RBX,%ZMM15,8),%ZMM3{%K2} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9),%ZMM3,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM6,8),%ZMM7{%K1} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM7,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM12,8),%ZMM11{%K5} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM11,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM5,8),%ZMM2{%K6} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM2,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM4,8),%ZMM13{%K3} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM13,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM10,8),%ZMM1{%K7} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM1,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM14,8),%ZMM9{%K4} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM9,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0793 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VEXTRACTF64X4 $0x1,%ZMM0,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VADDPD %YMM0,%YMM15,%YMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VADDPD %YMM0,%YMM15,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VEXTRACTF64X2 $0x1,%YMM6,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM6,%XMM3,%XMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM7,%XMM7,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD %XMM7,%XMM12,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST $0x7,%SIL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a0860 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
SUB %R9,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JBE 5a0813 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
ADD %R15,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
KMOVB %K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVDQU (%R13,%R9,8),%YMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
AND $-0x4,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R15,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x3,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VGATHERQPD (%RBX,%YMM11,8),%YMM5{%K1} | 4 | 1 | 0 | 2 | 2 | 0 | 1 | 0 | 0 | 20 | 4 |
VFMADD132PD (%R14,%R9,8),%YMM9,%YMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VEXTRACTF64X2 $0x1,%YMM5,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM5,%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM4,%XMM4,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD %XMM4,%XMM13,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JE 5a0860 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R13,%RDX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R14,%RDX,8),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x1(%RDX),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDX,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VFMADD231SD (%RBX,%R9,8),%XMM14,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R10,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a0860 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x8(%R13,%RSI,1),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD $0x2,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RBX,%RDI,8),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD 0x8(%R14,%RSI,1),%XMM1,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %RDX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a0860 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x10(%R13,%RSI,1),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RBX,%RDX,8),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD 0x10(%R14,%RSI,1),%XMM9,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x30(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD %XMM10,(%R11,%R12,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
INC %R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R12,0x38(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 5a0510 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R8,%R12,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%R8,%R12,8),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RDX,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JG 5a0560 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVSD %XMM8,%XMM8,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VXORPD %XMM9,%XMM9,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 5a07c9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |