Loop Id: 256 | Module: exec | Source: par_coarsen.c:2354-2381 | Coverage: 0.2% |
---|
Loop Id: 256 | Module: exec | Source: par_coarsen.c:2354-2381 | Coverage: 0.2% |
---|
0x426440 LEA 0x1(%R10),%RAX |
0x426444 CMP %R8,%R10 |
0x426447 MOV %RAX,%R10 |
0x42644a JE 42641b |
0x42644c MOV (%R11,%R10,8),%RDX |
0x426450 VMOVSD (%R13,%RDX,8),%XMM1 |
0x426457 VUCOMISD %XMM1,%XMM0 |
0x42645b JAE 426440 |
0x42645d MOV (%RBX,%RDX,8),%RSI |
0x426461 CMP 0x8(%RBX,%RDX,8),%RSI |
0x426466 MOV -0x38(%RBP),%RAX |
0x42646a JL 4264a2 |
0x42646c MOV (%R12,%RDX,8),%RSI |
0x426470 CMP 0x8(%R12,%RDX,8),%RSI |
0x426475 JGE 426440 |
0x426477 MOV -0x38(%RBP),%RAX |
0x42647b LEA (%RAX,%RDX,8),%R9 |
0x42647f JMP 4264ed |
(258) 0x426490 MOVQ $0,(%RAX,%RDI,8) |
(258) 0x426498 INC %RSI |
(258) 0x42649b CMP 0x8(%RBX,%RDX,8),%RSI |
(258) 0x4264a0 JGE 42646c |
(258) 0x4264a2 MOV (%R15,%RSI,8),%RDI |
(258) 0x4264a6 VMOVSD (%R13,%RDI,8),%XMM2 |
(258) 0x4264ad VUCOMISD %XMM2,%XMM0 |
(258) 0x4264b1 JAE 426498 |
(258) 0x4264b3 VUCOMISD %XMM2,%XMM1 |
(258) 0x4264b7 JA 426490 |
(258) 0x4264b9 VUCOMISD %XMM1,%XMM2 |
(258) 0x4264bd MOV %RDX,%RDI |
(258) 0x4264c0 JA 426490 |
(258) 0x4264c2 JMP 426498 |
(257) 0x4264d0 MOV -0x58(%RBP),%RDI |
(257) 0x4264d4 LEA (%RDI,%RAX,8),%RAX |
(257) 0x4264d8 MOVQ $0,(%RAX) |
(257) 0x4264df INC %RSI |
(257) 0x4264e2 CMP 0x8(%R12,%RDX,8),%RSI |
(257) 0x4264e7 JGE 426440 |
(257) 0x4264ed MOV (%RCX,%RSI,8),%RAX |
(257) 0x4264f1 LEA (%RAX,%R14,1),%RDI |
(257) 0x4264f5 VMOVSD (%R13,%RDI,8),%XMM2 |
(257) 0x4264fc VUCOMISD %XMM2,%XMM0 |
(257) 0x426500 JAE 4264df |
(257) 0x426502 VUCOMISD %XMM2,%XMM1 |
(257) 0x426506 JA 4264d0 |
(257) 0x426508 VUCOMISD %XMM1,%XMM2 |
(257) 0x42650c MOV %R9,%RAX |
(257) 0x42650f JA 4264d8 |
(257) 0x426511 JMP 4264df |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_ls/par_coarsen.c: 2354 - 2381 |
-------------------------------------------------------------------------------- |
2354: #pragma omp parallel for private(ig, i, jS, j, jj) HYPRE_SMP_SCHEDULE |
2355: #endif |
2356: for (ig = 0; ig < graph_size; ig++) |
2357: { |
2358: i = graph_array[ig]; |
2359: if (measure_array[i] > 1) |
2360: { |
2361: for (jS = S_diag_i[i]; jS < S_diag_i[i+1]; jS++) |
2362: { |
2363: j = S_diag_j[jS]; |
2364: if (measure_array[j] > 1) |
2365: { |
2366: if (measure_array[i] > measure_array[j]) |
2367: CF_marker[j] = 0; |
2368: else if (measure_array[j] > measure_array[i]) |
2369: CF_marker[i] = 0; |
2370: } |
2371: } /* for each local neighbor j of i */ |
2372: for (jS = S_offd_i[i]; jS < S_offd_i[i+1]; jS++) |
2373: { |
2374: jj = S_offd_j[jS]; |
2375: j = num_variables+jj; |
2376: if (measure_array[j] > 1) |
2377: { |
2378: if (measure_array[i] > measure_array[j]) |
2379: CF_marker_offd[jj] = 0; |
2380: else if (measure_array[j] > measure_array[i]) |
2381: CF_marker[i] = 0; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►86.67+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | hypre_BoomerAMGCoarsenPMIS | par_coarsen.c:2354 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:601 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_init_first | libc.so.6 | |
►13.33+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | hypre_BoomerAMGCoarsenPMIS | par_coarsen.c:2354 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:626 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.25 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGCoarsenPMIS.extracted.15 |
Source | par_coarsen.c:2354-2381 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.00 |
CQA cycles if no scalar integer | 2.50 |
CQA cycles if FP arith vectorized | 5.00 |
CQA cycles if fully vectorized | 0.63 |
Front-end cycles | 5.00 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 2.50 |
P1 cycles | 4.00 |
P2 cycles | 4.00 |
P3 cycles | 0.00 |
P4 cycles | 2.50 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.19 |
Stall cycles (UFS) | 0.00 |
Nb insns | 18.00 |
Nb uops | 18.00 |
Nb loads | 8.00 |
Nb stores | 0.00 |
Nb stack references | 1.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.80 |
Bytes prefetched | 0.00 |
Bytes loaded | 64.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.25 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGCoarsenPMIS.extracted.15 |
Source | par_coarsen.c:2354-2381 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.00 |
CQA cycles if no scalar integer | 2.50 |
CQA cycles if FP arith vectorized | 5.00 |
CQA cycles if fully vectorized | 0.63 |
Front-end cycles | 5.00 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 2.50 |
P1 cycles | 4.00 |
P2 cycles | 4.00 |
P3 cycles | 0.00 |
P4 cycles | 2.50 |
P5 cycles | 3.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.19 |
Stall cycles (UFS) | 0.00 |
Nb insns | 18.00 |
Nb uops | 18.00 |
Nb loads | 8.00 |
Nb stores | 0.00 |
Nb stack references | 1.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.80 |
Bytes prefetched | 0.00 |
Bytes loaded | 64.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGCoarsenPMIS.extracted.15 |
Source file and lines | par_coarsen.c:2354-2381 |
Module | exec |
nb instructions | 18 |
nb uops | 18 |
loop length | 65 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 5.00 cycles |
front end | 5.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.00 | 2.50 | 4.00 | 4.00 | 0.00 | 2.50 | 3.00 | 0.00 |
cycles | 3.00 | 2.50 | 4.00 | 4.00 | 0.00 | 2.50 | 3.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.19 |
Stall cycles | 0.00 |
Front-end | 5.00 |
Dispatch | 4.00 |
Overall L1 | 5.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%R10),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R8,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JE 42641b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R11,%R10,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R13,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VUCOMISD %XMM1,%XMM0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 426440 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%RBX,%RDX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP 0x8(%RBX,%RDX,8),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JL 4264a2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R12,%RDX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP 0x8(%R12,%RDX,8),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 426440 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RAX,%RDX,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4264ed | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | hypre_BoomerAMGCoarsenPMIS.extracted.15 |
Source file and lines | par_coarsen.c:2354-2381 |
Module | exec |
nb instructions | 18 |
nb uops | 18 |
loop length | 65 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
micro-operation queue | 5.00 cycles |
front end | 5.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 3.00 | 2.50 | 4.00 | 4.00 | 0.00 | 2.50 | 3.00 | 0.00 |
cycles | 3.00 | 2.50 | 4.00 | 4.00 | 0.00 | 2.50 | 3.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.19 |
Stall cycles | 0.00 |
Front-end | 5.00 |
Dispatch | 4.00 |
Overall L1 | 5.00 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
LEA 0x1(%R10),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R8,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JE 42641b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R11,%R10,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%R13,%RDX,8),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VUCOMISD %XMM1,%XMM0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 426440 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%RBX,%RDX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP 0x8(%RBX,%RDX,8),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JL 4264a2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R12,%RDX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP 0x8(%R12,%RDX,8),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 426440 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RAX,%RDX,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4264ed | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |