Loop Id: 3311 | Module: exec | Source: par_csr_matop.c:127-242 [...] | Coverage: 0.2% |
---|
Loop Id: 3311 | Module: exec | Source: par_csr_matop.c:127-242 [...] | Coverage: 0.2% |
---|
0x4b6260 MOV -0x80(%RBP),%RCX |
0x4b6264 MOV -0x58(%RBP),%RDX |
0x4b6268 MOV %R13,(%RCX,%RDX,8) |
0x4b626c MOV -0x78(%RBP),%RCX |
0x4b6270 MOV %R11,(%RCX,%RDX,8) |
0x4b6274 MOV %RSI,%RDX |
0x4b6277 MOV %R14,%R11 |
0x4b627a MOV %RAX,%R13 |
0x4b627d CMP -0x38(%RBP),%RSI |
0x4b6281 MOV 0x58(%RBP),%RBX |
0x4b6285 JGE 4b6459 |
0x4b628b CMPQ $0,0x78(%RBP) |
0x4b6290 JE 4b629a |
0x4b6292 MOV %R13,(%R15,%RDX,8) |
0x4b6296 LEA 0x1(%R13),%RAX |
0x4b629a CMPQ $0,0x70(%RBP) |
0x4b629f MOV %RDX,-0x58(%RBP) |
0x4b62a3 JE 4b6370 |
0x4b62a9 MOV 0x10(%RBP),%RCX |
0x4b62ad MOV (%RCX,%RDX,8),%R8 |
0x4b62b1 LEA 0x1(%RDX),%RSI |
0x4b62b5 CMP 0x8(%RCX,%RDX,8),%R8 |
0x4b62ba JGE 4b6374 |
0x4b62c0 MOV %RSI,-0x50(%RBP) |
0x4b62c4 MOV %R11,%R14 |
0x4b62c7 JMP 4b62e6 |
(3315) 0x4b62d0 INC %R8 |
(3315) 0x4b62d3 MOV 0x10(%RBP),%RCX |
(3315) 0x4b62d7 MOV -0x58(%RBP),%RDX |
(3315) 0x4b62db CMP 0x8(%RCX,%RDX,8),%R8 |
(3315) 0x4b62e0 JGE 4b6390 |
(3315) 0x4b62e6 MOV 0x18(%RBP),%RCX |
(3315) 0x4b62ea MOV (%RCX,%R8,8),%RDI |
(3315) 0x4b62ee MOV 0x50(%RBP),%RCX |
(3315) 0x4b62f2 MOV (%RCX,%RDI,8),%RDX |
(3315) 0x4b62f6 MOV 0x8(%RCX,%RDI,8),%RCX |
(3315) 0x4b62fb JMP 4b6303 |
(3317) 0x4b6300 INC %RDX |
(3317) 0x4b6303 CMP %RCX,%RDX |
(3317) 0x4b6306 JGE 4b6330 |
(3317) 0x4b6308 MOV (%RBX,%RDX,8),%RSI |
(3317) 0x4b630c ADD %R12,%RSI |
(3317) 0x4b630f CMP %R11,(%R15,%RSI,8) |
(3317) 0x4b6313 JGE 4b6300 |
(3317) 0x4b6315 MOV %R14,(%R15,%RSI,8) |
(3317) 0x4b6319 INC %R14 |
(3317) 0x4b631c MOV 0x50(%RBP),%RCX |
(3317) 0x4b6320 MOV 0x8(%RCX,%RDI,8),%RCX |
(3317) 0x4b6325 JMP 4b6300 |
(3315) 0x4b6330 MOV 0x40(%RBP),%RCX |
(3315) 0x4b6334 MOV (%RCX,%RDI,8),%RDX |
(3315) 0x4b6338 MOV 0x8(%RCX,%RDI,8),%RCX |
(3315) 0x4b633d JMP 4b6343 |
(3316) 0x4b6340 INC %RDX |
(3316) 0x4b6343 CMP %RCX,%RDX |
(3316) 0x4b6346 JGE 4b62d0 |
(3316) 0x4b6348 MOV 0x48(%RBP),%RSI |
(3316) 0x4b634c MOV (%RSI,%RDX,8),%RSI |
(3316) 0x4b6350 CMP %R13,(%R15,%RSI,8) |
(3316) 0x4b6354 JGE 4b6340 |
(3316) 0x4b6356 MOV %RAX,(%R15,%RSI,8) |
(3316) 0x4b635a INC %RAX |
(3316) 0x4b635d MOV 0x40(%RBP),%RCX |
(3316) 0x4b6361 MOV 0x8(%RCX,%RDI,8),%RCX |
(3316) 0x4b6366 JMP 4b6340 |
0x4b6370 LEA 0x1(%RDX),%RSI |
0x4b6374 MOV %R11,%R14 |
0x4b6377 MOV -0x60(%RBP),%RCX |
0x4b637b MOV (%RCX,%RDX,8),%RBX |
0x4b637f CMP (%RCX,%RSI,8),%RBX |
0x4b6383 JGE 4b6260 |
0x4b6389 JMP 4b63a6 |
0x4b6390 MOV -0x50(%RBP),%RSI |
0x4b6394 MOV -0x60(%RBP),%RCX |
0x4b6398 MOV (%RCX,%RDX,8),%RBX |
0x4b639c CMP (%RCX,%RSI,8),%RBX |
0x4b63a0 JGE 4b6260 |
0x4b63a6 MOV %RSI,-0x50(%RBP) |
0x4b63aa JMP 4b63c5 |
(3312) 0x4b63b0 INC %RBX |
(3312) 0x4b63b3 MOV -0x60(%RBP),%RCX |
(3312) 0x4b63b7 MOV -0x50(%RBP),%RSI |
(3312) 0x4b63bb CMP (%RCX,%RSI,8),%RBX |
(3312) 0x4b63bf JGE 4b6260 |
(3312) 0x4b63c5 MOV -0x88(%RBP),%RCX |
(3312) 0x4b63cc MOV (%RCX,%RBX,8),%R8 |
(3312) 0x4b63d0 MOV (%R10,%R8,8),%RDX |
(3312) 0x4b63d4 MOV 0x8(%R10,%R8,8),%RCX |
(3312) 0x4b63d9 JMP 4b63e3 |
(3314) 0x4b63e0 INC %RDX |
(3314) 0x4b63e3 CMP %RCX,%RDX |
(3314) 0x4b63e6 JGE 4b6400 |
(3314) 0x4b63e8 MOV (%R9,%RDX,8),%RSI |
(3314) 0x4b63ec CMP %R13,(%R15,%RSI,8) |
(3314) 0x4b63f0 JGE 4b63e0 |
(3314) 0x4b63f2 MOV %RAX,(%R15,%RSI,8) |
(3314) 0x4b63f6 INC %RAX |
(3314) 0x4b63f9 MOV 0x8(%R10,%R8,8),%RCX |
(3314) 0x4b63fe JMP 4b63e0 |
(3312) 0x4b6400 CMPQ $0,0x88(%RBP) |
(3312) 0x4b6408 JE 4b63b0 |
(3312) 0x4b640a MOV 0x30(%RBP),%RCX |
(3312) 0x4b640e MOV (%RCX,%R8,8),%RDI |
(3312) 0x4b6412 MOV 0x8(%RCX,%R8,8),%RDX |
(3312) 0x4b6417 JMP 4b6423 |
(3313) 0x4b6420 INC %RDI |
(3313) 0x4b6423 CMP %RDX,%RDI |
(3313) 0x4b6426 JGE 4b63b0 |
(3313) 0x4b6428 MOV 0x38(%RBP),%RCX |
(3313) 0x4b642c MOV (%RCX,%RDI,8),%RCX |
(3313) 0x4b6430 MOV 0x60(%RBP),%RSI |
(3313) 0x4b6434 MOV (%RSI,%RCX,8),%RCX |
(3313) 0x4b6438 ADD %R12,%RCX |
(3313) 0x4b643b CMP %R11,(%R15,%RCX,8) |
(3313) 0x4b643f JGE 4b6420 |
(3313) 0x4b6441 MOV %R14,(%R15,%RCX,8) |
(3313) 0x4b6445 INC %R14 |
(3313) 0x4b6448 MOV 0x30(%RBP),%RCX |
(3313) 0x4b644c MOV 0x8(%RCX,%R8,8),%RDX |
(3313) 0x4b6451 JMP 4b6420 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 127 - 242 |
-------------------------------------------------------------------------------- |
127: for (i1 = ns; i1 < ne; i1++) |
[...] |
135: if ( allsquare ) { |
136: B_marker[i1] = jj_count_diag; |
137: jj_count_diag++; |
[...] |
144: if (num_cols_offd_A) |
145: { |
146: for (jj2 = A_offd_i[i1]; jj2 < A_offd_i[i1+1]; jj2++) |
147: { |
148: i2 = A_offd_j[jj2]; |
[...] |
154: for (jj3 = B_ext_offd_i[i2]; jj3 < B_ext_offd_i[i2+1]; jj3++) |
155: { |
156: i3 = num_cols_diag_B+B_ext_offd_j[jj3]; |
[...] |
164: if (B_marker[i3] < jj_row_begin_offd) |
165: { |
166: B_marker[i3] = jj_count_offd; |
167: jj_count_offd++; |
168: } |
169: } |
170: for (jj3 = B_ext_diag_i[i2]; jj3 < B_ext_diag_i[i2+1]; jj3++) |
171: { |
172: i3 = B_ext_diag_j[jj3]; |
173: |
174: if (B_marker[i3] < jj_row_begin_diag) |
175: { |
176: B_marker[i3] = jj_count_diag; |
177: jj_count_diag++; |
[...] |
187: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
188: { |
189: i2 = A_diag_j[jj2]; |
[...] |
195: for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++) |
196: { |
197: i3 = B_diag_j[jj3]; |
[...] |
205: if (B_marker[i3] < jj_row_begin_diag) |
206: { |
207: B_marker[i3] = jj_count_diag; |
208: jj_count_diag++; |
[...] |
216: if (num_cols_offd_B) |
217: { |
218: for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++) |
219: { |
220: i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]]; |
[...] |
228: if (B_marker[i3] < jj_row_begin_offd) |
229: { |
230: B_marker[i3] = jj_count_offd; |
231: jj_count_offd++; |
[...] |
241: (*C_diag_i)[i1] = jj_row_begin_diag; |
242: (*C_offd_i)[i1] = jj_row_begin_offd; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | hypre_ParMatmul | par_csr_matop.c:102 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:1226 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.26 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes.extracted |
Source | par_csr_matop.c:127-242 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 10.75 |
CQA cycles if no scalar integer | 10.75 |
CQA cycles if FP arith vectorized | 10.75 |
CQA cycles if fully vectorized | 1.34 |
Front-end cycles | 10.75 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 4.50 |
P1 cycles | 8.50 |
P2 cycles | 8.50 |
P3 cycles | 6.00 |
P4 cycles | 4.50 |
P5 cycles | 4.50 |
P6 cycles | 6.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 10.90 |
Stall cycles (UFS) | 0.00 |
Nb insns | 40.00 |
Nb uops | 40.00 |
Nb loads | 17.00 |
Nb stores | 6.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.12 |
Bytes prefetched | 0.00 |
Bytes loaded | 136.00 |
Bytes stored | 48.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.26 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes.extracted |
Source | par_csr_matop.c:127-242 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 10.75 |
CQA cycles if no scalar integer | 10.75 |
CQA cycles if FP arith vectorized | 10.75 |
CQA cycles if fully vectorized | 1.34 |
Front-end cycles | 10.75 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 4.50 |
P1 cycles | 8.50 |
P2 cycles | 8.50 |
P3 cycles | 6.00 |
P4 cycles | 4.50 |
P5 cycles | 4.50 |
P6 cycles | 6.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 10.90 |
Stall cycles (UFS) | 0.00 |
Nb insns | 40.00 |
Nb uops | 40.00 |
Nb loads | 17.00 |
Nb stores | 6.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.12 |
Bytes prefetched | 0.00 |
Bytes loaded | 136.00 |
Bytes stored | 48.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_ParMatmul_RowSizes.extracted |
Source file and lines | par_csr_matop.c:127-242 |
Module | exec |
nb instructions | 40 |
nb uops | 40 |
loop length | 160 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 10.75 cycles |
front end | 10.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.50 | 8.50 | 8.50 | 6.00 | 4.50 | 4.50 | 6.00 |
cycles | 4.50 | 4.50 | 8.50 | 8.50 | 6.00 | 4.50 | 4.50 | 6.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 10.90 |
Stall cycles | 0.00 |
Front-end | 10.75 |
Dispatch | 8.50 |
Overall L1 | 10.75 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R13,(%RCX,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R11,(%RCX,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R14,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP -0x38(%RBP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JGE 4b6459 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMPQ $0,0x78(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 4b629a | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R13,(%R15,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x1(%R13),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,0x70(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV %RDX,-0x58(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JE 4b6370 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x10(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RDX,8),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x1(%RDX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%RCX,%RDX,8),%R8 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 4b6374 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,-0x50(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4b62e6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
LEA 0x1(%RDX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RDX,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP (%RCX,%RSI,8),%RBX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 4b6260 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 4b63a6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x50(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RDX,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP (%RCX,%RSI,8),%RBX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 4b6260 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,-0x50(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 4b63c5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | hypre_ParMatmul_RowSizes.extracted |
Source file and lines | par_csr_matop.c:127-242 |
Module | exec |
nb instructions | 40 |
nb uops | 40 |
loop length | 160 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 10.75 cycles |
front end | 10.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.50 | 8.50 | 8.50 | 6.00 | 4.50 | 4.50 | 6.00 |
cycles | 4.50 | 4.50 | 8.50 | 8.50 | 6.00 | 4.50 | 4.50 | 6.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 10.90 |
Stall cycles | 0.00 |
Front-end | 10.75 |
Dispatch | 8.50 |
Overall L1 | 10.75 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R13,(%RCX,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R11,(%RCX,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R14,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CMP -0x38(%RBP),%RSI | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JGE 4b6459 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMPQ $0,0x78(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JE 4b629a | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R13,(%R15,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA 0x1(%R13),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0,0x70(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
MOV %RDX,-0x58(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JE 4b6370 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x10(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RDX,8),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x1(%RDX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%RCX,%RDX,8),%R8 | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 4b6374 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,-0x50(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 4b62e6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
LEA 0x1(%RDX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RDX,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP (%RCX,%RSI,8),%RBX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 4b6260 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 4b63a6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x50(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RDX,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP (%RCX,%RSI,8),%RBX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 4b6260 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,-0x50(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 4b63c5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |