Loop Id: 3150 | Module: exec | Source: csr_matvec.c:608-625 | Coverage: 2.41% |
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Loop Id: 3150 | Module: exec | Source: csr_matvec.c:608-625 | Coverage: 2.41% |
---|
0x5a61a0 CMP $0x1,%R14 |
0x5a61a4 JE 5a67ff |
0x5a61aa TEST %R14,%R14 |
0x5a61ad JLE 5a6459 |
0x5a61b3 MOV -0x98(%RBP),%RSI |
0x5a61ba MOV (%RSI,%RAX,8),%R10 |
0x5a61be MOV 0x8(%RSI,%RAX,8),%R8 |
0x5a61c3 CMP %R10,%R8 |
0x5a61c6 JLE 5a643f |
0x5a61cc MOV %RDX,-0xa8(%RBP) |
0x5a61d3 LEA (%RDX,%RDI,8),%RSI |
0x5a61d7 XOR %ECX,%ECX |
0x5a61d9 XOR %R9D,%R9D |
0x5a61dc MOV %RAX,-0xb0(%RBP) |
0x5a61e3 NOPL (%RAX,%RAX,1) |
(3153) 0x5a61e8 MOV %R8,%RDX |
(3153) 0x5a61eb MOV %R10,%RAX |
(3153) 0x5a61ee SUB %R10,%RDX |
(3153) 0x5a61f1 AND $0x7,%EDX |
(3153) 0x5a61f4 JE 5a631b |
(3153) 0x5a61fa CMP $0x1,%RDX |
(3153) 0x5a61fe JE 5a62f1 |
(3153) 0x5a6204 CMP $0x2,%RDX |
(3153) 0x5a6208 JE 5a62d0 |
(3153) 0x5a620e CMP $0x3,%RDX |
(3153) 0x5a6212 JE 5a62af |
(3153) 0x5a6218 CMP $0x4,%RDX |
(3153) 0x5a621c JE 5a628e |
(3153) 0x5a621e CMP $0x5,%RDX |
(3153) 0x5a6222 JE 5a626d |
(3153) 0x5a6224 CMP $0x6,%RDX |
(3153) 0x5a6228 JE 5a624c |
(3153) 0x5a622a MOV (%R13,%R10,8),%RAX |
(3153) 0x5a622f VMOVSD (%RSI),%XMM0 |
(3153) 0x5a6233 ADD %RCX,%RAX |
(3153) 0x5a6236 LEA (%RBX,%RAX,8),%RDX |
(3153) 0x5a623a LEA 0x1(%R10),%RAX |
(3153) 0x5a623e VMOVSD (%RDX),%XMM2 |
(3153) 0x5a6242 VFMADD132SD (%R12,%R10,8),%XMM2,%XMM0 |
(3153) 0x5a6248 VMOVSD %XMM0,(%RDX) |
(3153) 0x5a624c MOV (%R13,%RAX,8),%RDX |
(3153) 0x5a6251 VMOVSD (%RSI),%XMM1 |
(3153) 0x5a6255 ADD %RCX,%RDX |
(3153) 0x5a6258 LEA (%RBX,%RDX,8),%RDX |
(3153) 0x5a625c VMOVSD (%RDX),%XMM3 |
(3153) 0x5a6260 VFMADD132SD (%R12,%RAX,8),%XMM3,%XMM1 |
(3153) 0x5a6266 INC %RAX |
(3153) 0x5a6269 VMOVSD %XMM1,(%RDX) |
(3153) 0x5a626d MOV (%R13,%RAX,8),%RDX |
(3153) 0x5a6272 VMOVSD (%RSI),%XMM4 |
(3153) 0x5a6276 ADD %RCX,%RDX |
(3153) 0x5a6279 LEA (%RBX,%RDX,8),%RDX |
(3153) 0x5a627d VMOVSD (%RDX),%XMM5 |
(3153) 0x5a6281 VFMADD132SD (%R12,%RAX,8),%XMM5,%XMM4 |
(3153) 0x5a6287 INC %RAX |
(3153) 0x5a628a VMOVSD %XMM4,(%RDX) |
(3153) 0x5a628e MOV (%R13,%RAX,8),%RDX |
(3153) 0x5a6293 VMOVSD (%RSI),%XMM6 |
(3153) 0x5a6297 ADD %RCX,%RDX |
(3153) 0x5a629a LEA (%RBX,%RDX,8),%RDX |
(3153) 0x5a629e VMOVSD (%RDX),%XMM7 |
(3153) 0x5a62a2 VFMADD132SD (%R12,%RAX,8),%XMM7,%XMM6 |
(3153) 0x5a62a8 INC %RAX |
(3153) 0x5a62ab VMOVSD %XMM6,(%RDX) |
(3153) 0x5a62af MOV (%R13,%RAX,8),%RDX |
(3153) 0x5a62b4 VMOVSD (%RSI),%XMM8 |
(3153) 0x5a62b8 ADD %RCX,%RDX |
(3153) 0x5a62bb LEA (%RBX,%RDX,8),%RDX |
(3153) 0x5a62bf VMOVSD (%RDX),%XMM9 |
(3153) 0x5a62c3 VFMADD132SD (%R12,%RAX,8),%XMM9,%XMM8 |
(3153) 0x5a62c9 INC %RAX |
(3153) 0x5a62cc VMOVSD %XMM8,(%RDX) |
(3153) 0x5a62d0 MOV (%R13,%RAX,8),%RDX |
(3153) 0x5a62d5 VMOVSD (%RSI),%XMM10 |
(3153) 0x5a62d9 ADD %RCX,%RDX |
(3153) 0x5a62dc LEA (%RBX,%RDX,8),%RDX |
(3153) 0x5a62e0 VMOVSD (%RDX),%XMM11 |
(3153) 0x5a62e4 VFMADD132SD (%R12,%RAX,8),%XMM11,%XMM10 |
(3153) 0x5a62ea INC %RAX |
(3153) 0x5a62ed VMOVSD %XMM10,(%RDX) |
(3153) 0x5a62f1 MOV (%R13,%RAX,8),%RDX |
(3153) 0x5a62f6 VMOVSD (%RSI),%XMM12 |
(3153) 0x5a62fa ADD %RCX,%RDX |
(3153) 0x5a62fd LEA (%RBX,%RDX,8),%RDX |
(3153) 0x5a6301 VMOVSD (%RDX),%XMM13 |
(3153) 0x5a6305 VFMADD132SD (%R12,%RAX,8),%XMM13,%XMM12 |
(3153) 0x5a630b INC %RAX |
(3153) 0x5a630e VMOVSD %XMM12,(%RDX) |
(3153) 0x5a6312 CMP %R8,%RAX |
(3153) 0x5a6315 JE 5a641f |
(3152) 0x5a631b MOV (%R13,%RAX,8),%RDX |
(3152) 0x5a6320 VMOVSD (%RSI),%XMM14 |
(3152) 0x5a6324 ADD %RCX,%RDX |
(3152) 0x5a6327 LEA (%RBX,%RDX,8),%RDX |
(3152) 0x5a632b VMOVSD (%RDX),%XMM15 |
(3152) 0x5a632f VFMADD132SD (%R12,%RAX,8),%XMM15,%XMM14 |
(3152) 0x5a6335 VMOVSD %XMM14,(%RDX) |
(3152) 0x5a6339 MOV 0x8(%R13,%RAX,8),%RDX |
(3152) 0x5a633e VMOVSD (%RSI),%XMM0 |
(3152) 0x5a6342 ADD %RCX,%RDX |
(3152) 0x5a6345 LEA (%RBX,%RDX,8),%RDX |
(3152) 0x5a6349 VMOVSD (%RDX),%XMM2 |
(3152) 0x5a634d VFMADD132SD 0x8(%R12,%RAX,8),%XMM2,%XMM0 |
(3152) 0x5a6354 VMOVSD %XMM0,(%RDX) |
(3152) 0x5a6358 MOV 0x10(%R13,%RAX,8),%RDX |
(3152) 0x5a635d VMOVSD (%RSI),%XMM1 |
(3152) 0x5a6361 ADD %RCX,%RDX |
(3152) 0x5a6364 LEA (%RBX,%RDX,8),%RDX |
(3152) 0x5a6368 VMOVSD (%RDX),%XMM3 |
(3152) 0x5a636c VFMADD132SD 0x10(%R12,%RAX,8),%XMM3,%XMM1 |
(3152) 0x5a6373 VMOVSD %XMM1,(%RDX) |
(3152) 0x5a6377 MOV 0x18(%R13,%RAX,8),%RDX |
(3152) 0x5a637c VMOVSD (%RSI),%XMM4 |
(3152) 0x5a6380 ADD %RCX,%RDX |
(3152) 0x5a6383 LEA (%RBX,%RDX,8),%RDX |
(3152) 0x5a6387 VMOVSD (%RDX),%XMM5 |
(3152) 0x5a638b VFMADD132SD 0x18(%R12,%RAX,8),%XMM5,%XMM4 |
(3152) 0x5a6392 VMOVSD %XMM4,(%RDX) |
(3152) 0x5a6396 MOV 0x20(%R13,%RAX,8),%RDX |
(3152) 0x5a639b VMOVSD (%RSI),%XMM6 |
(3152) 0x5a639f ADD %RCX,%RDX |
(3152) 0x5a63a2 LEA (%RBX,%RDX,8),%RDX |
(3152) 0x5a63a6 VMOVSD (%RDX),%XMM7 |
(3152) 0x5a63aa VFMADD132SD 0x20(%R12,%RAX,8),%XMM7,%XMM6 |
(3152) 0x5a63b1 VMOVSD %XMM6,(%RDX) |
(3152) 0x5a63b5 MOV 0x28(%R13,%RAX,8),%RDX |
(3152) 0x5a63ba VMOVSD (%RSI),%XMM8 |
(3152) 0x5a63be ADD %RCX,%RDX |
(3152) 0x5a63c1 LEA (%RBX,%RDX,8),%RDX |
(3152) 0x5a63c5 VMOVSD (%RDX),%XMM9 |
(3152) 0x5a63c9 VFMADD132SD 0x28(%R12,%RAX,8),%XMM9,%XMM8 |
(3152) 0x5a63d0 VMOVSD %XMM8,(%RDX) |
(3152) 0x5a63d4 MOV 0x30(%R13,%RAX,8),%RDX |
(3152) 0x5a63d9 VMOVSD (%RSI),%XMM10 |
(3152) 0x5a63dd ADD %RCX,%RDX |
(3152) 0x5a63e0 LEA (%RBX,%RDX,8),%RDX |
(3152) 0x5a63e4 VMOVSD (%RDX),%XMM11 |
(3152) 0x5a63e8 VFMADD132SD 0x30(%R12,%RAX,8),%XMM11,%XMM10 |
(3152) 0x5a63ef VMOVSD %XMM10,(%RDX) |
(3152) 0x5a63f3 MOV 0x38(%R13,%RAX,8),%RDX |
(3152) 0x5a63f8 VMOVSD (%RSI),%XMM12 |
(3152) 0x5a63fc ADD %RCX,%RDX |
(3152) 0x5a63ff LEA (%RBX,%RDX,8),%RDX |
(3152) 0x5a6403 VMOVSD (%RDX),%XMM13 |
(3152) 0x5a6407 VFMADD132SD 0x38(%R12,%RAX,8),%XMM13,%XMM12 |
(3152) 0x5a640e ADD $0x8,%RAX |
(3152) 0x5a6412 VMOVSD %XMM12,(%RDX) |
(3152) 0x5a6416 CMP %R8,%RAX |
(3152) 0x5a6419 JNE 5a631b |
(3153) 0x5a641f INC %R9 |
(3153) 0x5a6422 ADD %R15,%RCX |
(3153) 0x5a6425 ADD %R11,%RSI |
(3153) 0x5a6428 CMP %R9,%R14 |
(3153) 0x5a642b JNE 5a61e8 |
0x5a6431 MOV -0xa8(%RBP),%RDX |
0x5a6438 MOV -0xb0(%RBP),%RAX |
0x5a643f MOV -0x90(%RBP),%RCX |
0x5a6446 INC %RAX |
0x5a6449 ADD %RCX,%RDI |
0x5a644c CMP %RAX,-0x88(%RBP) |
0x5a6453 JNE 5a61a0 |
0x5a67ff MOV -0x98(%RBP),%R10 |
0x5a6806 MOV (%R10,%RAX,8),%RCX |
0x5a680a MOV 0x8(%R10,%RAX,8),%RSI |
0x5a680f CMP %RCX,%RSI |
0x5a6812 JLE 5a643f |
0x5a6818 MOV %RSI,%R8 |
0x5a681b SUB %RCX,%R8 |
0x5a681e AND $0x7,%R8D |
0x5a6822 JE 5a6927 |
0x5a6828 CMP $0x1,%R8 |
0x5a682c JE 5a68fd |
0x5a6832 CMP $0x2,%R8 |
0x5a6836 JE 5a68dc |
0x5a683c CMP $0x3,%R8 |
0x5a6840 JE 5a68bb |
0x5a6842 CMP $0x4,%R8 |
0x5a6846 JE 5a689a |
0x5a6848 CMP $0x5,%R8 |
0x5a684c JE 5a6879 |
0x5a684e CMP $0x6,%R8 |
0x5a6852 JNE 5a6b28 |
0x5a6858 MOV (%R13,%RCX,8),%R8 |
0x5a685d VMOVSD (%RDX,%RAX,8),%XMM0 |
0x5a6862 LEA (%RBX,%R8,8),%R9 |
0x5a6866 VMOVSD (%R9),%XMM2 |
0x5a686b VFMADD132SD (%R12,%RCX,8),%XMM2,%XMM0 |
0x5a6871 INC %RCX |
0x5a6874 VMOVSD %XMM0,(%R9) |
0x5a6879 MOV (%R13,%RCX,8),%R10 |
0x5a687e VMOVSD (%RDX,%RAX,8),%XMM1 |
0x5a6883 LEA (%RBX,%R10,8),%R8 |
0x5a6887 VMOVSD (%R8),%XMM3 |
0x5a688c VFMADD132SD (%R12,%RCX,8),%XMM3,%XMM1 |
0x5a6892 INC %RCX |
0x5a6895 VMOVSD %XMM1,(%R8) |
0x5a689a MOV (%R13,%RCX,8),%R9 |
0x5a689f VMOVSD (%RDX,%RAX,8),%XMM5 |
0x5a68a4 LEA (%RBX,%R9,8),%R10 |
0x5a68a8 VMOVSD (%R10),%XMM4 |
0x5a68ad VFMADD132SD (%R12,%RCX,8),%XMM4,%XMM5 |
0x5a68b3 INC %RCX |
0x5a68b6 VMOVSD %XMM5,(%R10) |
0x5a68bb MOV (%R13,%RCX,8),%R8 |
0x5a68c0 VMOVSD (%RDX,%RAX,8),%XMM6 |
0x5a68c5 LEA (%RBX,%R8,8),%R9 |
0x5a68c9 VMOVSD (%R9),%XMM7 |
0x5a68ce VFMADD132SD (%R12,%RCX,8),%XMM7,%XMM6 |
0x5a68d4 INC %RCX |
0x5a68d7 VMOVSD %XMM6,(%R9) |
0x5a68dc MOV (%R13,%RCX,8),%R10 |
0x5a68e1 VMOVSD (%RDX,%RAX,8),%XMM8 |
0x5a68e6 LEA (%RBX,%R10,8),%R8 |
0x5a68ea VMOVSD (%R8),%XMM9 |
0x5a68ef VFMADD132SD (%R12,%RCX,8),%XMM9,%XMM8 |
0x5a68f5 INC %RCX |
0x5a68f8 VMOVSD %XMM8,(%R8) |
0x5a68fd MOV (%R13,%RCX,8),%R9 |
0x5a6902 VMOVSD (%RDX,%RAX,8),%XMM10 |
0x5a6907 LEA (%RBX,%R9,8),%R10 |
0x5a690b VMOVSD (%R10),%XMM11 |
0x5a6910 VFMADD132SD (%R12,%RCX,8),%XMM11,%XMM10 |
0x5a6916 INC %RCX |
0x5a6919 VMOVSD %XMM10,(%R10) |
0x5a691e CMP %RSI,%RCX |
0x5a6921 JE 5a643f |
(3151) 0x5a6927 MOV (%R13,%RCX,8),%R8 |
(3151) 0x5a692c VMOVSD (%RDX,%RAX,8),%XMM12 |
(3151) 0x5a6931 LEA 0x1(%RCX),%R10 |
(3151) 0x5a6935 LEA (%RBX,%R8,8),%R9 |
(3151) 0x5a6939 MOV (%R13,%R10,8),%R8 |
(3151) 0x5a693e VMOVSD (%R9),%XMM13 |
(3151) 0x5a6943 VFMADD132SD (%R12,%RCX,8),%XMM13,%XMM12 |
(3151) 0x5a6949 VMOVSD %XMM12,(%R9) |
(3151) 0x5a694e LEA (%RBX,%R8,8),%R9 |
(3151) 0x5a6952 VMOVSD (%R9),%XMM15 |
(3151) 0x5a6957 VMOVSD (%RDX,%RAX,8),%XMM14 |
(3151) 0x5a695c VFMADD132SD (%R12,%R10,8),%XMM15,%XMM14 |
(3151) 0x5a6962 LEA 0x2(%RCX),%R10 |
(3151) 0x5a6966 MOV (%R13,%R10,8),%R8 |
(3151) 0x5a696b VMOVSD %XMM14,(%R9) |
(3151) 0x5a6970 LEA (%RBX,%R8,8),%R9 |
(3151) 0x5a6974 VMOVSD (%R9),%XMM2 |
(3151) 0x5a6979 VMOVSD (%RDX,%RAX,8),%XMM0 |
(3151) 0x5a697e VFMADD132SD (%R12,%R10,8),%XMM2,%XMM0 |
(3151) 0x5a6984 LEA 0x3(%RCX),%R10 |
(3151) 0x5a6988 MOV (%R13,%R10,8),%R8 |
(3151) 0x5a698d VMOVSD %XMM0,(%R9) |
(3151) 0x5a6992 LEA (%RBX,%R8,8),%R9 |
(3151) 0x5a6996 VMOVSD (%R9),%XMM3 |
(3151) 0x5a699b VMOVSD (%RDX,%RAX,8),%XMM1 |
(3151) 0x5a69a0 VFMADD132SD (%R12,%R10,8),%XMM3,%XMM1 |
(3151) 0x5a69a6 LEA 0x4(%RCX),%R10 |
(3151) 0x5a69aa MOV (%R13,%R10,8),%R8 |
(3151) 0x5a69af VMOVSD %XMM1,(%R9) |
(3151) 0x5a69b4 LEA (%RBX,%R8,8),%R9 |
(3151) 0x5a69b8 VMOVSD (%R9),%XMM4 |
(3151) 0x5a69bd VMOVSD (%RDX,%RAX,8),%XMM5 |
(3151) 0x5a69c2 VFMADD132SD (%R12,%R10,8),%XMM4,%XMM5 |
(3151) 0x5a69c8 LEA 0x5(%RCX),%R10 |
(3151) 0x5a69cc MOV (%R13,%R10,8),%R8 |
(3151) 0x5a69d1 VMOVSD %XMM5,(%R9) |
(3151) 0x5a69d6 LEA (%RBX,%R8,8),%R9 |
(3151) 0x5a69da VMOVSD (%R9),%XMM7 |
(3151) 0x5a69df VMOVSD (%RDX,%RAX,8),%XMM6 |
(3151) 0x5a69e4 VFMADD132SD (%R12,%R10,8),%XMM7,%XMM6 |
(3151) 0x5a69ea LEA 0x6(%RCX),%R10 |
(3151) 0x5a69ee MOV (%R13,%R10,8),%R8 |
(3151) 0x5a69f3 VMOVSD %XMM6,(%R9) |
(3151) 0x5a69f8 LEA (%RBX,%R8,8),%R9 |
(3151) 0x5a69fc VMOVSD (%RDX,%RAX,8),%XMM8 |
(3151) 0x5a6a01 VMOVSD (%R9),%XMM9 |
(3151) 0x5a6a06 VFMADD132SD (%R12,%R10,8),%XMM9,%XMM8 |
(3151) 0x5a6a0c LEA 0x7(%RCX),%R10 |
(3151) 0x5a6a10 ADD $0x8,%RCX |
(3151) 0x5a6a14 MOV (%R13,%R10,8),%R8 |
(3151) 0x5a6a19 VMOVSD %XMM8,(%R9) |
(3151) 0x5a6a1e LEA (%RBX,%R8,8),%R9 |
(3151) 0x5a6a22 VMOVSD (%RDX,%RAX,8),%XMM10 |
(3151) 0x5a6a27 VMOVSD (%R9),%XMM11 |
(3151) 0x5a6a2c VFMADD132SD (%R12,%R10,8),%XMM11,%XMM10 |
(3151) 0x5a6a32 VMOVSD %XMM10,(%R9) |
(3151) 0x5a6a37 CMP %RSI,%RCX |
(3151) 0x5a6a3a JNE 5a6927 |
0x5a6a40 JMP 5a643f |
0x5a6b28 MOV (%R13,%RCX,8),%R9 |
0x5a6b2d VMOVSD (%RDX,%RAX,8),%XMM14 |
0x5a6b32 LEA (%RBX,%R9,8),%R10 |
0x5a6b36 VMOVSD (%R10),%XMM15 |
0x5a6b3b VFMADD132SD (%R12,%RCX,8),%XMM15,%XMM14 |
0x5a6b41 INC %RCX |
0x5a6b44 VMOVSD %XMM14,(%R10) |
0x5a6b49 JMP 5a6858 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 608 - 625 |
-------------------------------------------------------------------------------- |
608: for (i = 0; i < num_rows; i++) |
609: { |
610: if ( num_vectors==1 ) |
611: { |
612: for (jj = A_i[i]; jj < A_i[i+1]; jj++) |
613: { |
614: j = A_j[jj]; |
615: y_data[j] += A_data[jj] * x_data[i]; |
616: } |
617: } |
618: else |
619: { |
620: for ( jv=0; jv<num_vectors; ++jv ) |
621: { |
622: for (jj = A_i[i]; jj < A_i[i+1]; jj++) |
623: { |
624: j = A_j[jj]; |
625: y_data[ j*idxstride_y + jv*vecstride_y ] += |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►95.51+ | hypre_ParCSRMatrixMatvecT | par_csr_matvec.c:439 | exec |
○ | hypre_BoomerAMGCycle | par_cycle.c:435 | exec |
○ | hypre_BoomerAMGSolve | par_amg_solve.c:235 | exec |
○ | hypre_PCGSolve | pcg.c:545 | exec |
○ | main | amg.c:419 | exec |
○ | __libc_init_first | libc.so.6 | |
►4.49+ | hypre_ParCSRMatrixMatvecT | par_csr_matvec.c:439 | exec |
○ | hypre_BoomerAMGCycle | par_cycle.c:435 | exec |
○ | hypre_BoomerAMGSolve | par_amg_solve.c:235 | exec |
○ | hypre_PCGSolve | pcg.c:424 | exec |
○ | main | amg.c:419 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.81 |
CQA speedup if FP arith vectorized | 2.10 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.36 |
Bottlenecks | micro-operation queue, |
Function | hypre_CSRMatrixMatvecT |
Source | csr_matvec.c:608-625 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 25.75 |
CQA cycles if no scalar integer | 14.25 |
CQA cycles if FP arith vectorized | 12.25 |
CQA cycles if fully vectorized | 3.22 |
Front-end cycles | 25.75 |
DIV/SQRT cycles | 13.25 |
P0 cycles | 13.25 |
P1 cycles | 19.00 |
P2 cycles | 19.00 |
P3 cycles | 9.00 |
P4 cycles | 13.25 |
P5 cycles | 13.25 |
P6 cycles | 9.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 26.12 |
Stall cycles (UFS) | 0.00 |
Nb insns | 96.00 |
Nb uops | 96.00 |
Nb loads | 38.00 |
Nb stores | 9.00 |
Nb stack references | 5.00 |
FLOP/cycle | 0.54 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 7.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.60 |
Bytes prefetched | 0.00 |
Bytes loaded | 304.00 |
Bytes stored | 72.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.81 |
CQA speedup if FP arith vectorized | 2.10 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.36 |
Bottlenecks | micro-operation queue, |
Function | hypre_CSRMatrixMatvecT |
Source | csr_matvec.c:608-625 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 25.75 |
CQA cycles if no scalar integer | 14.25 |
CQA cycles if FP arith vectorized | 12.25 |
CQA cycles if fully vectorized | 3.22 |
Front-end cycles | 25.75 |
DIV/SQRT cycles | 13.25 |
P0 cycles | 13.25 |
P1 cycles | 19.00 |
P2 cycles | 19.00 |
P3 cycles | 9.00 |
P4 cycles | 13.25 |
P5 cycles | 13.25 |
P6 cycles | 9.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 26.12 |
Stall cycles (UFS) | 0.00 |
Nb insns | 96.00 |
Nb uops | 96.00 |
Nb loads | 38.00 |
Nb stores | 9.00 |
Nb stack references | 5.00 |
FLOP/cycle | 0.54 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 7.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.60 |
Bytes prefetched | 0.00 |
Bytes loaded | 304.00 |
Bytes stored | 72.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_CSRMatrixMatvecT |
Source file and lines | csr_matvec.c:608-625 |
Module | exec |
nb instructions | 96 |
nb uops | 96 |
loop length | 451 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 14 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 25.75 cycles |
front end | 25.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 13.25 | 13.25 | 19.00 | 19.00 | 9.00 | 13.25 | 13.25 | 9.00 |
cycles | 13.25 | 13.25 | 19.00 | 19.00 | 9.00 | 13.25 | 13.25 | 9.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 26.12 |
Stall cycles | 0.00 |
Front-end | 25.75 |
Dispatch | 19.00 |
Overall L1 | 25.75 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMP $0x1,%R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a67ff | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a6459 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RSI,%RAX,8),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RSI,%RAX,8),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R10,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a643f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%RDX,%RDI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x90(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RCX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RAX,-0x88(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 5a61a0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x98(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R10,%RAX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%R10,%RAX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a643f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB %RCX,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x7,%R8D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a6927 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x1,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a68fd | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x2,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a68dc | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x3,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a68bb | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x4,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a689a | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x5,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a6879 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x6,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 5a6b28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R13,%RCX,8),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R8,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R9),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM2,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM0,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R10,8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R8),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM3,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM1,(%R8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R9,8),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R10),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM5,(%R10) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R8,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R9),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM7,%XMM6 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM6,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R10,8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R8),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM9,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM8,(%R8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R9,8),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R10),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM11,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM10,(%R10) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CMP %RSI,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a643f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 5a643f | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV (%R13,%RCX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R9,8),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R10),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM15,%XMM14 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM14,(%R10) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 5a6858 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | hypre_CSRMatrixMatvecT |
Source file and lines | csr_matvec.c:608-625 |
Module | exec |
nb instructions | 96 |
nb uops | 96 |
loop length | 451 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 14 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 25.75 cycles |
front end | 25.75 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 13.25 | 13.25 | 19.00 | 19.00 | 9.00 | 13.25 | 13.25 | 9.00 |
cycles | 13.25 | 13.25 | 19.00 | 19.00 | 9.00 | 13.25 | 13.25 | 9.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 26.12 |
Stall cycles | 0.00 |
Front-end | 25.75 |
Dispatch | 19.00 |
Overall L1 | 25.75 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 0% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 12% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
CMP $0x1,%R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a67ff | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a6459 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RSI,%RAX,8),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RSI,%RAX,8),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R10,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a643f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
LEA (%RDX,%RDI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x90(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RCX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RAX,-0x88(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 5a61a0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x98(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R10,%RAX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%R10,%RAX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RCX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a643f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB %RCX,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x7,%R8D | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a6927 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x1,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a68fd | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x2,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a68dc | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x3,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a68bb | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x4,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a689a | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x5,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a6879 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x6,%R8 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 5a6b28 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R13,%RCX,8),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R8,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R9),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM2,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM0,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R10,8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R8),%XMM3 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM3,%XMM1 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM1,(%R8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R9,8),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R10),%XMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM4,%XMM5 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM5,(%R10) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM6 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R8,8),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R9),%XMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM7,%XMM6 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM6,(%R9) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R10,8),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R8),%XMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM9,%XMM8 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM8,(%R8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RCX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R9,8),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R10),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM11,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM10,(%R10) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CMP %RSI,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a643f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 5a643f | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV (%R13,%RCX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RDX,%RAX,8),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA (%RBX,%R9,8),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%R10),%XMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD132SD (%R12,%RCX,8),%XMM15,%XMM14 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD %XMM14,(%R10) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 5a6858 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |