Function: hypre_ParMatmul.extracted.12 | Module: exec | Source: par_csr_matop.c:829-995 [...] | Coverage: 4.16% |
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Function: hypre_ParMatmul.extracted.12 | Module: exec | Source: par_csr_matop.c:829-995 [...] | Coverage: 4.16% |
---|
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 829 - 995 |
-------------------------------------------------------------------------------- |
829: #pragma omp parallel |
[...] |
840: ii = hypre_GetThreadNum(); |
841: num_threads = hypre_NumActiveThreads(); |
842: size = num_rows_diag_A/num_threads; |
843: rest = num_rows_diag_A - size*num_threads; |
844: if (ii < rest) |
[...] |
854: jj_count_diag = C_diag_i[ns]; |
855: jj_count_offd = C_offd_i[ns]; |
856: if (num_cols_diag_B || num_cols_offd_C) |
857: B_marker = hypre_CTAlloc(HYPRE_Int, num_cols_diag_B+num_cols_offd_C); |
858: for (i1 = 0; i1 < num_cols_diag_B+num_cols_offd_C; i1++) |
859: B_marker[i1] = -1; |
[...] |
865: for (i1 = ns; i1 < ne; i1++) |
[...] |
874: if ( allsquare ) |
875: { |
876: B_marker[i1] = jj_count_diag; |
877: C_diag_data[jj_count_diag] = zero; |
878: C_diag_j[jj_count_diag] = i1; |
879: jj_count_diag++; |
[...] |
886: if (num_cols_offd_A) |
887: { |
888: for (jj2 = A_offd_i[i1]; jj2 < A_offd_i[i1+1]; jj2++) |
889: { |
890: i2 = A_offd_j[jj2]; |
891: a_entry = A_offd_data[jj2]; |
[...] |
897: for (jj3 = B_ext_offd_i[i2]; jj3 < B_ext_offd_i[i2+1]; jj3++) |
898: { |
899: i3 = num_cols_diag_B+B_ext_offd_j[jj3]; |
[...] |
907: if (B_marker[i3] < jj_row_begin_offd) |
908: { |
909: B_marker[i3] = jj_count_offd; |
910: C_offd_data[jj_count_offd] = a_entry*B_ext_offd_data[jj3]; |
911: C_offd_j[jj_count_offd] = i3-num_cols_diag_B; |
912: jj_count_offd++; |
913: } |
914: else |
915: C_offd_data[B_marker[i3]] += a_entry*B_ext_offd_data[jj3]; |
916: } |
917: for (jj3 = B_ext_diag_i[i2]; jj3 < B_ext_diag_i[i2+1]; jj3++) |
918: { |
919: i3 = B_ext_diag_j[jj3]; |
920: if (B_marker[i3] < jj_row_begin_diag) |
921: { |
922: B_marker[i3] = jj_count_diag; |
923: C_diag_data[jj_count_diag] = a_entry*B_ext_diag_data[jj3]; |
924: C_diag_j[jj_count_diag] = i3; |
925: jj_count_diag++; |
926: } |
927: else |
928: C_diag_data[B_marker[i3]] += a_entry*B_ext_diag_data[jj3]; |
[...] |
937: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
938: { |
939: i2 = A_diag_j[jj2]; |
940: a_entry = A_diag_data[jj2]; |
[...] |
946: for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++) |
947: { |
948: i3 = B_diag_j[jj3]; |
[...] |
956: if (B_marker[i3] < jj_row_begin_diag) |
957: { |
958: B_marker[i3] = jj_count_diag; |
959: C_diag_data[jj_count_diag] = a_entry*B_diag_data[jj3]; |
960: C_diag_j[jj_count_diag] = i3; |
961: jj_count_diag++; |
962: } |
963: else |
964: { |
965: C_diag_data[B_marker[i3]] += a_entry*B_diag_data[jj3]; |
966: } |
967: } |
968: if (num_cols_offd_B) |
969: { |
970: for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++) |
971: { |
972: i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]]; |
[...] |
980: if (B_marker[i3] < jj_row_begin_offd) |
981: { |
982: B_marker[i3] = jj_count_offd; |
983: C_offd_data[jj_count_offd] = a_entry*B_offd_data[jj3]; |
984: C_offd_j[jj_count_offd] = i3-num_cols_diag_B; |
985: jj_count_offd++; |
986: } |
987: else |
988: { |
989: C_offd_data[B_marker[i3]] += a_entry*B_offd_data[jj3]; |
[...] |
995: hypre_TFree(B_marker); |
0x4b7010 PUSH %RBP |
0x4b7011 MOV %RSP,%RBP |
0x4b7014 PUSH %R15 |
0x4b7016 PUSH %R14 |
0x4b7018 PUSH %R13 |
0x4b701a PUSH %R12 |
0x4b701c PUSH %RBX |
0x4b701d SUB $0xf8,%RSP |
0x4b7024 MOV %R9,-0xc8(%RBP) |
0x4b702b MOV %R8,-0xe0(%RBP) |
0x4b7032 MOV %RCX,-0x68(%RBP) |
0x4b7036 MOV %RDX,-0xd8(%RBP) |
0x4b703d MOV 0xe0(%RBP),%RAX |
0x4b7044 MOV %RAX,-0xa8(%RBP) |
0x4b704b MOV 0xd8(%RBP),%RAX |
0x4b7052 MOV %RAX,-0xb8(%RBP) |
0x4b7059 MOV 0xd0(%RBP),%RAX |
0x4b7060 MOV %RAX,-0x80(%RBP) |
0x4b7064 MOV 0xc8(%RBP),%RAX |
0x4b706b MOV %RAX,-0x108(%RBP) |
0x4b7072 MOV 0xc0(%RBP),%RAX |
0x4b7079 MOV %RAX,-0xb0(%RBP) |
0x4b7080 MOV 0xb8(%RBP),%RAX |
0x4b7087 MOV %RAX,-0x78(%RBP) |
0x4b708b MOV 0xb0(%RBP),%RAX |
0x4b7092 MOV %RAX,-0x100(%RBP) |
0x4b7099 MOV 0xa8(%RBP),%RAX |
0x4b70a0 MOV %RAX,-0x40(%RBP) |
0x4b70a4 MOV 0xa0(%RBP),%RAX |
0x4b70ab MOV %RAX,-0x90(%RBP) |
0x4b70b2 MOV 0x98(%RBP),%RAX |
0x4b70b9 MOV %RAX,-0x30(%RBP) |
0x4b70bd MOV 0x90(%RBP),%R14 |
0x4b70c4 MOV 0x88(%RBP),%RAX |
0x4b70cb MOV %RAX,-0x50(%RBP) |
0x4b70cf MOV 0x80(%RBP),%R15 |
0x4b70d6 MOV 0x78(%RBP),%R13 |
0x4b70da MOV 0x70(%RBP),%RAX |
0x4b70de MOV %RAX,-0xf8(%RBP) |
0x4b70e5 MOV 0x68(%RBP),%RAX |
0x4b70e9 MOV %RAX,-0xd0(%RBP) |
0x4b70f0 MOV 0x60(%RBP),%RAX |
0x4b70f4 MOV %RAX,-0x58(%RBP) |
0x4b70f8 MOV 0x58(%RBP),%RAX |
0x4b70fc MOV %RAX,-0xf0(%RBP) |
0x4b7103 MOV 0x50(%RBP),%RAX |
0x4b7107 MOV %RAX,-0x70(%RBP) |
0x4b710b MOV 0x48(%RBP),%RAX |
0x4b710f MOV %RAX,-0xe8(%RBP) |
0x4b7116 MOV 0x40(%RBP),%RAX |
0x4b711a MOV %RAX,-0x118(%RBP) |
0x4b7121 MOV 0x38(%RBP),%RAX |
0x4b7125 MOV %RAX,-0x88(%RBP) |
0x4b712c MOV 0x30(%RBP),%RAX |
0x4b7130 MOV %RAX,-0x110(%RBP) |
0x4b7137 MOV 0x28(%RBP),%RAX |
0x4b713b MOV %RAX,-0xa0(%RBP) |
0x4b7142 MOV 0x20(%RBP),%R12 |
0x4b7146 MOV 0x18(%RBP),%RAX |
0x4b714a MOV %RAX,-0xc0(%RBP) |
0x4b7151 MOV 0x10(%RBP),%RAX |
0x4b7155 MOV %RAX,-0x60(%RBP) |
0x4b7159 CALL 4df9d0 <hypre_GetThreadNum> |
0x4b715e MOV %RAX,%RBX |
0x4b7161 CALL 4df9c0 <hypre_NumActiveThreads> |
0x4b7166 MOV %RAX,%RCX |
0x4b7169 OR %R12,%RAX |
0x4b716c SHR $0x20,%RAX |
0x4b7170 JE 4b717c |
0x4b7172 MOV %R12,%RAX |
0x4b7175 CQTO |
0x4b7177 IDIV %RCX |
0x4b717a JMP 4b7183 |
0x4b717c MOV %R12D,%EAX |
0x4b717f XOR %EDX,%EDX |
0x4b7181 DIV %ECX |
0x4b7183 LEA 0x1(%RBX),%RSI |
0x4b7187 MOV %RAX,%R9 |
0x4b718a IMUL %RSI,%R9 |
0x4b718e LEA 0x1(%RAX),%RCX |
0x4b7192 IMUL %RBX,%RCX |
0x4b7196 IMUL %RBX,%RAX |
0x4b719a ADD %RDX,%RAX |
0x4b719d CMP %RDX,%RBX |
0x4b71a0 CMOVL %RCX,%RAX |
0x4b71a4 CMOVL %RSI,%RDX |
0x4b71a8 MOV (%R15),%RCX |
0x4b71ab MOV (%RCX,%RAX,8),%R12 |
0x4b71af MOV -0x30(%RBP),%RCX |
0x4b71b3 MOV (%RCX),%RCX |
0x4b71b6 MOV %RAX,-0x38(%RBP) |
0x4b71ba MOV (%RCX,%RAX,8),%RAX |
0x4b71be MOV %RAX,-0x30(%RBP) |
0x4b71c2 MOV -0x40(%RBP),%R8 |
0x4b71c6 MOV (%R8),%RAX |
0x4b71c9 XOR %ECX,%ECX |
0x4b71cb MOV -0x58(%RBP),%RBX |
0x4b71cf MOV %RBX,%RSI |
0x4b71d2 OR %RAX,%RSI |
0x4b71d5 MOV $0,%EDI |
0x4b71da JE 4b7204 |
0x4b71dc ADD %RBX,%RAX |
0x4b71df MOV $0x8,%ESI |
0x4b71e4 MOV %RAX,%RDI |
0x4b71e7 MOV %RDX,%R15 |
0x4b71ea MOV %R9,-0x48(%RBP) |
0x4b71ee CALL 4dd8f0 <hypre_CAlloc> |
0x4b71f3 MOV -0x48(%RBP),%R9 |
0x4b71f7 MOV -0x40(%RBP),%R8 |
0x4b71fb MOV %R15,%RDX |
0x4b71fe MOV %RAX,%RDI |
0x4b7201 MOV (%R8),%RCX |
0x4b7204 ADD %R9,%RDX |
0x4b7207 ADD %RBX,%RCX |
0x4b720a JLE 4b7226 |
0x4b720c XOR %EAX,%EAX |
0x4b720e XCHG %AX,%AX |
(3338) 0x4b7210 MOVQ $-0x1,(%RDI,%RAX,8) |
(3338) 0x4b7218 INC %RAX |
(3338) 0x4b721b MOV (%R8),%RCX |
(3338) 0x4b721e ADD %RBX,%RCX |
(3338) 0x4b7221 CMP %RCX,%RAX |
(3338) 0x4b7224 JL 4b7210 |
0x4b7226 MOV -0x38(%RBP),%RCX |
0x4b722a CMP %RDX,%RCX |
0x4b722d JGE 4b7584 |
0x4b7233 MOV %R12,%R15 |
0x4b7236 MOV %RDX,-0x98(%RBP) |
0x4b723d JMP 4b7254 |
0x4b723f NOP |
(3331) 0x4b7240 MOV %R11,-0x30(%RBP) |
(3331) 0x4b7244 MOV %R15,%R12 |
(3331) 0x4b7247 CMP -0x98(%RBP),%RCX |
(3331) 0x4b724e JGE 4b7584 |
(3331) 0x4b7254 MOV %RCX,%RDX |
(3331) 0x4b7257 CMPQ $0,-0xa8(%RBP) |
(3331) 0x4b725f MOV -0x50(%RBP),%RAX |
(3331) 0x4b7263 JE 4b727b |
(3331) 0x4b7265 MOV %R12,(%RDI,%RDX,8) |
(3331) 0x4b7269 MOVQ $0,(%R13,%R12,8) |
(3331) 0x4b7272 MOV %RDX,(%RAX,%R12,8) |
(3331) 0x4b7276 LEA 0x1(%R12),%R15 |
(3331) 0x4b727b CMPQ $0,-0xa0(%RBP) |
(3331) 0x4b7283 JE 4b73f0 |
(3331) 0x4b7289 MOV -0x60(%RBP),%RAX |
(3331) 0x4b728d MOV (%RAX,%RDX,8),%RSI |
(3331) 0x4b7291 LEA 0x1(%RDX),%RCX |
(3331) 0x4b7295 CMP 0x8(%RAX,%RDX,8),%RSI |
(3331) 0x4b729a JGE 4b73f4 |
(3331) 0x4b72a0 MOV %RCX,-0x38(%RBP) |
(3331) 0x4b72a4 MOV -0x30(%RBP),%R11 |
(3331) 0x4b72a8 MOV %RDX,-0x48(%RBP) |
(3331) 0x4b72ac MOV -0x108(%RBP),%R9 |
(3331) 0x4b72b3 JMP 4b72da |
0x4b72b5 NOPW %CS:(%RAX,%RAX,1) |
(3335) 0x4b72c0 MOV -0x40(%RBP),%RSI |
(3335) 0x4b72c4 INC %RSI |
(3335) 0x4b72c7 MOV -0x60(%RBP),%RAX |
(3335) 0x4b72cb MOV -0x48(%RBP),%RDX |
(3335) 0x4b72cf CMP 0x8(%RAX,%RDX,8),%RSI |
(3335) 0x4b72d4 JGE 4b7410 |
(3335) 0x4b72da MOV -0xc0(%RBP),%RAX |
(3335) 0x4b72e1 MOV (%RAX,%RSI,8),%R10 |
(3335) 0x4b72e5 MOV -0xc8(%RBP),%RAX |
(3335) 0x4b72ec MOV %RSI,-0x40(%RBP) |
(3335) 0x4b72f0 VMOVSD (%RAX,%RSI,8),%XMM0 |
(3335) 0x4b72f5 MOV -0x80(%RBP),%RAX |
(3335) 0x4b72f9 MOV (%RAX,%R10,8),%RSI |
(3335) 0x4b72fd MOV 0x8(%RAX,%R10,8),%RBX |
(3335) 0x4b7302 CMP %RBX,%RSI |
(3335) 0x4b7305 JGE 4b7368 |
(3335) 0x4b7307 MOV -0xb8(%RBP),%RAX |
(3335) 0x4b730e JMP 4b7324 |
(3337) 0x4b7310 VADDSD (%R14,%R8,8),%XMM1,%XMM1 |
(3337) 0x4b7316 VMOVSD %XMM1,(%R14,%R8,8) |
(3337) 0x4b731c INC %RSI |
(3337) 0x4b731f CMP %RBX,%RSI |
(3337) 0x4b7322 JGE 4b7368 |
(3337) 0x4b7324 MOV (%RAX,%RSI,8),%RDX |
(3337) 0x4b7328 MOV -0x58(%RBP),%RCX |
(3337) 0x4b732c ADD %RDX,%RCX |
(3337) 0x4b732f MOV (%RDI,%RCX,8),%R8 |
(3337) 0x4b7333 VMULSD (%R9,%RSI,8),%XMM0,%XMM1 |
(3337) 0x4b7339 CMP -0x30(%RBP),%R8 |
(3337) 0x4b733d JGE 4b7310 |
(3337) 0x4b733f MOV %R11,(%RDI,%RCX,8) |
(3337) 0x4b7343 VMOVSD %XMM1,(%R14,%R11,8) |
(3337) 0x4b7349 MOV -0x90(%RBP),%RCX |
(3337) 0x4b7350 MOV %RDX,(%RCX,%R11,8) |
(3337) 0x4b7354 INC %R11 |
(3337) 0x4b7357 MOV -0x80(%RBP),%RCX |
(3337) 0x4b735b MOV 0x8(%RCX,%R10,8),%RBX |
(3337) 0x4b7360 INC %RSI |
(3337) 0x4b7363 CMP %RBX,%RSI |
(3337) 0x4b7366 JL 4b7324 |
(3335) 0x4b7368 MOV -0x78(%RBP),%RAX |
(3335) 0x4b736c MOV (%RAX,%R10,8),%RSI |
(3335) 0x4b7370 MOV 0x8(%RAX,%R10,8),%RBX |
(3335) 0x4b7375 CMP %RBX,%RSI |
(3335) 0x4b7378 JGE 4b72c0 |
(3335) 0x4b737e MOV -0xb0(%RBP),%R8 |
(3335) 0x4b7385 JMP 4b73aa |
0x4b7387 NOPW (%RAX,%RAX,1) |
(3336) 0x4b7390 VADDSD (%R13,%RCX,8),%XMM1,%XMM1 |
(3336) 0x4b7397 VMOVSD %XMM1,(%R13,%RCX,8) |
(3336) 0x4b739e INC %RSI |
(3336) 0x4b73a1 CMP %RBX,%RSI |
(3336) 0x4b73a4 JGE 4b72c0 |
(3336) 0x4b73aa MOV (%R8,%RSI,8),%RDX |
(3336) 0x4b73ae MOV (%RDI,%RDX,8),%RCX |
(3336) 0x4b73b2 MOV -0x100(%RBP),%RAX |
(3336) 0x4b73b9 VMULSD (%RAX,%RSI,8),%XMM0,%XMM1 |
(3336) 0x4b73be CMP %R12,%RCX |
(3336) 0x4b73c1 JGE 4b7390 |
(3336) 0x4b73c3 MOV %R15,(%RDI,%RDX,8) |
(3336) 0x4b73c7 VMOVSD %XMM1,(%R13,%R15,8) |
(3336) 0x4b73ce MOV -0x50(%RBP),%RAX |
(3336) 0x4b73d2 MOV %RDX,(%RAX,%R15,8) |
(3336) 0x4b73d6 INC %R15 |
(3336) 0x4b73d9 MOV -0x78(%RBP),%RCX |
(3336) 0x4b73dd MOV 0x8(%RCX,%R10,8),%RBX |
(3336) 0x4b73e2 INC %RSI |
(3336) 0x4b73e5 CMP %RBX,%RSI |
(3336) 0x4b73e8 JL 4b73aa |
(3335) 0x4b73ea JMP 4b72c0 |
0x4b73ef NOP |
(3331) 0x4b73f0 LEA 0x1(%RDX),%RCX |
(3331) 0x4b73f4 MOV -0x30(%RBP),%R11 |
(3331) 0x4b73f8 MOV -0x68(%RBP),%RAX |
(3331) 0x4b73fc MOV (%RAX,%RDX,8),%R8 |
(3331) 0x4b7400 CMP (%RAX,%RCX,8),%R8 |
(3331) 0x4b7404 JGE 4b7240 |
(3331) 0x4b740a JMP 4b7426 |
0x4b740c NOPL (%RAX) |
(3331) 0x4b7410 MOV -0x38(%RBP),%RCX |
(3331) 0x4b7414 MOV -0x68(%RBP),%RAX |
(3331) 0x4b7418 MOV (%RAX,%RDX,8),%R8 |
(3331) 0x4b741c CMP (%RAX,%RCX,8),%R8 |
(3331) 0x4b7420 JGE 4b7240 |
(3331) 0x4b7426 MOV %RCX,-0x38(%RBP) |
(3331) 0x4b742a JMP 4b7445 |
0x4b742c NOPL (%RAX) |
(3332) 0x4b7430 INC %R8 |
(3332) 0x4b7433 MOV -0x68(%RBP),%RAX |
(3332) 0x4b7437 MOV -0x38(%RBP),%RCX |
(3332) 0x4b743b CMP (%RAX,%RCX,8),%R8 |
(3332) 0x4b743f JGE 4b7240 |
(3332) 0x4b7445 MOV -0xe0(%RBP),%RAX |
(3332) 0x4b744c MOV (%RAX,%R8,8),%R9 |
(3332) 0x4b7450 MOV -0xd8(%RBP),%RAX |
(3332) 0x4b7457 VMOVSD (%RAX,%R8,8),%XMM0 |
(3332) 0x4b745d MOV -0x88(%RBP),%RAX |
(3332) 0x4b7464 MOV (%RAX,%R9,8),%RDX |
(3332) 0x4b7468 MOV 0x8(%RAX,%R9,8),%RBX |
(3332) 0x4b746d CMP %RBX,%RDX |
(3332) 0x4b7470 JGE 4b74d5 |
(3332) 0x4b7472 MOV -0x50(%RBP),%R10 |
(3332) 0x4b7476 MOV -0x110(%RBP),%RAX |
(3332) 0x4b747d JMP 4b7496 |
0x4b747f NOP |
(3334) 0x4b7480 VADDSD (%R13,%RCX,8),%XMM1,%XMM1 |
(3334) 0x4b7487 VMOVSD %XMM1,(%R13,%RCX,8) |
(3334) 0x4b748e INC %RDX |
(3334) 0x4b7491 CMP %RBX,%RDX |
(3334) 0x4b7494 JGE 4b74d5 |
(3334) 0x4b7496 MOV -0x118(%RBP),%RCX |
(3334) 0x4b749d MOV (%RCX,%RDX,8),%RSI |
(3334) 0x4b74a1 MOV (%RDI,%RSI,8),%RCX |
(3334) 0x4b74a5 VMULSD (%RAX,%RDX,8),%XMM0,%XMM1 |
(3334) 0x4b74aa CMP %R12,%RCX |
(3334) 0x4b74ad JGE 4b7480 |
(3334) 0x4b74af MOV %R15,(%RDI,%RSI,8) |
(3334) 0x4b74b3 VMOVSD %XMM1,(%R13,%R15,8) |
(3334) 0x4b74ba MOV %RSI,(%R10,%R15,8) |
(3334) 0x4b74be INC %R15 |
(3334) 0x4b74c1 MOV -0x88(%RBP),%RCX |
(3334) 0x4b74c8 MOV 0x8(%RCX,%R9,8),%RBX |
(3334) 0x4b74cd INC %RDX |
(3334) 0x4b74d0 CMP %RBX,%RDX |
(3334) 0x4b74d3 JL 4b7496 |
(3332) 0x4b74d5 CMPQ $0,-0xd0(%RBP) |
(3332) 0x4b74dd JE 4b7430 |
(3332) 0x4b74e3 MOV -0x70(%RBP),%RAX |
(3332) 0x4b74e7 MOV (%RAX,%R9,8),%RDX |
(3332) 0x4b74eb MOV 0x8(%RAX,%R9,8),%RBX |
(3332) 0x4b74f0 CMP %RBX,%RDX |
(3332) 0x4b74f3 JGE 4b7430 |
(3332) 0x4b74f9 MOV -0xe8(%RBP),%R10 |
(3332) 0x4b7500 JMP 4b7528 |
0x4b7502 NOPW %CS:(%RAX,%RAX,1) |
(3333) 0x4b7510 VADDSD (%R14,%RAX,8),%XMM1,%XMM1 |
(3333) 0x4b7516 VMOVSD %XMM1,(%R14,%RAX,8) |
(3333) 0x4b751c INC %RDX |
(3333) 0x4b751f CMP %RBX,%RDX |
(3333) 0x4b7522 JGE 4b7430 |
(3333) 0x4b7528 MOV -0xf0(%RBP),%RAX |
(3333) 0x4b752f MOV (%RAX,%RDX,8),%RAX |
(3333) 0x4b7533 MOV -0xf8(%RBP),%RCX |
(3333) 0x4b753a MOV (%RCX,%RAX,8),%RSI |
(3333) 0x4b753e MOV -0x58(%RBP),%RAX |
(3333) 0x4b7542 LEA (%RSI,%RAX,1),%RCX |
(3333) 0x4b7546 MOV (%RDI,%RCX,8),%RAX |
(3333) 0x4b754a VMULSD (%R10,%RDX,8),%XMM0,%XMM1 |
(3333) 0x4b7550 CMP -0x30(%RBP),%RAX |
(3333) 0x4b7554 JGE 4b7510 |
(3333) 0x4b7556 MOV %R11,(%RDI,%RCX,8) |
(3333) 0x4b755a VMOVSD %XMM1,(%R14,%R11,8) |
(3333) 0x4b7560 MOV -0x90(%RBP),%RAX |
(3333) 0x4b7567 MOV %RSI,(%RAX,%R11,8) |
(3333) 0x4b756b INC %R11 |
(3333) 0x4b756e MOV -0x70(%RBP),%RAX |
(3333) 0x4b7572 MOV 0x8(%RAX,%R9,8),%RBX |
(3333) 0x4b7577 INC %RDX |
(3333) 0x4b757a CMP %RBX,%RDX |
(3333) 0x4b757d JL 4b7528 |
(3332) 0x4b757f JMP 4b7430 |
0x4b7584 ADD $0xf8,%RSP |
0x4b758b POP %RBX |
0x4b758c POP %R12 |
0x4b758e POP %R13 |
0x4b7590 POP %R14 |
0x4b7592 POP %R15 |
0x4b7594 POP %RBP |
0x4b7595 JMP 4dd9d0 |
0x4b759a NOPW (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | hypre_ParMatmul | par_csr_matop.c:829 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:1226 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Source file and lines | par_csr_matop.c:829-995 |
Module | exec |
nb instructions | 140 |
nb uops | 208 |
loop length | 610 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 57 |
micro-operation queue | 52.00 cycles |
front end | 52.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 24.50 | 24.50 | 28.50 | 28.17 | 40.00 | 24.50 | 24.50 | 28.33 |
cycles | 24.50 | 24.50 | 28.50 | 28.17 | 40.00 | 24.50 | 24.50 | 28.33 |
Cycles executing div or sqrt instructions | 30.00-96.00 |
FE+BE cycles | 43.47-96.65 |
Stall cycles | 7.03-60.21 |
ROB full (events) | 0.06-49.22 |
SB full (events) | 7.99-14.00 |
Front-end | 52.00 |
Dispatch | 40.00 |
DIV/SQRT | 30.00-96.00 |
Overall L1 | 52.00-96.00 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
SUB $0xf8,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R9,-0xc8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R8,-0xe0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDX,-0xd8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x90(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x80(%RBP),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RBP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x20(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 4df9d0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4df9c0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
OR %R12,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
JE 4b717c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
IDIV %RCX | 57 | 14.25 | 14.25 | 0 | 0 | 0 | 14.25 | 14.25 | 0 | 42-95 | 24-90 |
JMP 4b7183 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV %R12D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
DIV %ECX | 10 | 2.50 | 2.50 | 0 | 0 | 0 | 2.50 | 2.50 | 0 | 26 | 6 |
LEA 0x1(%RBX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL %RSI,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x1(%RAX),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RBX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %RBX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RDX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RDX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMOVL %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
CMOVL %RSI,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV (%R15),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RAX,8),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%RCX,%RAX,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x58(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
OR %RAX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV $0,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4b7204 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
ADD %RBX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R9,-0x48(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 4dd8f0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RBX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4b7226 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 4b7584 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,-0x98(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 4b7254 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD $0xf8,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
JMP 4dd9d0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
Source file and lines | par_csr_matop.c:829-995 |
Module | exec |
nb instructions | 140 |
nb uops | 208 |
loop length | 610 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 57 |
micro-operation queue | 52.00 cycles |
front end | 52.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 24.50 | 24.50 | 28.50 | 28.17 | 40.00 | 24.50 | 24.50 | 28.33 |
cycles | 24.50 | 24.50 | 28.50 | 28.17 | 40.00 | 24.50 | 24.50 | 28.33 |
Cycles executing div or sqrt instructions | 30.00-96.00 |
FE+BE cycles | 43.47-96.65 |
Stall cycles | 7.03-60.21 |
ROB full (events) | 0.06-49.22 |
SB full (events) | 7.99-14.00 |
Front-end | 52.00 |
Dispatch | 40.00 |
DIV/SQRT | 30.00-96.00 |
Overall L1 | 52.00-96.00 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
SUB $0xf8,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R9,-0xc8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R8,-0xe0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDX,-0xd8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xd8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x90(%RBP),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x80(%RBP),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RBP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x88(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x30(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x20(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 4df9d0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 4df9c0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
OR %R12,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
JE 4b717c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
IDIV %RCX | 57 | 14.25 | 14.25 | 0 | 0 | 0 | 14.25 | 14.25 | 0 | 42-95 | 24-90 |
JMP 4b7183 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV %R12D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
DIV %ECX | 10 | 2.50 | 2.50 | 0 | 0 | 0 | 2.50 | 2.50 | 0 | 26 | 6 |
LEA 0x1(%RBX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
IMUL %RSI,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA 0x1(%RAX),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RBX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %RBX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RDX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RDX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMOVL %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
CMOVL %RSI,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV (%R15),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RAX,8),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%RCX,%RAX,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x58(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RBX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
OR %RAX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV $0,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 4b7204 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
ADD %RBX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R9,-0x48(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 4dd8f0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %RBX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4b7226 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 4b7584 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,-0x98(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
JMP 4b7254 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
ADD $0xf8,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
JMP 4dd9d0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_ParMatmul.extracted.12– | 4.16 | 1.52 |
▼Loop 3331 - par_csr_matop.c:865-989 - exec– | 0.1 | 0.03 |
▼Loop 3332 - par_csr_matop.c:937-989 - exec– | 0.9 | 0.33 |
○Loop 3334 - par_csr_matop.c:946-965 - exec | 3.17 | 1.16 |
○Loop 3333 - par_csr_matop.c:970-989 - exec | 0 | 0 |
▼Loop 3335 - par_csr_matop.c:888-928 - exec– | 0 | 0 |
○Loop 3336 - par_csr_matop.c:917-928 - exec | 0 | 0 |
○Loop 3337 - par_csr_matop.c:897-915 - exec | 0 | 0 |
○Loop 3338 - par_csr_matop.c:858-859 - exec | 0 | 0 |