Loop Id: 1207 | Module: exec | Source: par_lr_interp.c:1494-1545 [...] | Coverage: 0.01% |
---|
Loop Id: 1207 | Module: exec | Source: par_lr_interp.c:1494-1545 [...] | Coverage: 0.01% |
---|
0x45ada0 MOV -0x30(%RBP),%RDX |
0x45ada4 INC %RAX |
0x45ada7 MOV -0xe0(%RBP),%RCX |
0x45adae CMP 0x8(%RCX,%RDX,8),%RAX |
0x45adb3 JGE 45b021 |
0x45adb9 MOV -0x150(%RBP),%RCX |
0x45adc0 MOV (%RCX,%RAX,8),%RDX |
0x45adc4 MOV (%R8,%RDX,8),%RCX |
0x45adc8 TEST %RCX,%RCX |
0x45adcb JS 45ae20 |
0x45adcd CMP %R11,(%R14,%RDX,8) |
0x45add1 JGE 45ada0 |
0x45add3 MOV %R12,(%R14,%RDX,8) |
0x45add7 MOV (%R13,%RDX,8),%RCX |
0x45addc MOV -0x130(%RBP),%RDX |
0x45ade3 MOV (%RDX),%RDX |
0x45ade6 MOV %RCX,(%RDX,%R12,8) |
0x45adea MOV -0xb8(%RBP),%RCX |
0x45adf1 MOV (%RCX),%RCX |
0x45adf4 MOVQ $0,(%RCX,%R12,8) |
0x45adfc INC %R12 |
0x45adff JMP 45ada0 |
0x45ae20 CMP $-0x3,%RCX |
0x45ae24 JE 45ada0 |
0x45ae2a MOV %R9,(%R14,%RDX,8) |
0x45ae2e MOV -0xe0(%RBP),%RSI |
0x45ae35 MOV (%RSI,%RDX,8),%RCX |
0x45ae39 MOV 0x8(%RSI,%RDX,8),%RSI |
0x45ae3e JMP 45ae43 |
(1210) 0x45ae40 INC %RCX |
(1210) 0x45ae43 CMP %RSI,%RCX |
(1210) 0x45ae46 JGE 45aea0 |
(1210) 0x45ae48 MOV -0x150(%RBP),%RBX |
(1210) 0x45ae4f MOV (%RBX,%RCX,8),%RBX |
(1210) 0x45ae53 CMPQ $0,(%R8,%RBX,8) |
(1210) 0x45ae58 JS 45ae40 |
(1210) 0x45ae5a CMP %R11,(%R14,%RBX,8) |
(1210) 0x45ae5e JGE 45ae40 |
(1210) 0x45ae60 MOV %R12,(%R14,%RBX,8) |
(1210) 0x45ae64 MOV (%R13,%RBX,8),%RSI |
(1210) 0x45ae69 MOV -0x130(%RBP),%RBX |
(1210) 0x45ae70 MOV (%RBX),%RBX |
(1210) 0x45ae73 MOV %RSI,(%RBX,%R12,8) |
(1210) 0x45ae77 MOV -0xb8(%RBP),%RSI |
(1210) 0x45ae7e MOV (%RSI),%RSI |
(1210) 0x45ae81 MOVQ $0,(%RSI,%R12,8) |
(1210) 0x45ae89 INC %R12 |
(1210) 0x45ae8c MOV -0xe0(%RBP),%RSI |
(1210) 0x45ae93 MOV 0x8(%RSI,%RDX,8),%RSI |
(1210) 0x45ae98 JMP 45ae40 |
0x45aea0 MOV -0xd0(%RBP),%RCX |
0x45aea7 CMPQ $0x2,(%RCX) |
0x45aeab JL 45ada0 |
0x45aeb1 MOV -0x80(%RBP),%RSI |
0x45aeb5 MOV (%RSI,%RDX,8),%RCX |
0x45aeb9 MOV 0x8(%RSI,%RDX,8),%R13 |
0x45aebe CMP %R13,%RCX |
0x45aec1 JGE 45b004 |
0x45aec7 MOV %R12,-0xc0(%RBP) |
0x45aece MOV %RDI,%R12 |
0x45aed1 MOV -0x120(%RBP),%RDI |
0x45aed8 MOV (%RDI),%R8 |
0x45aedb CMPQ $0,-0x138(%RBP) |
0x45aee3 JNE 45af0c |
0x45aee5 MOV %R12,%RDI |
0x45aee8 MOV -0xc0(%RBP),%R12 |
0x45aeef JMP 45afb8 |
(1208) 0x45af00 INC %RCX |
(1208) 0x45af03 CMP %R13,%RCX |
(1208) 0x45af06 JGE 45afe0 |
(1208) 0x45af0c MOV -0x100(%RBP),%RBX |
(1208) 0x45af13 MOV (%RBX,%RCX,8),%RBX |
(1208) 0x45af17 MOV -0x138(%RBP),%RDI |
(1208) 0x45af1e MOV (%RDI,%RBX,8),%RBX |
(1208) 0x45af22 CMPQ $0,(%R8,%RBX,8) |
(1208) 0x45af27 JS 45af00 |
(1208) 0x45af29 MOV -0x38(%RBP),%RDI |
(1208) 0x45af2d CMP %R15,(%RDI,%RBX,8) |
(1208) 0x45af31 JGE 45af00 |
(1208) 0x45af33 MOV %R12,(%RDI,%RBX,8) |
(1208) 0x45af37 MOV -0x128(%RBP),%RSI |
(1208) 0x45af3e MOV (%RSI),%RSI |
(1208) 0x45af41 MOV %RBX,(%RSI,%R12,8) |
(1208) 0x45af45 MOV -0x58(%RBP),%RSI |
(1208) 0x45af49 MOV (%RSI),%RSI |
(1208) 0x45af4c MOVQ $0,(%RSI,%R12,8) |
(1208) 0x45af54 INC %R12 |
(1208) 0x45af57 MOV -0x80(%RBP),%RSI |
(1208) 0x45af5b MOV 0x8(%RSI,%RDX,8),%R13 |
(1208) 0x45af60 JMP 45af00 |
(1209) 0x45af80 MOV %RSI,(%RDI,%RBX,8) |
(1209) 0x45af84 MOV %RSI,%RDI |
(1209) 0x45af87 MOV -0x128(%RBP),%RSI |
(1209) 0x45af8e MOV (%RSI),%RSI |
(1209) 0x45af91 MOV %RBX,(%RSI,%RDI,8) |
(1209) 0x45af95 MOV -0x58(%RBP),%RSI |
(1209) 0x45af99 MOV (%RSI),%RSI |
(1209) 0x45af9c MOVQ $0,(%RSI,%RDI,8) |
(1209) 0x45afa4 INC %RDI |
(1209) 0x45afa7 MOV -0x80(%RBP),%RSI |
(1209) 0x45afab MOV 0x8(%RSI,%RDX,8),%R13 |
(1209) 0x45afb0 INC %RCX |
(1209) 0x45afb3 CMP %R13,%RCX |
(1209) 0x45afb6 JGE 45b000 |
(1209) 0x45afb8 MOV -0x100(%RBP),%RBX |
(1209) 0x45afbf MOV (%RBX,%RCX,8),%RBX |
(1209) 0x45afc3 CMPQ $0,(%R8,%RBX,8) |
(1209) 0x45afc8 JS 45afb0 |
(1209) 0x45afca MOV %RDI,%RSI |
(1209) 0x45afcd MOV -0x38(%RBP),%RDI |
(1209) 0x45afd1 CMP %R15,(%RDI,%RBX,8) |
(1209) 0x45afd5 JL 45af80 |
(1209) 0x45afd7 MOV %RSI,%RDI |
(1209) 0x45afda JMP 45afb0 |
0x45afe0 MOV -0x40(%RBP),%R8 |
0x45afe4 MOV -0x30(%RBP),%RDX |
0x45afe8 MOV %R12,%RDI |
0x45afeb MOV -0xc0(%RBP),%R12 |
0x45aff2 JMP 45b008 |
0x45b000 MOV -0x40(%RBP),%R8 |
0x45b004 MOV -0x30(%RBP),%RDX |
0x45b008 MOV -0x50(%RBP),%R13 |
0x45b00c INC %RAX |
0x45b00f MOV -0xe0(%RBP),%RCX |
0x45b016 CMP 0x8(%RCX,%RDX,8),%RAX |
0x45b01b JL 45adb9 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1494 - 1545 |
-------------------------------------------------------------------------------- |
1494: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1495: { |
1496: i1 = S_diag_j[jj]; |
[...] |
1503: if (CF_marker[i1] >= 0) |
1504: { |
1505: if (P_marker[i1] < jj_begin_row) |
1506: { |
1507: P_marker[i1] = jj_counter; |
1508: P_diag_j[jj_counter] = fine_to_coarse[i1]; |
1509: P_diag_data[jj_counter] = zero; |
1510: jj_counter++; |
1511: } |
1512: } |
1513: else if (CF_marker[i1] != -3) |
1514: { |
1515: P_marker[i1] = strong_f_marker; |
1516: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1517: { |
1518: k1 = S_diag_j[kk]; |
1519: if (CF_marker[k1] >= 0) |
1520: { |
1521: if(P_marker[k1] < jj_begin_row) |
1522: { |
1523: P_marker[k1] = jj_counter; |
1524: P_diag_j[jj_counter] = fine_to_coarse[k1]; |
1525: P_diag_data[jj_counter] = zero; |
1526: jj_counter++; |
1527: } |
1528: } |
1529: } |
1530: if(num_procs > 1) |
1531: { |
1532: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1533: { |
1534: if(col_offd_S_to_A) |
1535: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1536: else |
1537: k1 = S_offd_j[kk]; |
1538: if(CF_marker_offd[k1] >= 0) |
1539: { |
1540: if(P_marker_offd[k1] < jj_begin_row_offd) |
1541: { |
1542: P_marker_offd[k1] = jj_counter_offd; |
1543: P_offd_j[jj_counter_offd] = k1; |
1544: P_offd_data[jj_counter_offd] = zero; |
1545: jj_counter_offd++; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | hypre_BoomerAMGBuildExtPIInter[...] | par_lr_interp.c:1196 | exec |
○ | hypre_BoomerAMGSetup | par_amg_setup.c:847 | exec |
○ | hypre_PCGSetup | pcg.c:234 | exec |
○ | main | amg.c:398 | exec |
○ | __libc_init_first | libc.so.6 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.22 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.07 |
Bottlenecks | P2, P3, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1494-1545 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 16.00 |
CQA cycles if no scalar integer | 16.00 |
CQA cycles if FP arith vectorized | 16.00 |
CQA cycles if fully vectorized | 1.13 |
Front-end cycles | 15.00 |
DIV/SQRT cycles | 6.00 |
P0 cycles | 5.00 |
P1 cycles | 16.00 |
P2 cycles | 16.00 |
P3 cycles | 5.00 |
P4 cycles | 5.00 |
P5 cycles | 6.00 |
P6 cycles | 5.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 16.19 |
Stall cycles (UFS) | 0.97 |
Nb insns | 58.00 |
Nb uops | 57.00 |
Nb loads | 32.00 |
Nb stores | 5.00 |
Nb stack references | 12.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 18.50 |
Bytes prefetched | 0.00 |
Bytes loaded | 256.00 |
Bytes stored | 40.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 11.98 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 11.25 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.22 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.07 |
Bottlenecks | P2, P3, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1494-1545 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 16.00 |
CQA cycles if no scalar integer | 16.00 |
CQA cycles if FP arith vectorized | 16.00 |
CQA cycles if fully vectorized | 1.13 |
Front-end cycles | 15.00 |
DIV/SQRT cycles | 6.00 |
P0 cycles | 5.00 |
P1 cycles | 16.00 |
P2 cycles | 16.00 |
P3 cycles | 5.00 |
P4 cycles | 5.00 |
P5 cycles | 6.00 |
P6 cycles | 5.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 16.19 |
Stall cycles (UFS) | 0.97 |
Nb insns | 58.00 |
Nb uops | 57.00 |
Nb loads | 32.00 |
Nb stores | 5.00 |
Nb stack references | 12.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 18.50 |
Bytes prefetched | 0.00 |
Bytes loaded | 256.00 |
Bytes stored | 40.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 11.98 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 11.25 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1494-1545 |
Module | exec |
nb instructions | 58 |
nb uops | 57 |
loop length | 266 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 12 |
micro-operation queue | 15.00 cycles |
front end | 15.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 6.00 | 5.00 | 16.00 | 16.00 | 5.00 | 5.00 | 6.00 | 5.00 |
cycles | 6.00 | 5.00 | 16.00 | 16.00 | 5.00 | 5.00 | 6.00 | 5.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 16.19 |
Stall cycles | 0.97 |
LM full (events) | 2.91 |
Front-end | 15.00 |
Dispatch | 16.00 |
Overall L1 | 16.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 12% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP 0x8(%RCX,%RDX,8),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 45b021 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x150(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RAX,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R8,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JS 45ae20 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %R11,(%R14,%RDX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 45ada0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,(%R14,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x130(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,(%RDX,%R12,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0xb8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVQ $0,(%RCX,%R12,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 |
INC %R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JMP 45ada0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
CMP $-0x3,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 45ada0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R9,(%R14,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0xe0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RSI,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 45ae43 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMPQ $0x2,(%RCX) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JL 45ada0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RSI,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RSI,%RDX,8),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R13,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 45b004 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,-0xc0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x120(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMPQ $0,-0x138(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 45af0c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0xc0(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 45afb8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0xc0(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 45b008 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x50(%RBP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP 0x8(%RCX,%RDX,8),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JL 45adb9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1494-1545 |
Module | exec |
nb instructions | 58 |
nb uops | 57 |
loop length | 266 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 12 |
micro-operation queue | 15.00 cycles |
front end | 15.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 6.00 | 5.00 | 16.00 | 16.00 | 5.00 | 5.00 | 6.00 | 5.00 |
cycles | 6.00 | 5.00 | 16.00 | 16.00 | 5.00 | 5.00 | 6.00 | 5.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 16.19 |
Stall cycles | 0.97 |
LM full (events) | 2.91 |
Front-end | 15.00 |
Dispatch | 16.00 |
Overall L1 | 16.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 12% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP 0x8(%RCX,%RDX,8),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 45b021 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x150(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX,%RAX,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R8,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JS 45ae20 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP %R11,(%R14,%RDX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JGE 45ada0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,(%R14,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV (%R13,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x130(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,(%RDX,%R12,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0xb8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOVQ $0,(%RCX,%R12,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 |
INC %R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JMP 45ada0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
CMP $-0x3,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 45ada0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R9,(%R14,%RDX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0xe0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RSI,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 45ae43 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMPQ $0x2,(%RCX) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JL 45ada0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RSI,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RSI,%RDX,8),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R13,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 45b004 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,-0xc0(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0x120(%RBP),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMPQ $0,-0x138(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 45af0c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0xc0(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 45afb8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV -0xc0(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 45b008 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV -0x40(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV -0x50(%RBP),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV -0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP 0x8(%RCX,%RDX,8),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JL 45adb9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |