Loop Id: 3112 | Module: exec | Source: csr_matvec.c:334-341 | Coverage: 1.95% |
---|
Loop Id: 3112 | Module: exec | Source: csr_matvec.c:334-341 | Coverage: 1.95% |
---|
0x5a21f0 MOV 0x28(%RSP),%RAX |
0x5a21f5 MOV (%R8,%R12,8),%RDX |
0x5a21f9 MOV 0x8(%R8,%R12,8),%R11 |
0x5a21fe VMOVSD (%RAX,%R12,8),%XMM2 |
0x5a2204 CMP %R11,%RDX |
0x5a2207 JGE 5a251f |
0x5a220d MOV %R11,%RSI |
0x5a2210 MOV %RDX,%R15 |
0x5a2213 SUB %RDX,%RSI |
0x5a2216 LEA -0x1(%RSI),%RCX |
0x5a221a CMP $0x6,%RCX |
0x5a221e JBE 5a2c1b |
0x5a2224 MOV %RSI,%R10 |
0x5a2227 LEA (,%RDX,8),%RCX |
0x5a222f VXORPD %XMM0,%XMM0,%XMM0 |
0x5a2233 XOR %EAX,%EAX |
0x5a2235 SHR $0x3,%R10 |
0x5a2239 LEA (%R14,%RCX,1),%R9 |
0x5a223d ADD %R13,%RCX |
0x5a2240 SAL $0x6,%R10 |
0x5a2244 LEA -0x40(%R10),%RDI |
0x5a2248 SHR $0x6,%RDI |
0x5a224c INC %RDI |
0x5a224f AND $0x7,%EDI |
0x5a2252 JE 5a235b |
0x5a2258 CMP $0x1,%RDI |
0x5a225c JE 5a2335 |
0x5a2262 CMP $0x2,%RDI |
0x5a2266 JE 5a2318 |
0x5a226c CMP $0x3,%RDI |
0x5a2270 JE 5a22fb |
0x5a2276 CMP $0x4,%RDI |
0x5a227a JE 5a22de |
0x5a227c CMP $0x5,%RDI |
0x5a2280 JE 5a22c1 |
0x5a2282 CMP $0x6,%RDI |
0x5a2286 JE 5a22a4 |
0x5a2288 VMOVDQU64 (%RCX),%ZMM15 |
0x5a228e KMOVB %K0,%K5 |
0x5a2292 MOV $0x40,%EAX |
0x5a2297 VGATHERQPD (%RBX,%ZMM15,8),%ZMM6{%K5} |
0x5a229e VFMADD231PD (%R9),%ZMM6,%ZMM0 |
0x5a22a4 VMOVDQU64 (%RCX,%RAX,1),%ZMM7 |
0x5a22ab KMOVB %K0,%K6 |
0x5a22af VGATHERQPD (%RBX,%ZMM7,8),%ZMM10{%K6} |
0x5a22b6 VFMADD231PD (%R9,%RAX,1),%ZMM10,%ZMM0 |
0x5a22bd ADD $0x40,%RAX |
0x5a22c1 VMOVDQU64 (%RCX,%RAX,1),%ZMM11 |
0x5a22c8 KMOVB %K0,%K3 |
0x5a22cc VGATHERQPD (%RBX,%ZMM11,8),%ZMM12{%K3} |
0x5a22d3 VFMADD231PD (%R9,%RAX,1),%ZMM12,%ZMM0 |
0x5a22da ADD $0x40,%RAX |
0x5a22de VMOVDQU64 (%RCX,%RAX,1),%ZMM4 |
0x5a22e5 KMOVB %K0,%K7 |
0x5a22e9 VGATHERQPD (%RBX,%ZMM4,8),%ZMM9{%K7} |
0x5a22f0 VFMADD231PD (%R9,%RAX,1),%ZMM9,%ZMM0 |
0x5a22f7 ADD $0x40,%RAX |
0x5a22fb VMOVDQU64 (%RCX,%RAX,1),%ZMM13 |
0x5a2302 KMOVB %K0,%K4 |
0x5a2306 VGATHERQPD (%RBX,%ZMM13,8),%ZMM3{%K4} |
0x5a230d VFMADD231PD (%R9,%RAX,1),%ZMM3,%ZMM0 |
0x5a2314 ADD $0x40,%RAX |
0x5a2318 VMOVDQU64 (%RCX,%RAX,1),%ZMM5 |
0x5a231f KMOVB %K0,%K2 |
0x5a2323 VGATHERQPD (%RBX,%ZMM5,8),%ZMM1{%K2} |
0x5a232a VFMADD231PD (%R9,%RAX,1),%ZMM1,%ZMM0 |
0x5a2331 ADD $0x40,%RAX |
0x5a2335 VMOVDQU64 (%RCX,%RAX,1),%ZMM8 |
0x5a233c KMOVB %K0,%K1 |
0x5a2340 VGATHERQPD (%RBX,%ZMM8,8),%ZMM14{%K1} |
0x5a2347 VFMADD231PD (%R9,%RAX,1),%ZMM14,%ZMM0 |
0x5a234e ADD $0x40,%RAX |
0x5a2352 CMP %RAX,%R10 |
0x5a2355 JE 5a2440 |
(3113) 0x5a235b VMOVDQU64 (%RCX,%RAX,1),%ZMM15 |
(3113) 0x5a2362 KMOVB %K0,%K5 |
(3113) 0x5a2366 VMOVDQU64 0x40(%RCX,%RAX,1),%ZMM7 |
(3113) 0x5a236e KMOVB %K0,%K6 |
(3113) 0x5a2372 VMOVDQU64 0x80(%RCX,%RAX,1),%ZMM11 |
(3113) 0x5a237a KMOVB %K0,%K3 |
(3113) 0x5a237e VMOVDQU64 0xc0(%RCX,%RAX,1),%ZMM4 |
(3113) 0x5a2386 KMOVB %K0,%K7 |
(3113) 0x5a238a VGATHERQPD (%RBX,%ZMM15,8),%ZMM6{%K5} |
(3113) 0x5a2391 VGATHERQPD (%RBX,%ZMM7,8),%ZMM10{%K6} |
(3113) 0x5a2398 VMOVDQU64 0x100(%RCX,%RAX,1),%ZMM9 |
(3113) 0x5a23a0 KMOVB %K0,%K4 |
(3113) 0x5a23a4 VFMADD231PD (%R9,%RAX,1),%ZMM6,%ZMM0 |
(3113) 0x5a23ab VGATHERQPD (%RBX,%ZMM11,8),%ZMM12{%K3} |
(3113) 0x5a23b2 VMOVDQU64 0x140(%RCX,%RAX,1),%ZMM3 |
(3113) 0x5a23ba KMOVB %K0,%K2 |
(3113) 0x5a23be VGATHERQPD (%RBX,%ZMM9,8),%ZMM13{%K4} |
(3113) 0x5a23c5 VMOVDQU64 0x180(%RCX,%RAX,1),%ZMM5 |
(3113) 0x5a23cd KMOVB %K0,%K1 |
(3113) 0x5a23d1 VMOVDQU64 0x1c0(%RCX,%RAX,1),%ZMM14 |
(3113) 0x5a23d9 VGATHERQPD (%RBX,%ZMM3,8),%ZMM8{%K2} |
(3113) 0x5a23e0 KMOVB %K0,%K5 |
(3113) 0x5a23e4 VGATHERQPD (%RBX,%ZMM5,8),%ZMM1{%K1} |
(3113) 0x5a23eb VFMADD231PD 0x40(%R9,%RAX,1),%ZMM10,%ZMM0 |
(3113) 0x5a23f3 VFMADD132PD 0x80(%R9,%RAX,1),%ZMM0,%ZMM12 |
(3113) 0x5a23fb VGATHERQPD (%RBX,%ZMM4,8),%ZMM0{%K7} |
(3113) 0x5a2402 VFMADD132PD 0xc0(%R9,%RAX,1),%ZMM12,%ZMM0 |
(3113) 0x5a240a VFMADD132PD 0x100(%R9,%RAX,1),%ZMM0,%ZMM13 |
(3113) 0x5a2412 VGATHERQPD (%RBX,%ZMM14,8),%ZMM0{%K5} |
(3113) 0x5a2419 VFMADD132PD 0x140(%R9,%RAX,1),%ZMM13,%ZMM8 |
(3113) 0x5a2421 VFMADD132PD 0x180(%R9,%RAX,1),%ZMM8,%ZMM1 |
(3113) 0x5a2429 VFMADD132PD 0x1c0(%R9,%RAX,1),%ZMM1,%ZMM0 |
(3113) 0x5a2431 ADD $0x200,%RAX |
(3113) 0x5a2437 CMP %RAX,%R10 |
(3113) 0x5a243a JNE 5a235b |
0x5a2440 VEXTRACTF64X4 $0x1,%ZMM0,%YMM15 |
0x5a2447 MOV %RSI,%R9 |
0x5a244a VADDPD %YMM0,%YMM15,%YMM6 |
0x5a244e AND $-0x8,%R9 |
0x5a2452 VADDPD %YMM15,%YMM0,%YMM14 |
0x5a2457 ADD %R9,%RDX |
0x5a245a VEXTRACTF64X2 $0x1,%YMM6,%XMM7 |
0x5a2461 VADDPD %XMM6,%XMM7,%XMM10 |
0x5a2465 VUNPCKHPD %XMM10,%XMM10,%XMM11 |
0x5a246a VADDPD %XMM10,%XMM11,%XMM12 |
0x5a246f VADDSD %XMM12,%XMM2,%XMM8 |
0x5a2474 TEST $0x7,%SIL |
0x5a2478 JE 5a253d |
0x5a247e SUB %R9,%RSI |
0x5a2481 LEA -0x1(%RSI),%RCX |
0x5a2485 CMP $0x2,%RCX |
0x5a2489 JBE 5a2c6c |
0x5a248f ADD %R15,%R9 |
0x5a2492 KMOVB %K0,%K6 |
0x5a2496 MOV %RSI,%R15 |
0x5a2499 VMOVDQU (%R13,%R9,8),%YMM4 |
0x5a24a0 AND $-0x4,%R15 |
0x5a24a4 ADD %R15,%RDX |
0x5a24a7 AND $0x3,%ESI |
0x5a24aa VGATHERQPD (%RBX,%YMM4,8),%YMM9{%K6} |
0x5a24b1 VFMADD231PD (%R14,%R9,8),%YMM9,%YMM14 |
0x5a24b7 VEXTRACTF64X2 $0x1,%YMM14,%XMM13 |
0x5a24be VADDPD %XMM14,%XMM13,%XMM3 |
0x5a24c3 VUNPCKHPD %XMM3,%XMM3,%XMM8 |
0x5a24c7 VADDPD %XMM3,%XMM8,%XMM5 |
0x5a24cb VADDSD %XMM5,%XMM2,%XMM2 |
0x5a24cf JE 5a251f |
0x5a24d1 MOV (%R13,%RDX,8),%R9 |
0x5a24d6 LEA 0x1(%RDX),%R10 |
0x5a24da LEA (,%RDX,8),%RSI |
0x5a24e2 VMOVSD (%RBX,%R9,8),%XMM1 |
0x5a24e8 VFMADD231SD (%R14,%RDX,8),%XMM1,%XMM2 |
0x5a24ee CMP %R10,%R11 |
0x5a24f1 JLE 5a251f |
0x5a24f3 MOV 0x8(%R13,%RSI,1),%RDI |
0x5a24f8 ADD $0x2,%RDX |
0x5a24fc VMOVSD (%RBX,%RDI,8),%XMM14 |
0x5a2501 VFMADD231SD 0x8(%R14,%RSI,1),%XMM14,%XMM2 |
0x5a2508 CMP %R11,%RDX |
0x5a250b JGE 5a251f |
0x5a250d MOV 0x10(%R13,%RSI,1),%RDX |
0x5a2512 VMOVSD 0x10(%R14,%RSI,1),%XMM0 |
0x5a2519 VFMADD231SD (%RBX,%RDX,8),%XMM0,%XMM2 |
0x5a251f MOV 0x30(%RSP),%R11 |
0x5a2524 VMOVSD %XMM2,(%R11,%R12,8) |
0x5a252a INC %R12 |
0x5a252d CMP %R12,0x38(%RSP) |
0x5a2532 JNE 5a21f0 |
0x5a253d VMOVSD %XMM8,%XMM8,%XMM2 |
0x5a2541 JMP 5a251f |
0x5a2c1b VMOVSD %XMM2,%XMM2,%XMM8 |
0x5a2c1f VXORPD %XMM14,%XMM14,%XMM14 |
0x5a2c24 XOR %R9D,%R9D |
0x5a2c27 JMP 5a247e |
0x5a2c6c VMOVSD %XMM8,%XMM8,%XMM2 |
0x5a2c70 JMP 5a24d1 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/seq_mv/csr_matvec.c: 334 - 341 |
-------------------------------------------------------------------------------- |
334: for (i = iBegin; i < iEnd; i++) |
335: { |
336: tempx = b_data[i]; |
337: for (jj = A_i[i]; jj < A_i[i+1]; jj++) |
338: { |
339: tempx += A_data[jj] * x_data[A_j[jj]]; |
340: } |
341: y_data[i] = tempx; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.08 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.11 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | P2, P3, |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source | csr_matvec.c:334-341 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 45.50 |
CQA cycles if no scalar integer | 42.00 |
CQA cycles if FP arith vectorized | 45.50 |
CQA cycles if fully vectorized | 40.94 |
Front-end cycles | 42.25 |
DIV/SQRT cycles | 28.50 |
P0 cycles | 28.50 |
P1 cycles | 45.50 |
P2 cycles | 45.50 |
P3 cycles | 1.00 |
P4 cycles | 28.50 |
P5 cycles | 28.50 |
P6 cycles | 1.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 82.68 |
Stall cycles (UFS) | 43.88 |
Nb insns | 135.00 |
Nb uops | 159.00 |
Nb loads | 39.00 |
Nb stores | 1.00 |
Nb stack references | 3.00 |
FLOP/cycle | 3.16 |
Nb FLOP add-sub | 18.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 63.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.46 |
Bytes prefetched | 0.00 |
Bytes loaded | 1560.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 53.85 |
Vectorization ratio load | 77.42 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 75.00 |
Vectorization ratio fma | 72.73 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 39.39 |
Vector-efficiency ratio all | 45.77 |
Vector-efficiency ratio load | 75.40 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 28.13 |
Vector-efficiency ratio fma | 71.59 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 34.85 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.08 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.11 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | P2, P3, |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source | csr_matvec.c:334-341 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 45.50 |
CQA cycles if no scalar integer | 42.00 |
CQA cycles if FP arith vectorized | 45.50 |
CQA cycles if fully vectorized | 40.94 |
Front-end cycles | 42.25 |
DIV/SQRT cycles | 28.50 |
P0 cycles | 28.50 |
P1 cycles | 45.50 |
P2 cycles | 45.50 |
P3 cycles | 1.00 |
P4 cycles | 28.50 |
P5 cycles | 28.50 |
P6 cycles | 1.00 |
P7 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 82.68 |
Stall cycles (UFS) | 43.88 |
Nb insns | 135.00 |
Nb uops | 159.00 |
Nb loads | 39.00 |
Nb stores | 1.00 |
Nb stack references | 3.00 |
FLOP/cycle | 3.16 |
Nb FLOP add-sub | 18.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 63.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.46 |
Bytes prefetched | 0.00 |
Bytes loaded | 1560.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 53.85 |
Vectorization ratio load | 77.42 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 75.00 |
Vectorization ratio fma | 72.73 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 39.39 |
Vector-efficiency ratio all | 45.77 |
Vector-efficiency ratio load | 75.40 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 28.13 |
Vector-efficiency ratio fma | 71.59 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 34.85 |
Path / |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source file and lines | csr_matvec.c:334-341 |
Module | exec |
nb instructions | 135 |
nb uops | 159 |
loop length | 643 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 13 |
used ymm registers | 6 |
used zmm registers | 15 |
nb stack references | 3 |
micro-operation queue | 42.25 cycles |
front end | 42.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 28.50 | 28.50 | 45.50 | 45.50 | 1.00 | 28.50 | 28.50 | 1.00 |
cycles | 28.50 | 28.50 | 45.50 | 45.50 | 1.00 | 28.50 | 28.50 | 1.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 82.68 |
Stall cycles | 43.88 |
ROB full (events) | 52.16 |
Front-end | 42.25 |
Dispatch | 45.50 |
Overall L1 | 45.50 |
all | 34% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 64% |
load | 69% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 75% |
fma | 72% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 72% |
all | 53% |
load | 77% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 75% |
fma | 72% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 39% |
all | 40% |
load | 93% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 48% |
load | 69% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | 71% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 53% |
all | 45% |
load | 75% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | 71% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 34% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R8,%R12,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%R8,%R12,8),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RAX,%R12,8),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R11,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 5a251f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x6,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JBE 5a2c1b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (,%RDX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SHR $0x3,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
LEA (%R14,%RCX,1),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SAL $0x6,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
LEA -0x40(%R10),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
SHR $0x6,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
INC %RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x7,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a235b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x1,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a2335 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x2,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a2318 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x3,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a22fb | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a22de | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x5,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a22c1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x6,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a22a4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVDQU64 (%RCX),%ZMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV $0x40,%EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VGATHERQPD (%RBX,%ZMM15,8),%ZMM6{%K5} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9),%ZMM6,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM7,8),%ZMM10{%K6} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM10,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM11,8),%ZMM12{%K3} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM12,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM4,8),%ZMM9{%K7} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM9,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM13,8),%ZMM3{%K4} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM3,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM5,8),%ZMM1{%K2} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM1,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM8,8),%ZMM14{%K1} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM14,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RAX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a2440 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VEXTRACTF64X4 $0x1,%ZMM0,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VADDPD %YMM0,%YMM15,%YMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VADDPD %YMM15,%YMM0,%YMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VEXTRACTF64X2 $0x1,%YMM6,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM6,%XMM7,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM10,%XMM10,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD %XMM10,%XMM11,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM12,%XMM2,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST $0x7,%SIL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a253d | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
SUB %R9,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JBE 5a2c6c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
ADD %R15,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
KMOVB %K0,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVDQU (%R13,%R9,8),%YMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
AND $-0x4,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R15,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x3,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VGATHERQPD (%RBX,%YMM4,8),%YMM9{%K6} | 4 | 1 | 0 | 2 | 2 | 0 | 1 | 0 | 0 | 20 | 4 |
VFMADD231PD (%R14,%R9,8),%YMM9,%YMM14 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VEXTRACTF64X2 $0x1,%YMM14,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM14,%XMM13,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM3,%XMM3,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD %XMM3,%XMM8,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM5,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JE 5a251f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R13,%RDX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x1(%RDX),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDX,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RBX,%R9,8),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD (%R14,%RDX,8),%XMM1,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R10,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a251f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x8(%R13,%RSI,1),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD $0x2,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RBX,%RDI,8),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD 0x8(%R14,%RSI,1),%XMM14,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R11,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 5a251f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x10(%R13,%RSI,1),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%R14,%RSI,1),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD (%RBX,%RDX,8),%XMM0,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x30(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD %XMM2,(%R11,%R12,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
INC %R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R12,0x38(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 5a21f0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVSD %XMM8,%XMM8,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
JMP 5a251f | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
VMOVSD %XMM2,%XMM2,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VXORPD %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 5a247e | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
VMOVSD %XMM8,%XMM8,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
JMP 5a24d1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
Function | hypre_CSRMatrixMatvecOutOfPlace._omp_fn.6 |
Source file and lines | csr_matvec.c:334-341 |
Module | exec |
nb instructions | 135 |
nb uops | 159 |
loop length | 643 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 13 |
used ymm registers | 6 |
used zmm registers | 15 |
nb stack references | 3 |
micro-operation queue | 42.25 cycles |
front end | 42.25 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 28.50 | 28.50 | 45.50 | 45.50 | 1.00 | 28.50 | 28.50 | 1.00 |
cycles | 28.50 | 28.50 | 45.50 | 45.50 | 1.00 | 28.50 | 28.50 | 1.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 82.68 |
Stall cycles | 43.88 |
ROB full (events) | 52.16 |
Front-end | 42.25 |
Dispatch | 45.50 |
Overall L1 | 45.50 |
all | 34% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 64% |
load | 69% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 75% |
fma | 72% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 72% |
all | 53% |
load | 77% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 75% |
fma | 72% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 39% |
all | 40% |
load | 93% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 48% |
load | 69% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | 71% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 53% |
all | 45% |
load | 75% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 28% |
fma | 71% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 34% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%R8,%R12,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%R8,%R12,8),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD (%RAX,%R12,8),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CMP %R11,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 5a251f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %R11,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SUB %RDX,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x6,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JBE 5a2c1b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV %RSI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (,%RDX,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
SHR $0x3,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
LEA (%R14,%RCX,1),%R9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R13,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SAL $0x6,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
LEA -0x40(%R10),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
SHR $0x6,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
INC %RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x7,%EDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a235b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x1,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a2335 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x2,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a2318 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x3,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a22fb | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x4,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a22de | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x5,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a22c1 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
CMP $0x6,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a22a4 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVDQU64 (%RCX),%ZMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K5 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV $0x40,%EAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VGATHERQPD (%RBX,%ZMM15,8),%ZMM6{%K5} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9),%ZMM6,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM7 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM7,8),%ZMM10{%K6} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM10,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM11,8),%ZMM12{%K3} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM12,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM4,8),%ZMM9{%K7} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM9,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K4 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM13,8),%ZMM3{%K4} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM3,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM5,8),%ZMM1{%K2} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM1,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVDQU64 (%RCX,%RAX,1),%ZMM8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
KMOVB %K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VGATHERQPD (%RBX,%ZMM8,8),%ZMM14{%K1} | 4 | 1 | 0 | 4 | 4 | 0 | 1 | 0 | 0 | 21 | 5 |
VFMADD231PD (%R9,%RAX,1),%ZMM14,%ZMM0 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RAX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a2440 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VEXTRACTF64X4 $0x1,%ZMM0,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VADDPD %YMM0,%YMM15,%YMM6 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VADDPD %YMM15,%YMM0,%YMM14 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
ADD %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VEXTRACTF64X2 $0x1,%YMM6,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM6,%XMM7,%XMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM10,%XMM10,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD %XMM10,%XMM11,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM12,%XMM2,%XMM8 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
TEST $0x7,%SIL | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JE 5a253d | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
SUB %R9,%RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x2,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JBE 5a2c6c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
ADD %R15,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
KMOVB %K0,%K6 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %RSI,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVDQU (%R13,%R9,8),%YMM4 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
AND $-0x4,%R15 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R15,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
AND $0x3,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VGATHERQPD (%RBX,%YMM4,8),%YMM9{%K6} | 4 | 1 | 0 | 2 | 2 | 0 | 1 | 0 | 0 | 20 | 4 |
VFMADD231PD (%R14,%R9,8),%YMM9,%YMM14 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VEXTRACTF64X2 $0x1,%YMM14,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 3 | 1 |
VADDPD %XMM14,%XMM13,%XMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUNPCKHPD %XMM3,%XMM3,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VADDPD %XMM3,%XMM8,%XMM5 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VADDSD %XMM5,%XMM2,%XMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JE 5a251f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV (%R13,%RDX,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
LEA 0x1(%RDX),%R10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (,%RDX,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD (%RBX,%R9,8),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD (%R14,%RDX,8),%XMM1,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R10,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 5a251f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x8(%R13,%RSI,1),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD $0x2,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
VMOVSD (%RBX,%RDI,8),%XMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD 0x8(%R14,%RSI,1),%XMM14,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R11,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JGE 5a251f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x10(%R13,%RSI,1),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0x10(%R14,%RSI,1),%XMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VFMADD231SD (%RBX,%RDX,8),%XMM0,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x30(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD %XMM2,(%R11,%R12,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
INC %R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %R12,0x38(%RSP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
JNE 5a21f0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
VMOVSD %XMM8,%XMM8,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
JMP 5a251f | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
VMOVSD %XMM2,%XMM2,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
VXORPD %XMM14,%XMM14,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 5a247e | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
VMOVSD %XMM8,%XMM8,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 |
JMP 5a24d1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |