Function: hypre_BoomerAMGBuildMultipass._omp_fn.9 | Module: exec | Source: par_multi_interp.c:1575-1663 [...] | Coverage: 0.61% |
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Function: hypre_BoomerAMGBuildMultipass._omp_fn.9 | Module: exec | Source: par_multi_interp.c:1575-1663 [...] | Coverage: 0.61% |
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/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1575 - 1663 |
-------------------------------------------------------------------------------- |
1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa) |
[...] |
1584: tmp_marker = NULL; |
1585: if (n_fine) |
1586: { tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); } |
1587: tmp_marker_offd = NULL; |
1588: if (num_cols_offd) |
1589: { tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1590: for (i=0; i < n_fine; i++) |
1591: { tmp_marker[i] = -1; } |
1592: for (i=0; i < num_cols_offd; i++) |
1593: { tmp_marker_offd[i] = -1; } |
1594: |
1595: /* Compute this thread's range of pass_length */ |
1596: my_thread_num = hypre_GetThreadNum(); |
1597: num_threads = hypre_NumActiveThreads(); |
1598: thread_start = pass_pointer[1] + (pass_length/num_threads)*my_thread_num; |
1599: if (my_thread_num == num_threads-1) |
1600: { thread_stop = pass_pointer[1] + pass_length; } |
1601: else |
1602: { thread_stop = pass_pointer[1] + (pass_length/num_threads)*(my_thread_num+1); } |
1603: |
1604: /* determine P for points of pass 1, i.e. neighbors of coarse points */ |
1605: for (i=thread_start; i < thread_stop; i++) |
1606: { |
1607: i1 = pass_array[i]; |
1608: sum_C = 0; |
1609: sum_N = 0; |
1610: j_start = P_diag_start[i1]; |
1611: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1612: for (j=j_start; j < j_end; j++) |
1613: { |
1614: k1 = P_diag_pass[1][j]; |
1615: tmp_marker[C_array[k1]] = i1; |
1616: } |
1617: cnt = P_diag_i[i1]; |
1618: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1619: { |
1620: j1 = A_diag_j[j]; |
1621: if (CF_marker[j1] != -3 && |
1622: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1623: sum_N += A_diag_data[j]; |
1624: if (j1 != -1 && tmp_marker[j1] == i1) |
1625: { |
1626: P_diag_data[cnt] = A_diag_data[j]; |
1627: P_diag_j[cnt++] = fine_to_coarse[j1]; |
1628: sum_C += A_diag_data[j]; |
1629: } |
1630: } |
1631: j_start = P_offd_start[i1]; |
1632: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1633: for (j=j_start; j < j_end; j++) |
1634: { |
1635: k1 = P_offd_pass[1][j]; |
1636: tmp_marker_offd[C_array_offd[k1]] = i1; |
1637: } |
1638: cnt_offd = P_offd_i[i1]; |
1639: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1640: { |
1641: if (col_offd_S_to_A) |
1642: j1 = map_A_to_S[A_offd_j[j]]; |
1643: else |
1644: j1 = A_offd_j[j]; |
1645: if (CF_marker_offd[j1] != -3 && |
1646: (num_functions == 1 || dof_func[i1] == dof_func_offd[j1])) |
1647: sum_N += A_offd_data[j]; |
1648: if (j1 != -1 && tmp_marker_offd[j1] == i1) |
1649: { |
1650: P_offd_data[cnt_offd] = A_offd_data[j]; |
1651: P_offd_j[cnt_offd++] = map_S_to_new[j1]; |
1652: sum_C += A_offd_data[j]; |
1653: } |
1654: } |
1655: diagonal = A_diag_data[A_diag_i[i1]]; |
1656: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1657: for (j=P_diag_i[i1]; j < cnt; j++) |
1658: P_diag_data[j] *= alfa; |
1659: for (j=P_offd_i[i1]; j < cnt_offd; j++) |
1660: P_offd_data[j] *= alfa; |
1661: } |
1662: hypre_TFree(tmp_marker); |
1663: hypre_TFree(tmp_marker_offd); |
0x473070 PUSH %RBP |
0x473071 MOV %RSP,%RBP |
0x473074 PUSH %R15 |
0x473076 PUSH %R14 |
0x473078 PUSH %R13 |
0x47307a PUSH %R12 |
0x47307c PUSH %RBX |
0x47307d AND $-0x40,%RSP |
0x473081 SUB $0x100,%RSP |
0x473088 MOV 0xf8(%RDI),%RAX |
0x47308f MOV 0xf0(%RDI),%RDX |
0x473096 MOV 0xe0(%RDI),%RCX |
0x47309d MOV 0xd8(%RDI),%RSI |
0x4730a4 MOV 0xd0(%RDI),%R8 |
0x4730ab MOV 0xc8(%RDI),%R9 |
0x4730b2 MOV %RAX,0xf8(%RSP) |
0x4730ba MOV 0xc0(%RDI),%R10 |
0x4730c1 MOV 0xb0(%RDI),%R12 |
0x4730c8 MOV %RDX,0x98(%RSP) |
0x4730d0 MOV 0xa8(%RDI),%R13 |
0x4730d7 MOV 0x90(%RDI),%RAX |
0x4730de MOV %RCX,0x8(%RSP) |
0x4730e3 MOV 0xb8(%RDI),%R11 |
0x4730ea MOV %RSI,0x90(%RSP) |
0x4730f2 MOV %R8,0x28(%RSP) |
0x4730f7 MOV 0xe8(%RDI),%RBX |
0x4730fe MOV %R9,0x20(%RSP) |
0x473103 MOV 0xa0(%RDI),%R14 |
0x47310a MOV %R10,0x60(%RSP) |
0x47310f MOV 0x98(%RDI),%R15 |
0x473116 MOV %R12,0xc8(%RSP) |
0x47311e MOV %R13,0x70(%RSP) |
0x473123 MOV %RAX,0xb0(%RSP) |
0x47312b MOV %R11,0x58(%RSP) |
0x473130 MOV 0x88(%RDI),%R11 |
0x473137 MOV 0x80(%RDI),%RDX |
0x47313e MOV 0x78(%RDI),%RCX |
0x473142 MOV 0x70(%RDI),%RSI |
0x473146 MOV 0x68(%RDI),%R8 |
0x47314a MOV 0x60(%RDI),%R9 |
0x47314e MOV 0x58(%RDI),%R10 |
0x473152 MOV %RDX,0x88(%RSP) |
0x47315a MOV 0x40(%RDI),%RAX |
0x47315e MOV 0x38(%RDI),%RDX |
0x473162 MOV %RCX,0x50(%RSP) |
0x473167 MOV %RSI,0xd8(%RSP) |
0x47316f MOV 0x28(%RDI),%RCX |
0x473173 MOV 0x20(%RDI),%RSI |
0x473177 MOV %R8,0x80(%RSP) |
0x47317f MOV 0x50(%RDI),%R12 |
0x473183 MOV 0x18(%RDI),%R8 |
0x473187 MOV %R9,0x48(%RSP) |
0x47318c MOV 0x48(%RDI),%R13 |
0x473190 MOV 0x10(%RDI),%R9 |
0x473194 MOV %R10,0xd0(%RSP) |
0x47319c MOV %RAX,0x40(%RSP) |
0x4731a1 MOV 0x30(%RDI),%R10 |
0x4731a5 MOV 0x8(%RDI),%RAX |
0x4731a9 MOV (%RDI),%RDI |
0x4731ac MOV %RDX,0xe0(%RSP) |
0x4731b4 MOV %RCX,0x38(%RSP) |
0x4731b9 MOV %RSI,0xf0(%RSP) |
0x4731c1 MOV %R8,0x18(%RSP) |
0x4731c6 MOV %R9,0xc0(%RSP) |
0x4731ce MOV %RAX,0xe8(%RSP) |
0x4731d6 MOV %RDI,0x10(%RSP) |
0x4731db TEST %RBX,%RBX |
0x4731de JNE 473e3f |
0x4731e4 TEST %R12,%R12 |
0x4731e7 JNE 473fb0 |
0x4731ed XOR %EBX,%EBX |
0x4731ef XOR %R12D,%R12D |
0x4731f2 MOV %R10,0x78(%RSP) |
0x4731f7 MOV %R11,0xa0(%RSP) |
0x4731ff VMOVSD %XMM1,0xa8(%RSP) |
0x473208 CALL 5b5180 <hypre_GetThreadNum> |
0x47320d MOV %RAX,0xb8(%RSP) |
0x473215 CALL 5b5170 <hypre_NumActiveThreads> |
0x47321a MOV 0xb8(%RSP),%R11 |
0x473222 MOV 0xc8(%RSP),%R8 |
0x47322a MOV %RAX,%RSI |
0x47322d MOV 0xf8(%RSP),%RAX |
0x473235 VMOVSD 0xa8(%RSP),%XMM11 |
0x47323e MOV %R11,%RCX |
0x473241 MOV 0x8(%R8),%R9 |
0x473245 MOV 0x78(%RSP),%R10 |
0x47324a CQTO |
0x47324c MOV 0xa0(%RSP),%R8 |
0x473254 IDIV %RSI |
0x473257 DEC %RSI |
0x47325a IMUL %RAX,%RCX |
0x47325e ADD %RCX,%RAX |
0x473261 LEA (%R9,%RCX,1),%RDI |
0x473265 MOV 0xf8(%RSP),%RCX |
0x47326d ADD %R9,%RAX |
0x473270 ADD %R9,%RCX |
0x473273 CMP %RSI,%R11 |
0x473276 CMOVNE %RAX,%RCX |
0x47327a CMP %RDI,%RCX |
0x47327d JLE 473c30 |
0x473283 MOV 0x70(%RSP),%R9 |
0x473288 VMOVQ 0x147a70(%RIP),%XMM5 |
0x473290 MOV %R10,%R11 |
0x473293 VXORPD %XMM4,%XMM4,%XMM4 |
0x473297 MOV %R8,%R10 |
0x47329a LEA (%R9,%RDI,8),%RSI |
0x47329e LEA (%R9,%RCX,8),%RAX |
0x4732a2 MOV %RSI,0xc8(%RSP) |
0x4732aa MOV %RAX,0x30(%RSP) |
0x4732af NOP |
(672) 0x4732b0 MOV 0xc8(%RSP),%RDX |
(672) 0x4732b8 MOV 0x58(%RSP),%RDI |
(672) 0x4732bd MOV (%RDX),%RDX |
(672) 0x4732c0 MOV (%RDI,%RDX,8),%RCX |
(672) 0x4732c4 MOV 0x48(%RSP),%RDI |
(672) 0x4732c9 LEA (,%RDX,8),%R8 |
(672) 0x4732d1 LEA 0x8(%R8),%R9 |
(672) 0x4732d5 LEA (%RDI,%R8,1),%RSI |
(672) 0x4732d9 MOV 0x8(%RDI,%R8,1),%RAX |
(672) 0x4732de MOV %RSI,0xa8(%RSP) |
(672) 0x4732e6 MOV (%RSI),%RSI |
(672) 0x4732e9 ADD %RCX,%RAX |
(672) 0x4732ec SUB %RSI,%RAX |
(672) 0x4732ef MOV %RSI,0xf8(%RSP) |
(672) 0x4732f7 CMP %RAX,%RCX |
(672) 0x4732fa JGE 473438 |
(672) 0x473300 MOV 0x20(%RSP),%RDI |
(672) 0x473305 MOV 0x8(%RDI),%RSI |
(672) 0x473309 LEA (%RSI,%RAX,8),%RDI |
(672) 0x47330d LEA (%RSI,%RCX,8),%RCX |
(672) 0x473311 MOV %RDI,%RAX |
(672) 0x473314 SUB %RCX,%RAX |
(672) 0x473317 SUB $0x8,%RAX |
(672) 0x47331b SHR $0x3,%RAX |
(672) 0x47331f INC %RAX |
(672) 0x473322 AND $0x7,%EAX |
(672) 0x473325 JE 4733bd |
(672) 0x47332b CMP $0x1,%RAX |
(672) 0x47332f JE 4733a9 |
(672) 0x473331 CMP $0x2,%RAX |
(672) 0x473335 JE 47339a |
(672) 0x473337 CMP $0x3,%RAX |
(672) 0x47333b JE 47338b |
(672) 0x47333d CMP $0x4,%RAX |
(672) 0x473341 JE 47337c |
(672) 0x473343 CMP $0x5,%RAX |
(672) 0x473347 JE 47336d |
(672) 0x473349 CMP $0x6,%RAX |
(672) 0x47334d JE 47335e |
(672) 0x47334f MOV (%RCX),%RSI |
(672) 0x473352 ADD $0x8,%RCX |
(672) 0x473356 MOV (%R15,%RSI,8),%RAX |
(672) 0x47335a MOV %RDX,(%R12,%RAX,8) |
(672) 0x47335e MOV (%RCX),%RSI |
(672) 0x473361 ADD $0x8,%RCX |
(672) 0x473365 MOV (%R15,%RSI,8),%RAX |
(672) 0x473369 MOV %RDX,(%R12,%RAX,8) |
(672) 0x47336d MOV (%RCX),%RSI |
(672) 0x473370 ADD $0x8,%RCX |
(672) 0x473374 MOV (%R15,%RSI,8),%RAX |
(672) 0x473378 MOV %RDX,(%R12,%RAX,8) |
(672) 0x47337c MOV (%RCX),%RSI |
(672) 0x47337f ADD $0x8,%RCX |
(672) 0x473383 MOV (%R15,%RSI,8),%RAX |
(672) 0x473387 MOV %RDX,(%R12,%RAX,8) |
(672) 0x47338b MOV (%RCX),%RSI |
(672) 0x47338e ADD $0x8,%RCX |
(672) 0x473392 MOV (%R15,%RSI,8),%RAX |
(672) 0x473396 MOV %RDX,(%R12,%RAX,8) |
(672) 0x47339a MOV (%RCX),%RSI |
(672) 0x47339d ADD $0x8,%RCX |
(672) 0x4733a1 MOV (%R15,%RSI,8),%RAX |
(672) 0x4733a5 MOV %RDX,(%R12,%RAX,8) |
(672) 0x4733a9 MOV (%RCX),%RSI |
(672) 0x4733ac ADD $0x8,%RCX |
(672) 0x4733b0 MOV (%R15,%RSI,8),%RAX |
(672) 0x4733b4 MOV %RDX,(%R12,%RAX,8) |
(672) 0x4733b8 CMP %RDI,%RCX |
(672) 0x4733bb JE 473425 |
(681) 0x4733bd MOV (%RCX),%RSI |
(681) 0x4733c0 ADD $0x40,%RCX |
(681) 0x4733c4 MOV (%R15,%RSI,8),%RAX |
(681) 0x4733c8 MOV %RDX,(%R12,%RAX,8) |
(681) 0x4733cc MOV -0x38(%RCX),%RSI |
(681) 0x4733d0 MOV (%R15,%RSI,8),%RAX |
(681) 0x4733d4 MOV %RDX,(%R12,%RAX,8) |
(681) 0x4733d8 MOV -0x30(%RCX),%RSI |
(681) 0x4733dc MOV (%R15,%RSI,8),%RAX |
(681) 0x4733e0 MOV %RDX,(%R12,%RAX,8) |
(681) 0x4733e4 MOV -0x28(%RCX),%RSI |
(681) 0x4733e8 MOV (%R15,%RSI,8),%RAX |
(681) 0x4733ec MOV %RDX,(%R12,%RAX,8) |
(681) 0x4733f0 MOV -0x20(%RCX),%RSI |
(681) 0x4733f4 MOV (%R15,%RSI,8),%RAX |
(681) 0x4733f8 MOV %RDX,(%R12,%RAX,8) |
(681) 0x4733fc MOV -0x18(%RCX),%RSI |
(681) 0x473400 MOV (%R15,%RSI,8),%RAX |
(681) 0x473404 MOV %RDX,(%R12,%RAX,8) |
(681) 0x473408 MOV -0x10(%RCX),%RSI |
(681) 0x47340c MOV (%R15,%RSI,8),%RAX |
(681) 0x473410 MOV %RDX,(%R12,%RAX,8) |
(681) 0x473414 MOV -0x8(%RCX),%RSI |
(681) 0x473418 MOV (%R15,%RSI,8),%RAX |
(681) 0x47341c MOV %RDX,(%R12,%RAX,8) |
(681) 0x473420 CMP %RDI,%RCX |
(681) 0x473423 JNE 4733bd |
(672) 0x473425 MOV 0xa8(%RSP),%RCX |
(672) 0x47342d MOV (%RCX),%RDI |
(672) 0x473430 MOV %RDI,0xf8(%RSP) |
(672) 0x473438 MOV 0x38(%RSP),%RSI |
(672) 0x47343d VXORPD %XMM0,%XMM0,%XMM0 |
(672) 0x473441 VMOVSD %XMM0,%XMM0,%XMM2 |
(672) 0x473445 LEA (%RSI,%R8,1),%RAX |
(672) 0x473449 LEA (%RSI,%R9,1),%RSI |
(672) 0x47344d MOV %RAX,0xa0(%RSP) |
(672) 0x473455 MOV (%RAX),%RAX |
(672) 0x473458 MOV %RAX,0xb8(%RSP) |
(672) 0x473460 INC %RAX |
(672) 0x473463 CMP (%RSI),%RAX |
(672) 0x473466 JGE 47354c |
(672) 0x47346c CMPQ $0x1,0xe8(%RSP) |
(672) 0x473475 JE 473c50 |
(672) 0x47347b MOV %R13,0x70(%RSP) |
(672) 0x473480 MOV %RBX,0xb8(%RSP) |
(672) 0x473488 MOV 0xf8(%RSP),%RBX |
(672) 0x473490 MOV %R10,0x78(%RSP) |
(672) 0x473495 MOV 0x10(%RSP),%R10 |
(672) 0x47349a MOV %R9,0x68(%RSP) |
(672) 0x47349f MOV 0xc0(%RSP),%R9 |
(672) 0x4734a7 NOPW (%RAX,%RAX,1) |
(680) 0x4734b0 MOV (%R11,%RAX,8),%RCX |
(680) 0x4734b4 CMPQ $-0x3,(%R10,%RCX,8) |
(680) 0x4734b9 JE 4734d2 |
(680) 0x4734bb MOV (%R9,%RCX,8),%R13 |
(680) 0x4734bf CMP %R13,(%R9,%R8,1) |
(680) 0x4734c3 JNE 4734d2 |
(680) 0x4734c5 MOV 0xf0(%RSP),%RDI |
(680) 0x4734cd VADDSD (%RDI,%RAX,8),%XMM0,%XMM0 |
(680) 0x4734d2 CMP $-0x1,%RCX |
(680) 0x4734d6 JE 473525 |
(680) 0x4734d8 CMP (%R12,%RCX,8),%RDX |
(680) 0x4734dc JNE 473525 |
(680) 0x4734de MOV 0xf0(%RSP),%R13 |
(680) 0x4734e6 LEA (,%RBX,8),%RDI |
(680) 0x4734ee VMOVSD (%R13,%RAX,8),%XMM6 |
(680) 0x4734f5 MOV 0xd0(%RSP),%R13 |
(680) 0x4734fd VMOVSD %XMM6,(%R13,%RBX,8) |
(680) 0x473504 MOV 0x98(%RSP),%R13 |
(680) 0x47350c VADDSD %XMM6,%XMM2,%XMM2 |
(680) 0x473510 INC %RBX |
(680) 0x473513 MOV (%R13,%RCX,8),%RCX |
(680) 0x473518 MOV 0x80(%RSP),%R13 |
(680) 0x473520 MOV %RCX,(%R13,%RDI,1) |
(680) 0x473525 INC %RAX |
(680) 0x473528 CMP (%RSI),%RAX |
(680) 0x47352b JL 4734b0 |
(672) 0x47352d MOV 0x78(%RSP),%R10 |
(672) 0x473532 MOV 0x70(%RSP),%R13 |
(672) 0x473537 MOV %RBX,0xf8(%RSP) |
(672) 0x47353f MOV 0x68(%RSP),%R9 |
(672) 0x473544 MOV 0xb8(%RSP),%RBX |
(672) 0x47354c MOV 0x60(%RSP),%RAX |
(672) 0x473551 MOV 0x50(%RSP),%RDI |
(672) 0x473556 MOV (%RAX,%RDX,8),%RCX |
(672) 0x47355a LEA (%RDI,%R8,1),%RSI |
(672) 0x47355e MOV 0x8(%RDI,%R8,1),%RAX |
(672) 0x473563 MOV %RSI,0xb8(%RSP) |
(672) 0x47356b MOV (%RSI),%RSI |
(672) 0x47356e ADD %RCX,%RAX |
(672) 0x473571 SUB %RSI,%RAX |
(672) 0x473574 CMP %RAX,%RCX |
(672) 0x473577 JGE 4736bd |
(672) 0x47357d MOV 0x28(%RSP),%RDI |
(672) 0x473582 MOV 0x8(%RDI),%RSI |
(672) 0x473586 LEA (%RSI,%RCX,8),%RCX |
(672) 0x47358a LEA (%RSI,%RAX,8),%RSI |
(672) 0x47358e MOV %RSI,%RAX |
(672) 0x473591 SUB %RCX,%RAX |
(672) 0x473594 SUB $0x8,%RAX |
(672) 0x473598 SHR $0x3,%RAX |
(672) 0x47359c INC %RAX |
(672) 0x47359f AND $0x7,%EAX |
(672) 0x4735a2 JE 47363a |
(672) 0x4735a8 CMP $0x1,%RAX |
(672) 0x4735ac JE 473626 |
(672) 0x4735ae CMP $0x2,%RAX |
(672) 0x4735b2 JE 473617 |
(672) 0x4735b4 CMP $0x3,%RAX |
(672) 0x4735b8 JE 473608 |
(672) 0x4735ba CMP $0x4,%RAX |
(672) 0x4735be JE 4735f9 |
(672) 0x4735c0 CMP $0x5,%RAX |
(672) 0x4735c4 JE 4735ea |
(672) 0x4735c6 CMP $0x6,%RAX |
(672) 0x4735ca JE 4735db |
(672) 0x4735cc MOV (%RCX),%RDI |
(672) 0x4735cf ADD $0x8,%RCX |
(672) 0x4735d3 MOV (%R14,%RDI,8),%RAX |
(672) 0x4735d7 MOV %RDX,(%RBX,%RAX,8) |
(672) 0x4735db MOV (%RCX),%RDI |
(672) 0x4735de ADD $0x8,%RCX |
(672) 0x4735e2 MOV (%R14,%RDI,8),%RAX |
(672) 0x4735e6 MOV %RDX,(%RBX,%RAX,8) |
(672) 0x4735ea MOV (%RCX),%RDI |
(672) 0x4735ed ADD $0x8,%RCX |
(672) 0x4735f1 MOV (%R14,%RDI,8),%RAX |
(672) 0x4735f5 MOV %RDX,(%RBX,%RAX,8) |
(672) 0x4735f9 MOV (%RCX),%RDI |
(672) 0x4735fc ADD $0x8,%RCX |
(672) 0x473600 MOV (%R14,%RDI,8),%RAX |
(672) 0x473604 MOV %RDX,(%RBX,%RAX,8) |
(672) 0x473608 MOV (%RCX),%RDI |
(672) 0x47360b ADD $0x8,%RCX |
(672) 0x47360f MOV (%R14,%RDI,8),%RAX |
(672) 0x473613 MOV %RDX,(%RBX,%RAX,8) |
(672) 0x473617 MOV (%RCX),%RDI |
(672) 0x47361a ADD $0x8,%RCX |
(672) 0x47361e MOV (%R14,%RDI,8),%RAX |
(672) 0x473622 MOV %RDX,(%RBX,%RAX,8) |
(672) 0x473626 MOV (%RCX),%RDI |
(672) 0x473629 ADD $0x8,%RCX |
(672) 0x47362d MOV (%R14,%RDI,8),%RAX |
(672) 0x473631 MOV %RDX,(%RBX,%RAX,8) |
(672) 0x473635 CMP %RCX,%RSI |
(672) 0x473638 JE 4736b2 |
(672) 0x47363a MOV 0xb8(%RSP),%RDI |
(678) 0x473642 MOV (%RCX),%RAX |
(678) 0x473645 ADD $0x40,%RCX |
(678) 0x473649 MOV (%R14,%RAX,8),%RAX |
(678) 0x47364d MOV %RDX,(%RBX,%RAX,8) |
(678) 0x473651 MOV -0x38(%RCX),%RAX |
(678) 0x473655 MOV (%R14,%RAX,8),%RAX |
(678) 0x473659 MOV %RDX,(%RBX,%RAX,8) |
(678) 0x47365d MOV -0x30(%RCX),%RAX |
(678) 0x473661 MOV (%R14,%RAX,8),%RAX |
(678) 0x473665 MOV %RDX,(%RBX,%RAX,8) |
(678) 0x473669 MOV -0x28(%RCX),%RAX |
(678) 0x47366d MOV (%R14,%RAX,8),%RAX |
(678) 0x473671 MOV %RDX,(%RBX,%RAX,8) |
(678) 0x473675 MOV -0x20(%RCX),%RAX |
(678) 0x473679 MOV (%R14,%RAX,8),%RAX |
(678) 0x47367d MOV %RDX,(%RBX,%RAX,8) |
(678) 0x473681 MOV -0x18(%RCX),%RAX |
(678) 0x473685 MOV (%R14,%RAX,8),%RAX |
(678) 0x473689 MOV %RDX,(%RBX,%RAX,8) |
(678) 0x47368d MOV -0x10(%RCX),%RAX |
(678) 0x473691 MOV (%R14,%RAX,8),%RAX |
(678) 0x473695 MOV %RDX,(%RBX,%RAX,8) |
(678) 0x473699 MOV -0x8(%RCX),%RAX |
(678) 0x47369d MOV (%R14,%RAX,8),%RAX |
(678) 0x4736a1 MOV %RDX,(%RBX,%RAX,8) |
(678) 0x4736a5 CMP %RCX,%RSI |
(678) 0x4736a8 JNE 473642 |
(672) 0x4736aa MOV %RDI,0xb8(%RSP) |
(672) 0x4736b2 MOV 0xb8(%RSP),%RCX |
(672) 0x4736ba MOV (%RCX),%RSI |
(672) 0x4736bd MOV 0x40(%RSP),%RDI |
(672) 0x4736c2 MOV (%RDI,%RDX,8),%RAX |
(672) 0x4736c6 ADD %RDI,%R9 |
(672) 0x4736c9 CMP %RAX,(%R9) |
(672) 0x4736cc JLE 473e28 |
(672) 0x4736d2 CMPQ $0,0x18(%RSP) |
(672) 0x4736d8 JE 473d00 |
(672) 0x4736de MOV %R12,0x78(%RSP) |
(672) 0x4736e3 MOV 0x8(%RSP),%RDI |
(672) 0x4736e8 MOV %R11,0x70(%RSP) |
(672) 0x4736ed JMP 473761 |
0x4736ef NOP |
(677) 0x4736f0 MOV 0xb0(%RSP),%R11 |
(677) 0x4736f8 MOV 0xc0(%RSP),%R12 |
(677) 0x473700 MOV (%R11,%RCX,8),%R11 |
(677) 0x473704 CMP %R11,(%R12,%R8,1) |
(677) 0x473708 JE 473780 |
(677) 0x47370a CMP $-0x1,%RCX |
(677) 0x47370e JE 473759 |
(677) 0x473710 CMP (%RBX,%RCX,8),%RDX |
(677) 0x473714 JNE 473759 |
(677) 0x473716 MOV 0xe0(%RSP),%R11 |
(677) 0x47371e LEA (,%RSI,8),%R12 |
(677) 0x473726 VMOVSD (%R11,%RAX,8),%XMM7 |
(677) 0x47372c MOV 0xd8(%RSP),%R11 |
(677) 0x473734 VMOVSD %XMM7,(%R11,%RSI,8) |
(677) 0x47373a MOV 0x90(%RSP),%R11 |
(677) 0x473742 VADDSD %XMM7,%XMM2,%XMM2 |
(677) 0x473746 INC %RSI |
(677) 0x473749 MOV (%R11,%RCX,8),%RCX |
(677) 0x47374d MOV 0x88(%RSP),%R11 |
(677) 0x473755 MOV %RCX,(%R11,%R12,1) |
(677) 0x473759 INC %RAX |
(677) 0x47375c CMP (%R9),%RAX |
(677) 0x47375f JGE 473798 |
(677) 0x473761 MOV (%R13,%RAX,8),%R12 |
(677) 0x473766 MOV (%RDI,%R12,8),%RCX |
(677) 0x47376a CMPQ $-0x3,(%R10,%RCX,8) |
(677) 0x47376f JE 47370a |
(677) 0x473771 CMPQ $0x1,0xe8(%RSP) |
(677) 0x47377a JNE 4736f0 |
(677) 0x473780 MOV 0xe0(%RSP),%R12 |
(677) 0x473788 VADDSD (%R12,%RAX,8),%XMM0,%XMM0 |
(677) 0x47378e JMP 47370a |
0x473793 NOPL (%RAX,%RAX,1) |
(672) 0x473798 MOV 0x78(%RSP),%R12 |
(672) 0x47379d MOV 0x70(%RSP),%R11 |
(672) 0x4737a2 MOV 0xb8(%RSP),%RDX |
(672) 0x4737aa MOV (%RDX),%R8 |
(672) 0x4737ad MOV 0xa0(%RSP),%R9 |
(672) 0x4737b5 MOV 0xf0(%RSP),%RCX |
(672) 0x4737bd MOV (%R9),%RAX |
(672) 0x4737c0 VMULSD (%RCX,%RAX,8),%XMM2,%XMM10 |
(672) 0x4737c5 VCOMISD %XMM4,%XMM10 |
(672) 0x4737c9 JE 4737d4 |
(672) 0x4737cb VXORPD %XMM5,%XMM0,%XMM1 |
(672) 0x4737cf VDIVSD %XMM10,%XMM1,%XMM11 |
(672) 0x4737d4 MOV 0xa8(%RSP),%RDI |
(672) 0x4737dc MOV 0xf8(%RSP),%RDX |
(672) 0x4737e4 MOV (%RDI),%RCX |
(672) 0x4737e7 CMP %RDX,%RCX |
(672) 0x4737ea JGE 473a06 |
(672) 0x4737f0 MOV %RDX,%R9 |
(672) 0x4737f3 MOV %RCX,0xb8(%RSP) |
(672) 0x4737fb SUB %RCX,%R9 |
(672) 0x4737fe LEA -0x1(%R9),%RAX |
(672) 0x473802 CMP $0x6,%RAX |
(672) 0x473806 JBE 473e30 |
(672) 0x47380c MOV 0xd0(%RSP),%RDI |
(672) 0x473814 MOV %R9,%RDX |
(672) 0x473817 VBROADCASTSD %XMM11,%ZMM12 |
(672) 0x47381d SHR $0x3,%RDX |
(672) 0x473821 SAL $0x6,%RDX |
(672) 0x473825 LEA (%RDI,%RCX,8),%RAX |
(672) 0x473829 LEA (%RDX,%RAX,1),%RDI |
(672) 0x47382d SUB $0x40,%RDX |
(672) 0x473831 SHR $0x6,%RDX |
(672) 0x473835 INC %RDX |
(672) 0x473838 AND $0x7,%EDX |
(672) 0x47383b JE 4738e5 |
(672) 0x473841 CMP $0x1,%RDX |
(672) 0x473845 JE 4738cf |
(672) 0x47384b CMP $0x2,%RDX |
(672) 0x47384f JE 4738be |
(672) 0x473851 CMP $0x3,%RDX |
(672) 0x473855 JE 4738ad |
(672) 0x473857 CMP $0x4,%RDX |
(672) 0x47385b JE 47389c |
(672) 0x47385d CMP $0x5,%RDX |
(672) 0x473861 JE 47388b |
(672) 0x473863 CMP $0x6,%RDX |
(672) 0x473867 JE 47387a |
(672) 0x473869 VMULPD (%RAX),%ZMM12,%ZMM13 |
(672) 0x47386f ADD $0x40,%RAX |
(672) 0x473873 VMOVUPD %ZMM13,-0x40(%RAX) |
(672) 0x47387a VMULPD (%RAX),%ZMM12,%ZMM14 |
(672) 0x473880 ADD $0x40,%RAX |
(672) 0x473884 VMOVUPD %ZMM14,-0x40(%RAX) |
(672) 0x47388b VMULPD (%RAX),%ZMM12,%ZMM15 |
(672) 0x473891 ADD $0x40,%RAX |
(672) 0x473895 VMOVUPD %ZMM15,-0x40(%RAX) |
(672) 0x47389c VMULPD (%RAX),%ZMM12,%ZMM0 |
(672) 0x4738a2 ADD $0x40,%RAX |
(672) 0x4738a6 VMOVUPD %ZMM0,-0x40(%RAX) |
(672) 0x4738ad VMULPD (%RAX),%ZMM12,%ZMM3 |
(672) 0x4738b3 ADD $0x40,%RAX |
(672) 0x4738b7 VMOVUPD %ZMM3,-0x40(%RAX) |
(672) 0x4738be VMULPD (%RAX),%ZMM12,%ZMM2 |
(672) 0x4738c4 ADD $0x40,%RAX |
(672) 0x4738c8 VMOVUPD %ZMM2,-0x40(%RAX) |
(672) 0x4738cf VMULPD (%RAX),%ZMM12,%ZMM6 |
(672) 0x4738d5 ADD $0x40,%RAX |
(672) 0x4738d9 VMOVUPD %ZMM6,-0x40(%RAX) |
(672) 0x4738e0 CMP %RAX,%RDI |
(672) 0x4738e3 JE 47395f |
(674) 0x4738e5 VMULPD (%RAX),%ZMM12,%ZMM7 |
(674) 0x4738eb ADD $0x200,%RAX |
(674) 0x4738f1 VMULPD -0x1c0(%RAX),%ZMM12,%ZMM8 |
(674) 0x4738f8 VMULPD -0x180(%RAX),%ZMM12,%ZMM9 |
(674) 0x4738ff VMULPD -0x140(%RAX),%ZMM12,%ZMM10 |
(674) 0x473906 VMULPD -0x100(%RAX),%ZMM12,%ZMM1 |
(674) 0x47390d VMULPD -0xc0(%RAX),%ZMM12,%ZMM13 |
(674) 0x473914 VMOVUPD %ZMM7,-0x200(%RAX) |
(674) 0x47391b VMULPD -0x80(%RAX),%ZMM12,%ZMM14 |
(674) 0x473922 VMOVUPD %ZMM8,-0x1c0(%RAX) |
(674) 0x473929 VMULPD -0x40(%RAX),%ZMM12,%ZMM15 |
(674) 0x473930 VMOVUPD %ZMM9,-0x180(%RAX) |
(674) 0x473937 VMOVUPD %ZMM10,-0x140(%RAX) |
(674) 0x47393e VMOVUPD %ZMM1,-0x100(%RAX) |
(674) 0x473945 VMOVUPD %ZMM13,-0xc0(%RAX) |
(674) 0x47394c VMOVUPD %ZMM14,-0x80(%RAX) |
(674) 0x473953 VMOVUPD %ZMM15,-0x40(%RAX) |
(674) 0x47395a CMP %RAX,%RDI |
(674) 0x47395d JNE 4738e5 |
(672) 0x47395f MOV %R9,%RAX |
(672) 0x473962 AND $-0x8,%RAX |
(672) 0x473966 ADD %RAX,%RCX |
(672) 0x473969 TEST $0x7,%R9B |
(672) 0x47396d JE 473a06 |
(672) 0x473973 SUB %RAX,%R9 |
(672) 0x473976 LEA -0x1(%R9),%RDX |
(672) 0x47397a CMP $0x2,%RDX |
(672) 0x47397e JBE 4739b4 |
(672) 0x473980 MOV 0xb8(%RSP),%RDI |
(672) 0x473988 MOV 0xd0(%RSP),%RDX |
(672) 0x473990 VBROADCASTSD %XMM11,%YMM12 |
(672) 0x473995 ADD %RAX,%RDI |
(672) 0x473998 MOV %R9,%RAX |
(672) 0x47399b LEA (%RDX,%RDI,8),%RDI |
(672) 0x47399f AND $-0x4,%RAX |
(672) 0x4739a3 VMULPD (%RDI),%YMM12,%YMM0 |
(672) 0x4739a7 ADD %RAX,%RCX |
(672) 0x4739aa AND $0x3,%R9D |
(672) 0x4739ae VMOVUPD %YMM0,(%RDI) |
(672) 0x4739b2 JE 473a06 |
(672) 0x4739b4 MOV 0xd0(%RSP),%RDI |
(672) 0x4739bc LEA (,%RCX,8),%RAX |
(672) 0x4739c4 LEA 0x1(%RCX),%RDX |
(672) 0x4739c8 LEA (%RDI,%RAX,1),%R9 |
(672) 0x4739cc VMULSD (%R9),%XMM11,%XMM3 |
(672) 0x4739d1 VMOVSD %XMM3,(%R9) |
(672) 0x4739d6 MOV 0xf8(%RSP),%R9 |
(672) 0x4739de CMP %RDX,%R9 |
(672) 0x4739e1 JLE 473a06 |
(672) 0x4739e3 LEA 0x8(%RDI,%RAX,1),%RDX |
(672) 0x4739e8 ADD $0x2,%RCX |
(672) 0x4739ec VMULSD (%RDX),%XMM11,%XMM2 |
(672) 0x4739f0 VMOVSD %XMM2,(%RDX) |
(672) 0x4739f4 CMP %RCX,%R9 |
(672) 0x4739f7 JLE 473a06 |
(672) 0x4739f9 LEA 0x10(%RDI,%RAX,1),%RCX |
(672) 0x4739fe VMULSD (%RCX),%XMM11,%XMM6 |
(672) 0x473a02 VMOVSD %XMM6,(%RCX) |
(672) 0x473a06 CMP %R8,%RSI |
(672) 0x473a09 JLE 473c0e |
(672) 0x473a0f MOV %RSI,%RCX |
(672) 0x473a12 MOV %R8,%RDI |
(672) 0x473a15 SUB %R8,%RCX |
(672) 0x473a18 LEA -0x1(%RCX),%RAX |
(672) 0x473a1c CMP $0x6,%RAX |
(672) 0x473a20 JBE 473e37 |
(672) 0x473a26 MOV 0xd8(%RSP),%RDX |
(672) 0x473a2e VBROADCASTSD %XMM11,%ZMM7 |
(672) 0x473a34 LEA (%RDX,%R8,8),%RAX |
(672) 0x473a38 MOV %RCX,%RDX |
(672) 0x473a3b SHR $0x3,%RDX |
(672) 0x473a3f SAL $0x6,%RDX |
(672) 0x473a43 LEA (%RDX,%RAX,1),%R9 |
(672) 0x473a47 SUB $0x40,%RDX |
(672) 0x473a4b SHR $0x6,%RDX |
(672) 0x473a4f INC %RDX |
(672) 0x473a52 AND $0x7,%EDX |
(672) 0x473a55 JE 473aff |
(672) 0x473a5b CMP $0x1,%RDX |
(672) 0x473a5f JE 473ae9 |
(672) 0x473a65 CMP $0x2,%RDX |
(672) 0x473a69 JE 473ad8 |
(672) 0x473a6b CMP $0x3,%RDX |
(672) 0x473a6f JE 473ac7 |
(672) 0x473a71 CMP $0x4,%RDX |
(672) 0x473a75 JE 473ab6 |
(672) 0x473a77 CMP $0x5,%RDX |
(672) 0x473a7b JE 473aa5 |
(672) 0x473a7d CMP $0x6,%RDX |
(672) 0x473a81 JE 473a94 |
(672) 0x473a83 VMULPD (%RAX),%ZMM7,%ZMM8 |
(672) 0x473a89 ADD $0x40,%RAX |
(672) 0x473a8d VMOVUPD %ZMM8,-0x40(%RAX) |
(672) 0x473a94 VMULPD (%RAX),%ZMM7,%ZMM9 |
(672) 0x473a9a ADD $0x40,%RAX |
(672) 0x473a9e VMOVUPD %ZMM9,-0x40(%RAX) |
(672) 0x473aa5 VMULPD (%RAX),%ZMM7,%ZMM10 |
(672) 0x473aab ADD $0x40,%RAX |
(672) 0x473aaf VMOVUPD %ZMM10,-0x40(%RAX) |
(672) 0x473ab6 VMULPD (%RAX),%ZMM7,%ZMM1 |
(672) 0x473abc ADD $0x40,%RAX |
(672) 0x473ac0 VMOVUPD %ZMM1,-0x40(%RAX) |
(672) 0x473ac7 VMULPD (%RAX),%ZMM7,%ZMM13 |
(672) 0x473acd ADD $0x40,%RAX |
(672) 0x473ad1 VMOVUPD %ZMM13,-0x40(%RAX) |
(672) 0x473ad8 VMULPD (%RAX),%ZMM7,%ZMM14 |
(672) 0x473ade ADD $0x40,%RAX |
(672) 0x473ae2 VMOVUPD %ZMM14,-0x40(%RAX) |
(672) 0x473ae9 VMULPD (%RAX),%ZMM7,%ZMM15 |
(672) 0x473aef ADD $0x40,%RAX |
(672) 0x473af3 VMOVUPD %ZMM15,-0x40(%RAX) |
(672) 0x473afa CMP %R9,%RAX |
(672) 0x473afd JE 473b79 |
(673) 0x473aff VMULPD (%RAX),%ZMM7,%ZMM12 |
(673) 0x473b05 ADD $0x200,%RAX |
(673) 0x473b0b VMULPD -0x1c0(%RAX),%ZMM7,%ZMM0 |
(673) 0x473b12 VMULPD -0x180(%RAX),%ZMM7,%ZMM3 |
(673) 0x473b19 VMULPD -0x140(%RAX),%ZMM7,%ZMM2 |
(673) 0x473b20 VMULPD -0x100(%RAX),%ZMM7,%ZMM6 |
(673) 0x473b27 VMULPD -0xc0(%RAX),%ZMM7,%ZMM8 |
(673) 0x473b2e VMOVUPD %ZMM12,-0x200(%RAX) |
(673) 0x473b35 VMULPD -0x80(%RAX),%ZMM7,%ZMM9 |
(673) 0x473b3c VMOVUPD %ZMM0,-0x1c0(%RAX) |
(673) 0x473b43 VMULPD -0x40(%RAX),%ZMM7,%ZMM10 |
(673) 0x473b4a VMOVUPD %ZMM3,-0x180(%RAX) |
(673) 0x473b51 VMOVUPD %ZMM2,-0x140(%RAX) |
(673) 0x473b58 VMOVUPD %ZMM6,-0x100(%RAX) |
(673) 0x473b5f VMOVUPD %ZMM8,-0xc0(%RAX) |
(673) 0x473b66 VMOVUPD %ZMM9,-0x80(%RAX) |
(673) 0x473b6d VMOVUPD %ZMM10,-0x40(%RAX) |
(673) 0x473b74 CMP %R9,%RAX |
(673) 0x473b77 JNE 473aff |
(672) 0x473b79 MOV %RCX,%R9 |
(672) 0x473b7c AND $-0x8,%R9 |
(672) 0x473b80 ADD %R9,%R8 |
(672) 0x473b83 TEST $0x7,%CL |
(672) 0x473b86 JE 473c0e |
(672) 0x473b8c SUB %R9,%RCX |
(672) 0x473b8f LEA -0x1(%RCX),%RAX |
(672) 0x473b93 CMP $0x2,%RAX |
(672) 0x473b97 JBE 473bc4 |
(672) 0x473b99 ADD %RDI,%R9 |
(672) 0x473b9c MOV 0xd8(%RSP),%RDI |
(672) 0x473ba4 VBROADCASTSD %XMM11,%YMM7 |
(672) 0x473ba9 LEA (%RDI,%R9,8),%RDX |
(672) 0x473bad MOV %RCX,%R9 |
(672) 0x473bb0 VMULPD (%RDX),%YMM7,%YMM1 |
(672) 0x473bb4 AND $-0x4,%R9 |
(672) 0x473bb8 ADD %R9,%R8 |
(672) 0x473bbb AND $0x3,%ECX |
(672) 0x473bbe VMOVUPD %YMM1,(%RDX) |
(672) 0x473bc2 JE 473c0e |
(672) 0x473bc4 MOV 0xd8(%RSP),%RAX |
(672) 0x473bcc LEA (,%R8,8),%RCX |
(672) 0x473bd4 LEA 0x1(%R8),%RDX |
(672) 0x473bd8 LEA (%RAX,%RCX,1),%RDI |
(672) 0x473bdc VMULSD (%RDI),%XMM11,%XMM13 |
(672) 0x473be0 VMOVSD %XMM13,(%RDI) |
(672) 0x473be4 CMP %RDX,%RSI |
(672) 0x473be7 JLE 473c0e |
(672) 0x473be9 LEA 0x8(%RAX,%RCX,1),%R9 |
(672) 0x473bee ADD $0x2,%R8 |
(672) 0x473bf2 VMULSD (%R9),%XMM11,%XMM14 |
(672) 0x473bf7 VMOVSD %XMM14,(%R9) |
(672) 0x473bfc CMP %R8,%RSI |
(672) 0x473bff JLE 473c0e |
(672) 0x473c01 LEA 0x10(%RAX,%RCX,1),%RSI |
(672) 0x473c06 VMULSD (%RSI),%XMM11,%XMM15 |
(672) 0x473c0a VMOVSD %XMM15,(%RSI) |
(672) 0x473c0e ADDQ $0x8,0xc8(%RSP) |
(672) 0x473c17 MOV 0x30(%RSP),%RCX |
(672) 0x473c1c MOV 0xc8(%RSP),%R8 |
(672) 0x473c24 CMP %RCX,%R8 |
(672) 0x473c27 JNE 4732b0 |
0x473c2d VZEROUPPER |
0x473c30 MOV %R12,%RDI |
0x473c33 CALL 5b1eb0 <hypre_Free> |
0x473c38 LEA -0x28(%RBP),%RSP |
0x473c3c MOV %RBX,%RDI |
0x473c3f POP %RBX |
0x473c40 POP %R12 |
0x473c42 POP %R13 |
0x473c44 POP %R14 |
0x473c46 POP %R15 |
0x473c48 POP %RBP |
0x473c49 JMP 5b1eb0 |
0x473c4e XCHG %AX,%AX |
(672) 0x473c50 MOV %R10,0xb8(%RSP) |
(672) 0x473c58 MOV %R8,0x78(%RSP) |
(672) 0x473c5d MOV 0x10(%RSP),%R8 |
(672) 0x473c62 MOV %R9,0x70(%RSP) |
(672) 0x473c67 MOV 0xf8(%RSP),%R9 |
(672) 0x473c6f NOP |
(679) 0x473c70 MOV (%R11,%RAX,8),%RCX |
(679) 0x473c74 CMPQ $-0x3,(%R8,%RCX,8) |
(679) 0x473c79 JE 473c89 |
(679) 0x473c7b MOV 0xf0(%RSP),%R10 |
(679) 0x473c83 VADDSD (%R10,%RAX,8),%XMM0,%XMM0 |
(679) 0x473c89 CMP $-0x1,%RCX |
(679) 0x473c8d JE 473cd8 |
(679) 0x473c8f CMP (%R12,%RCX,8),%RDX |
(679) 0x473c93 JNE 473cd8 |
(679) 0x473c95 MOV 0xf0(%RSP),%R10 |
(679) 0x473c9d LEA (,%R9,8),%RDI |
(679) 0x473ca5 VMOVSD (%R10,%RAX,8),%XMM3 |
(679) 0x473cab MOV 0xd0(%RSP),%R10 |
(679) 0x473cb3 VMOVSD %XMM3,(%R10,%R9,8) |
(679) 0x473cb9 MOV 0x98(%RSP),%R10 |
(679) 0x473cc1 VADDSD %XMM3,%XMM2,%XMM2 |
(679) 0x473cc5 INC %R9 |
(679) 0x473cc8 MOV (%R10,%RCX,8),%RCX |
(679) 0x473ccc MOV 0x80(%RSP),%R10 |
(679) 0x473cd4 MOV %RCX,(%R10,%RDI,1) |
(679) 0x473cd8 INC %RAX |
(679) 0x473cdb CMP (%RSI),%RAX |
(679) 0x473cde JL 473c70 |
(672) 0x473ce0 MOV 0xb8(%RSP),%R10 |
(672) 0x473ce8 MOV 0x78(%RSP),%R8 |
(672) 0x473ced MOV %R9,0xf8(%RSP) |
(672) 0x473cf5 MOV 0x70(%RSP),%R9 |
(672) 0x473cfa JMP 47354c |
0x473cff NOP |
(672) 0x473d00 CMPQ $0x1,0xe8(%RSP) |
(672) 0x473d09 JE 473db0 |
(672) 0x473d0f MOV %R12,0x78(%RSP) |
(672) 0x473d14 NOPL (%RAX) |
(676) 0x473d18 MOV (%R13,%RAX,8),%RCX |
(676) 0x473d1d CMPQ $-0x3,(%R10,%RCX,8) |
(676) 0x473d22 JE 473d4c |
(676) 0x473d24 MOV 0xc0(%RSP),%RDI |
(676) 0x473d2c MOV 0xb0(%RSP),%R12 |
(676) 0x473d34 MOV (%RDI,%R8,1),%RDI |
(676) 0x473d38 CMP %RDI,(%R12,%RCX,8) |
(676) 0x473d3c JNE 473d4c |
(676) 0x473d3e MOV 0xe0(%RSP),%R12 |
(676) 0x473d46 VADDSD (%R12,%RAX,8),%XMM0,%XMM0 |
(676) 0x473d4c CMP $-0x1,%RCX |
(676) 0x473d50 JE 473d9a |
(676) 0x473d52 CMP (%RBX,%RCX,8),%RDX |
(676) 0x473d56 JNE 473d9a |
(676) 0x473d58 MOV 0xe0(%RSP),%RDI |
(676) 0x473d60 LEA (,%RSI,8),%R12 |
(676) 0x473d68 VMOVSD (%RDI,%RAX,8),%XMM9 |
(676) 0x473d6d MOV 0xd8(%RSP),%RDI |
(676) 0x473d75 VMOVSD %XMM9,(%RDI,%RSI,8) |
(676) 0x473d7a MOV 0x90(%RSP),%RDI |
(676) 0x473d82 VADDSD %XMM9,%XMM2,%XMM2 |
(676) 0x473d87 INC %RSI |
(676) 0x473d8a MOV (%RDI,%RCX,8),%RCX |
(676) 0x473d8e MOV 0x88(%RSP),%RDI |
(676) 0x473d96 MOV %RCX,(%RDI,%R12,1) |
(676) 0x473d9a INC %RAX |
(676) 0x473d9d CMP %RAX,(%R9) |
(676) 0x473da0 JG 473d18 |
(672) 0x473da6 MOV 0x78(%RSP),%R12 |
(672) 0x473dab JMP 4737a2 |
(675) 0x473db0 MOV (%R13,%RAX,8),%RCX |
(675) 0x473db5 CMPQ $-0x3,(%R10,%RCX,8) |
(675) 0x473dba JE 473dca |
(675) 0x473dbc MOV 0xe0(%RSP),%R8 |
(675) 0x473dc4 VADDSD (%R8,%RAX,8),%XMM0,%XMM0 |
(675) 0x473dca CMP $-0x1,%RCX |
(675) 0x473dce JE 473e18 |
(675) 0x473dd0 CMP (%RBX,%RCX,8),%RDX |
(675) 0x473dd4 JNE 473e18 |
(675) 0x473dd6 MOV 0xe0(%RSP),%RDI |
(675) 0x473dde LEA (,%RSI,8),%R8 |
(675) 0x473de6 VMOVSD (%RDI,%RAX,8),%XMM8 |
(675) 0x473deb MOV 0xd8(%RSP),%RDI |
(675) 0x473df3 VMOVSD %XMM8,(%RDI,%RSI,8) |
(675) 0x473df8 MOV 0x90(%RSP),%RDI |
(675) 0x473e00 VADDSD %XMM8,%XMM2,%XMM2 |
(675) 0x473e05 INC %RSI |
(675) 0x473e08 MOV (%RDI,%RCX,8),%RCX |
(675) 0x473e0c MOV 0x88(%RSP),%RDI |
(675) 0x473e14 MOV %RCX,(%RDI,%R8,1) |
(675) 0x473e18 INC %RAX |
(675) 0x473e1b CMP %RAX,(%R9) |
(675) 0x473e1e JG 473db0 |
(672) 0x473e20 JMP 4737a2 |
0x473e25 NOPL (%RAX) |
(672) 0x473e28 MOV %RSI,%R8 |
(672) 0x473e2b JMP 4737ad |
(672) 0x473e30 XOR %EAX,%EAX |
(672) 0x473e32 JMP 473973 |
(672) 0x473e37 XOR %R9D,%R9D |
(672) 0x473e3a JMP 473b8c |
0x473e3f MOV $0x8,%ESI |
0x473e44 MOV %RBX,%RDI |
0x473e47 MOV %R10,0x68(%RSP) |
0x473e4c MOV %R12,0x78(%RSP) |
0x473e51 MOV %R11,0xa0(%RSP) |
0x473e59 VMOVSD %XMM1,0xa8(%RSP) |
0x473e62 MOV %RBX,0xb8(%RSP) |
0x473e6a CALL 5b1df0 <hypre_CAlloc> |
0x473e6f MOV 0x78(%RSP),%RCX |
0x473e74 MOV 0xb8(%RSP),%RDX |
0x473e7c VMOVSD 0xa8(%RSP),%XMM1 |
0x473e85 MOV 0xa0(%RSP),%R11 |
0x473e8d MOV %RAX,%R12 |
0x473e90 TEST %RCX,%RCX |
0x473e93 MOV 0x68(%RSP),%R10 |
0x473e98 JNE 473f4b |
0x473e9e XOR %EBX,%EBX |
0x473ea0 TEST %RDX,%RDX |
0x473ea3 JLE 4731f2 |
0x473ea9 SAL $0x3,%RDX |
0x473ead MOV $0xff,%ESI |
0x473eb2 MOV %R12,%RDI |
0x473eb5 MOV %R10,0x78(%RSP) |
0x473eba MOV %RCX,0xa0(%RSP) |
0x473ec2 MOV %R11,0xa8(%RSP) |
0x473eca VMOVSD %XMM1,0xb8(%RSP) |
0x473ed3 CALL 40f0a0 <memset@plt> |
0x473ed8 VMOVSD 0xb8(%RSP),%XMM1 |
0x473ee1 MOV 0xa8(%RSP),%R11 |
0x473ee9 MOV 0xa0(%RSP),%RCX |
0x473ef1 MOV 0x78(%RSP),%R10 |
0x473ef6 TEST %RCX,%RCX |
0x473ef9 JLE 4731f2 |
0x473eff LEA (,%RCX,8),%RDX |
0x473f07 MOV $0xff,%ESI |
0x473f0c MOV %RBX,%RDI |
0x473f0f MOV %R10,0xa0(%RSP) |
0x473f17 MOV %R11,0xa8(%RSP) |
0x473f1f VMOVSD %XMM1,0xb8(%RSP) |
0x473f28 CALL 40f0a0 <memset@plt> |
0x473f2d VMOVSD 0xb8(%RSP),%XMM1 |
0x473f36 MOV 0xa8(%RSP),%R11 |
0x473f3e MOV 0xa0(%RSP),%R10 |
0x473f46 JMP 4731f2 |
0x473f4b MOV %RCX,%RDI |
0x473f4e MOV $0x8,%ESI |
0x473f53 MOV %R10,0x68(%RSP) |
0x473f58 MOV %R11,0x78(%RSP) |
0x473f5d MOV %RDX,0xa0(%RSP) |
0x473f65 MOV %RCX,0xb8(%RSP) |
0x473f6d VMOVSD %XMM1,0xa8(%RSP) |
0x473f76 CALL 5b1df0 <hypre_CAlloc> |
0x473f7b MOV 0xa0(%RSP),%RDX |
0x473f83 MOV 0xb8(%RSP),%RCX |
0x473f8b VMOVSD 0xa8(%RSP),%XMM1 |
0x473f94 MOV 0x78(%RSP),%R11 |
0x473f99 MOV %RAX,%RBX |
0x473f9c TEST %RDX,%RDX |
0x473f9f MOV 0x68(%RSP),%R10 |
0x473fa4 JG 473ea9 |
0x473faa JMP 473ef6 |
0x473faf NOP |
0x473fb0 MOV %R12,%RDI |
0x473fb3 MOV $0x8,%ESI |
0x473fb8 MOV %R10,0x78(%RSP) |
0x473fbd MOV %R11,0xa0(%RSP) |
0x473fc5 MOV %R12,0xb8(%RSP) |
0x473fcd XOR %R12D,%R12D |
0x473fd0 VMOVSD %XMM1,0xa8(%RSP) |
0x473fd9 CALL 5b1df0 <hypre_CAlloc> |
0x473fde MOV 0xb8(%RSP),%RCX |
0x473fe6 VMOVSD 0xa8(%RSP),%XMM1 |
0x473fef MOV 0xa0(%RSP),%R11 |
0x473ff7 MOV 0x78(%RSP),%R10 |
0x473ffc MOV %RAX,%RBX |
0x473fff JMP 473ef6 |
0x474004 NOPW %CS:(%RAX,%RAX,1) |
0x47400f NOP |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | par_multi_interp.c:1575-1663 |
Module | exec |
nb instructions | 205 |
nb uops | 272 |
loop length | 1086 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 32 |
micro-operation queue | 68.00 cycles |
front end | 68.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 26.00 | 26.00 | 45.17 | 44.83 | 66.00 | 26.00 | 26.00 | 45.00 |
cycles | 26.00 | 26.00 | 45.17 | 44.83 | 66.00 | 26.00 | 26.00 | 45.00 |
Cycles executing div or sqrt instructions | 24.00-90.00 |
FE+BE cycles | 58.16-107.44 |
Stall cycles | 5.99-55.26 |
SB full (events) | 6.73-56.01 |
Front-end | 68.00 |
Dispatch | 66.00 |
DIV/SQRT | 24.00-90.00 |
Overall L1 | 68.00-90.00 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 8% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SUB $0x100,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0xf8(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xf0(%RDI),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xe0(%RDI),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xd8(%RDI),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xd0(%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xc8(%RDI),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,0xf8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xc0(%RDI),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb0(%RDI),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,0x98(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xa8(%RDI),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x90(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,0x8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xb8(%RDI),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RSI,0x90(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R8,0x28(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xe8(%RDI),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R9,0x20(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xa0(%RDI),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R10,0x60(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x98(%RDI),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R12,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R13,0x70(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x88(%RDI),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x80(%RDI),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RDI),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x70(%RDI),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x68(%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x60(%RDI),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x58(%RDI),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,0x88(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x38(%RDI),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,0xd8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x20(%RDI),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R8,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x50(%RDI),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R9,0x48(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x48(%RDI),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x10(%RDI),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R10,0xd0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x30(%RDI),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,0x38(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,0xf0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R8,0x18(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R9,0xc0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
TEST %RBX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 473e3f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 473fb0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b5180 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b5170 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xc8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0xf8(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0xa8(%RSP),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R11,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x8(%R8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV 0xa0(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
IDIV %RSI | 57 | 14.25 | 14.25 | 0 | 0 | 0 | 14.25 | 14.25 | 0 | 42-95 | 24-90 |
DEC %RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA (%R9,%RCX,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R9,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R9,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RSI,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMOVNE %RAX,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
CMP %RDI,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 473c30 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x70(%RSP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVQ 0x147a70(%RIP),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%R9,%RDI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R9,%RCX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 5b1eb0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
JMP 5b1eb0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R10,0x68(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R12,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RBX,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b1df0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0xa8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa0(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0x68(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JNE 473f4b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4731f2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 40f0a0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa0(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4731f2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 40f0a0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 4731f2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R10,0x68(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDX,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b1df0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xa0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0xa8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0x68(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JG 473ea9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 473ef6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R12,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD %XMM1,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b1df0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0xa8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa0(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 473ef6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
Source file and lines | par_multi_interp.c:1575-1663 |
Module | exec |
nb instructions | 205 |
nb uops | 272 |
loop length | 1086 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 32 |
micro-operation queue | 68.00 cycles |
front end | 68.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
---|---|---|---|---|---|---|---|---|
uops | 26.00 | 26.00 | 45.17 | 44.83 | 66.00 | 26.00 | 26.00 | 45.00 |
cycles | 26.00 | 26.00 | 45.17 | 44.83 | 66.00 | 26.00 | 26.00 | 45.00 |
Cycles executing div or sqrt instructions | 24.00-90.00 |
FE+BE cycles | 58.16-107.44 |
Stall cycles | 5.99-55.26 |
SB full (events) | 6.73-56.01 |
Front-end | 68.00 |
Dispatch | 66.00 |
DIV/SQRT | 24.00-90.00 |
Overall L1 | 68.00-90.00 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 8% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
PUSH %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
PUSH %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
SUB $0x100,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0xf8(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xf0(%RDI),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xe0(%RDI),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xd8(%RDI),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xd0(%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xc8(%RDI),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,0xf8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xc0(%RDI),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb0(%RDI),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,0x98(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xa8(%RDI),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x90(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,0x8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xb8(%RDI),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RSI,0x90(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R8,0x28(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xe8(%RDI),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R9,0x20(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0xa0(%RDI),%R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R10,0x60(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x98(%RDI),%R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R12,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R13,0x70(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0x58(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x88(%RDI),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x80(%RDI),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RDI),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x70(%RDI),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x68(%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x60(%RDI),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x58(%RDI),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,0x88(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x38(%RDI),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,0xd8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x28(%RDI),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x20(%RDI),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R8,0x80(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x50(%RDI),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x18(%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R9,0x48(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x48(%RDI),%R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x10(%RDI),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R10,0xd0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x30(%RDI),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x8(%RDI),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RDX,0xe0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,0x38(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RSI,0xf0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R8,0x18(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R9,0xc0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
TEST %RBX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 473e3f | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JNE 473fb0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b5180 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b5170 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xc8(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0xf8(%RSP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0xa8(%RSP),%XMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R11,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV 0x8(%R8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV 0xa0(%RSP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
IDIV %RSI | 57 | 14.25 | 14.25 | 0 | 0 | 0 | 14.25 | 14.25 | 0 | 42-95 | 24-90 |
DEC %RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
IMUL %RAX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
LEA (%R9,%RCX,1),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
ADD %R9,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
ADD %R9,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMP %RSI,%R11 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
CMOVNE %RAX,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
CMP %RDI,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 473c30 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
MOV 0x70(%RSP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVQ 0x147a70(%RIP),%XMM5 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%R9,%RDI,8),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%R9,%RCX,8),%RAX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0xc8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
CALL 5b1eb0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %R15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
JMP 5b1eb0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R10,0x68(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R12,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RBX,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b1df0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0xa8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa0(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0x68(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JNE 473f4b | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4731f2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 40f0a0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa0(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
JLE 4731f2 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
LEA (,%RCX,8),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 40f0a0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa8(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JMP 4731f2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R10,0x68(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RDX,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %RCX,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
VMOVSD %XMM1,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b1df0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xa0(%RSP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0xa8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV 0x68(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
JG 473ea9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
JMP 473ef6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R11,0xa0(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R12,0xb8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
VMOVSD %XMM1,0xa8(%RSP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
CALL 5b1df0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
VMOVSD 0xa8(%RSP),%XMM1 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0xa0(%RSP),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV 0x78(%RSP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
JMP 473ef6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass._omp_fn.9– | 0.61 | 0.22 |
▼Loop 672 - par_multi_interp.c:1605-1660 - exec– | 0.12 | 0.05 |
○Loop 679 - par_multi_interp.c:1618-1628 - exec | 0.49 | 0.18 |
○Loop 675 - par_multi_interp.c:1639-1652 - exec | 0 | 0 |
○Loop 680 - par_multi_interp.c:1618-1628 - exec | 0 | 0 |
○Loop 676 - par_multi_interp.c:1639-1652 - exec | 0 | 0 |
○Loop 678 - par_multi_interp.c:1633-1636 - exec | 0 | 0 |
○Loop 677 - par_multi_interp.c:1639-1652 - exec | 0 | 0 |
○Loop 673 - par_multi_interp.c:1659-1660 - exec | 0 | 0 |
○Loop 674 - par_multi_interp.c:1657-1658 - exec | 0 | 0 |
○Loop 681 - par_multi_interp.c:1612-1615 - exec | 0 | 0 |