Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 2.11% |
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Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 2.11% |
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/home/eoseret/qaas_runs_CPU_9468/171-586-9096/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134 |
-------------------------------------------------------------------------------- |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
900: my_thread_num = hypre_GetThreadNum(); |
901: num_threads = hypre_NumActiveThreads(); |
902: thread_start = (pass_length/num_threads)*my_thread_num; |
903: if (my_thread_num == num_threads-1) |
904: { thread_stop = pass_length; } |
905: else |
906: { thread_stop = (pass_length/num_threads)*(my_thread_num+1); } |
907: thread_start += pass_pointer[pass]; |
908: thread_stop += pass_pointer[pass]; |
[...] |
916: P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */ |
917: for (i=0; i < n_coarse; i++) |
918: { P_marker[i] = -1; } |
919: if (new_num_cols_offd == local_index+1) |
[...] |
925: else if (n_coarse_offd) |
[...] |
939: for (i=thread_start; i < thread_stop; i++) |
940: { |
941: i1 = pass_array[i]; |
942: P_diag_start[i1] = cnt_nz; |
943: P_offd_start[i1] = cnt_nz_offd; |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
[...] |
976: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
977: { |
978: j1 = S_offd_j[j]; |
979: if (assigned_offd[j1] == pass-1) |
980: { |
981: j_start = Pext_start[j1]; |
982: j_end = j_start+Pext_i[j1+1]; |
983: for (k=j_start; k < j_end; k++) |
984: { |
985: k1 = Pext_pass[pass][k]; |
986: if (k1 < 0) |
987: { |
988: if (P_marker[-k1-1] != i1) |
989: { |
990: cnt_nz++; |
991: P_diag_i[i1+1]++; |
992: P_marker[-k1-1] = i1; |
993: } |
994: } |
995: else if (P_marker_offd[k1] != i1) |
996: { |
997: cnt_nz_offd++; |
[...] |
1008: if(my_thread_num == 0) |
1009: { max_num_threads[0] = num_threads; } |
1010: cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd; |
1011: cnt_nz_per_thread[my_thread_num] = cnt_nz; |
1012: #ifdef HYPRE_USING_OPENMP |
1013: #pragma omp barrier |
1014: #endif |
1015: if(my_thread_num == 0) |
1016: { |
1017: for(i = 1; i < max_num_threads[0]; i++) |
1018: { |
1019: cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1]; |
1020: cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1]; |
[...] |
1026: if(my_thread_num > 0) |
1027: { |
1028: /* update this thread's section of P_diag_start and P_offd_start |
1029: * with the num of nz's counted by previous threads */ |
1030: for (i=thread_start; i < thread_stop; i++) |
1031: { |
1032: i1 = pass_array[i]; |
1033: P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1]; |
1034: P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1040: cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1]; |
1041: cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1]; |
1042: |
1043: /* Updated total nz count */ |
1044: total_nz += cnt_nz; |
1045: total_nz_offd += cnt_nz_offd; |
1046: |
1047: /* Allocate P_diag_pass and P_offd_pass for all threads */ |
1048: P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz); |
1049: if (cnt_nz_offd) |
1050: P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd); |
1051: else if (num_procs > 1) |
1052: P_offd_pass[pass] = NULL; |
[...] |
1060: if(my_thread_num > 0) |
1061: { |
1062: cnt_nz = cnt_nz_per_thread[my_thread_num-1]; |
1063: cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
[...] |
1132: hypre_TFree(P_marker); |
1133: if ( (n_coarse_offd) || (new_num_cols_offd == local_index+1) ) |
1134: { hypre_TFree(P_marker_offd); } |
0x440850 PUSH %RBP |
0x440851 MOV %RSP,%RBP |
0x440854 PUSH %R15 |
0x440856 PUSH %R14 |
0x440858 PUSH %R13 |
0x44085a PUSH %R12 |
0x44085c PUSH %RBX |
0x44085d SUB $0x148,%RSP |
0x440864 MOV %R9,-0x138(%RBP) |
0x44086b MOV %R8,-0x88(%RBP) |
0x440872 MOV %RCX,-0x130(%RBP) |
0x440879 MOV %RDX,-0x90(%RBP) |
0x440880 MOV %RDI,-0xb8(%RBP) |
0x440887 MOV 0xd0(%RBP),%RAX |
0x44088e MOV %RAX,-0x80(%RBP) |
0x440892 MOV 0xc8(%RBP),%RAX |
0x440899 MOV %RAX,-0x78(%RBP) |
0x44089d MOV 0xc0(%RBP),%RAX |
0x4408a4 MOV %RAX,-0xa8(%RBP) |
0x4408ab MOV 0xb0(%RBP),%RAX |
0x4408b2 MOV %RAX,-0x100(%RBP) |
0x4408b9 MOV 0xa8(%RBP),%R13 |
0x4408c0 MOV 0xa0(%RBP),%RAX |
0x4408c7 MOV %RAX,-0x158(%RBP) |
0x4408ce MOV 0x98(%RBP),%RAX |
0x4408d5 MOV %RAX,-0x140(%RBP) |
0x4408dc MOV 0x90(%RBP),%RAX |
0x4408e3 MOV %RAX,-0x128(%RBP) |
0x4408ea MOV 0x88(%RBP),%RAX |
0x4408f1 MOV %RAX,-0x108(%RBP) |
0x4408f8 MOV 0x80(%RBP),%RAX |
0x4408ff MOV %RAX,-0xf8(%RBP) |
0x440906 MOV 0x78(%RBP),%R15 |
0x44090a MOV 0x70(%RBP),%R14 |
0x44090e MOV 0x68(%RBP),%RAX |
0x440912 MOV %RAX,-0x150(%RBP) |
0x440919 MOV 0x60(%RBP),%RAX |
0x44091d MOV %RAX,-0x120(%RBP) |
0x440924 MOV 0x58(%RBP),%RAX |
0x440928 MOV %RAX,-0x118(%RBP) |
0x44092f MOV 0x50(%RBP),%RAX |
0x440933 MOV %RAX,-0x70(%RBP) |
0x440937 MOV 0x48(%RBP),%RAX |
0x44093b MOV %RAX,-0x98(%RBP) |
0x440942 MOV 0x40(%RBP),%RAX |
0x440946 MOV %RAX,-0xd0(%RBP) |
0x44094d MOV 0x38(%RBP),%RAX |
0x440951 MOV %RAX,-0x58(%RBP) |
0x440955 MOV 0x30(%RBP),%RBX |
0x440959 MOV 0x28(%RBP),%RAX |
0x44095d MOV %RAX,-0xa0(%RBP) |
0x440964 MOV 0x20(%RBP),%RAX |
0x440968 MOV %RAX,-0x110(%RBP) |
0x44096f MOV 0x18(%RBP),%RAX |
0x440973 MOV %RAX,-0xe8(%RBP) |
0x44097a MOV 0x10(%RBP),%RAX |
0x44097e MOV %RAX,-0xe0(%RBP) |
0x440985 MOV 0xb8(%RBP),%R12 |
0x44098c CALL 4d1410 <hypre_GetThreadNum> |
0x440991 MOV %RAX,-0x48(%RBP) |
0x440995 CALL 4d1400 <hypre_NumActiveThreads> |
0x44099a MOV %RAX,%RSI |
0x44099d MOV (%R12),%RCX |
0x4409a1 MOV %RCX,%RAX |
0x4409a4 OR %RSI,%RAX |
0x4409a7 SHR $0x20,%RAX |
0x4409ab JE 4409b7 |
0x4409ad MOV %RCX,%RAX |
0x4409b0 CQTO |
0x4409b2 IDIV %RSI |
0x4409b5 JMP 4409bd |
0x4409b7 MOV %ECX,%EAX |
0x4409b9 XOR %EDX,%EDX |
0x4409bb DIV %ESI |
0x4409bd MOV %RSI,-0x148(%RBP) |
0x4409c4 DEC %RSI |
0x4409c7 MOV -0x48(%RBP),%RDX |
0x4409cb LEA 0x1(%RDX),%RDI |
0x4409cf MOV %RAX,%R12 |
0x4409d2 IMUL %RAX,%RDI |
0x4409d6 CMP %RSI,%RDX |
0x4409d9 CMOVE %RCX,%RDI |
0x4409dd MOV %RDI,-0xb0(%RBP) |
0x4409e4 MOV (%RBX),%RAX |
0x4409e7 MOV (%R14),%RCX |
0x4409ea MOV (%RAX,%RCX,8),%RAX |
0x4409ee MOV %RAX,-0xf0(%RBP) |
0x4409f5 MOV (%R15),%RDI |
0x4409f8 MOV $0x8,%ESI |
0x4409fd CALL 4cf760 <hypre_CAlloc> |
0x440a02 MOV %RAX,%RBX |
0x440a05 CMPQ $0,(%R15) |
0x440a09 JLE 440a20 |
0x440a0b XOR %EAX,%EAX |
0x440a0d NOPL (%RAX) |
(855) 0x440a10 MOVQ $-0x1,(%RBX,%RAX,8) |
(855) 0x440a18 INC %RAX |
(855) 0x440a1b CMP (%R15),%RAX |
(855) 0x440a1e JL 440a10 |
0x440a20 IMUL -0x48(%RBP),%R12 |
0x440a25 MOV %R12,-0x60(%RBP) |
0x440a29 INC %R13 |
0x440a2c MOV -0x100(%RBP),%RDI |
0x440a33 CMP %RDI,%R13 |
0x440a36 MOV %R13,-0x160(%RBP) |
0x440a3d JE 440a4b |
0x440a3f MOV -0xf8(%RBP),%RDI |
0x440a46 TEST %RDI,%RDI |
0x440a49 JE 440a76 |
0x440a4b MOV $0x8,%ESI |
0x440a50 MOV %RDI,%R12 |
0x440a53 CALL 4cf760 <hypre_CAlloc> |
0x440a58 MOV %RAX,%R15 |
0x440a5b MOV %R12,%RDX |
0x440a5e TEST %R12,%R12 |
0x440a61 JLE 440a76 |
0x440a63 SAL $0x3,%RDX |
0x440a67 MOV %R15,%RDI |
0x440a6a MOV $0xff,%ESI |
0x440a6f CALL 4d8930 <_intel_fast_memset> |
0x440a74 JMP 440a76 |
0x440a76 MOV -0x60(%RBP),%RCX |
0x440a7a MOV -0xf0(%RBP),%RAX |
0x440a81 LEA (%RAX,%RCX,1),%RDX |
0x440a85 MOV -0xb0(%RBP),%RSI |
0x440a8c ADD %RSI,%RAX |
0x440a8f MOV %RAX,-0xc8(%RBP) |
0x440a96 CMP %RSI,%RCX |
0x440a99 MOV %RDX,-0x68(%RBP) |
0x440a9d JGE 440ec9 |
0x440aa3 MOV -0xa0(%RBP),%RAX |
0x440aaa MOV (%RAX),%RAX |
0x440aad MOV %RAX,-0x168(%RBP) |
0x440ab4 MOV -0xd0(%RBP),%RAX |
0x440abb MOV (%RAX),%RAX |
0x440abe MOV %RAX,-0x50(%RBP) |
0x440ac2 XOR %ECX,%ECX |
0x440ac4 MOV %RDX,%RSI |
0x440ac7 XOR %EAX,%EAX |
0x440ac9 JMP 440ae7 |
0x440acb NOPL (%RAX,%RAX,1) |
(847) 0x440ad0 MOV -0xc0(%RBP),%RSI |
(847) 0x440ad7 INC %RSI |
(847) 0x440ada CMP -0xc8(%RBP),%RSI |
(847) 0x440ae1 JGE 440ecd |
(847) 0x440ae7 MOV -0x168(%RBP),%RDX |
(847) 0x440aee MOV %RSI,-0xc0(%RBP) |
(847) 0x440af5 MOV (%RDX,%RSI,8),%R8 |
(847) 0x440af9 MOV -0x58(%RBP),%RDI |
(847) 0x440afd MOV %RAX,(%RDI,%R8,8) |
(847) 0x440b01 MOV -0x50(%RBP),%RDX |
(847) 0x440b05 MOV %RCX,(%RDX,%R8,8) |
(847) 0x440b09 MOV -0x90(%RBP),%RDX |
(847) 0x440b10 MOV (%RDX,%R8,8),%RSI |
(847) 0x440b14 CMP 0x8(%RDX,%R8,8),%RSI |
(847) 0x440b19 JGE 440de0 |
(847) 0x440b1f MOV -0x108(%RBP),%RDX |
(847) 0x440b26 MOV (%RDX),%RDX |
(847) 0x440b29 MOV %RDX,-0x38(%RBP) |
(847) 0x440b2d JMP 440b4d |
0x440b2f NOP |
(850) 0x440b30 MOV -0x58(%RBP),%RDI |
(850) 0x440b34 MOV -0x40(%RBP),%RSI |
(850) 0x440b38 INC %RSI |
(850) 0x440b3b MOV -0x90(%RBP),%RDX |
(850) 0x440b42 CMP 0x8(%RDX,%R8,8),%RSI |
(850) 0x440b47 JGE 440de0 |
(850) 0x440b4d MOV -0x130(%RBP),%RDX |
(850) 0x440b54 MOV (%RDX,%RSI,8),%R10 |
(850) 0x440b58 MOV (%R14),%RDX |
(850) 0x440b5b DEC %RDX |
(850) 0x440b5e MOV -0x38(%RBP),%R9 |
(850) 0x440b62 CMP %RDX,(%R9,%R10,8) |
(850) 0x440b66 JNE 440b38 |
(850) 0x440b68 MOV %RSI,-0x40(%RBP) |
(850) 0x440b6c MOV -0xe0(%RBP),%RDX |
(850) 0x440b73 MOV (%RDX),%RDX |
(850) 0x440b76 MOV 0x8(%RDX,%R10,8),%RSI |
(850) 0x440b7b TEST %RSI,%RSI |
(850) 0x440b7e JLE 440cad |
(850) 0x440b84 MOV %R10,-0x30(%RBP) |
(850) 0x440b88 MOV (%RDI,%R10,8),%RDI |
(850) 0x440b8c ADD %RDI,%RSI |
(850) 0x440b8f MOV -0x98(%RBP),%R9 |
(850) 0x440b96 MOV (%R9),%R12 |
(850) 0x440b99 LEA 0x1(%RDI),%R9 |
(850) 0x440b9d CMP %R9,%RSI |
(850) 0x440ba0 CMOVLE %R9,%RSI |
(850) 0x440ba4 MOV %RSI,%R13 |
(850) 0x440ba7 SUB %RDI,%R13 |
(850) 0x440baa CMP $0x4,%R13 |
(850) 0x440bae MOV %R13,-0xd8(%RBP) |
(850) 0x440bb5 JAE 440c0c |
(850) 0x440bb7 MOV -0xd8(%RBP),%R10 |
(850) 0x440bbe MOV %R10,%R9 |
(850) 0x440bc1 AND $-0x4,%R9 |
(850) 0x440bc5 CMP %R10,%R9 |
(850) 0x440bc8 JAE 440ca9 |
(850) 0x440bce ADD %R9,%RDI |
(850) 0x440bd1 MOV -0x30(%RBP),%R10 |
(850) 0x440bd5 JMP 440bec |
0x440bd7 NOPW (%RAX,%RAX,1) |
(853) 0x440be0 INC %RDI |
(853) 0x440be3 CMP %RDI,%RSI |
(853) 0x440be6 JE 440cad |
(853) 0x440bec MOV (%R14),%R9 |
(853) 0x440bef MOV -0x8(%R12,%R9,8),%R9 |
(853) 0x440bf4 MOV (%R9,%RDI,8),%R9 |
(853) 0x440bf8 CMP %R8,(%RBX,%R9,8) |
(853) 0x440bfc JE 440be0 |
(853) 0x440bfe INC %RAX |
(853) 0x440c01 INCQ 0x8(%RDX,%R8,8) |
(853) 0x440c06 MOV %R8,(%RBX,%R9,8) |
(853) 0x440c0a JMP 440be0 |
(850) 0x440c0c SHR $0x2,%R13 |
(850) 0x440c10 LEA (,%RDI,8),%R10 |
(850) 0x440c18 JMP 440c29 |
0x440c1a NOPW (%RAX,%RAX,1) |
(854) 0x440c20 ADD $0x20,%R10 |
(854) 0x440c24 DEC %R13 |
(854) 0x440c27 JE 440bb7 |
(854) 0x440c29 MOV (%R14),%R9 |
(854) 0x440c2c MOV -0x8(%R12,%R9,8),%R11 |
(854) 0x440c31 MOV (%R11,%R10,1),%R9 |
(854) 0x440c35 CMP %R8,(%RBX,%R9,8) |
(854) 0x440c39 JE 440c4f |
(854) 0x440c3b INCQ 0x8(%RDX,%R8,8) |
(854) 0x440c40 INC %RAX |
(854) 0x440c43 MOV %R8,(%RBX,%R9,8) |
(854) 0x440c47 MOV (%R14),%R9 |
(854) 0x440c4a MOV -0x8(%R12,%R9,8),%R11 |
(854) 0x440c4f MOV 0x8(%R11,%R10,1),%R9 |
(854) 0x440c54 CMP %R8,(%RBX,%R9,8) |
(854) 0x440c58 JE 440c6e |
(854) 0x440c5a INCQ 0x8(%RDX,%R8,8) |
(854) 0x440c5f INC %RAX |
(854) 0x440c62 MOV %R8,(%RBX,%R9,8) |
(854) 0x440c66 MOV (%R14),%R9 |
(854) 0x440c69 MOV -0x8(%R12,%R9,8),%R11 |
(854) 0x440c6e MOV 0x10(%R11,%R10,1),%R9 |
(854) 0x440c73 CMP %R8,(%RBX,%R9,8) |
(854) 0x440c77 JE 440c8d |
(854) 0x440c79 INCQ 0x8(%RDX,%R8,8) |
(854) 0x440c7e INC %RAX |
(854) 0x440c81 MOV %R8,(%RBX,%R9,8) |
(854) 0x440c85 MOV (%R14),%R9 |
(854) 0x440c88 MOV -0x8(%R12,%R9,8),%R11 |
(854) 0x440c8d MOV 0x18(%R11,%R10,1),%R9 |
(854) 0x440c92 CMP %R8,(%RBX,%R9,8) |
(854) 0x440c96 JE 440c20 |
(854) 0x440c98 INC %RAX |
(854) 0x440c9b INCQ 0x8(%RDX,%R8,8) |
(854) 0x440ca0 MOV %R8,(%RBX,%R9,8) |
(854) 0x440ca4 JMP 440c20 |
(850) 0x440ca9 MOV -0x30(%RBP),%R10 |
(850) 0x440cad MOV -0xe8(%RBP),%RDX |
(850) 0x440cb4 MOV (%RDX),%RDX |
(850) 0x440cb7 MOV 0x8(%RDX,%R10,8),%RSI |
(850) 0x440cbc TEST %RSI,%RSI |
(850) 0x440cbf JLE 440b30 |
(850) 0x440cc5 MOV -0x50(%RBP),%RDI |
(850) 0x440cc9 MOV (%RDI,%R10,8),%RDI |
(850) 0x440ccd ADD %RDI,%RSI |
(850) 0x440cd0 MOV -0x70(%RBP),%R9 |
(850) 0x440cd4 MOV (%R9),%R11 |
(850) 0x440cd7 LEA 0x1(%RDI),%R9 |
(850) 0x440cdb CMP %R9,%RSI |
(850) 0x440cde CMOVLE %R9,%RSI |
(850) 0x440ce2 MOV %RSI,%R9 |
(850) 0x440ce5 SUB %RDI,%R9 |
(850) 0x440ce8 CMP $0x4,%R9 |
(850) 0x440cec MOV %R9,-0x30(%RBP) |
(850) 0x440cf0 JAE 440d3c |
(850) 0x440cf2 MOV -0x30(%RBP),%R10 |
(850) 0x440cf6 MOV %R10,%R9 |
(850) 0x440cf9 AND $-0x4,%R9 |
(850) 0x440cfd CMP %R10,%R9 |
(850) 0x440d00 JAE 440b30 |
(850) 0x440d06 ADD %R9,%RDI |
(850) 0x440d09 JMP 440d1c |
0x440d0b NOPL (%RAX,%RAX,1) |
(851) 0x440d10 INC %RDI |
(851) 0x440d13 CMP %RDI,%RSI |
(851) 0x440d16 JE 440b30 |
(851) 0x440d1c MOV (%R14),%R9 |
(851) 0x440d1f MOV -0x8(%R11,%R9,8),%R9 |
(851) 0x440d24 MOV (%R9,%RDI,8),%R9 |
(851) 0x440d28 CMP %R8,(%R15,%R9,8) |
(851) 0x440d2c JE 440d10 |
(851) 0x440d2e INC %RCX |
(851) 0x440d31 INCQ 0x8(%RDX,%R8,8) |
(851) 0x440d36 MOV %R8,(%R15,%R9,8) |
(851) 0x440d3a JMP 440d10 |
(850) 0x440d3c MOV %R9,%R10 |
(850) 0x440d3f SHR $0x2,%R10 |
(850) 0x440d43 LEA (,%RDI,8),%R13 |
(850) 0x440d4b JMP 440d59 |
0x440d4d NOPL (%RAX) |
(852) 0x440d50 ADD $0x20,%R13 |
(852) 0x440d54 DEC %R10 |
(852) 0x440d57 JE 440cf2 |
(852) 0x440d59 MOV (%R14),%R9 |
(852) 0x440d5c MOV -0x8(%R11,%R9,8),%R12 |
(852) 0x440d61 MOV (%R12,%R13,1),%R9 |
(852) 0x440d65 CMP %R8,(%R15,%R9,8) |
(852) 0x440d69 JE 440d7f |
(852) 0x440d6b INCQ 0x8(%RDX,%R8,8) |
(852) 0x440d70 INC %RCX |
(852) 0x440d73 MOV %R8,(%R15,%R9,8) |
(852) 0x440d77 MOV (%R14),%R9 |
(852) 0x440d7a MOV -0x8(%R11,%R9,8),%R12 |
(852) 0x440d7f MOV 0x8(%R12,%R13,1),%R9 |
(852) 0x440d84 CMP %R8,(%R15,%R9,8) |
(852) 0x440d88 JE 440d9e |
(852) 0x440d8a INCQ 0x8(%RDX,%R8,8) |
(852) 0x440d8f INC %RCX |
(852) 0x440d92 MOV %R8,(%R15,%R9,8) |
(852) 0x440d96 MOV (%R14),%R9 |
(852) 0x440d99 MOV -0x8(%R11,%R9,8),%R12 |
(852) 0x440d9e MOV 0x10(%R12,%R13,1),%R9 |
(852) 0x440da3 CMP %R8,(%R15,%R9,8) |
(852) 0x440da7 JE 440dbd |
(852) 0x440da9 INCQ 0x8(%RDX,%R8,8) |
(852) 0x440dae INC %RCX |
(852) 0x440db1 MOV %R8,(%R15,%R9,8) |
(852) 0x440db5 MOV (%R14),%R9 |
(852) 0x440db8 MOV -0x8(%R11,%R9,8),%R12 |
(852) 0x440dbd MOV 0x18(%R12,%R13,1),%R9 |
(852) 0x440dc2 CMP %R8,(%R15,%R9,8) |
(852) 0x440dc6 JE 440d50 |
(852) 0x440dc8 INC %RCX |
(852) 0x440dcb INCQ 0x8(%RDX,%R8,8) |
(852) 0x440dd0 MOV %R8,(%R15,%R9,8) |
(852) 0x440dd4 JMP 440d50 |
0x440dd9 NOPL (%RAX) |
(847) 0x440de0 MOV -0x88(%RBP),%RSI |
(847) 0x440de7 MOV (%RSI,%R8,8),%RDX |
(847) 0x440deb MOV 0x8(%RSI,%R8,8),%RDI |
(847) 0x440df0 JMP 440e0f |
0x440df2 NOPW %CS:(%RAX,%RAX,1) |
(848) 0x440e00 MOV -0x88(%RBP),%RSI |
(848) 0x440e07 MOV 0x8(%RSI,%R8,8),%RDI |
(848) 0x440e0c INC %RDX |
(848) 0x440e0f CMP %RDI,%RDX |
(848) 0x440e12 JGE 440ad0 |
(848) 0x440e18 MOV -0x138(%RBP),%RSI |
(848) 0x440e1f MOV (%RSI,%RDX,8),%R9 |
(848) 0x440e23 MOV (%R14),%RSI |
(848) 0x440e26 DEC %RSI |
(848) 0x440e29 MOV -0x128(%RBP),%R10 |
(848) 0x440e30 CMP %RSI,(%R10,%R9,8) |
(848) 0x440e34 JNE 440e0c |
(848) 0x440e36 MOV -0x120(%RBP),%RSI |
(848) 0x440e3d MOV 0x8(%RSI,%R9,8),%RSI |
(848) 0x440e42 TEST %RSI,%RSI |
(848) 0x440e45 JLE 440e0c |
(848) 0x440e47 MOV -0x110(%RBP),%RDI |
(848) 0x440e4e MOV (%RDI,%R9,8),%RDI |
(848) 0x440e52 ADD %RDI,%RSI |
(848) 0x440e55 MOV -0x118(%RBP),%R9 |
(848) 0x440e5c MOV (%R9),%R9 |
(848) 0x440e5f JMP 440e87 |
0x440e61 NOPW %CS:(%RAX,%RAX,1) |
(849) 0x440e70 MOV (%R11),%R11 |
(849) 0x440e73 INCQ 0x8(%R11,%R8,8) |
(849) 0x440e78 MOV %R8,(%R10) |
(849) 0x440e7b INC %RDI |
(849) 0x440e7e CMP %RSI,%RDI |
(849) 0x440e81 JGE 440e00 |
(849) 0x440e87 MOV (%R14),%R10 |
(849) 0x440e8a MOV (%R9,%R10,8),%R10 |
(849) 0x440e8e MOV (%R10,%RDI,8),%R10 |
(849) 0x440e92 TEST %R10,%R10 |
(849) 0x440e95 JS 440eb0 |
(849) 0x440e97 CMP %R8,(%R15,%R10,8) |
(849) 0x440e9b JE 440e7b |
(849) 0x440e9d LEA (%R15,%R10,8),%R10 |
(849) 0x440ea1 INC %RCX |
(849) 0x440ea4 MOV -0xe8(%RBP),%R11 |
(849) 0x440eab JMP 440e70 |
0x440ead NOPL (%RAX) |
(849) 0x440eb0 NOT %R10 |
(849) 0x440eb3 CMP %R8,(%RBX,%R10,8) |
(849) 0x440eb7 JE 440e7b |
(849) 0x440eb9 LEA (%RBX,%R10,8),%R10 |
(849) 0x440ebd INC %RAX |
(849) 0x440ec0 MOV -0xe0(%RBP),%R11 |
(849) 0x440ec7 JMP 440e70 |
0x440ec9 XOR %EAX,%EAX |
0x440ecb XOR %ECX,%ECX |
0x440ecd MOV -0x48(%RBP),%RDX |
0x440ed1 TEST %RDX,%RDX |
0x440ed4 JNE 440ee7 |
0x440ed6 MOV -0xa8(%RBP),%RSI |
0x440edd MOV -0x148(%RBP),%RDI |
0x440ee4 MOV %RDI,(%RSI) |
0x440ee7 MOV -0x80(%RBP),%R12 |
0x440eeb MOV %RCX,(%R12,%RDX,8) |
0x440eef MOV -0x78(%RBP),%R13 |
0x440ef3 MOV %RAX,(%R13,%RDX,8) |
0x440ef8 MOV -0xb8(%RBP),%RAX |
0x440eff MOV (%RAX),%ESI |
0x440f01 MOV $0x51c8b0,%EDI |
0x440f06 CALL 410570 <__kmpc_barrier@plt> |
0x440f0b CMPQ $0,-0x48(%RBP) |
0x440f10 MOV -0xa8(%RBP),%RDI |
0x440f17 JNE 440f4a |
0x440f19 CMPQ $0x2,(%RDI) |
0x440f1d JL 440f4a |
0x440f1f MOV %R13,%RSI |
0x440f22 MOV %R12,%RDX |
0x440f25 MOV $0x1,%EAX |
0x440f2a NOPW (%RAX,%RAX,1) |
(846) 0x440f30 MOV -0x8(%RDX,%RAX,8),%RCX |
(846) 0x440f35 ADD %RCX,(%RDX,%RAX,8) |
(846) 0x440f39 MOV -0x8(%RSI,%RAX,8),%RCX |
(846) 0x440f3e ADD %RCX,(%RSI,%RAX,8) |
(846) 0x440f42 INC %RAX |
(846) 0x440f45 CMP (%RDI),%RAX |
(846) 0x440f48 JL 440f30 |
0x440f4a MOV -0xb8(%RBP),%RAX |
0x440f51 MOV (%RAX),%ESI |
0x440f53 MOV $0x51c8d0,%EDI |
0x440f58 CALL 410570 <__kmpc_barrier@plt> |
0x440f5d MOV -0x48(%RBP),%R8 |
0x440f61 TEST %R8,%R8 |
0x440f64 JLE 441093 |
0x440f6a MOV -0xb0(%RBP),%RAX |
0x440f71 CMP %RAX,-0x60(%RBP) |
0x440f75 MOV -0x58(%RBP),%R11 |
0x440f79 MOV -0x80(%RBP),%R12 |
0x440f7d MOV -0x78(%RBP),%R13 |
0x440f81 JGE 44111c |
0x440f87 MOV -0xa0(%RBP),%RAX |
0x440f8e MOV (%RAX),%RAX |
0x440f91 MOV -0xd0(%RBP),%RCX |
0x440f98 MOV (%RCX),%RCX |
0x440f9b MOV -0x68(%RBP),%RDI |
0x440f9f LEA 0x1(%RDI),%RDX |
0x440fa3 MOV -0xc8(%RBP),%RSI |
0x440faa CMP %RSI,%RDX |
0x440fad CMOVLE %RSI,%RDX |
0x440fb1 MOV %RDX,%RSI |
0x440fb4 SUB %RDI,%RSI |
0x440fb7 MOV %RSI,-0x38(%RBP) |
0x440fbb CMP $0x4,%RSI |
0x440fbf MOV %R8,%RSI |
0x440fc2 JB 441040 |
0x440fc4 MOV -0x38(%RBP),%RDI |
0x440fc8 SHR $0x2,%RDI |
0x440fcc MOV -0x68(%RBP),%R8 |
0x440fd0 LEA (%RAX,%R8,8),%R8 |
0x440fd4 ADD $0x18,%R8 |
0x440fd8 NOPL (%RAX,%RAX,1) |
(845) 0x440fe0 MOV -0x18(%R8),%R9 |
(845) 0x440fe4 MOV -0x8(%R13,%RSI,8),%R10 |
(845) 0x440fe9 ADD %R10,(%R11,%R9,8) |
(845) 0x440fed MOV -0x8(%R12,%RSI,8),%R10 |
(845) 0x440ff2 ADD %R10,(%RCX,%R9,8) |
(845) 0x440ff6 MOV -0x10(%R8),%R9 |
(845) 0x440ffa MOV -0x8(%R13,%RSI,8),%R10 |
(845) 0x440fff ADD %R10,(%R11,%R9,8) |
(845) 0x441003 MOV -0x8(%R12,%RSI,8),%R10 |
(845) 0x441008 ADD %R10,(%RCX,%R9,8) |
(845) 0x44100c MOV -0x8(%R8),%R9 |
(845) 0x441010 MOV -0x8(%R13,%RSI,8),%R10 |
(845) 0x441015 ADD %R10,(%R11,%R9,8) |
(845) 0x441019 MOV -0x8(%R12,%RSI,8),%R10 |
(845) 0x44101e ADD %R10,(%RCX,%R9,8) |
(845) 0x441022 MOV (%R8),%R9 |
(845) 0x441025 MOV -0x8(%R13,%RSI,8),%R10 |
(845) 0x44102a ADD %R10,(%R11,%R9,8) |
(845) 0x44102e MOV -0x8(%R12,%RSI,8),%R10 |
(845) 0x441033 ADD %R10,(%RCX,%R9,8) |
(845) 0x441037 ADD $0x20,%R8 |
(845) 0x44103b DEC %RDI |
(845) 0x44103e JNE 440fe0 |
0x441040 MOV -0x38(%RBP),%R8 |
0x441044 MOV %R8,%RDI |
0x441047 AND $-0x4,%RDI |
0x44104b CMP %R8,%RDI |
0x44104e MOV -0xf0(%RBP),%R9 |
0x441055 JAE 44111c |
0x44105b MOV %RSI,%R8 |
0x44105e ADD -0x60(%RBP),%R9 |
0x441062 ADD %RDI,%R9 |
0x441065 NOPW %CS:(%RAX,%RAX,1) |
(844) 0x441070 MOV (%RAX,%R9,8),%RSI |
(844) 0x441074 MOV -0x8(%R13,%R8,8),%RDI |
(844) 0x441079 ADD %RDI,(%R11,%RSI,8) |
(844) 0x44107d MOV -0x8(%R12,%R8,8),%RDI |
(844) 0x441082 ADD %RDI,(%RCX,%RSI,8) |
(844) 0x441086 INC %R9 |
(844) 0x441089 CMP %R9,%RDX |
(844) 0x44108c JNE 441070 |
0x44108e JMP 44111c |
0x441093 MOV -0xa8(%RBP),%RAX |
0x44109a MOV (%RAX),%RAX |
0x44109d MOV -0x78(%RBP),%RCX |
0x4410a1 MOV -0x8(%RCX,%RAX,8),%RDI |
0x4410a6 MOV -0x80(%RBP),%RCX |
0x4410aa MOV -0x8(%RCX,%RAX,8),%R12 |
0x4410af MOV -0x150(%RBP),%RAX |
0x4410b6 ADD %RDI,(%RAX) |
0x4410b9 MOV -0x158(%RBP),%RAX |
0x4410c0 ADD %R12,(%RAX) |
0x4410c3 MOV $0x8,%ESI |
0x4410c8 CALL 4cf760 <hypre_CAlloc> |
0x4410cd MOV -0x98(%RBP),%RCX |
0x4410d4 MOV (%RCX),%RDX |
0x4410d7 MOV (%R14),%RCX |
0x4410da MOV %RAX,(%RDX,%RCX,8) |
0x4410de TEST %R12,%R12 |
0x4410e1 JE 441100 |
0x4410e3 MOV $0x8,%ESI |
0x4410e8 MOV %R12,%RDI |
0x4410eb CALL 4cf760 <hypre_CAlloc> |
0x4410f0 MOV -0x70(%RBP),%RCX |
0x4410f4 MOV (%RCX),%RCX |
0x4410f7 MOV (%R14),%RDX |
0x4410fa MOV %RAX,(%RCX,%RDX,8) |
0x4410fe JMP 44111c |
0x441100 MOV -0x140(%RBP),%RAX |
0x441107 CMPQ $0x2,(%RAX) |
0x44110b JL 44111c |
0x44110d MOV -0x70(%RBP),%RAX |
0x441111 MOV (%RAX),%RAX |
0x441114 MOVQ $0,(%RAX,%RCX,8) |
0x44111c MOV -0xb8(%RBP),%RAX |
0x441123 MOV (%RAX),%ESI |
0x441125 MOV $0x51c8f0,%EDI |
0x44112a CALL 410570 <__kmpc_barrier@plt> |
0x44112f MOV -0x48(%RBP),%RDX |
0x441133 TEST %RDX,%RDX |
0x441136 JLE 44114c |
0x441138 MOV -0x78(%RBP),%RAX |
0x44113c MOV -0x8(%RAX,%RDX,8),%RAX |
0x441141 MOV -0x80(%RBP),%RCX |
0x441145 MOV -0x8(%RCX,%RDX,8),%RCX |
0x44114a JMP 441150 |
0x44114c XOR %EAX,%EAX |
0x44114e XOR %ECX,%ECX |
0x441150 MOV -0x60(%RBP),%RDX |
0x441154 CMP -0xb0(%RBP),%RDX |
0x44115b MOV -0x68(%RBP),%RDX |
0x44115f JGE 4415b6 |
0x441165 MOV -0xa0(%RBP),%RSI |
0x44116c MOV (%RSI),%RSI |
0x44116f MOV %RSI,-0xc0(%RBP) |
0x441176 JMP 441194 |
0x441178 NOPL (%RAX,%RAX,1) |
(836) 0x441180 MOV -0x68(%RBP),%RDX |
(836) 0x441184 INC %RDX |
(836) 0x441187 CMP -0xc8(%RBP),%RDX |
(836) 0x44118e JGE 4415b6 |
(836) 0x441194 MOV %RDX,-0x68(%RBP) |
(836) 0x441198 MOV -0xc0(%RBP),%RSI |
(836) 0x44119f MOV (%RSI,%RDX,8),%RSI |
(836) 0x4411a3 MOV -0x90(%RBP),%RDX |
(836) 0x4411aa MOV (%RDX,%RSI,8),%R8 |
(836) 0x4411ae MOV %RSI,%RDI |
(836) 0x4411b1 NOT %RDI |
(836) 0x4411b4 MOV %RSI,-0x38(%RBP) |
(836) 0x4411b8 CMP 0x8(%RDX,%RSI,8),%R8 |
(836) 0x4411bd JGE 4414c0 |
(836) 0x4411c3 MOV -0x108(%RBP),%RDX |
(836) 0x4411ca MOV (%RDX),%R9 |
(836) 0x4411cd MOV %R9,-0x50(%RBP) |
(836) 0x4411d1 JMP 441201 |
0x4411d3 NOPW %CS:(%RAX,%RAX,1) |
(839) 0x4411e0 MOV -0x40(%RBP),%R8 |
(839) 0x4411e4 MOV -0x50(%RBP),%R9 |
(839) 0x4411e8 INC %R8 |
(839) 0x4411eb MOV -0x90(%RBP),%RDX |
(839) 0x4411f2 MOV -0x38(%RBP),%RSI |
(839) 0x4411f6 CMP 0x8(%RDX,%RSI,8),%R8 |
(839) 0x4411fb JGE 4414c0 |
(839) 0x441201 MOV -0x130(%RBP),%RDX |
(839) 0x441208 MOV (%RDX,%R8,8),%R10 |
(839) 0x44120c MOV (%R14),%RDX |
(839) 0x44120f DEC %RDX |
(839) 0x441212 CMP %RDX,(%R9,%R10,8) |
(839) 0x441216 JNE 4411e8 |
(839) 0x441218 MOV %R8,-0x40(%RBP) |
(839) 0x44121c MOV -0xe0(%RBP),%RDX |
(839) 0x441223 MOV (%RDX),%RDX |
(839) 0x441226 MOV 0x8(%RDX,%R10,8),%R11 |
(839) 0x44122b TEST %R11,%R11 |
(839) 0x44122e JLE 44136d |
(839) 0x441234 MOV -0x58(%RBP),%RDX |
(839) 0x441238 MOV %R10,-0x30(%RBP) |
(839) 0x44123c MOV (%RDX,%R10,8),%RDX |
(839) 0x441240 ADD %RDX,%R11 |
(839) 0x441243 MOV -0x98(%RBP),%RSI |
(839) 0x44124a MOV (%RSI),%R9 |
(839) 0x44124d LEA 0x1(%RDX),%RSI |
(839) 0x441251 CMP %RSI,%R11 |
(839) 0x441254 CMOVLE %RSI,%R11 |
(839) 0x441258 MOV %R11,%R12 |
(839) 0x44125b SUB %RDX,%R12 |
(839) 0x44125e CMP $0x4,%R12 |
(839) 0x441262 MOV %R12,-0xd8(%RBP) |
(839) 0x441269 JAE 4412bf |
(839) 0x44126b MOV -0xd8(%RBP),%R8 |
(839) 0x441272 MOV %R8,%RSI |
(839) 0x441275 AND $-0x4,%RSI |
(839) 0x441279 CMP %R8,%RSI |
(839) 0x44127c JAE 441369 |
(839) 0x441282 ADD %RSI,%RDX |
(839) 0x441285 MOV -0x30(%RBP),%R10 |
(839) 0x441289 JMP 44129c |
0x44128b NOPL (%RAX,%RAX,1) |
(842) 0x441290 INC %RDX |
(842) 0x441293 CMP %RDX,%R11 |
(842) 0x441296 JE 44136d |
(842) 0x44129c MOV (%R14),%R8 |
(842) 0x44129f MOV -0x8(%R9,%R8,8),%RSI |
(842) 0x4412a4 MOV (%RSI,%RDX,8),%RSI |
(842) 0x4412a8 CMP %RDI,(%RBX,%RSI,8) |
(842) 0x4412ac JE 441290 |
(842) 0x4412ae MOV (%R9,%R8,8),%R8 |
(842) 0x4412b2 MOV %RSI,(%R8,%RAX,8) |
(842) 0x4412b6 INC %RAX |
(842) 0x4412b9 MOV %RDI,(%RBX,%RSI,8) |
(842) 0x4412bd JMP 441290 |
(839) 0x4412bf SHR $0x2,%R12 |
(839) 0x4412c3 LEA (,%RDX,8),%RSI |
(839) 0x4412cb JMP 4412d9 |
0x4412cd NOPL (%RAX) |
(843) 0x4412d0 ADD $0x20,%RSI |
(843) 0x4412d4 DEC %R12 |
(843) 0x4412d7 JE 44126b |
(843) 0x4412d9 MOV (%R14),%R13 |
(843) 0x4412dc MOV -0x8(%R9,%R13,8),%R10 |
(843) 0x4412e1 MOV (%R10,%RSI,1),%R8 |
(843) 0x4412e5 CMP %RDI,(%RBX,%R8,8) |
(843) 0x4412e9 JE 441302 |
(843) 0x4412eb MOV (%R9,%R13,8),%R10 |
(843) 0x4412ef MOV %R8,(%R10,%RAX,8) |
(843) 0x4412f3 INC %RAX |
(843) 0x4412f6 MOV %RDI,(%RBX,%R8,8) |
(843) 0x4412fa MOV (%R14),%R13 |
(843) 0x4412fd MOV -0x8(%R9,%R13,8),%R10 |
(843) 0x441302 MOV 0x8(%R10,%RSI,1),%R8 |
(843) 0x441307 CMP %RDI,(%RBX,%R8,8) |
(843) 0x44130b JE 441324 |
(843) 0x44130d MOV (%R9,%R13,8),%R10 |
(843) 0x441311 MOV %R8,(%R10,%RAX,8) |
(843) 0x441315 INC %RAX |
(843) 0x441318 MOV %RDI,(%RBX,%R8,8) |
(843) 0x44131c MOV (%R14),%R13 |
(843) 0x44131f MOV -0x8(%R9,%R13,8),%R10 |
(843) 0x441324 MOV 0x10(%R10,%RSI,1),%R8 |
(843) 0x441329 CMP %RDI,(%RBX,%R8,8) |
(843) 0x44132d JE 441346 |
(843) 0x44132f MOV (%R9,%R13,8),%R10 |
(843) 0x441333 MOV %R8,(%R10,%RAX,8) |
(843) 0x441337 INC %RAX |
(843) 0x44133a MOV %RDI,(%RBX,%R8,8) |
(843) 0x44133e MOV (%R14),%R13 |
(843) 0x441341 MOV -0x8(%R9,%R13,8),%R10 |
(843) 0x441346 MOV 0x18(%R10,%RSI,1),%R8 |
(843) 0x44134b CMP %RDI,(%RBX,%R8,8) |
(843) 0x44134f JE 4412d0 |
(843) 0x441355 MOV (%R9,%R13,8),%R10 |
(843) 0x441359 MOV %R8,(%R10,%RAX,8) |
(843) 0x44135d INC %RAX |
(843) 0x441360 MOV %RDI,(%RBX,%R8,8) |
(843) 0x441364 JMP 4412d0 |
(839) 0x441369 MOV -0x30(%RBP),%R10 |
(839) 0x44136d MOV -0xe8(%RBP),%RDX |
(839) 0x441374 MOV (%RDX),%RDX |
(839) 0x441377 MOV 0x8(%RDX,%R10,8),%R11 |
(839) 0x44137c TEST %R11,%R11 |
(839) 0x44137f JLE 4411e0 |
(839) 0x441385 MOV -0xd0(%RBP),%RDX |
(839) 0x44138c MOV (%RDX),%RDX |
(839) 0x44138f MOV (%RDX,%R10,8),%RDX |
(839) 0x441393 ADD %RDX,%R11 |
(839) 0x441396 MOV -0x70(%RBP),%RSI |
(839) 0x44139a MOV (%RSI),%R9 |
(839) 0x44139d LEA 0x1(%RDX),%RSI |
(839) 0x4413a1 CMP %RSI,%R11 |
(839) 0x4413a4 CMOVLE %RSI,%R11 |
(839) 0x4413a8 MOV %R11,%RSI |
(839) 0x4413ab SUB %RDX,%RSI |
(839) 0x4413ae CMP $0x4,%RSI |
(839) 0x4413b2 MOV %RSI,-0x30(%RBP) |
(839) 0x4413b6 JAE 44140f |
(839) 0x4413b8 MOV -0x30(%RBP),%R8 |
(839) 0x4413bc MOV %R8,%RSI |
(839) 0x4413bf AND $-0x4,%RSI |
(839) 0x4413c3 CMP %R8,%RSI |
(839) 0x4413c6 JAE 4411e0 |
(839) 0x4413cc ADD %RSI,%RDX |
(839) 0x4413cf JMP 4413ec |
0x4413d1 NOPW %CS:(%RAX,%RAX,1) |
(840) 0x4413e0 INC %RDX |
(840) 0x4413e3 CMP %RDX,%R11 |
(840) 0x4413e6 JE 4411e0 |
(840) 0x4413ec MOV (%R14),%R8 |
(840) 0x4413ef MOV -0x8(%R9,%R8,8),%RSI |
(840) 0x4413f4 MOV (%RSI,%RDX,8),%RSI |
(840) 0x4413f8 CMP %RDI,(%R15,%RSI,8) |
(840) 0x4413fc JE 4413e0 |
(840) 0x4413fe MOV (%R9,%R8,8),%R8 |
(840) 0x441402 MOV %RSI,(%R8,%RCX,8) |
(840) 0x441406 INC %RCX |
(840) 0x441409 MOV %RDI,(%R15,%RSI,8) |
(840) 0x44140d JMP 4413e0 |
(839) 0x44140f MOV %RSI,%R12 |
(839) 0x441412 SHR $0x2,%R12 |
(839) 0x441416 LEA (,%RDX,8),%RSI |
(839) 0x44141e JMP 441429 |
(841) 0x441420 ADD $0x20,%RSI |
(841) 0x441424 DEC %R12 |
(841) 0x441427 JE 4413b8 |
(841) 0x441429 MOV (%R14),%R13 |
(841) 0x44142c MOV -0x8(%R9,%R13,8),%R10 |
(841) 0x441431 MOV (%R10,%RSI,1),%R8 |
(841) 0x441435 CMP %RDI,(%R15,%R8,8) |
(841) 0x441439 JE 441452 |
(841) 0x44143b MOV (%R9,%R13,8),%R10 |
(841) 0x44143f MOV %R8,(%R10,%RCX,8) |
(841) 0x441443 INC %RCX |
(841) 0x441446 MOV %RDI,(%R15,%R8,8) |
(841) 0x44144a MOV (%R14),%R13 |
(841) 0x44144d MOV -0x8(%R9,%R13,8),%R10 |
(841) 0x441452 MOV 0x8(%R10,%RSI,1),%R8 |
(841) 0x441457 CMP %RDI,(%R15,%R8,8) |
(841) 0x44145b JE 441474 |
(841) 0x44145d MOV (%R9,%R13,8),%R10 |
(841) 0x441461 MOV %R8,(%R10,%RCX,8) |
(841) 0x441465 INC %RCX |
(841) 0x441468 MOV %RDI,(%R15,%R8,8) |
(841) 0x44146c MOV (%R14),%R13 |
(841) 0x44146f MOV -0x8(%R9,%R13,8),%R10 |
(841) 0x441474 MOV 0x10(%R10,%RSI,1),%R8 |
(841) 0x441479 CMP %RDI,(%R15,%R8,8) |
(841) 0x44147d JE 441496 |
(841) 0x44147f MOV (%R9,%R13,8),%R10 |
(841) 0x441483 MOV %R8,(%R10,%RCX,8) |
(841) 0x441487 INC %RCX |
(841) 0x44148a MOV %RDI,(%R15,%R8,8) |
(841) 0x44148e MOV (%R14),%R13 |
(841) 0x441491 MOV -0x8(%R9,%R13,8),%R10 |
(841) 0x441496 MOV 0x18(%R10,%RSI,1),%R8 |
(841) 0x44149b CMP %RDI,(%R15,%R8,8) |
(841) 0x44149f JE 441420 |
(841) 0x4414a5 MOV (%R9,%R13,8),%R10 |
(841) 0x4414a9 MOV %R8,(%R10,%RCX,8) |
(841) 0x4414ad INC %RCX |
(841) 0x4414b0 MOV %RDI,(%R15,%R8,8) |
(841) 0x4414b4 JMP 441420 |
0x4414b9 NOPL (%RAX) |
(836) 0x4414c0 MOV -0x88(%RBP),%RSI |
(836) 0x4414c7 MOV -0x38(%RBP),%R8 |
(836) 0x4414cb MOV (%RSI,%R8,8),%RDX |
(836) 0x4414cf MOV 0x8(%RSI,%R8,8),%R8 |
(836) 0x4414d4 JMP 4414f3 |
0x4414d6 NOPW %CS:(%RAX,%RAX,1) |
(837) 0x4414e0 MOV -0x88(%RBP),%RSI |
(837) 0x4414e7 MOV -0x38(%RBP),%R8 |
(837) 0x4414eb MOV 0x8(%RSI,%R8,8),%R8 |
(837) 0x4414f0 INC %RDX |
(837) 0x4414f3 CMP %R8,%RDX |
(837) 0x4414f6 JGE 441180 |
(837) 0x4414fc MOV -0x138(%RBP),%RSI |
(837) 0x441503 MOV (%RSI,%RDX,8),%R9 |
(837) 0x441507 MOV (%R14),%RSI |
(837) 0x44150a DEC %RSI |
(837) 0x44150d MOV -0x128(%RBP),%R10 |
(837) 0x441514 CMP %RSI,(%R10,%R9,8) |
(837) 0x441518 JNE 4414f0 |
(837) 0x44151a MOV -0x120(%RBP),%RSI |
(837) 0x441521 MOV 0x8(%RSI,%R9,8),%RSI |
(837) 0x441526 TEST %RSI,%RSI |
(837) 0x441529 JLE 4414f0 |
(837) 0x44152b MOV -0x110(%RBP),%R8 |
(837) 0x441532 MOV (%R8,%R9,8),%R8 |
(837) 0x441536 ADD %R8,%RSI |
(837) 0x441539 MOV -0x118(%RBP),%R9 |
(837) 0x441540 MOV (%R9),%R9 |
(837) 0x441543 JMP 44155b |
0x441545 NOPW %CS:(%RAX,%RAX,1) |
(838) 0x441550 MOV %RDI,(%R10) |
(838) 0x441553 INC %R8 |
(838) 0x441556 CMP %RSI,%R8 |
(838) 0x441559 JGE 4414e0 |
(838) 0x44155b MOV (%R14),%R11 |
(838) 0x44155e MOV (%R9,%R11,8),%R10 |
(838) 0x441562 MOV (%R10,%R8,8),%R12 |
(838) 0x441566 TEST %R12,%R12 |
(838) 0x441569 JS 441590 |
(838) 0x44156b CMP %RDI,(%R15,%R12,8) |
(838) 0x44156f JE 441553 |
(838) 0x441571 LEA (%R15,%R12,8),%R10 |
(838) 0x441575 MOV -0x70(%RBP),%R13 |
(838) 0x441579 MOV (%R13),%R13 |
(838) 0x44157d MOV (%R13,%R11,8),%R11 |
(838) 0x441582 MOV %R12,(%R11,%RCX,8) |
(838) 0x441586 INC %RCX |
(838) 0x441589 JMP 441550 |
0x44158b NOPL (%RAX,%RAX,1) |
(838) 0x441590 NOT %R12 |
(838) 0x441593 CMP %RDI,(%RBX,%R12,8) |
(838) 0x441597 JE 441553 |
(838) 0x441599 LEA (%RBX,%R12,8),%R10 |
(838) 0x44159d MOV -0x98(%RBP),%R13 |
(838) 0x4415a4 MOV (%R13),%R13 |
(838) 0x4415a8 MOV (%R13,%R11,8),%R11 |
(838) 0x4415ad MOV %R12,(%R11,%RAX,8) |
(838) 0x4415b1 INC %RAX |
(838) 0x4415b4 JMP 441550 |
0x4415b6 MOV %RBX,%RDI |
0x4415b9 CALL 4cf830 <hypre_Free> |
0x4415be CMPQ $0,-0xf8(%RBP) |
0x4415c6 JNE 4415ea |
0x4415c8 MOV -0x160(%RBP),%RAX |
0x4415cf CMP -0x100(%RBP),%RAX |
0x4415d6 JE 4415ea |
0x4415d8 ADD $0x148,%RSP |
0x4415df POP %RBX |
0x4415e0 POP %R12 |
0x4415e2 POP %R13 |
0x4415e4 POP %R14 |
0x4415e6 POP %R15 |
0x4415e8 POP %RBP |
0x4415e9 RET |
0x4415ea MOV %R15,%RDI |
0x4415ed ADD $0x148,%RSP |
0x4415f4 POP %RBX |
0x4415f5 POP %R12 |
0x4415f7 POP %R13 |
0x4415f9 POP %R14 |
0x4415fb POP %R15 |
0x4415fd POP %RBP |
0x4415fe JMP 4cf830 |
0x441603 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 304 |
nb uops | 324 |
loop length | 1389 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 62 |
micro-operation queue | 54.00 cycles |
front end | 54.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.80 | 14.80 | 39.67 | 39.67 | 31.00 | 14.80 | 14.80 | 31.00 | 31.00 | 31.00 | 14.80 | 39.67 |
cycles | 14.80 | 16.00 | 39.67 | 39.67 | 31.00 | 14.80 | 14.80 | 31.00 | 31.00 | 31.00 | 14.80 | 39.67 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 52.18-52.22 |
Stall cycles | 0.00 |
Front-end | 54.00 |
Dispatch | 39.67 |
DIV/SQRT | 16.00 |
Overall L1 | 54.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4d1410 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4d1400 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4409b7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x167> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RSI | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 4409bd <hypre_BoomerAMGBuildMultipass.extracted.34+0x16d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ESI | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RSI,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RCX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,(%R15) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 440a20 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL -0x48(%RBP),%R12 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R12,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x100(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 440a4b <hypre_BoomerAMGBuildMultipass.extracted.34+0x1fb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 440a76 <hypre_BoomerAMGBuildMultipass.extracted.34+0x226> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 440a76 <hypre_BoomerAMGBuildMultipass.extracted.34+0x226> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4d8930 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 440a76 <hypre_BoomerAMGBuildMultipass.extracted.34+0x226> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 440ec9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x679> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 440ae7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x297> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 440ee7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x697> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x80(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R12,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R13,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51c8b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x48(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 440f4a <hypre_BoomerAMGBuildMultipass.extracted.34+0x6fa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 440f4a <hypre_BoomerAMGBuildMultipass.extracted.34+0x6fa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51c8d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 441093 <hypre_BoomerAMGBuildMultipass.extracted.34+0x843> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x60(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RSI,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JB 441040 <hypre_BoomerAMGBuildMultipass.extracted.34+0x7f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x68(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R8,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD -0x60(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x158(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 441100 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51c8f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 44114c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 441150 <hypre_BoomerAMGBuildMultipass.extracted.34+0x900> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4415b6 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd66> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 441194 <hypre_BoomerAMGBuildMultipass.extracted.34+0x944> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf830 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4415ea <hypre_BoomerAMGBuildMultipass.extracted.34+0xd9a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x100(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4415ea <hypre_BoomerAMGBuildMultipass.extracted.34+0xd9a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4cf830 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 304 |
nb uops | 324 |
loop length | 1389 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 62 |
micro-operation queue | 54.00 cycles |
front end | 54.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.80 | 14.80 | 39.67 | 39.67 | 31.00 | 14.80 | 14.80 | 31.00 | 31.00 | 31.00 | 14.80 | 39.67 |
cycles | 14.80 | 16.00 | 39.67 | 39.67 | 31.00 | 14.80 | 14.80 | 31.00 | 31.00 | 31.00 | 14.80 | 39.67 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 52.18-52.22 |
Stall cycles | 0.00 |
Front-end | 54.00 |
Dispatch | 39.67 |
DIV/SQRT | 16.00 |
Overall L1 | 54.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 4d1410 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4d1400 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 4409b7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x167> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RSI | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 4409bd <hypre_BoomerAMGBuildMultipass.extracted.34+0x16d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ESI | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RSI,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RCX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,(%R15) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 440a20 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL -0x48(%RBP),%R12 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R12,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x100(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R13,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 440a4b <hypre_BoomerAMGBuildMultipass.extracted.34+0x1fb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 440a76 <hypre_BoomerAMGBuildMultipass.extracted.34+0x226> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 440a76 <hypre_BoomerAMGBuildMultipass.extracted.34+0x226> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4d8930 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 440a76 <hypre_BoomerAMGBuildMultipass.extracted.34+0x226> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%RCX,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 440ec9 <hypre_BoomerAMGBuildMultipass.extracted.34+0x679> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 440ae7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x297> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 440ee7 <hypre_BoomerAMGBuildMultipass.extracted.34+0x697> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x80(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%R12,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R13,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51c8b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x48(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 440f4a <hypre_BoomerAMGBuildMultipass.extracted.34+0x6fa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 440f4a <hypre_BoomerAMGBuildMultipass.extracted.34+0x6fa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51c8d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R8,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 441093 <hypre_BoomerAMGBuildMultipass.extracted.34+0x843> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x60(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RSI,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JB 441040 <hypre_BoomerAMGBuildMultipass.extracted.34+0x7f0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x68(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R8,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x18,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xf0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD -0x60(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x158(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R12,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 441100 <hypre_BoomerAMGBuildMultipass.extracted.34+0x8b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 44111c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51c8f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 44114c <hypre_BoomerAMGBuildMultipass.extracted.34+0x8fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x78(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%RDX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 441150 <hypre_BoomerAMGBuildMultipass.extracted.34+0x900> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 4415b6 <hypre_BoomerAMGBuildMultipass.extracted.34+0xd66> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 441194 <hypre_BoomerAMGBuildMultipass.extracted.34+0x944> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf830 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xf8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4415ea <hypre_BoomerAMGBuildMultipass.extracted.34+0xd9a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x100(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4415ea <hypre_BoomerAMGBuildMultipass.extracted.34+0xd9a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x148,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4cf830 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.34– | 2.11 | 0.88 |
○Loop 845 - par_multi_interp.c:1030-1034 - exec | 0.11 | 0.04 |
▼Loop 847 - par_multi_interp.c:917-997 - exec– | 0.06 | 0.02 |
▼Loop 850 - par_multi_interp.c:917-970 - exec– | 0.76 | 0.27 |
○Loop 853 - par_multi_interp.c:951-958 - exec | 0.24 | 0.09 |
○Loop 852 - par_multi_interp.c:963-970 - exec | 0 | 0 |
○Loop 854 - par_multi_interp.c:951-958 - exec | 0 | 0.01 |
○Loop 851 - par_multi_interp.c:963-970 - exec | 0 | 0 |
▼Loop 848 - par_multi_interp.c:976-997 - exec– | 0 | 0.01 |
○Loop 849 - par_multi_interp.c:983-997 - exec | 0 | 0 |
▼Loop 836 - par_multi_interp.c:917-1124 - exec– | 0.05 | 0.02 |
▼Loop 839 - par_multi_interp.c:917-1099 - exec– | 0.65 | 0.23 |
○Loop 842 - par_multi_interp.c:1082-1088 - exec | 0.22 | 0.08 |
○Loop 843 - par_multi_interp.c:1082-1088 - exec | 0 | 0.01 |
○Loop 841 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
○Loop 840 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
▼Loop 837 - par_multi_interp.c:1104-1124 - exec– | 0 | 0.01 |
○Loop 838 - par_multi_interp.c:1111-1124 - exec | 0 | 0 |
○Loop 855 - par_multi_interp.c:917-918 - exec | 0.01 | 0.01 |
○Loop 846 - par_multi_interp.c:1017-1020 - exec | 0 | 0 |
○Loop 844 - par_multi_interp.c:1030-1034 - exec | 0 | 0 |