Function: hypre_BoomerAMGBuildExtPIInterp.extracted | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage: 0.26% |
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Function: hypre_BoomerAMGBuildExtPIInterp.extracted | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage: 0.26% |
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/home/eoseret/qaas_runs_CPU_9468/171-586-9096/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1196 - 1757 |
-------------------------------------------------------------------------------- |
1196: #pragma omp parallel private(i,my_thread_num,num_threads,start,stop,coarse_counter,jj_counter,jj_counter_offd, P_marker, P_marker_offd,jj,kk,i1,k1,loc_col,jj_begin_row,jj_begin_row_offd,jj_end_row,jj_end_row_offd,diagonal,sum,sgn,jj1,i2,distribute,strong_f_marker) |
[...] |
1221: if (n_fine) |
1222: { |
1223: P_marker = hypre_CTAlloc(HYPRE_Int, n_fine); |
1224: for (i = 0; i < n_fine; i++) |
1225: { P_marker[i] = -1; } |
1226: } |
1227: if (full_off_procNodes) |
1228: { |
1229: P_marker_offd = hypre_CTAlloc(HYPRE_Int, full_off_procNodes); |
1230: for (i = 0; i < full_off_procNodes; i++) |
1231: { P_marker_offd[i] = -1;} |
1232: } |
1233: |
1234: /* this thread's row range */ |
1235: my_thread_num = hypre_GetThreadNum(); |
1236: num_threads = hypre_NumActiveThreads(); |
1237: start = (n_fine/num_threads)*my_thread_num; |
1238: if (my_thread_num == num_threads-1) |
[...] |
1244: for (i = start; i < stop; i++) |
1245: { |
1246: P_diag_i[i] = jj_counter; |
1247: if (num_procs > 1) |
1248: P_offd_i[i] = jj_counter_offd; |
1249: |
1250: if (CF_marker[i] >= 0) |
1251: { |
1252: jj_counter++; |
1253: fine_to_coarse[i] = coarse_counter; |
1254: coarse_counter++; |
[...] |
1262: else if (CF_marker[i] != -3) |
1263: { |
1264: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1265: { |
1266: i1 = S_diag_j[jj]; |
1267: if (CF_marker[i1] >= 0) |
1268: { /* i1 is a C point */ |
1269: if (P_marker[i1] < P_diag_i[i]) |
1270: { |
1271: P_marker[i1] = jj_counter; |
1272: jj_counter++; |
1273: } |
1274: } |
1275: else if (CF_marker[i1] != -3) |
1276: { /* i1 is a F point, loop through it's strong neighbors */ |
1277: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1278: { |
1279: k1 = S_diag_j[kk]; |
1280: if (CF_marker[k1] >= 0) |
1281: { |
1282: if(P_marker[k1] < P_diag_i[i]) |
1283: { |
1284: P_marker[k1] = jj_counter; |
1285: jj_counter++; |
1286: } |
1287: } |
1288: } |
1289: if(num_procs > 1) |
1290: { |
1291: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1292: { |
1293: if(col_offd_S_to_A) |
1294: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1295: else |
1296: k1 = S_offd_j[kk]; |
1297: if (CF_marker_offd[k1] >= 0) |
1298: { |
1299: if(P_marker_offd[k1] < P_offd_i[i]) |
1300: { |
1301: tmp_CF_marker_offd[k1] = 1; |
1302: P_marker_offd[k1] = jj_counter_offd; |
1303: jj_counter_offd++; |
[...] |
1311: if (num_procs > 1) |
1312: { |
1313: for (jj = S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1314: { |
1315: i1 = S_offd_j[jj]; |
1316: if(col_offd_S_to_A) |
1317: i1 = col_offd_S_to_A[i1]; |
1318: if (CF_marker_offd[i1] >= 0) |
1319: { |
1320: if(P_marker_offd[i1] < P_offd_i[i]) |
1321: { |
1322: tmp_CF_marker_offd[i1] = 1; |
1323: P_marker_offd[i1] = jj_counter_offd; |
1324: jj_counter_offd++; |
1325: } |
1326: } |
1327: else if (CF_marker_offd[i1] != -3) |
1328: { /* F point; look at neighbors of i1. Sop contains global col |
1329: * numbers and entries that could be in S_diag or S_offd or |
1330: * neither. */ |
1331: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1332: { |
1333: k1 = Sop_j[kk]; |
1334: if(k1 >= col_1 && k1 < col_n) |
1335: { /* In S_diag */ |
1336: loc_col = k1-col_1; |
1337: if(P_marker[loc_col] < P_diag_i[i]) |
1338: { |
1339: P_marker[loc_col] = jj_counter; |
1340: jj_counter++; |
1341: } |
1342: } |
1343: else |
1344: { |
1345: loc_col = -k1 - 1; |
1346: if(P_marker_offd[loc_col] < P_offd_i[i]) |
1347: { |
1348: P_marker_offd[loc_col] = jj_counter_offd; |
1349: tmp_CF_marker_offd[loc_col] = 1; |
1350: jj_counter_offd++; |
[...] |
1365: P_diag_i[stop] = jj_counter; |
1366: P_offd_i[stop] = jj_counter_offd; |
1367: fine_to_coarse_offset[my_thread_num] = coarse_counter; |
1368: diag_offset[my_thread_num] = jj_counter; |
1369: offd_offset[my_thread_num] = jj_counter_offd; |
[...] |
1375: if(my_thread_num == 0) |
1376: { |
1377: /* Calculate the offset for P_diag_i and P_offd_i for each thread */ |
1378: for (i = 1; i < num_threads; i++) |
1379: { |
1380: diag_offset[i] = diag_offset[i-1] + diag_offset[i]; |
1381: fine_to_coarse_offset[i] = fine_to_coarse_offset[i-1] + fine_to_coarse_offset[i]; |
1382: offd_offset[i] = offd_offset[i-1] + offd_offset[i]; |
[...] |
1389: if(my_thread_num > 0) |
1390: { |
1391: /* update row pointer array with offset, |
1392: * making sure to update the row stop index */ |
1393: for (i = start+1; i <= stop; i++) |
1394: { |
1395: P_diag_i[i] += diag_offset[my_thread_num-1]; |
1396: P_offd_i[i] += offd_offset[my_thread_num-1]; |
1397: } |
1398: /* update fine_to_coarse by offsetting with the offset |
1399: * from the preceding thread */ |
1400: for (i = start; i < stop; i++) |
1401: { |
1402: if(fine_to_coarse[i] >= 0) |
1403: { fine_to_coarse[i] += fine_to_coarse_offset[my_thread_num-1]; } |
[...] |
1410: if(my_thread_num == 0) |
1411: { |
1412: if (debug_flag==4) |
1413: { |
1414: wall_time = time_getWallclockSeconds() - wall_time; |
1415: hypre_printf("Proc = %d determine structure %f\n", |
1416: my_id, wall_time); |
1417: fflush(NULL); |
[...] |
1423: if (debug_flag== 4) wall_time = time_getWallclockSeconds(); |
1424: |
1425: P_diag_size = P_diag_i[n_fine]; |
1426: P_offd_size = P_offd_i[n_fine]; |
1427: |
1428: if (P_diag_size) |
1429: { |
1430: P_diag_j = hypre_CTAlloc(HYPRE_Int, P_diag_size); |
1431: P_diag_data = hypre_CTAlloc(HYPRE_Real, P_diag_size); |
1432: } |
1433: |
1434: if (P_offd_size) |
1435: { |
1436: P_offd_j = hypre_CTAlloc(HYPRE_Int, P_offd_size); |
1437: P_offd_data = hypre_CTAlloc(HYPRE_Real, P_offd_size); |
1438: } |
1439: } |
1440: |
1441: /* Fine to coarse mapping */ |
1442: if(num_procs > 1 && my_thread_num == 0) |
1443: { |
1444: for (i = 0; i < n_fine; i++) |
1445: fine_to_coarse[i] += my_first_cpt; |
1446: |
1447: hypre_alt_insert_new_nodes(comm_pkg, extend_comm_pkg, fine_to_coarse, |
1448: full_off_procNodes, |
1449: fine_to_coarse_offd); |
1450: |
1451: for (i = 0; i < n_fine; i++) |
1452: fine_to_coarse[i] -= my_first_cpt; |
1453: } |
1454: |
1455: for (i = 0; i < n_fine; i++) |
1456: P_marker[i] = -1; |
1457: |
1458: for (i = 0; i < full_off_procNodes; i++) |
1459: P_marker_offd[i] = -1; |
[...] |
1469: for (i = start; i < stop; i++) |
1470: { |
1471: jj_begin_row = P_diag_i[i]; |
1472: jj_begin_row_offd = P_offd_i[i]; |
[...] |
1480: if (CF_marker[i] >= 0) |
1481: { |
1482: P_diag_j[jj_counter] = fine_to_coarse[i]; |
1483: P_diag_data[jj_counter] = one; |
[...] |
1491: else if (CF_marker[i] != -3) |
1492: { |
1493: strong_f_marker--; |
1494: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1495: { |
1496: i1 = S_diag_j[jj]; |
[...] |
1503: if (CF_marker[i1] >= 0) |
1504: { |
1505: if (P_marker[i1] < jj_begin_row) |
1506: { |
1507: P_marker[i1] = jj_counter; |
1508: P_diag_j[jj_counter] = fine_to_coarse[i1]; |
1509: P_diag_data[jj_counter] = zero; |
1510: jj_counter++; |
1511: } |
1512: } |
1513: else if (CF_marker[i1] != -3) |
1514: { |
1515: P_marker[i1] = strong_f_marker; |
1516: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1517: { |
1518: k1 = S_diag_j[kk]; |
1519: if (CF_marker[k1] >= 0) |
1520: { |
1521: if(P_marker[k1] < jj_begin_row) |
1522: { |
1523: P_marker[k1] = jj_counter; |
1524: P_diag_j[jj_counter] = fine_to_coarse[k1]; |
1525: P_diag_data[jj_counter] = zero; |
1526: jj_counter++; |
1527: } |
1528: } |
1529: } |
1530: if(num_procs > 1) |
1531: { |
1532: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1533: { |
1534: if(col_offd_S_to_A) |
1535: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1536: else |
1537: k1 = S_offd_j[kk]; |
1538: if(CF_marker_offd[k1] >= 0) |
1539: { |
1540: if(P_marker_offd[k1] < jj_begin_row_offd) |
1541: { |
1542: P_marker_offd[k1] = jj_counter_offd; |
1543: P_offd_j[jj_counter_offd] = k1; |
1544: P_offd_data[jj_counter_offd] = zero; |
1545: jj_counter_offd++; |
[...] |
1553: if ( num_procs > 1) |
1554: { |
1555: for (jj=S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1556: { |
1557: i1 = S_offd_j[jj]; |
1558: if(col_offd_S_to_A) |
1559: i1 = col_offd_S_to_A[i1]; |
1560: if ( CF_marker_offd[i1] >= 0) |
1561: { |
1562: if(P_marker_offd[i1] < jj_begin_row_offd) |
1563: { |
1564: P_marker_offd[i1] = jj_counter_offd; |
1565: P_offd_j[jj_counter_offd] = i1; |
1566: P_offd_data[jj_counter_offd] = zero; |
1567: jj_counter_offd++; |
1568: } |
1569: } |
1570: else if (CF_marker_offd[i1] != -3) |
1571: { |
1572: P_marker_offd[i1] = strong_f_marker; |
1573: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1574: { |
1575: k1 = Sop_j[kk]; |
1576: /* Find local col number */ |
1577: if(k1 >= col_1 && k1 < col_n) |
1578: { |
1579: loc_col = k1-col_1; |
1580: if(P_marker[loc_col] < jj_begin_row) |
1581: { |
1582: P_marker[loc_col] = jj_counter; |
1583: P_diag_j[jj_counter] = fine_to_coarse[loc_col]; |
1584: P_diag_data[jj_counter] = zero; |
1585: jj_counter++; |
1586: } |
1587: } |
1588: else |
1589: { |
1590: loc_col = -k1 - 1; |
1591: if(P_marker_offd[loc_col] < jj_begin_row_offd) |
1592: { |
1593: P_marker_offd[loc_col] = jj_counter_offd; |
1594: P_offd_j[jj_counter_offd]=loc_col; |
1595: P_offd_data[jj_counter_offd] = zero; |
1596: jj_counter_offd++; |
[...] |
1607: diagonal = A_diag_data[A_diag_i[i]]; |
1608: |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
1676: } |
1677: } |
1678: if(num_procs > 1) |
1679: { |
1680: for(jj = A_offd_i[i]; jj < A_offd_i[i+1]; jj++) |
1681: { |
1682: i1 = A_offd_j[jj]; |
1683: if(P_marker_offd[i1] >= jj_begin_row_offd) |
1684: P_offd_data[P_marker_offd[i1]] += A_offd_data[jj]; |
1685: else if(P_marker_offd[i1] == strong_f_marker) |
1686: { |
1687: sum = zero; |
1688: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1689: { |
1690: k1 = A_ext_j[jj1]; |
1691: if(k1 >= col_1 && k1 < col_n) |
1692: { /* diag */ |
1693: loc_col = k1 - col_1; |
1694: if(P_marker[loc_col] >= jj_begin_row || loc_col == i) |
1695: sum += A_ext_data[jj1]; |
1696: } |
1697: else |
1698: { |
1699: loc_col = -k1 - 1; |
1700: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1701: sum += A_ext_data[jj1]; |
1702: } |
1703: } |
1704: if(sum != 0) |
1705: { |
1706: distribute = A_offd_data[jj] / sum; |
1707: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1708: { |
1709: k1 = A_ext_j[jj1]; |
1710: if(k1 >= col_1 && k1 < col_n) |
1711: { /* diag */ |
1712: loc_col = k1 - col_1; |
1713: if(P_marker[loc_col] >= jj_begin_row) |
1714: P_diag_data[P_marker[loc_col]] += distribute* |
1715: A_ext_data[jj1]; |
1716: if(loc_col == i) |
1717: diagonal += distribute*A_ext_data[jj1]; |
1718: } |
1719: else |
1720: { |
1721: loc_col = -k1 - 1; |
1722: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1723: P_offd_data[P_marker_offd[loc_col]] += distribute* |
1724: A_ext_data[jj1]; |
[...] |
1733: else if (CF_marker_offd[i1] != -3) |
1734: { |
1735: if(num_functions == 1 || dof_func[i] == dof_func_offd[i1]) |
1736: diagonal += A_offd_data[jj]; |
1737: } |
1738: } |
1739: } |
1740: if (diagonal) |
1741: { |
1742: for(jj = jj_begin_row; jj < jj_end_row; jj++) |
1743: P_diag_data[jj] /= -diagonal; |
1744: for(jj = jj_begin_row_offd; jj < jj_end_row_offd; jj++) |
1745: P_offd_data[jj] /= -diagonal; |
1746: } |
1747: } |
1748: strong_f_marker--; |
[...] |
1754: if (n_fine) |
1755: { hypre_TFree(P_marker); } |
1756: if (full_off_procNodes) |
1757: { hypre_TFree(P_marker_offd); } |
0x44ea40 PUSH %RBP |
0x44ea41 MOV %RSP,%RBP |
0x44ea44 PUSH %R15 |
0x44ea46 PUSH %R14 |
0x44ea48 PUSH %R13 |
0x44ea4a PUSH %R12 |
0x44ea4c PUSH %RBX |
0x44ea4d SUB $0x1c8,%RSP |
0x44ea54 MOV %R9,-0x170(%RBP) |
0x44ea5b MOV %R8,-0x188(%RBP) |
0x44ea62 MOV %RCX,-0x190(%RBP) |
0x44ea69 MOV %RDX,%R14 |
0x44ea6c MOV %RDI,-0x60(%RBP) |
0x44ea70 MOV 0x170(%RBP),%RBX |
0x44ea77 MOV 0x168(%RBP),%RAX |
0x44ea7e MOV %RAX,-0x1b8(%RBP) |
0x44ea85 MOV 0x150(%RBP),%RAX |
0x44ea8c MOV %RAX,-0xe0(%RBP) |
0x44ea93 MOV 0x148(%RBP),%RAX |
0x44ea9a MOV %RAX,-0xa0(%RBP) |
0x44eaa1 MOV 0x140(%RBP),%RAX |
0x44eaa8 MOV %RAX,-0x58(%RBP) |
0x44eaac MOV 0x130(%RBP),%RAX |
0x44eab3 MOV %RAX,-0x1a0(%RBP) |
0x44eaba MOV 0x128(%RBP),%RAX |
0x44eac1 MOV %RAX,-0xb8(%RBP) |
0x44eac8 MOV 0x120(%RBP),%RAX |
0x44eacf MOV 0x118(%RBP),%RCX |
0x44ead6 MOV %RCX,-0x1c8(%RBP) |
0x44eadd MOV 0x110(%RBP),%R15 |
0x44eae4 MOV 0x108(%RBP),%RCX |
0x44eaeb MOV %RCX,-0x1e8(%RBP) |
0x44eaf2 MOV 0x100(%RBP),%RCX |
0x44eaf9 MOV %RCX,-0x1e0(%RBP) |
0x44eb00 MOV 0xf8(%RBP),%RCX |
0x44eb07 MOV %RCX,-0x108(%RBP) |
0x44eb0e MOV 0xf0(%RBP),%RCX |
0x44eb15 MOV %RCX,-0x1d8(%RBP) |
0x44eb1c MOV 0xe8(%RBP),%RCX |
0x44eb23 MOV %RCX,-0x38(%RBP) |
0x44eb27 MOV 0xe0(%RBP),%RCX |
0x44eb2e MOV %RCX,-0x120(%RBP) |
0x44eb35 MOV 0xd8(%RBP),%RCX |
0x44eb3c MOV %RCX,-0xf8(%RBP) |
0x44eb43 MOV 0xd0(%RBP),%RCX |
0x44eb4a MOV %RCX,-0x178(%RBP) |
0x44eb51 MOV 0xc8(%RBP),%RCX |
0x44eb58 MOV %RCX,-0x148(%RBP) |
0x44eb5f MOV 0xc0(%RBP),%RCX |
0x44eb66 MOV %RCX,-0x70(%RBP) |
0x44eb6a MOV 0xb8(%RBP),%RCX |
0x44eb71 MOV %RCX,-0x68(%RBP) |
0x44eb75 MOV 0xb0(%RBP),%RCX |
0x44eb7c MOV %RCX,-0x100(%RBP) |
0x44eb83 MOV 0xa8(%RBP),%RCX |
0x44eb8a MOV %RCX,-0x50(%RBP) |
0x44eb8e MOV 0xa0(%RBP),%RCX |
0x44eb95 MOV %RCX,-0x138(%RBP) |
0x44eb9c MOV 0x98(%RBP),%RCX |
0x44eba3 MOV %RCX,-0x150(%RBP) |
0x44ebaa MOV 0x90(%RBP),%RCX |
0x44ebb1 MOV %RCX,-0xc0(%RBP) |
0x44ebb8 MOV 0x88(%RBP),%RCX |
0x44ebbf MOV %RCX,-0x168(%RBP) |
0x44ebc6 MOV 0x80(%RBP),%RCX |
0x44ebcd MOV %RCX,-0xc8(%RBP) |
0x44ebd4 MOV 0x78(%RBP),%RCX |
0x44ebd8 MOV %RCX,-0xf0(%RBP) |
0x44ebdf MOV 0x70(%RBP),%RCX |
0x44ebe3 MOV %RCX,-0x110(%RBP) |
0x44ebea MOV 0x68(%RBP),%RCX |
0x44ebee MOV %RCX,-0x118(%RBP) |
0x44ebf5 MOV 0x60(%RBP),%RCX |
0x44ebf9 MOV %RCX,-0x88(%RBP) |
0x44ec00 MOV 0x58(%RBP),%RDX |
0x44ec04 MOV %RDX,-0x140(%RBP) |
0x44ec0b MOV 0x50(%RBP),%RDX |
0x44ec0f MOV %RDX,-0x180(%RBP) |
0x44ec16 MOV 0x48(%RBP),%RDX |
0x44ec1a MOV %RDX,-0x78(%RBP) |
0x44ec1e MOV 0x40(%RBP),%RDX |
0x44ec22 MOV %RDX,-0x160(%RBP) |
0x44ec29 MOV 0x38(%RBP),%RDX |
0x44ec2d MOV %RDX,-0x198(%RBP) |
0x44ec34 MOV 0x30(%RBP),%RDX |
0x44ec38 MOV %RDX,-0x90(%RBP) |
0x44ec3f MOV 0x28(%RBP),%RDX |
0x44ec43 MOV %RDX,-0xb0(%RBP) |
0x44ec4a MOV 0x20(%RBP),%RDX |
0x44ec4e MOV %RDX,-0x1b0(%RBP) |
0x44ec55 MOV 0x18(%RBP),%RDX |
0x44ec59 MOV %RDX,-0x1c0(%RBP) |
0x44ec60 MOV 0x10(%RBP),%RDX |
0x44ec64 MOV %RDX,-0x158(%RBP) |
0x44ec6b MOV (%RCX),%RDI |
0x44ec6e TEST %RDI,%RDI |
0x44ec71 MOV %RAX,-0xe8(%RBP) |
0x44ec78 MOV %RBX,-0x1d0(%RBP) |
0x44ec7f JE 44ecba |
0x44ec81 MOV $0x8,%ESI |
0x44ec86 CALL 4cf760 <hypre_CAlloc> |
0x44ec8b MOV -0x88(%RBP),%RCX |
0x44ec92 MOV %RAX,%R13 |
0x44ec95 CMPQ $0,(%RCX) |
0x44ec99 JLE 44ecb1 |
0x44ec9b XOR %EAX,%EAX |
0x44ec9d NOPL (%RAX) |
(1168) 0x44eca0 MOVQ $-0x1,(%R13,%RAX,8) |
(1168) 0x44eca9 INC %RAX |
(1168) 0x44ecac CMP (%RCX),%RAX |
(1168) 0x44ecaf JL 44eca0 |
0x44ecb1 MOV -0xe8(%RBP),%RAX |
0x44ecb8 JMP 44ecba |
0x44ecba MOV (%RAX),%RDI |
0x44ecbd TEST %RDI,%RDI |
0x44ecc0 JE 44ecf2 |
0x44ecc2 MOV %RAX,%RBX |
0x44ecc5 MOV $0x8,%ESI |
0x44ecca CALL 4cf760 <hypre_CAlloc> |
0x44eccf CMPQ $0,(%RBX) |
0x44ecd3 MOV %RAX,-0x40(%RBP) |
0x44ecd7 JLE 44ecf2 |
0x44ecd9 MOV %RBX,%RCX |
0x44ecdc XOR %EDX,%EDX |
0x44ecde XCHG %AX,%AX |
(1167) 0x44ece0 MOVQ $-0x1,(%RAX,%RDX,8) |
(1167) 0x44ece8 INC %RDX |
(1167) 0x44eceb CMP (%RCX),%RDX |
(1167) 0x44ecee JL 44ece0 |
0x44ecf0 JMP 44ecf2 |
0x44ecf2 CALL 4d1410 <hypre_GetThreadNum> |
0x44ecf7 MOV %RAX,-0x80(%RBP) |
0x44ecfb CALL 4d1400 <hypre_NumActiveThreads> |
0x44ed00 MOV %RAX,%R8 |
0x44ed03 MOV -0x88(%RBP),%RAX |
0x44ed0a MOV (%RAX),%RCX |
0x44ed0d MOV %RCX,%RAX |
0x44ed10 OR %R8,%RAX |
0x44ed13 SHR $0x20,%RAX |
0x44ed17 JE 44ed23 |
0x44ed19 MOV %RCX,%RAX |
0x44ed1c CQTO |
0x44ed1e IDIV %R8 |
0x44ed21 JMP 44ed2a |
0x44ed23 MOV %ECX,%EAX |
0x44ed25 XOR %EDX,%EDX |
0x44ed27 DIV %R8D |
0x44ed2a MOV -0x50(%RBP),%RBX |
0x44ed2e MOV %R15,-0xd0(%RBP) |
0x44ed35 MOV %RAX,%RDI |
0x44ed38 MOV -0x80(%RBP),%RSI |
0x44ed3c IMUL %RSI,%RDI |
0x44ed40 LEA -0x1(%R8),%R9 |
0x44ed44 LEA 0x1(%RSI),%RDX |
0x44ed48 MOV %RAX,-0x1a8(%RBP) |
0x44ed4f IMUL %RAX,%RDX |
0x44ed53 MOV %R9,%RAX |
0x44ed56 MOV %R9,-0x98(%RBP) |
0x44ed5d CMP %R9,%RSI |
0x44ed60 CMOVE %RCX,%RDX |
0x44ed64 MOV %RDX,-0xa8(%RBP) |
0x44ed6b CMP %RDI,%RDX |
0x44ed6e MOV -0xb8(%RBP),%R11 |
0x44ed75 MOV %R13,-0x128(%RBP) |
0x44ed7c MOV %RDI,%RCX |
0x44ed7f MOV %RDI,-0x30(%RBP) |
0x44ed83 MOV %R8,-0xd8(%RBP) |
0x44ed8a JG 44ee98 |
0x44ed90 XOR %EDX,%EDX |
0x44ed92 XOR %R15D,%R15D |
0x44ed95 XOR %R12D,%R12D |
0x44ed98 MOV %RDX,-0x48(%RBP) |
0x44ed9c MOV -0x60(%RBP),%RAX |
0x44eda0 MOV (%RAX),%ESI |
0x44eda2 MOV $0x51cf90,%EDI |
0x44eda7 CALL 410570 <__kmpc_barrier@plt> |
0x44edac MOV -0xa8(%RBP),%RCX |
0x44edb3 MOV %R15,(%RBX,%RCX,8) |
0x44edb7 MOV -0x70(%RBP),%RAX |
0x44edbb MOV %R12,(%RAX,%RCX,8) |
0x44edbf MOV -0xa0(%RBP),%RAX |
0x44edc6 MOV -0x80(%RBP),%RBX |
0x44edca MOV -0x48(%RBP),%RCX |
0x44edce MOV %RCX,(%RAX,%RBX,8) |
0x44edd2 MOV -0x58(%RBP),%RCX |
0x44edd6 MOV %R15,(%RCX,%RBX,8) |
0x44edda MOV %RAX,%R15 |
0x44eddd MOV -0xe0(%RBP),%RAX |
0x44ede4 MOV %R12,(%RAX,%RBX,8) |
0x44ede8 MOV %RAX,%R12 |
0x44edeb MOV -0x60(%RBP),%RAX |
0x44edef MOV (%RAX),%ESI |
0x44edf1 MOV $0x51cfb0,%EDI |
0x44edf6 CALL 410570 <__kmpc_barrier@plt> |
0x44edfb MOV -0x58(%RBP),%R11 |
0x44edff MOV %R12,%R10 |
0x44ee02 TEST %RBX,%RBX |
0x44ee05 MOV -0xd0(%RBP),%R12 |
0x44ee0c MOV -0x138(%RBP),%RBX |
0x44ee13 MOV -0xd8(%RBP),%R9 |
0x44ee1a JNE 44f303 |
0x44ee20 CMP $0x1,%R9 |
0x44ee24 JLE 44f303 |
0x44ee2a MOV -0x98(%RBP),%RDX |
0x44ee31 LEA (%R11,%RDX,8),%RAX |
0x44ee35 CMP %R15,%RAX |
0x44ee38 SETAE %DIL |
0x44ee3c LEA (%R15,%RDX,8),%RCX |
0x44ee40 CMP %R11,%RCX |
0x44ee43 SETAE %R8B |
0x44ee47 CMP %R10,%RAX |
0x44ee4a SETB %AL |
0x44ee4d LEA (%R10,%RDX,8),%RDX |
0x44ee51 CMP %R11,%RDX |
0x44ee54 SETB %SIL |
0x44ee58 CMP %R10,%RCX |
0x44ee5b SETB %CL |
0x44ee5e CMP %R15,%RDX |
0x44ee61 SETB %DL |
0x44ee64 TEST %R8B,%DIL |
0x44ee67 JNE 44f1c4 |
0x44ee6d OR %SIL,%AL |
0x44ee70 JE 44f1c4 |
0x44ee76 OR %DL,%CL |
0x44ee78 JE 44f1c4 |
0x44ee7e MOV (%R11),%RDX |
0x44ee81 MOV (%R15),%RCX |
0x44ee84 MOV (%R10),%RAX |
0x44ee87 CMP $0x2,%R9 |
0x44ee8b JNE 44f255 |
0x44ee91 XOR %EDI,%EDI |
0x44ee93 JMP 44f2b8 |
0x44ee98 XOR %R12D,%R12D |
0x44ee9b MOV %RDI,%RAX |
0x44ee9e XOR %R15D,%R15D |
0x44eea1 XOR %EDX,%EDX |
0x44eea3 JMP 44eeda |
0x44eea5 NOPW %CS:(%RAX,%RAX,1) |
(1161) 0x44eeb0 MOV (%R14,%RAX,8),%RCX |
(1161) 0x44eeb4 TEST %RCX,%RCX |
(1161) 0x44eeb7 JS 44ef00 |
(1161) 0x44eeb9 INC %R15 |
(1161) 0x44eebc MOV -0xd0(%RBP),%RCX |
(1161) 0x44eec3 MOV %RDX,(%RCX,%RAX,8) |
(1161) 0x44eec7 INC %RDX |
(1161) 0x44eeca INC %RAX |
(1161) 0x44eecd CMP -0xa8(%RBP),%RAX |
(1161) 0x44eed4 JGE 44ed98 |
(1161) 0x44eeda MOV %R15,(%RBX,%RAX,8) |
(1161) 0x44eede MOV -0xb0(%RBP),%RCX |
(1161) 0x44eee5 CMPQ $0x2,(%RCX) |
(1161) 0x44eee9 JL 44eeb0 |
(1161) 0x44eeeb MOV -0x70(%RBP),%RCX |
(1161) 0x44eeef MOV %R12,(%RCX,%RAX,8) |
(1161) 0x44eef3 JMP 44eeb0 |
0x44eef5 NOPW %CS:(%RAX,%RAX,1) |
(1161) 0x44ef00 CMP $-0x3,%RCX |
(1161) 0x44ef04 JE 44eeca |
(1161) 0x44ef06 MOV %RDX,-0x48(%RBP) |
(1161) 0x44ef0a MOV -0xc8(%RBP),%RDX |
(1161) 0x44ef11 MOV (%RDX,%RAX,8),%RCX |
(1161) 0x44ef15 JMP 44ef2a |
0x44ef17 NOPW (%RAX,%RAX,1) |
(1164) 0x44ef20 INC %RCX |
(1164) 0x44ef23 MOV -0xc8(%RBP),%RDX |
(1164) 0x44ef2a CMP 0x8(%RDX,%RAX,8),%RCX |
(1164) 0x44ef2f JGE 44f07b |
(1164) 0x44ef35 MOV -0x168(%RBP),%RDX |
(1164) 0x44ef3c MOV (%RDX,%RCX,8),%RDX |
(1164) 0x44ef40 MOV (%R14,%RDX,8),%RSI |
(1164) 0x44ef44 TEST %RSI,%RSI |
(1164) 0x44ef47 JS 44ef60 |
(1164) 0x44ef49 MOV (%R13,%RDX,8),%RSI |
(1164) 0x44ef4e CMP (%RBX,%RAX,8),%RSI |
(1164) 0x44ef52 JGE 44ef20 |
(1164) 0x44ef54 MOV %R15,(%R13,%RDX,8) |
(1164) 0x44ef59 INC %R15 |
(1164) 0x44ef5c JMP 44ef20 |
0x44ef5e XCHG %AX,%AX |
(1164) 0x44ef60 CMP $-0x3,%RSI |
(1164) 0x44ef64 JE 44ef20 |
(1164) 0x44ef66 MOV -0xc8(%RBP),%RDI |
(1164) 0x44ef6d MOV (%RDI,%RDX,8),%RSI |
(1164) 0x44ef71 MOV 0x8(%RDI,%RDX,8),%RDI |
(1164) 0x44ef76 JMP 44ef83 |
0x44ef78 NOPL (%RAX,%RAX,1) |
(1166) 0x44ef80 INC %RSI |
(1166) 0x44ef83 CMP %RDI,%RSI |
(1166) 0x44ef86 JGE 44efbb |
(1166) 0x44ef88 MOV -0x168(%RBP),%R8 |
(1166) 0x44ef8f MOV (%R8,%RSI,8),%R8 |
(1166) 0x44ef93 CMPQ $0,(%R14,%R8,8) |
(1166) 0x44ef98 JS 44ef80 |
(1166) 0x44ef9a MOV (%R13,%R8,8),%R9 |
(1166) 0x44ef9f CMP (%RBX,%RAX,8),%R9 |
(1166) 0x44efa3 JGE 44ef80 |
(1166) 0x44efa5 MOV %R15,(%R13,%R8,8) |
(1166) 0x44efaa INC %R15 |
(1166) 0x44efad MOV -0xc8(%RBP),%RDI |
(1166) 0x44efb4 MOV 0x8(%RDI,%RDX,8),%RDI |
(1166) 0x44efb9 JMP 44ef80 |
(1164) 0x44efbb MOV -0xb0(%RBP),%RSI |
(1164) 0x44efc2 CMPQ $0x2,(%RSI) |
(1164) 0x44efc6 JL 44ef20 |
(1164) 0x44efcc MOV -0xc0(%RBP),%RDI |
(1164) 0x44efd3 MOV (%RDI,%RDX,8),%RSI |
(1164) 0x44efd7 MOV 0x8(%RDI,%RDX,8),%R9 |
(1164) 0x44efdc CMP %R9,%RSI |
(1164) 0x44efdf JGE 44ef20 |
(1164) 0x44efe5 MOV -0x120(%RBP),%RDI |
(1164) 0x44efec MOV (%RDI),%RDI |
(1164) 0x44efef MOV -0x150(%RBP),%R8 |
(1164) 0x44eff6 LEA (%R8,%RSI,8),%R8 |
(1164) 0x44effa JMP 44f014 |
0x44effc NOPL (%RAX) |
(1165) 0x44f000 MOV -0x50(%RBP),%RBX |
(1165) 0x44f004 INC %RSI |
(1165) 0x44f007 ADD $0x8,%R8 |
(1165) 0x44f00b CMP %R9,%RSI |
(1165) 0x44f00e JGE 44ef20 |
(1165) 0x44f014 MOV %R8,%R10 |
(1165) 0x44f017 MOV -0x158(%RBP),%RBX |
(1165) 0x44f01e TEST %RBX,%RBX |
(1165) 0x44f021 JE 44f02a |
(1165) 0x44f023 MOV (%R8),%R10 |
(1165) 0x44f026 LEA (%RBX,%R10,8),%R10 |
(1165) 0x44f02a MOV (%R10),%R10 |
(1165) 0x44f02d CMPQ $0,(%RDI,%R10,8) |
(1165) 0x44f032 JS 44f000 |
(1165) 0x44f034 MOV -0x40(%RBP),%R13 |
(1165) 0x44f038 MOV (%R13,%R10,8),%R11 |
(1165) 0x44f03d MOV -0x70(%RBP),%RBX |
(1165) 0x44f041 CMP (%RBX,%RAX,8),%R11 |
(1165) 0x44f045 JGE 44f067 |
(1165) 0x44f047 MOV -0x38(%RBP),%R9 |
(1165) 0x44f04b MOVQ $0x1,(%R9,%R10,8) |
(1165) 0x44f053 MOV %R12,(%R13,%R10,8) |
(1165) 0x44f058 INC %R12 |
(1165) 0x44f05b MOV -0xc0(%RBP),%R9 |
(1165) 0x44f062 MOV 0x8(%R9,%RDX,8),%R9 |
(1165) 0x44f067 MOV -0xb8(%RBP),%R11 |
(1165) 0x44f06e MOV -0x50(%RBP),%RBX |
(1165) 0x44f072 MOV -0x128(%RBP),%R13 |
(1165) 0x44f079 JMP 44f004 |
(1161) 0x44f07b MOV -0xb0(%RBP),%RCX |
(1161) 0x44f082 CMPQ $0x2,(%RCX) |
(1161) 0x44f086 JL 44f1bb |
(1161) 0x44f08c MOV -0xc0(%RBP),%RDX |
(1161) 0x44f093 MOV (%RDX,%RAX,8),%RCX |
(1161) 0x44f097 CMP 0x8(%RDX,%RAX,8),%RCX |
(1161) 0x44f09c JGE 44f1bb |
(1161) 0x44f0a2 MOV -0x120(%RBP),%RDX |
(1161) 0x44f0a9 MOV (%RDX),%RDX |
(1161) 0x44f0ac JMP 44f0c5 |
0x44f0ae XCHG %AX,%AX |
(1162) 0x44f0b0 INC %RCX |
(1162) 0x44f0b3 MOV -0xc0(%RBP),%RSI |
(1162) 0x44f0ba CMP 0x8(%RSI,%RAX,8),%RCX |
(1162) 0x44f0bf JGE 44f1bb |
(1162) 0x44f0c5 MOV -0x150(%RBP),%RSI |
(1162) 0x44f0cc MOV (%RSI,%RCX,8),%RSI |
(1162) 0x44f0d0 MOV -0x158(%RBP),%RDI |
(1162) 0x44f0d7 TEST %RDI,%RDI |
(1162) 0x44f0da JE 44f0e0 |
(1162) 0x44f0dc MOV (%RDI,%RSI,8),%RSI |
(1162) 0x44f0e0 MOV (%RDX,%RSI,8),%RDI |
(1162) 0x44f0e4 TEST %RDI,%RDI |
(1162) 0x44f0e7 JS 44f110 |
(1162) 0x44f0e9 MOV -0x40(%RBP),%R9 |
(1162) 0x44f0ed MOV (%R9,%RSI,8),%RDI |
(1162) 0x44f0f1 MOV -0x70(%RBP),%R8 |
(1162) 0x44f0f5 CMP (%R8,%RAX,8),%RDI |
(1162) 0x44f0f9 JGE 44f0b0 |
(1162) 0x44f0fb MOV -0x38(%RBP),%RDI |
(1162) 0x44f0ff MOVQ $0x1,(%RDI,%RSI,8) |
(1162) 0x44f107 MOV %R12,(%R9,%RSI,8) |
(1162) 0x44f10b INC %R12 |
(1162) 0x44f10e JMP 44f0b0 |
(1162) 0x44f110 CMP $-0x3,%RDI |
(1162) 0x44f114 JE 44f0b0 |
(1162) 0x44f116 MOV (%R11,%RSI,8),%RDI |
(1162) 0x44f11a CMP 0x8(%R11,%RSI,8),%RDI |
(1162) 0x44f11f JL 44f146 |
(1162) 0x44f121 JMP 44f0b0 |
0x44f123 NOPW %CS:(%RAX,%RAX,1) |
(1163) 0x44f130 MOV %R15,(%R13,%R9,8) |
(1163) 0x44f135 INC %R15 |
(1163) 0x44f138 INC %RDI |
(1163) 0x44f13b CMP 0x8(%R11,%RSI,8),%RDI |
(1163) 0x44f140 JGE 44f0b0 |
(1163) 0x44f146 MOV -0x1a0(%RBP),%R8 |
(1163) 0x44f14d MOV (%R8,%RDI,8),%R8 |
(1163) 0x44f151 MOV %R8,%R9 |
(1163) 0x44f154 SUB -0x118(%RBP),%R9 |
(1163) 0x44f15b JL 44f180 |
(1163) 0x44f15d CMP -0x110(%RBP),%R8 |
(1163) 0x44f164 JGE 44f180 |
(1163) 0x44f166 MOV (%R13,%R9,8),%R8 |
(1163) 0x44f16b CMP (%RBX,%RAX,8),%R8 |
(1163) 0x44f16f JGE 44f1ac |
(1163) 0x44f171 JMP 44f130 |
0x44f173 NOPW %CS:(%RAX,%RAX,1) |
(1163) 0x44f180 NOT %R8 |
(1163) 0x44f183 MOV -0x40(%RBP),%RBX |
(1163) 0x44f187 MOV (%RBX,%R8,8),%R9 |
(1163) 0x44f18b MOV -0x70(%RBP),%R10 |
(1163) 0x44f18f CMP (%R10,%RAX,8),%R9 |
(1163) 0x44f193 JGE 44f1a8 |
(1163) 0x44f195 MOV %R12,(%RBX,%R8,8) |
(1163) 0x44f199 MOV -0x38(%RBP),%R9 |
(1163) 0x44f19d MOVQ $0x1,(%R9,%R8,8) |
(1163) 0x44f1a5 INC %R12 |
(1163) 0x44f1a8 MOV -0x50(%RBP),%RBX |
(1163) 0x44f1ac INC %RDI |
(1163) 0x44f1af CMP 0x8(%R11,%RSI,8),%RDI |
(1163) 0x44f1b4 JL 44f146 |
(1162) 0x44f1b6 JMP 44f0b0 |
(1161) 0x44f1bb MOV -0x48(%RBP),%RDX |
(1161) 0x44f1bf JMP 44eeca |
0x44f1c4 LEA (%R15,%R9,8),%RDX |
0x44f1c8 CMP %R11,%RDX |
0x44f1cb SETA %DIL |
0x44f1cf LEA (%R11,%R9,8),%RAX |
0x44f1d3 CMP %R15,%RAX |
0x44f1d6 SETA %R8B |
0x44f1da LEA (%R10,%R9,8),%R9 |
0x44f1de CMP %R11,%R9 |
0x44f1e1 SETA %CL |
0x44f1e4 CMP %R10,%RAX |
0x44f1e7 SETA %SIL |
0x44f1eb CMP %R15,%R9 |
0x44f1ee SETA %AL |
0x44f1f1 CMP %R10,%RDX |
0x44f1f4 SETA %DL |
0x44f1f7 TEST %R8B,%DIL |
0x44f1fa JNE 44f2d2 |
0x44f200 AND %SIL,%CL |
0x44f203 JNE 44f2d2 |
0x44f209 AND %DL,%AL |
0x44f20b JNE 44f2d2 |
0x44f211 MOV (%R11),%RAX |
0x44f214 MOV (%R10),%RCX |
0x44f217 MOV (%R15),%RDX |
0x44f21a MOV $0x1,%ESI |
0x44f21f MOV -0xd8(%RBP),%RDI |
0x44f226 NOPW %CS:(%RAX,%RAX,1) |
(1159) 0x44f230 ADD (%R11,%RSI,8),%RAX |
(1159) 0x44f234 MOV %RAX,(%R11,%RSI,8) |
(1159) 0x44f238 ADD (%R15,%RSI,8),%RDX |
(1159) 0x44f23c MOV %RDX,(%R15,%RSI,8) |
(1159) 0x44f240 ADD (%R10,%RSI,8),%RCX |
(1159) 0x44f244 MOV %RCX,(%R10,%RSI,8) |
(1159) 0x44f248 INC %RSI |
(1159) 0x44f24b CMP %RSI,%RDI |
(1159) 0x44f24e JNE 44f230 |
0x44f250 JMP 44f303 |
0x44f255 MOV -0x98(%RBP),%RSI |
0x44f25c AND $-0x2,%RSI |
0x44f260 XOR %R8D,%R8D |
0x44f263 NOPW %CS:(%RAX,%RAX,1) |
(1160) 0x44f270 ADD 0x8(%R11,%R8,8),%RDX |
(1160) 0x44f275 MOV %RDX,0x8(%R11,%R8,8) |
(1160) 0x44f27a ADD 0x8(%R15,%R8,8),%RCX |
(1160) 0x44f27f MOV %RCX,0x8(%R15,%R8,8) |
(1160) 0x44f284 ADD 0x8(%R10,%R8,8),%RAX |
(1160) 0x44f289 MOV %RAX,0x8(%R10,%R8,8) |
(1160) 0x44f28e LEA 0x2(%R8),%RDI |
(1160) 0x44f292 ADD 0x10(%R11,%R8,8),%RDX |
(1160) 0x44f297 MOV %RDX,0x10(%R11,%R8,8) |
(1160) 0x44f29c ADD 0x10(%R15,%R8,8),%RCX |
(1160) 0x44f2a1 MOV %RCX,0x10(%R15,%R8,8) |
(1160) 0x44f2a6 ADD 0x10(%R10,%R8,8),%RAX |
(1160) 0x44f2ab MOV %RAX,0x10(%R10,%R8,8) |
(1160) 0x44f2b0 MOV %RDI,%R8 |
(1160) 0x44f2b3 CMP %RDI,%RSI |
(1160) 0x44f2b6 JNE 44f270 |
0x44f2b8 TESTB $0x1,-0x98(%RBP) |
0x44f2bf JE 44f303 |
0x44f2c1 ADD %RDX,0x8(%R11,%RDI,8) |
0x44f2c6 ADD %RCX,0x8(%R15,%RDI,8) |
0x44f2cb ADD %RAX,0x8(%R10,%RDI,8) |
0x44f2d0 JMP 44f303 |
0x44f2d2 MOV $0x1,%EAX |
0x44f2d7 MOV -0xd8(%RBP),%RDX |
0x44f2de XCHG %AX,%AX |
(1158) 0x44f2e0 MOV -0x8(%R11,%RAX,8),%RCX |
(1158) 0x44f2e5 ADD %RCX,(%R11,%RAX,8) |
(1158) 0x44f2e9 MOV -0x8(%R15,%RAX,8),%RCX |
(1158) 0x44f2ee ADD %RCX,(%R15,%RAX,8) |
(1158) 0x44f2f2 MOV -0x8(%R10,%RAX,8),%RCX |
(1158) 0x44f2f7 ADD %RCX,(%R10,%RAX,8) |
(1158) 0x44f2fb INC %RAX |
(1158) 0x44f2fe CMP %RAX,%RDX |
(1158) 0x44f301 JNE 44f2e0 |
0x44f303 MOV -0x60(%RBP),%RAX |
0x44f307 MOV (%RAX),%ESI |
0x44f309 MOV $0x51cfd0,%EDI |
0x44f30e CALL 410570 <__kmpc_barrier@plt> |
0x44f313 CMPQ $0,-0x80(%RBP) |
0x44f318 MOV %R14,-0x130(%RBP) |
0x44f31f MOV -0x50(%RBP),%RAX |
0x44f323 MOV -0x30(%RBP),%RSI |
0x44f327 MOV -0xa8(%RBP),%RDX |
0x44f32e JLE 44f63c |
0x44f334 MOV %RDX,%RCX |
0x44f337 SUB %RSI,%RCX |
0x44f33a JLE 44f63c |
0x44f340 MOV %RCX,-0x38(%RBP) |
0x44f344 LEA (%RAX,%RDX,8),%RCX |
0x44f348 MOV -0x70(%RBP),%R8 |
0x44f34c LEA (%R8,%RDX,8),%R10 |
0x44f350 MOV -0x80(%RBP),%R12 |
0x44f354 MOV -0x58(%RBP),%RDX |
0x44f358 LEA -0x8(%RDX,%R12,8),%RDX |
0x44f35d MOV %RSI,%R9 |
0x44f360 MOV -0xe0(%RBP),%RSI |
0x44f367 LEA (%RSI,%R12,8),%RSI |
0x44f36b ADD $-0x8,%RSI |
0x44f36f LEA (%RAX,%R9,8),%RDI |
0x44f373 ADD $0x8,%RDI |
0x44f377 CMP %RDI,%RDX |
0x44f37a SETAEB -0x48(%RBP) |
0x44f37e CMP %RDX,%RCX |
0x44f381 SETAE %R14B |
0x44f385 LEA (%R8,%R9,8),%R15 |
0x44f389 ADD $0x8,%R15 |
0x44f38d CMP %R15,%RDX |
0x44f390 SETB %R11B |
0x44f394 CMP %RDX,%R10 |
0x44f397 SETB %AL |
0x44f39a CMP %R15,%RCX |
0x44f39d SETB %R9B |
0x44f3a1 CMP %RDI,%R10 |
0x44f3a4 SETBB -0xe0(%RBP) |
0x44f3ab CMP %RSI,%RCX |
0x44f3ae SETB %R8B |
0x44f3b2 CMP %RDI,%RSI |
0x44f3b5 SETB %CL |
0x44f3b8 CMP %R15,%RSI |
0x44f3bb SETB %DIL |
0x44f3bf CMP %RSI,%R10 |
0x44f3c2 LEA -0x1(%R12),%R10 |
0x44f3c7 MOV %R10,-0x58(%RBP) |
0x44f3cb SETB %R10B |
0x44f3cf TEST %R14B,-0x48(%RBP) |
0x44f3d3 JNE 44f4b5 |
0x44f3d9 OR %AL,%R11B |
0x44f3dc JE 44f4b5 |
0x44f3e2 OR -0xe0(%RBP),%R9B |
0x44f3e9 JE 44f4b5 |
0x44f3ef OR %CL,%R8B |
0x44f3f2 JE 44f4b5 |
0x44f3f8 OR %R10B,%DIL |
0x44f3fb JE 44f4b5 |
0x44f401 MOV (%RDX),%RDX |
0x44f404 MOV (%RSI),%RSI |
0x44f407 MOV -0x38(%RBP),%R10 |
0x44f40b MOV %R10,%RDI |
0x44f40e AND $-0x4,%RDI |
0x44f412 MOV -0x130(%RBP),%R14 |
0x44f419 MOV -0xa0(%RBP),%R15 |
0x44f420 JE 44f50a |
0x44f426 LEA -0x1(%RDI),%R8 |
0x44f42a VMOVQ %RDX,%XMM0 |
0x44f42f VPBROADCASTQ %XMM0,%YMM0 |
0x44f434 VMOVQ %RSI,%XMM1 |
0x44f439 VPBROADCASTQ %XMM1,%YMM1 |
0x44f43e MOV -0x1a8(%RBP),%R10 |
0x44f445 IMUL -0x80(%RBP),%R10 |
0x44f44a MOV -0x70(%RBP),%RAX |
0x44f44e LEA (%RAX,%R10,8),%R9 |
0x44f452 ADD $0x8,%R9 |
0x44f456 MOV -0x50(%RBP),%RCX |
0x44f45a LEA (%RCX,%R10,8),%R10 |
0x44f45e ADD $0x8,%R10 |
0x44f462 XOR %R11D,%R11D |
0x44f465 NOPW %CS:(%RAX,%RAX,1) |
(1157) 0x44f470 VPADDQ (%R10,%R11,8),%YMM0,%YMM2 |
(1157) 0x44f476 VMOVDQU %YMM2,(%R10,%R11,8) |
(1157) 0x44f47c VPADDQ (%R9,%R11,8),%YMM1,%YMM2 |
(1157) 0x44f482 VMOVDQU %YMM2,(%R9,%R11,8) |
(1157) 0x44f488 ADD $0x4,%R11 |
(1157) 0x44f48c CMP %R8,%R11 |
(1157) 0x44f48f JBE 44f470 |
0x44f491 MOV -0x38(%RBP),%R10 |
0x44f495 CMP %RDI,%R10 |
0x44f498 MOV -0xd0(%RBP),%R12 |
0x44f49f MOV -0x50(%RBP),%RCX |
0x44f4a3 MOV -0xa8(%RBP),%R9 |
0x44f4aa MOV -0x58(%RBP),%R11 |
0x44f4ae JNE 44f526 |
0x44f4b0 JMP 44f542 |
0x44f4b5 MOV -0x30(%RBP),%RDI |
0x44f4b9 MOV -0x130(%RBP),%R14 |
0x44f4c0 MOV -0xd0(%RBP),%R12 |
0x44f4c7 MOV -0x50(%RBP),%R8 |
0x44f4cb MOV -0xa8(%RBP),%R9 |
0x44f4d2 MOV -0xa0(%RBP),%R15 |
0x44f4d9 MOV -0x38(%RBP),%R10 |
0x44f4dd MOV -0x58(%RBP),%R11 |
0x44f4e1 MOV -0x70(%RBP),%RCX |
0x44f4e5 NOPW %CS:(%RAX,%RAX,1) |
(1152) 0x44f4f0 MOV (%RDX),%RAX |
(1152) 0x44f4f3 ADD %RAX,0x8(%R8,%RDI,8) |
(1152) 0x44f4f8 MOV (%RSI),%RAX |
(1152) 0x44f4fb ADD %RAX,0x8(%RCX,%RDI,8) |
(1152) 0x44f500 INC %RDI |
(1152) 0x44f503 CMP %RDI,%R9 |
(1152) 0x44f506 JNE 44f4f0 |
0x44f508 JMP 44f542 |
0x44f50a XOR %EDI,%EDI |
0x44f50c MOV -0xd0(%RBP),%R12 |
0x44f513 MOV -0x70(%RBP),%RAX |
0x44f517 MOV -0x50(%RBP),%RCX |
0x44f51b MOV -0xa8(%RBP),%R9 |
0x44f522 MOV -0x58(%RBP),%R11 |
0x44f526 ADD -0x30(%RBP),%RDI |
0x44f52a NOPW (%RAX,%RAX,1) |
(1156) 0x44f530 ADD %RDX,0x8(%RCX,%RDI,8) |
(1156) 0x44f535 ADD %RSI,0x8(%RAX,%RDI,8) |
(1156) 0x44f53a INC %RDI |
(1156) 0x44f53d CMP %RDI,%R9 |
(1156) 0x44f540 JNE 44f530 |
0x44f542 LEA (%R12,%R9,8),%RAX |
0x44f546 ADD $-0x8,%RAX |
0x44f54a LEA (%R15,%R11,8),%RCX |
0x44f54e MOV -0x30(%RBP),%RDX |
0x44f552 LEA (%R12,%RDX,8),%RSI |
0x44f556 CMP %RCX,%RAX |
0x44f559 JB 44f58e |
0x44f55b CMP %RSI,%RCX |
0x44f55e JB 44f58e |
0x44f560 MOV -0x30(%RBP),%RAX |
0x44f564 JMP 44f57c |
0x44f566 NOPW %CS:(%RAX,%RAX,1) |
(1155) 0x44f570 INC %RAX |
(1155) 0x44f573 CMP %RAX,%R9 |
(1155) 0x44f576 JE 44f63c |
(1155) 0x44f57c MOV (%R12,%RAX,8),%RDX |
(1155) 0x44f580 TEST %RDX,%RDX |
(1155) 0x44f583 JS 44f570 |
(1155) 0x44f585 ADD (%RCX),%RDX |
(1155) 0x44f588 MOV %RDX,(%R12,%RAX,8) |
(1155) 0x44f58c JMP 44f570 |
0x44f58e MOV %R10,%RDX |
0x44f591 AND $-0x10,%RDX |
0x44f595 JE 44f844 |
0x44f59b LEA -0x1(%RDX),%RDI |
0x44f59f XOR %R8D,%R8D |
0x44f5a2 VPCMPEQD %YMM0,%YMM0,%YMM0 |
0x44f5a6 JMP 44f5b9 |
0x44f5a8 NOPL (%RAX,%RAX,1) |
(1154) 0x44f5b0 ADD $0x10,%R8 |
(1154) 0x44f5b4 CMP %RDI,%R8 |
(1154) 0x44f5b7 JA 44f62f |
(1154) 0x44f5b9 VMOVDQU (%RSI,%R8,8),%YMM2 |
(1154) 0x44f5bf VMOVDQU 0x20(%RSI,%R8,8),%YMM3 |
(1154) 0x44f5c6 VMOVDQU 0x40(%RSI,%R8,8),%YMM5 |
(1154) 0x44f5cd VMOVDQU 0x60(%RSI,%R8,8),%YMM8 |
(1154) 0x44f5d4 VPCMPGTQ %YMM0,%YMM8,%YMM1 |
(1154) 0x44f5d9 VPCMPGTQ %YMM0,%YMM5,%YMM4 |
(1154) 0x44f5de VPCMPGTQ %YMM0,%YMM3,%YMM6 |
(1154) 0x44f5e3 VPCMPGTQ %YMM0,%YMM2,%YMM7 |
(1154) 0x44f5e8 VPOR %YMM6,%YMM7,%YMM9 |
(1154) 0x44f5ec VPOR %YMM1,%YMM4,%YMM10 |
(1154) 0x44f5f0 VPOR %YMM9,%YMM10,%YMM9 |
(1154) 0x44f5f5 VTESTPD %YMM9,%YMM9 |
(1154) 0x44f5fa JE 44f5b0 |
(1154) 0x44f5fc LEA (%RSI,%R8,8),%RAX |
(1154) 0x44f600 VPBROADCASTQ (%RCX),%YMM9 |
(1154) 0x44f605 VPADDQ %YMM9,%YMM8,%YMM8 |
(1154) 0x44f60a VPADDQ %YMM5,%YMM9,%YMM5 |
(1154) 0x44f60e VPADDQ %YMM2,%YMM9,%YMM2 |
(1154) 0x44f612 VPADDQ %YMM3,%YMM9,%YMM3 |
(1154) 0x44f616 VPMASKMOVQ %YMM3,%YMM6,0x20(%RAX) |
(1154) 0x44f61c VPMASKMOVQ %YMM2,%YMM7,(%RAX) |
(1154) 0x44f621 VPMASKMOVQ %YMM5,%YMM4,0x40(%RAX) |
(1154) 0x44f627 VPMASKMOVQ %YMM8,%YMM1,0x60(%RAX) |
(1154) 0x44f62d JMP 44f5b0 |
0x44f62f CMP %RDX,%R10 |
0x44f632 MOV -0x30(%RBP),%RAX |
0x44f636 JNE 44f84a |
0x44f63c MOV -0x60(%RBP),%RAX |
0x44f640 MOV (%RAX),%ESI |
0x44f642 MOV $0x51cff0,%EDI |
0x44f647 VZEROUPPER |
0x44f64a CALL 410570 <__kmpc_barrier@plt> |
0x44f64f CMPQ $0,-0x80(%RBP) |
0x44f654 JE 44f670 |
0x44f656 MOV -0x88(%RBP),%R8 |
0x44f65d MOV (%R8),%RAX |
0x44f660 MOV -0xe8(%RBP),%RDI |
0x44f667 MOV -0x40(%RBP),%R9 |
0x44f66b JMP 44f8dc |
0x44f670 CMPQ $0x4,-0x170(%RBP) |
0x44f678 MOV -0x88(%RBP),%R8 |
0x44f67f MOV -0x40(%RBP),%R9 |
0x44f683 JNE 44f6d0 |
0x44f685 CALL 4d14a0 <time_getWallclockSeconds> |
0x44f68a MOV -0x1b8(%RBP),%R15 |
0x44f691 VSUBSD (%R15),%XMM0,%XMM0 |
0x44f696 VMOVSD %XMM0,(%R15) |
0x44f69b MOV -0x1b0(%RBP),%RAX |
0x44f6a2 MOV (%RAX),%RSI |
0x44f6a5 MOV $0x1,%EAX |
0x44f6aa MOV $0x4ee4f8,%EDI |
0x44f6af CALL 4cf910 <hypre_printf> |
0x44f6b4 XOR %EDI,%EDI |
0x44f6b6 CALL 410700 <fflush@plt> |
0x44f6bb CALL 4d14a0 <time_getWallclockSeconds> |
0x44f6c0 MOV -0x40(%RBP),%R9 |
0x44f6c4 MOV -0x88(%RBP),%R8 |
0x44f6cb VMOVSD %XMM0,(%R15) |
0x44f6d0 MOV (%R8),%RAX |
0x44f6d3 MOV -0x50(%RBP),%RCX |
0x44f6d7 MOV (%RCX,%RAX,8),%RAX |
0x44f6db MOV -0x178(%RBP),%RDX |
0x44f6e2 MOV %RAX,(%RDX) |
0x44f6e5 MOV (%R8),%RAX |
0x44f6e8 MOV -0x70(%RBP),%RCX |
0x44f6ec MOV (%RCX,%RAX,8),%RDI |
0x44f6f0 MOV -0xf8(%RBP),%RCX |
0x44f6f7 MOV %RDI,(%RCX) |
0x44f6fa MOV (%RDX),%RAX |
0x44f6fd TEST %RAX,%RAX |
0x44f700 JE 44f741 |
0x44f702 MOV $0x8,%ESI |
0x44f707 MOV %RAX,%RDI |
0x44f70a MOV %RDX,%R15 |
0x44f70d CALL 4cf760 <hypre_CAlloc> |
0x44f712 MOV -0x100(%RBP),%RCX |
0x44f719 MOV %RAX,(%RCX) |
0x44f71c MOV (%R15),%RDI |
0x44f71f MOV $0x8,%ESI |
0x44f724 CALL 4cf760 <hypre_CAlloc> |
0x44f729 MOV -0xf8(%RBP),%RCX |
0x44f730 MOV -0x40(%RBP),%R9 |
0x44f734 MOV -0x88(%RBP),%R8 |
0x44f73b MOV %RAX,(%RBX) |
0x44f73e MOV (%RCX),%RDI |
0x44f741 TEST %RDI,%RDI |
0x44f744 JE 44f77c |
0x44f746 MOV $0x8,%ESI |
0x44f74b MOV %RCX,%R15 |
0x44f74e CALL 4cf760 <hypre_CAlloc> |
0x44f753 MOV -0x148(%RBP),%RCX |
0x44f75a MOV %RAX,(%RCX) |
0x44f75d MOV (%R15),%RDI |
0x44f760 MOV $0x8,%ESI |
0x44f765 CALL 4cf760 <hypre_CAlloc> |
0x44f76a MOV -0x40(%RBP),%R9 |
0x44f76e MOV -0x88(%RBP),%R8 |
0x44f775 MOV -0x68(%RBP),%RCX |
0x44f779 MOV %RAX,(%RCX) |
0x44f77c MOV -0xb0(%RBP),%RAX |
0x44f783 CMPQ $0x2,(%RAX) |
0x44f787 MOV (%R8),%RAX |
0x44f78a JGE 44f798 |
0x44f78c MOV -0xe8(%RBP),%RDI |
0x44f793 JMP 44f8dc |
0x44f798 TEST %RAX,%RAX |
0x44f79b MOV -0xf0(%RBP),%RCX |
0x44f7a2 JLE 44f7bc |
0x44f7a4 XOR %EAX,%EAX |
0x44f7a6 NOPW %CS:(%RAX,%RAX,1) |
(1151) 0x44f7b0 ADD %RCX,(%R12,%RAX,8) |
(1151) 0x44f7b4 INC %RAX |
(1151) 0x44f7b7 CMP (%R8),%RAX |
(1151) 0x44f7ba JL 44f7b0 |
0x44f7bc MOV -0x1d0(%RBP),%RAX |
0x44f7c3 MOV (%RAX),%RSI |
0x44f7c6 MOV -0xe8(%RBP),%RBX |
0x44f7cd MOV (%RBX),%RCX |
0x44f7d0 MOV -0x1c0(%RBP),%RDI |
0x44f7d7 MOV %R12,%RDX |
0x44f7da MOV -0x1c8(%RBP),%R8 |
0x44f7e1 CALL 49a280 <hypre_alt_insert_new_nodes> |
0x44f7e6 MOV -0x88(%RBP),%R8 |
0x44f7ed MOV %RBX,%RDI |
0x44f7f0 MOV (%R8),%RAX |
0x44f7f3 TEST %RAX,%RAX |
0x44f7f6 MOV -0x138(%RBP),%RBX |
0x44f7fd MOV -0x40(%RBP),%R9 |
0x44f801 JLE 44f901 |
0x44f807 LEA (%R12,%RAX,8),%RCX |
0x44f80b ADD $-0x8,%RCX |
0x44f80f CMP %R8,%RCX |
0x44f812 JB 44f86e |
0x44f814 CMP %R12,%R8 |
0x44f817 JB 44f86e |
0x44f819 XOR %ECX,%ECX |
0x44f81b MOV -0xf0(%RBP),%RDX |
0x44f822 NOPW %CS:(%RAX,%RAX,1) |
(1150) 0x44f830 SUB %RDX,(%R12,%RCX,8) |
(1150) 0x44f834 MOV (%R8),%RAX |
(1150) 0x44f837 INC %RCX |
(1150) 0x44f83a CMP %RAX,%RCX |
(1150) 0x44f83d JL 44f830 |
0x44f83f JMP 44f8dc |
0x44f844 XOR %EDX,%EDX |
0x44f846 MOV -0x30(%RBP),%RAX |
0x44f84a ADD %RAX,%RDX |
0x44f84d JMP 44f85c |
0x44f84f NOP |
(1153) 0x44f850 INC %RDX |
(1153) 0x44f853 CMP %RDX,%R9 |
(1153) 0x44f856 JE 44f63c |
(1153) 0x44f85c MOV (%R12,%RDX,8),%RAX |
(1153) 0x44f860 TEST %RAX,%RAX |
(1153) 0x44f863 JS 44f850 |
(1153) 0x44f865 ADD (%RCX),%RAX |
(1153) 0x44f868 MOV %RAX,(%R12,%RDX,8) |
(1153) 0x44f86c JMP 44f850 |
0x44f86e MOV %RAX,%RCX |
0x44f871 AND $-0x4,%RCX |
0x44f875 JE 44f8bc |
0x44f877 LEA -0x1(%RCX),%RDX |
0x44f87b MOV -0xf0(%RBP),%RSI |
0x44f882 NEG %RSI |
0x44f885 VMOVQ %RSI,%XMM0 |
0x44f88a VPBROADCASTQ %XMM0,%YMM0 |
0x44f88f XOR %ESI,%ESI |
0x44f891 NOPW %CS:(%RAX,%RAX,1) |
(1149) 0x44f8a0 VPADDQ (%R12,%RSI,8),%YMM0,%YMM1 |
(1149) 0x44f8a6 VMOVDQU %YMM1,(%R12,%RSI,8) |
(1149) 0x44f8ac ADD $0x4,%RSI |
(1149) 0x44f8b0 CMP %RDX,%RSI |
(1149) 0x44f8b3 JLE 44f8a0 |
0x44f8b5 CMP %RCX,%RAX |
0x44f8b8 JNE 44f8be |
0x44f8ba JMP 44f8dc |
0x44f8bc XOR %ECX,%ECX |
0x44f8be MOV -0xf0(%RBP),%RDX |
0x44f8c5 NOPW %CS:(%RAX,%RAX,1) |
(1147) 0x44f8d0 SUB %RDX,(%R12,%RCX,8) |
(1147) 0x44f8d4 INC %RCX |
(1147) 0x44f8d7 CMP %RCX,%RAX |
(1147) 0x44f8da JNE 44f8d0 |
0x44f8dc TEST %RAX,%RAX |
0x44f8df JLE 44f901 |
0x44f8e1 XOR %EAX,%EAX |
0x44f8e3 NOPW %CS:(%RAX,%RAX,1) |
(1148) 0x44f8f0 MOVQ $-0x1,(%R13,%RAX,8) |
(1148) 0x44f8f9 INC %RAX |
(1148) 0x44f8fc CMP (%R8),%RAX |
(1148) 0x44f8ff JL 44f8f0 |
0x44f901 CMPQ $0,(%RDI) |
0x44f905 JLE 44f920 |
0x44f907 XOR %EAX,%EAX |
0x44f909 NOPL (%RAX) |
(1146) 0x44f910 MOVQ $-0x1,(%R9,%RAX,8) |
(1146) 0x44f918 INC %RAX |
(1146) 0x44f91b CMP (%RDI),%RAX |
(1146) 0x44f91e JL 44f910 |
0x44f920 MOV -0x60(%RBP),%RAX |
0x44f924 MOV (%RAX),%ESI |
0x44f926 MOV $0x51d010,%EDI |
0x44f92b VZEROUPPER |
0x44f92e CALL 410570 <__kmpc_barrier@plt> |
0x44f933 MOV -0x30(%RBP),%RSI |
0x44f937 CMP %RSI,-0xa8(%RBP) |
0x44f93e MOV -0xb8(%RBP),%R10 |
0x44f945 MOV -0x100(%RBP),%R11 |
0x44f94c JG 44f994 |
0x44f94e MOV -0x88(%RBP),%RAX |
0x44f955 CMPQ $0,(%RAX) |
0x44f959 JE 44f966 |
0x44f95b MOV %R13,%RDI |
0x44f95e VZEROUPPER |
0x44f961 CALL 4cf830 <hypre_Free> |
0x44f966 MOV -0xe8(%RBP),%RAX |
0x44f96d CMPQ $0,(%RAX) |
0x44f971 JE 45098f |
0x44f977 MOV -0x40(%RBP),%RDI |
0x44f97b ADD $0x1c8,%RSP |
0x44f982 POP %RBX |
0x44f983 POP %R12 |
0x44f985 POP %R13 |
0x44f987 POP %R14 |
0x44f989 POP %R15 |
0x44f98b POP %RBP |
0x44f98c VZEROUPPER |
0x44f98f JMP 4cf830 |
0x44f994 MOV -0x90(%RBP),%RAX |
0x44f99b ADD $0x8,%RAX |
0x44f99f MOV %RAX,-0x178(%RBP) |
0x44f9a6 MOV -0x160(%RBP),%RAX |
0x44f9ad ADD $0x8,%RAX |
0x44f9b1 MOV %RAX,-0x170(%RBP) |
0x44f9b8 MOVQ $-0x2,-0x60(%RBP) |
0x44f9c0 VXORPD %XMM0,%XMM0,%XMM0 |
0x44f9c4 VMOVDDUP 0x9acbc(%RIP),%XMM1 |
0x44f9cc VPCMPEQD %YMM2,%YMM2,%YMM2 |
0x44f9d0 VBROADCASTSD 0x9acaf(%RIP),%YMM3 |
0x44f9d9 JMP 44fa10 |
0x44f9db NOPL (%RAX,%RAX,1) |
(1125) 0x44f9e0 MOV (%R12,%RSI,8),%RAX |
(1125) 0x44f9e4 MOV (%R11),%RCX |
(1125) 0x44f9e7 MOV %RAX,(%RCX,%R8,8) |
(1125) 0x44f9eb MOV (%RBX),%RAX |
(1125) 0x44f9ee MOV $0x3ff0000000000000,%RCX |
(1125) 0x44f9f8 MOV %RCX,(%RAX,%R8,8) |
(1125) 0x44f9fc DECQ -0x60(%RBP) |
(1125) 0x44fa00 INC %RSI |
(1125) 0x44fa03 CMP -0xa8(%RBP),%RSI |
(1125) 0x44fa0a JGE 44f94e |
(1125) 0x44fa10 MOV -0x50(%RBP),%RAX |
(1125) 0x44fa14 MOV (%RAX,%RSI,8),%R8 |
(1125) 0x44fa18 MOV (%R14,%RSI,8),%RAX |
(1125) 0x44fa1c TEST %RAX,%RAX |
(1125) 0x44fa1f JNS 44f9e0 |
(1125) 0x44fa21 CMP $-0x3,%RAX |
(1125) 0x44fa25 JE 44f9fc |
(1125) 0x44fa27 MOV -0x70(%RBP),%RAX |
(1125) 0x44fa2b MOV (%RAX,%RSI,8),%R9 |
(1125) 0x44fa2f DECQ -0x60(%RBP) |
(1125) 0x44fa33 MOV -0xc8(%RBP),%RCX |
(1125) 0x44fa3a MOV (%RCX,%RSI,8),%RAX |
(1125) 0x44fa3e MOV %R8,%R15 |
(1125) 0x44fa41 MOV %R9,-0x48(%RBP) |
(1125) 0x44fa45 CMP 0x8(%RCX,%RSI,8),%RAX |
(1125) 0x44fa4a MOV %RSI,-0x30(%RBP) |
(1125) 0x44fa4e MOV %R9,-0x80(%RBP) |
(1125) 0x44fa52 MOV %R8,-0x38(%RBP) |
(1125) 0x44fa56 JGE 44fc21 |
(1125) 0x44fa5c MOV %R9,-0x48(%RBP) |
(1125) 0x44fa60 MOV %R8,%R15 |
(1125) 0x44fa63 JMP 44fa85 |
(1143) 0x44fa65 MOV -0x30(%RBP),%RSI |
(1143) 0x44fa69 NOPL (%RAX) |
(1143) 0x44fa70 INC %RAX |
(1143) 0x44fa73 MOV -0xc8(%RBP),%RCX |
(1143) 0x44fa7a CMP 0x8(%RCX,%RSI,8),%RAX |
(1143) 0x44fa7f JGE 44fc21 |
(1143) 0x44fa85 MOV -0x168(%RBP),%RCX |
(1143) 0x44fa8c MOV (%RCX,%RAX,8),%RCX |
(1143) 0x44fa90 MOV (%R14,%RCX,8),%RDX |
(1143) 0x44fa94 TEST %RDX,%RDX |
(1143) 0x44fa97 JS 44fac0 |
(1143) 0x44fa99 CMP %R8,(%R13,%RCX,8) |
(1143) 0x44fa9e JGE 44fa70 |
(1143) 0x44faa0 MOV %R15,(%R13,%RCX,8) |
(1143) 0x44faa5 MOV (%R12,%RCX,8),%RCX |
(1143) 0x44faa9 MOV (%R11),%RDX |
(1143) 0x44faac MOV %RCX,(%RDX,%R15,8) |
(1143) 0x44fab0 MOV (%RBX),%RCX |
(1143) 0x44fab3 MOVQ $0,(%RCX,%R15,8) |
(1143) 0x44fabb INC %R15 |
(1143) 0x44fabe JMP 44fa70 |
(1143) 0x44fac0 CMP $-0x3,%RDX |
(1143) 0x44fac4 JE 44fa70 |
(1143) 0x44fac6 MOV -0x60(%RBP),%RDX |
(1143) 0x44faca MOV %RDX,(%R13,%RCX,8) |
(1143) 0x44facf MOV -0xc8(%RBP),%RSI |
(1143) 0x44fad6 MOV (%RSI,%RCX,8),%RDX |
(1143) 0x44fada MOV 0x8(%RSI,%RCX,8),%RSI |
(1143) 0x44fadf JMP 44faf3 |
0x44fae1 NOPW %CS:(%RAX,%RAX,1) |
(1145) 0x44faf0 INC %RDX |
(1145) 0x44faf3 CMP %RSI,%RDX |
(1145) 0x44faf6 JGE 44fb3d |
(1145) 0x44faf8 MOV -0x168(%RBP),%RDI |
(1145) 0x44faff MOV (%RDI,%RDX,8),%RDI |
(1145) 0x44fb03 CMPQ $0,(%R14,%RDI,8) |
(1145) 0x44fb08 JS 44faf0 |
(1145) 0x44fb0a CMP %R8,(%R13,%RDI,8) |
(1145) 0x44fb0f JGE 44faf0 |
(1145) 0x44fb11 MOV %R15,(%R13,%RDI,8) |
(1145) 0x44fb16 MOV (%R12,%RDI,8),%RSI |
(1145) 0x44fb1a MOV (%R11),%RDI |
(1145) 0x44fb1d MOV %RSI,(%RDI,%R15,8) |
(1145) 0x44fb21 MOV (%RBX),%RSI |
(1145) 0x44fb24 MOVQ $0,(%RSI,%R15,8) |
(1145) 0x44fb2c INC %R15 |
(1145) 0x44fb2f MOV -0xc8(%RBP),%RSI |
(1145) 0x44fb36 MOV 0x8(%RSI,%RCX,8),%RSI |
(1145) 0x44fb3b JMP 44faf0 |
(1143) 0x44fb3d MOV -0xb0(%RBP),%RDX |
(1143) 0x44fb44 CMPQ $0x2,(%RDX) |
(1143) 0x44fb48 JL 44fa65 |
(1143) 0x44fb4e MOV -0xc0(%RBP),%RSI |
(1143) 0x44fb55 MOV (%RSI,%RCX,8),%RDX |
(1143) 0x44fb59 MOV 0x8(%RSI,%RCX,8),%RDI |
(1143) 0x44fb5e CMP %RDI,%RDX |
(1143) 0x44fb61 JGE 44fa65 |
(1143) 0x44fb67 MOV -0x120(%RBP),%RSI |
(1143) 0x44fb6e MOV (%RSI),%RSI |
(1143) 0x44fb71 MOV -0x150(%RBP),%R8 |
(1143) 0x44fb78 LEA (%R8,%RDX,8),%R11 |
(1143) 0x44fb7c MOV -0x158(%RBP),%R10 |
(1143) 0x44fb83 JMP 44fba3 |
0x44fb85 NOPW %CS:(%RAX,%RAX,1) |
(1144) 0x44fb90 MOV -0x128(%RBP),%R13 |
(1144) 0x44fb97 INC %RDX |
(1144) 0x44fb9a ADD $0x8,%R11 |
(1144) 0x44fb9e CMP %RDI,%RDX |
(1144) 0x44fba1 JGE 44fc06 |
(1144) 0x44fba3 MOV %R11,%R8 |
(1144) 0x44fba6 TEST %R10,%R10 |
(1144) 0x44fba9 JE 44fbb2 |
(1144) 0x44fbab MOV (%R11),%R8 |
(1144) 0x44fbae LEA (%R10,%R8,8),%R8 |
(1144) 0x44fbb2 MOV (%R8),%R8 |
(1144) 0x44fbb5 CMPQ $0,(%RSI,%R8,8) |
(1144) 0x44fbba JS 44fb97 |
(1144) 0x44fbbc MOV -0x40(%RBP),%R13 |
(1144) 0x44fbc0 CMP %R9,(%R13,%R8,8) |
(1144) 0x44fbc5 JGE 44fb90 |
(1144) 0x44fbc7 MOV -0x48(%RBP),%R9 |
(1144) 0x44fbcb MOV %R9,(%R13,%R8,8) |
(1144) 0x44fbd0 MOV -0x148(%RBP),%RDI |
(1144) 0x44fbd7 MOV (%RDI),%RDI |
(1144) 0x44fbda MOV %R8,(%RDI,%R9,8) |
(1144) 0x44fbde MOV -0x68(%RBP),%RDI |
(1144) 0x44fbe2 MOV (%RDI),%RDI |
(1144) 0x44fbe5 MOVQ $0,(%RDI,%R9,8) |
(1144) 0x44fbed INC %R9 |
(1144) 0x44fbf0 MOV %R9,-0x48(%RBP) |
(1144) 0x44fbf4 MOV -0x80(%RBP),%R9 |
(1144) 0x44fbf8 MOV -0xc0(%RBP),%RDI |
(1144) 0x44fbff MOV 0x8(%RDI,%RCX,8),%RDI |
(1144) 0x44fc04 JMP 44fb90 |
(1143) 0x44fc06 MOV -0xb8(%RBP),%R10 |
(1143) 0x44fc0d MOV -0x100(%RBP),%R11 |
(1143) 0x44fc14 MOV -0x30(%RBP),%RSI |
(1143) 0x44fc18 MOV -0x38(%RBP),%R8 |
(1143) 0x44fc1c JMP 44fa70 |
(1125) 0x44fc21 MOV -0xb0(%RBP),%RAX |
(1125) 0x44fc28 CMPQ $0x2,(%RAX) |
(1125) 0x44fc2c MOV %R15,-0x58(%RBP) |
(1125) 0x44fc30 JL 44fdb2 |
(1125) 0x44fc36 MOV -0xc0(%RBP),%RCX |
(1125) 0x44fc3d MOV (%RCX,%RSI,8),%RAX |
(1125) 0x44fc41 CMP 0x8(%RCX,%RSI,8),%RAX |
(1125) 0x44fc46 JGE 44fdb2 |
(1125) 0x44fc4c MOV -0x120(%RBP),%RCX |
(1125) 0x44fc53 MOV (%RCX),%RCX |
(1125) 0x44fc56 JMP 44fc79 |
0x44fc58 NOPL (%RAX,%RAX,1) |
(1141) 0x44fc60 INC %RAX |
(1141) 0x44fc63 MOV -0xc0(%RBP),%RDX |
(1141) 0x44fc6a MOV -0x30(%RBP),%RSI |
(1141) 0x44fc6e CMP 0x8(%RDX,%RSI,8),%RAX |
(1141) 0x44fc73 JGE 44fdb2 |
(1141) 0x44fc79 MOV -0x150(%RBP),%RDX |
(1141) 0x44fc80 MOV (%RDX,%RAX,8),%RSI |
(1141) 0x44fc84 MOV -0x158(%RBP),%RDX |
(1141) 0x44fc8b TEST %RDX,%RDX |
(1141) 0x44fc8e JE 44fc94 |
(1141) 0x44fc90 MOV (%RDX,%RSI,8),%RSI |
(1141) 0x44fc94 MOV (%RCX,%RSI,8),%RDX |
(1141) 0x44fc98 TEST %RDX,%RDX |
(1141) 0x44fc9b JS 44fce0 |
(1141) 0x44fc9d MOV -0x40(%RBP),%RDX |
(1141) 0x44fca1 CMP %R9,(%RDX,%RSI,8) |
(1141) 0x44fca5 JGE 44fc60 |
(1141) 0x44fca7 MOV -0x48(%RBP),%RDI |
(1141) 0x44fcab MOV %RDI,(%RDX,%RSI,8) |
(1141) 0x44fcaf MOV -0x148(%RBP),%RDX |
(1141) 0x44fcb6 MOV (%RDX),%RDX |
(1141) 0x44fcb9 MOV %RSI,(%RDX,%RDI,8) |
(1141) 0x44fcbd MOV -0x68(%RBP),%RDX |
(1141) 0x44fcc1 MOV (%RDX),%RDX |
(1141) 0x44fcc4 MOVQ $0,(%RDX,%RDI,8) |
(1141) 0x44fccc INC %RDI |
(1141) 0x44fccf MOV %RDI,-0x48(%RBP) |
(1141) 0x44fcd3 JMP 44fc60 |
0x44fcd5 NOPW %CS:(%RAX,%RAX,1) |
(1141) 0x44fce0 CMP $-0x3,%RDX |
(1141) 0x44fce4 JE 44fc60 |
(1141) 0x44fcea MOV -0x40(%RBP),%RDX |
(1141) 0x44fcee MOV -0x60(%RBP),%RDI |
(1141) 0x44fcf2 MOV %RDI,(%RDX,%RSI,8) |
(1141) 0x44fcf6 MOV (%R10,%RSI,8),%RDX |
(1141) 0x44fcfa JMP 44fd07 |
0x44fcfc NOPL (%RAX) |
(1142) 0x44fd00 MOV -0x38(%RBP),%R8 |
(1142) 0x44fd04 INC %RDX |
(1142) 0x44fd07 CMP 0x8(%R10,%RSI,8),%RDX |
(1142) 0x44fd0c JGE 44fc60 |
(1142) 0x44fd12 MOV -0x1a0(%RBP),%RDI |
(1142) 0x44fd19 MOV (%RDI,%RDX,8),%RDI |
(1142) 0x44fd1d MOV %RDI,%R8 |
(1142) 0x44fd20 SUB -0x118(%RBP),%R8 |
(1142) 0x44fd27 JL 44fd70 |
(1142) 0x44fd29 CMP -0x110(%RBP),%RDI |
(1142) 0x44fd30 JGE 44fd70 |
(1142) 0x44fd32 MOV -0x38(%RBP),%RDI |
(1142) 0x44fd36 CMP %RDI,(%R13,%R8,8) |
(1142) 0x44fd3b JGE 44fd00 |
(1142) 0x44fd3d MOV -0x58(%RBP),%R15 |
(1142) 0x44fd41 MOV %R15,(%R13,%R8,8) |
(1142) 0x44fd46 MOV (%R12,%R8,8),%RDI |
(1142) 0x44fd4a MOV (%R11),%R8 |
(1142) 0x44fd4d MOV %RDI,(%R8,%R15,8) |
(1142) 0x44fd51 MOV (%RBX),%RDI |
(1142) 0x44fd54 MOVQ $0,(%RDI,%R15,8) |
(1142) 0x44fd5c INC %R15 |
(1142) 0x44fd5f MOV %R15,-0x58(%RBP) |
(1142) 0x44fd63 JMP 44fd00 |
0x44fd65 NOPW %CS:(%RAX,%RAX,1) |
(1142) 0x44fd70 NOT %RDI |
(1142) 0x44fd73 MOV -0x40(%RBP),%R8 |
(1142) 0x44fd77 CMP %R9,(%R8,%RDI,8) |
(1142) 0x44fd7b JGE 44fd00 |
(1142) 0x44fd7d MOV -0x48(%RBP),%R9 |
(1142) 0x44fd81 MOV %R9,(%R8,%RDI,8) |
(1142) 0x44fd85 MOV -0x148(%RBP),%R8 |
(1142) 0x44fd8c MOV (%R8),%R8 |
(1142) 0x44fd8f MOV %RDI,(%R8,%R9,8) |
(1142) 0x44fd93 MOV -0x68(%RBP),%RDI |
(1142) 0x44fd97 MOV (%RDI),%RDI |
(1142) 0x44fd9a MOVQ $0,(%RDI,%R9,8) |
(1142) 0x44fda2 INC %R9 |
(1142) 0x44fda5 MOV %R9,-0x48(%RBP) |
(1142) 0x44fda9 MOV -0x80(%RBP),%R9 |
(1142) 0x44fdad JMP 44fd00 |
(1125) 0x44fdb2 MOV -0x198(%RBP),%RAX |
(1125) 0x44fdb9 MOV (%RAX,%RSI,8),%R11 |
(1125) 0x44fdbd MOV 0x8(%RAX,%RSI,8),%R15 |
(1125) 0x44fdc2 MOV -0x90(%RBP),%RAX |
(1125) 0x44fdc9 VMOVSD (%RAX,%R11,8),%XMM6 |
(1125) 0x44fdcf INC %R11 |
(1125) 0x44fdd2 CMP %R15,%R11 |
(1125) 0x44fdd5 JGE 4504f8 |
(1125) 0x44fddb VMOVQ %R8,%XMM7 |
(1125) 0x44fde0 VPBROADCASTQ %XMM7,%YMM7 |
(1125) 0x44fde5 VMOVQ %RSI,%XMM8 |
(1125) 0x44fdea VPBROADCASTQ %XMM8,%YMM8 |
(1125) 0x44fdef VMOVQ %R9,%XMM9 |
(1125) 0x44fdf4 VPBROADCASTQ %XMM9,%YMM9 |
(1125) 0x44fdf9 MOV -0x140(%RBP),%R10 |
(1125) 0x44fe00 MOV %R15,-0x98(%RBP) |
(1125) 0x44fe07 JMP 44fe36 |
0x44fe09 NOPL (%RAX) |
(1133) 0x44fe10 MOV (%RBX),%RCX |
(1133) 0x44fe13 VMOVSD (%RCX,%RAX,8),%XMM10 |
(1133) 0x44fe18 MOV -0x90(%RBP),%RDX |
(1133) 0x44fe1f VADDSD (%RDX,%R11,8),%XMM10,%XMM10 |
(1133) 0x44fe25 VMOVSD %XMM10,(%RCX,%RAX,8) |
(1133) 0x44fe2a INC %R11 |
(1133) 0x44fe2d CMP %R15,%R11 |
(1133) 0x44fe30 JE 4504f8 |
(1133) 0x44fe36 MOV -0x160(%RBP),%RAX |
(1133) 0x44fe3d MOV (%RAX,%R11,8),%RCX |
(1133) 0x44fe41 MOV (%R13,%RCX,8),%RAX |
(1133) 0x44fe46 CMP %R8,%RAX |
(1133) 0x44fe49 JGE 44fe10 |
(1133) 0x44fe4b CMP -0x60(%RBP),%RAX |
(1133) 0x44fe4f JNE 450220 |
(1133) 0x44fe55 MOV %RCX,%RSI |
(1133) 0x44fe58 MOV -0x198(%RBP),%RCX |
(1133) 0x44fe5f MOV (%RCX,%RSI,8),%RDI |
(1133) 0x44fe63 VPXOR %XMM10,%XMM10,%XMM10 |
(1133) 0x44fe68 XOR %EAX,%EAX |
(1133) 0x44fe6a MOV -0x90(%RBP),%RDX |
(1133) 0x44fe71 VUCOMISD (%RDX,%RDI,8),%XMM10 |
(1133) 0x44fe76 SETBE %AL |
(1133) 0x44fe79 MOV %RSI,-0xe0(%RBP) |
(1133) 0x44fe80 MOV 0x8(%RCX,%RSI,8),%RCX |
(1133) 0x44fe85 LEA -0x1(,%RAX,2),%RAX |
(1133) 0x44fe8d MOV %RAX,-0xa0(%RBP) |
(1133) 0x44fe94 LEA 0x1(%RDI),%RSI |
(1133) 0x44fe98 CMP %RCX,%RSI |
(1133) 0x44fe9b JGE 450010 |
(1133) 0x44fea1 VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 |
(1133) 0x44fea9 MOV %RDI,%RDX |
(1133) 0x44feac NOT %RDX |
(1133) 0x44feaf ADD %RCX,%RDX |
(1133) 0x44feb2 MOV %RDX,%RAX |
(1133) 0x44feb5 AND $-0x4,%RAX |
(1133) 0x44feb9 JE 45030e |
(1133) 0x44febf MOV %RDI,%R8 |
(1133) 0x44fec2 MOV %RAX,-0xf8(%RBP) |
(1133) 0x44fec9 LEA -0x1(%RAX),%RDI |
(1133) 0x44fecd VBROADCASTSD %XMM11,%YMM10 |
(1133) 0x44fed2 MOV -0x178(%RBP),%RAX |
(1133) 0x44fed9 LEA (%RAX,%R8,8),%R14 |
(1133) 0x44fedd MOV -0x170(%RBP),%RAX |
(1133) 0x44fee4 MOV %R8,-0xd8(%RBP) |
(1133) 0x44feeb LEA (%RAX,%R8,8),%RAX |
(1133) 0x44feef VXORPD %XMM13,%XMM13,%XMM13 |
(1133) 0x44fef4 VXORPD %XMM12,%XMM12,%XMM12 |
(1133) 0x44fef9 XOR %R8D,%R8D |
(1133) 0x44fefc NOPL (%RAX) |
(1140) 0x44ff00 MOV (%RAX,%R8,8),%R10 |
(1140) 0x44ff04 MOV 0x8(%RAX,%R8,8),%RBX |
(1140) 0x44ff09 MOV 0x10(%RAX,%R8,8),%R15 |
(1140) 0x44ff0e MOV 0x18(%RAX,%R8,8),%R12 |
(1140) 0x44ff13 VMOVQ (%R13,%R12,8),%XMM14 |
(1140) 0x44ff1a VMOVQ (%R13,%R15,8),%XMM15 |
(1140) 0x44ff21 VPUNPCKLQDQ %XMM14,%XMM15,%XMM14 |
(1140) 0x44ff26 VMOVQ (%R13,%RBX,8),%XMM15 |
(1140) 0x44ff2d VMOVQ (%R13,%R10,8),%XMM4 |
(1140) 0x44ff34 VPUNPCKLQDQ %XMM15,%XMM4,%XMM4 |
(1140) 0x44ff39 VINSERTI128 $0x1,%XMM14,%YMM4,%YMM4 |
(1140) 0x44ff3f VPCMPGTQ %YMM4,%YMM7,%YMM4 |
(1140) 0x44ff44 VPXOR %YMM2,%YMM4,%YMM14 |
(1140) 0x44ff48 VEXTRACTI128 $0x1,%YMM14,%XMM15 |
(1140) 0x44ff4e VPCMPEQQ (%RAX,%R8,8),%YMM8,%YMM5 |
(1140) 0x44ff54 VPACKSSDW %XMM15,%XMM14,%XMM14 |
(1140) 0x44ff59 VEXTRACTI128 $0x1,%YMM5,%XMM15 |
(1140) 0x44ff5f VPACKSSDW %XMM15,%XMM5,%XMM15 |
(1140) 0x44ff64 VPAND %YMM4,%YMM5,%YMM4 |
(1140) 0x44ff68 VEXTRACTI128 $0x1,%YMM4,%XMM5 |
(1140) 0x44ff6e VPACKSSDW %XMM5,%XMM4,%XMM4 |
(1140) 0x44ff72 VBLENDVPS %XMM4,%XMM15,%XMM14,%XMM4 |
(1140) 0x44ff78 VPMOVSXDQ %XMM4,%YMM5 |
(1140) 0x44ff7d VMASKMOVPD (%R14,%R8,8),%YMM5,%YMM5 |
(1140) 0x44ff83 VMULPD %YMM5,%YMM10,%YMM14 |
(1140) 0x44ff87 VCMPPD $0x1,%YMM13,%YMM14,%YMM14 |
(1140) 0x44ff8d VEXTRACTF128 $0x1,%YMM14,%XMM15 |
(1140) 0x44ff93 VPACKSSDW %XMM15,%XMM14,%XMM14 |
(1140) 0x44ff98 VPAND %XMM4,%XMM14,%XMM4 |
(1140) 0x44ff9c VPMOVSXDQ %XMM4,%YMM4 |
(1140) 0x44ffa1 VBLENDVPD %YMM4,%YMM5,%YMM3,%YMM4 |
(1140) 0x44ffa7 VADDPD %YMM4,%YMM12,%YMM12 |
(1140) 0x44ffab ADD $0x4,%R8 |
(1140) 0x44ffaf CMP %RDI,%R8 |
(1140) 0x44ffb2 JBE 44ff00 |
(1133) 0x44ffb8 VEXTRACTF128 $0x1,%YMM12,%XMM4 |
(1133) 0x44ffbe VADDPD %XMM4,%XMM12,%XMM4 |
(1133) 0x44ffc2 VSHUFPD $0x1,%XMM4,%XMM4,%XMM5 |
(1133) 0x44ffc7 VADDSD %XMM5,%XMM4,%XMM10 |
(1133) 0x44ffcb MOV -0xf8(%RBP),%RAX |
(1133) 0x44ffd2 CMP %RAX,%RDX |
(1133) 0x44ffd5 MOV -0x130(%RBP),%R14 |
(1133) 0x44ffdc MOV -0xd0(%RBP),%R12 |
(1133) 0x44ffe3 MOV -0x138(%RBP),%RBX |
(1133) 0x44ffea MOV -0x140(%RBP),%R10 |
(1133) 0x44fff1 MOV -0x38(%RBP),%R8 |
(1133) 0x44fff5 MOV -0x98(%RBP),%R15 |
(1133) 0x44fffc MOV -0xd8(%RBP),%RDI |
(1133) 0x450003 JNE 450310 |
(1133) 0x450009 NOPL (%RAX) |
(1133) 0x450010 MOV -0xb0(%RBP),%RAX |
(1133) 0x450017 MOV (%RAX),%RAX |
(1133) 0x45001a MOV %RAX,-0xd8(%RBP) |
(1133) 0x450021 CMP $0x2,%RAX |
(1133) 0x450025 JL 450170 |
(1133) 0x45002b MOV -0x180(%RBP),%RAX |
(1133) 0x450032 MOV -0xe0(%RBP),%RDX |
(1133) 0x450039 MOV (%RAX,%RDX,8),%RDI |
(1133) 0x45003d MOV 0x8(%RAX,%RDX,8),%RAX |
(1133) 0x450042 MOV %RAX,%RDX |
(1133) 0x450045 SUB %RDI,%RDX |
(1133) 0x450048 JLE 450170 |
(1133) 0x45004e VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 |
(1133) 0x450056 MOV %RDX,-0xf8(%RBP) |
(1133) 0x45005d AND $-0x4,%RDX |
(1133) 0x450061 JE 45037f |
(1133) 0x450067 MOV %RDI,%R9 |
(1133) 0x45006a LEA -0x1(%RDX),%RDI |
(1133) 0x45006e VBROADCASTSD %XMM11,%YMM12 |
(1133) 0x450073 MOV -0x78(%RBP),%R8 |
(1133) 0x450077 LEA (%R8,%R9,8),%R8 |
(1133) 0x45007b MOV %R9,-0xf0(%RBP) |
(1133) 0x450082 LEA (%R10,%R9,8),%R14 |
(1133) 0x450086 VPXOR %XMM14,%XMM14,%XMM14 |
(1133) 0x45008b VXORPD %XMM13,%XMM13,%XMM13 |
(1133) 0x450090 XOR %R12D,%R12D |
(1133) 0x450093 MOV -0x40(%RBP),%R13 |
(1133) 0x450097 NOPW (%RAX,%RAX,1) |
(1138) 0x4500a0 MOV (%R14,%R12,8),%R10 |
(1138) 0x4500a4 MOV 0x8(%R14,%R12,8),%RBX |
(1138) 0x4500a9 MOV 0x10(%R14,%R12,8),%R15 |
(1138) 0x4500ae MOV 0x18(%R14,%R12,8),%R9 |
(1138) 0x4500b3 VMOVQ (%R13,%R9,8),%XMM4 |
(1138) 0x4500ba VMOVQ (%R13,%R15,8),%XMM5 |
(1138) 0x4500c1 VPUNPCKLQDQ %XMM4,%XMM5,%XMM4 |
(1138) 0x4500c5 VMOVQ (%R13,%RBX,8),%XMM5 |
(1138) 0x4500cc VMOVQ (%R13,%R10,8),%XMM15 |
(1138) 0x4500d3 VPUNPCKLQDQ %XMM5,%XMM15,%XMM5 |
(1138) 0x4500d7 VINSERTI128 $0x1,%XMM4,%YMM5,%YMM4 |
(1138) 0x4500dd VPCMPGTQ %YMM4,%YMM9,%YMM4 |
(1138) 0x4500e2 VPXOR %YMM2,%YMM4,%YMM5 |
(1138) 0x4500e6 VMASKMOVPD (%R8,%R12,8),%YMM5,%YMM5 |
(1138) 0x4500ec VMULPD %YMM5,%YMM12,%YMM15 |
(1138) 0x4500f0 VCMPPD $0x1,%YMM14,%YMM15,%YMM15 |
(1138) 0x4500f6 VPANDN %YMM15,%YMM4,%YMM4 |
(1138) 0x4500fb VBLENDVPD %YMM4,%YMM5,%YMM3,%YMM4 |
(1138) 0x450101 VADDPD %YMM4,%YMM13,%YMM13 |
(1138) 0x450105 ADD $0x4,%R12 |
(1138) 0x450109 CMP %RDI,%R12 |
(1138) 0x45010c JBE 4500a0 |
(1133) 0x45010e VEXTRACTF128 $0x1,%YMM13,%XMM4 |
(1133) 0x450114 VADDPD %XMM4,%XMM13,%XMM4 |
(1133) 0x450118 VSHUFPD $0x1,%XMM4,%XMM4,%XMM5 |
(1133) 0x45011d VADDSD %XMM5,%XMM4,%XMM4 |
(1133) 0x450121 VADDSD %XMM4,%XMM10,%XMM10 |
(1133) 0x450125 CMP %RDX,-0xf8(%RBP) |
(1133) 0x45012c MOV -0x130(%RBP),%R14 |
(1133) 0x450133 MOV -0xd0(%RBP),%R12 |
(1133) 0x45013a MOV -0x138(%RBP),%RBX |
(1133) 0x450141 MOV -0x140(%RBP),%R10 |
(1133) 0x450148 MOV -0x128(%RBP),%R13 |
(1133) 0x45014f MOV -0x80(%RBP),%R9 |
(1133) 0x450153 MOV -0x38(%RBP),%R8 |
(1133) 0x450157 MOV -0x98(%RBP),%R15 |
(1133) 0x45015e MOV -0xf0(%RBP),%RDI |
(1133) 0x450165 JNE 450381 |
(1133) 0x45016b NOPL (%RAX,%RAX,1) |
(1133) 0x450170 VUCOMISD %XMM0,%XMM10 |
(1133) 0x450174 MOV -0x90(%RBP),%RAX |
(1133) 0x45017b VMOVSD (%RAX,%R11,8),%XMM11 |
(1133) 0x450181 JE 450301 |
(1133) 0x450187 VDIVSD %XMM10,%XMM11,%XMM10 |
(1133) 0x45018c CMP %RCX,%RSI |
(1133) 0x45018f JGE 45025f |
(1133) 0x450195 VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 |
(1133) 0x45019d JMP 4501ac |
0x45019f NOP |
(1136) 0x4501a0 INC %RSI |
(1136) 0x4501a3 CMP %RSI,%RCX |
(1136) 0x4501a6 JE 45025f |
(1136) 0x4501ac MOV -0x160(%RBP),%RAX |
(1136) 0x4501b3 MOV (%RAX,%RSI,8),%RAX |
(1136) 0x4501b7 MOV (%R13,%RAX,8),%RDX |
(1136) 0x4501bc CMP %R8,%RDX |
(1136) 0x4501bf JL 4501e6 |
(1136) 0x4501c1 MOV -0x90(%RBP),%RDI |
(1136) 0x4501c8 VMOVSD (%RDI,%RSI,8),%XMM12 |
(1136) 0x4501cd VMULSD %XMM11,%XMM12,%XMM13 |
(1136) 0x4501d2 VUCOMISD %XMM0,%XMM13 |
(1136) 0x4501d6 JAE 4501e6 |
(1136) 0x4501d8 MOV (%RBX),%RDI |
(1136) 0x4501db VFMADD213SD (%RDI,%RDX,8),%XMM10,%XMM12 |
(1136) 0x4501e1 VMOVSD %XMM12,(%RDI,%RDX,8) |
(1136) 0x4501e6 CMP -0x30(%RBP),%RAX |
(1136) 0x4501ea JNE 4501a0 |
(1136) 0x4501ec MOV -0x90(%RBP),%RAX |
(1136) 0x4501f3 VMOVSD (%RAX,%RSI,8),%XMM12 |
(1136) 0x4501f8 VMULSD %XMM11,%XMM12,%XMM13 |
(1136) 0x4501fd VMULSD %XMM10,%XMM12,%XMM12 |
(1136) 0x450202 VCMPSD $0x1,%XMM0,%XMM13,%XMM13 |
(1136) 0x450207 VBLENDVPD %XMM13,%XMM12,%XMM1,%XMM12 |
(1136) 0x45020d VADDSD %XMM6,%XMM12,%XMM6 |
(1136) 0x450211 JMP 4501a0 |
0x450213 NOPW %CS:(%RAX,%RAX,1) |
(1133) 0x450220 CMPQ $-0x3,(%R14,%RCX,8) |
(1133) 0x450225 JE 44fe2a |
(1133) 0x45022b CMPQ $0x1,-0x190(%RBP) |
(1133) 0x450233 JE 45024d |
(1133) 0x450235 MOV %RCX,%RDX |
(1133) 0x450238 MOV -0x188(%RBP),%RCX |
(1133) 0x45023f MOV (%RCX,%RSI,8),%RAX |
(1133) 0x450243 CMP (%RCX,%RDX,8),%RAX |
(1133) 0x450247 JNE 44fe2a |
(1133) 0x45024d MOV -0x90(%RBP),%RAX |
(1133) 0x450254 VADDSD (%RAX,%R11,8),%XMM6,%XMM6 |
(1133) 0x45025a JMP 44fe2a |
(1133) 0x45025f CMPQ $0x2,-0xd8(%RBP) |
(1133) 0x450267 JL 450305 |
(1133) 0x45026d MOV -0x180(%RBP),%RAX |
(1133) 0x450274 MOV -0xe0(%RBP),%RDX |
(1133) 0x45027b MOV (%RAX,%RDX,8),%RCX |
(1133) 0x45027f MOV 0x8(%RAX,%RDX,8),%RSI |
(1133) 0x450284 MOV %RSI,%RAX |
(1133) 0x450287 SUB %RCX,%RAX |
(1133) 0x45028a JLE 450305 |
(1133) 0x45028c VCVTSI2SDL -0xa0(%RBP),%XMM0,%XMM11 |
(1133) 0x450294 CMP $0x4,%RAX |
(1133) 0x450298 JAE 4503cc |
(1133) 0x45029e MOV %RAX,%RDX |
(1133) 0x4502a1 AND $-0x4,%RDX |
(1133) 0x4502a5 CMP %RAX,%RDX |
(1133) 0x4502a8 JAE 4504e4 |
(1133) 0x4502ae ADD %RDX,%RCX |
(1133) 0x4502b1 MOV -0x38(%RBP),%R8 |
(1133) 0x4502b5 MOV -0x98(%RBP),%R15 |
(1133) 0x4502bc JMP 4502c8 |
0x4502be XCHG %AX,%AX |
(1134) 0x4502c0 INC %RCX |
(1134) 0x4502c3 CMP %RCX,%RSI |
(1134) 0x4502c6 JE 450305 |
(1134) 0x4502c8 MOV (%R10,%RCX,8),%RAX |
(1134) 0x4502cc MOV -0x40(%RBP),%RDX |
(1134) 0x4502d0 MOV (%RDX,%RAX,8),%RAX |
(1134) 0x4502d4 CMP %R9,%RAX |
(1134) 0x4502d7 JL 4502c0 |
(1134) 0x4502d9 MOV -0x78(%RBP),%RDX |
(1134) 0x4502dd VMOVSD (%RDX,%RCX,8),%XMM12 |
(1134) 0x4502e2 VMULSD %XMM11,%XMM12,%XMM4 |
(1134) 0x4502e7 VUCOMISD %XMM0,%XMM4 |
(1134) 0x4502eb JAE 4502c0 |
(1134) 0x4502ed MOV -0x68(%RBP),%RDX |
(1134) 0x4502f1 MOV (%RDX),%RDX |
(1134) 0x4502f4 VFMADD213SD (%RDX,%RAX,8),%XMM10,%XMM12 |
(1134) 0x4502fa VMOVSD %XMM12,(%RDX,%RAX,8) |
(1134) 0x4502ff JMP 4502c0 |
(1133) 0x450301 VADDSD %XMM6,%XMM11,%XMM6 |
(1133) 0x450305 MOV -0x30(%RBP),%RSI |
(1133) 0x450309 JMP 44fe2a |
(1133) 0x45030e XOR %EAX,%EAX |
(1133) 0x450310 ADD %RDI,%RAX |
(1133) 0x450313 INC %RAX |
(1133) 0x450316 JMP 450330 |
0x450318 NOPL (%RAX,%RAX,1) |
(1139) 0x450320 MOV -0x38(%RBP),%R8 |
(1139) 0x450324 INC %RAX |
(1139) 0x450327 CMP %RAX,%RCX |
(1139) 0x45032a JE 450010 |
(1139) 0x450330 MOV -0x160(%RBP),%RDX |
(1139) 0x450337 MOV (%RDX,%RAX,8),%RDX |
(1139) 0x45033b XOR %EDI,%EDI |
(1139) 0x45033d CMP %R8,(%R13,%RDX,8) |
(1139) 0x450342 SETGE %DIL |
(1139) 0x450346 XOR %R8D,%R8D |
(1139) 0x450349 CMP -0x30(%RBP),%RDX |
(1139) 0x45034d SETE %R8B |
(1139) 0x450351 CMP %DIL,%R8B |
(1139) 0x450354 CMOVA %R8D,%EDI |
(1139) 0x450358 CMP $0x1,%DIL |
(1139) 0x45035c JNE 450320 |
(1139) 0x45035e MOV -0x90(%RBP),%RDX |
(1139) 0x450365 VMOVSD (%RDX,%RAX,8),%XMM4 |
(1139) 0x45036a VMULSD %XMM4,%XMM11,%XMM5 |
(1139) 0x45036e VCMPSD $0x1,%XMM0,%XMM5,%XMM5 |
(1139) 0x450373 VBLENDVPD %XMM5,%XMM4,%XMM1,%XMM4 |
(1139) 0x450379 VADDSD %XMM4,%XMM10,%XMM10 |
(1139) 0x45037d JMP 450320 |
(1133) 0x45037f XOR %EDX,%EDX |
(1133) 0x450381 ADD %RDI,%RDX |
(1133) 0x450384 JMP 4503a0 |
0x450386 NOPW %CS:(%RAX,%RAX,1) |
(1137) 0x450390 MOV -0x38(%RBP),%R8 |
(1137) 0x450394 INC %RDX |
(1137) 0x450397 CMP %RDX,%RAX |
(1137) 0x45039a JE 450170 |
(1137) 0x4503a0 MOV (%R10,%RDX,8),%RDI |
(1137) 0x4503a4 MOV -0x40(%RBP),%R8 |
(1137) 0x4503a8 CMP %R9,(%R8,%RDI,8) |
(1137) 0x4503ac JL 450390 |
(1137) 0x4503ae MOV -0x78(%RBP),%RDI |
(1137) 0x4503b2 VMOVSD (%RDI,%RDX,8),%XMM4 |
(1137) 0x4503b7 VMULSD %XMM4,%XMM11,%XMM5 |
(1137) 0x4503bb VCMPSD $0x1,%XMM0,%XMM5,%XMM5 |
(1137) 0x4503c0 VBLENDVPD %XMM5,%XMM4,%XMM1,%XMM4 |
(1137) 0x4503c6 VADDSD %XMM4,%XMM10,%XMM10 |
(1137) 0x4503ca JMP 450390 |
(1133) 0x4503cc MOV %RAX,%RDX |
(1133) 0x4503cf SHR $0x2,%RDX |
(1133) 0x4503d3 LEA 0x18(,%RCX,8),%R15 |
(1133) 0x4503db JMP 4503ed |
0x4503dd NOPL (%RAX) |
(1135) 0x4503e0 ADD $0x20,%R15 |
(1135) 0x4503e4 DEC %RDX |
(1135) 0x4503e7 JE 45029e |
(1135) 0x4503ed MOV -0x18(%R10,%R15,1),%RDI |
(1135) 0x4503f2 MOV -0x40(%RBP),%R8 |
(1135) 0x4503f6 MOV (%R8,%RDI,8),%RDI |
(1135) 0x4503fa CMP %R9,%RDI |
(1135) 0x4503fd JL 450428 |
(1135) 0x4503ff MOV -0x78(%RBP),%R8 |
(1135) 0x450403 VMOVSD -0x18(%R8,%R15,1),%XMM12 |
(1135) 0x45040a VMULSD %XMM11,%XMM12,%XMM4 |
(1135) 0x45040f VUCOMISD %XMM0,%XMM4 |
(1135) 0x450413 JAE 450428 |
(1135) 0x450415 MOV -0x68(%RBP),%R8 |
(1135) 0x450419 MOV (%R8),%R8 |
(1135) 0x45041c VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1135) 0x450422 VMOVSD %XMM12,(%R8,%RDI,8) |
(1135) 0x450428 MOV -0x10(%R10,%R15,1),%RDI |
(1135) 0x45042d MOV -0x40(%RBP),%R8 |
(1135) 0x450431 MOV (%R8,%RDI,8),%RDI |
(1135) 0x450435 CMP %R9,%RDI |
(1135) 0x450438 JL 450463 |
(1135) 0x45043a MOV -0x78(%RBP),%R8 |
(1135) 0x45043e VMOVSD -0x10(%R8,%R15,1),%XMM12 |
(1135) 0x450445 VMULSD %XMM11,%XMM12,%XMM4 |
(1135) 0x45044a VUCOMISD %XMM0,%XMM4 |
(1135) 0x45044e JAE 450463 |
(1135) 0x450450 MOV -0x68(%RBP),%R8 |
(1135) 0x450454 MOV (%R8),%R8 |
(1135) 0x450457 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1135) 0x45045d VMOVSD %XMM12,(%R8,%RDI,8) |
(1135) 0x450463 MOV -0x8(%R10,%R15,1),%RDI |
(1135) 0x450468 MOV -0x40(%RBP),%R8 |
(1135) 0x45046c MOV (%R8,%RDI,8),%RDI |
(1135) 0x450470 CMP %R9,%RDI |
(1135) 0x450473 JL 45049e |
(1135) 0x450475 MOV -0x78(%RBP),%R8 |
(1135) 0x450479 VMOVSD -0x8(%R8,%R15,1),%XMM12 |
(1135) 0x450480 VMULSD %XMM11,%XMM12,%XMM4 |
(1135) 0x450485 VUCOMISD %XMM0,%XMM4 |
(1135) 0x450489 JAE 45049e |
(1135) 0x45048b MOV -0x68(%RBP),%R8 |
(1135) 0x45048f MOV (%R8),%R8 |
(1135) 0x450492 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1135) 0x450498 VMOVSD %XMM12,(%R8,%RDI,8) |
(1135) 0x45049e MOV (%R10,%R15,1),%RDI |
(1135) 0x4504a2 MOV -0x40(%RBP),%R8 |
(1135) 0x4504a6 MOV (%R8,%RDI,8),%RDI |
(1135) 0x4504aa CMP %R9,%RDI |
(1135) 0x4504ad JL 4503e0 |
(1135) 0x4504b3 MOV -0x78(%RBP),%R8 |
(1135) 0x4504b7 VMOVSD (%R8,%R15,1),%XMM12 |
(1135) 0x4504bd VMULSD %XMM11,%XMM12,%XMM4 |
(1135) 0x4504c2 VUCOMISD %XMM0,%XMM4 |
(1135) 0x4504c6 JAE 4503e0 |
(1135) 0x4504cc MOV -0x68(%RBP),%R8 |
(1135) 0x4504d0 MOV (%R8),%R8 |
(1135) 0x4504d3 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1135) 0x4504d9 VMOVSD %XMM12,(%R8,%RDI,8) |
(1135) 0x4504df JMP 4503e0 |
(1133) 0x4504e4 MOV -0x30(%RBP),%RSI |
(1133) 0x4504e8 MOV -0x38(%RBP),%R8 |
(1133) 0x4504ec MOV -0x98(%RBP),%R15 |
(1133) 0x4504f3 JMP 44fe2a |
(1125) 0x4504f8 MOV -0xb0(%RBP),%RAX |
(1125) 0x4504ff CMPQ $0x2,(%RAX) |
(1125) 0x450503 JL 45089e |
(1125) 0x450509 MOV -0x180(%RBP),%RCX |
(1125) 0x450510 MOV (%RCX,%RSI,8),%RAX |
(1125) 0x450514 MOV 0x8(%RCX,%RSI,8),%RCX |
(1125) 0x450519 CMP %RCX,%RAX |
(1125) 0x45051c MOV -0xb8(%RBP),%R10 |
(1125) 0x450523 MOV -0x100(%RBP),%R11 |
(1125) 0x45052a VMOVDDUP 0x9a156(%RIP),%XMM5 |
(1125) 0x450532 JL 450604 |
(1125) 0x450538 VUCOMISD %XMM0,%XMM6 |
(1125) 0x45053c JE 4508be |
(1125) 0x450542 MOV -0x58(%RBP),%RDX |
(1125) 0x450546 SUB %R8,%RDX |
(1125) 0x450549 MOV -0x30(%RBP),%RSI |
(1125) 0x45054d JLE 4508ea |
(1125) 0x450553 MOV (%RBX),%RAX |
(1125) 0x450556 VMOVSD 0x97ab2(%RIP),%XMM4 |
(1125) 0x45055e VDIVSD %XMM6,%XMM4,%XMM7 |
(1125) 0x450562 MOV %RDX,%RCX |
(1125) 0x450565 AND $-0x4,%RCX |
(1125) 0x450569 JE 4508c7 |
(1125) 0x45056f LEA -0x1(%RCX),%RSI |
(1125) 0x450573 VBROADCASTSD %XMM7,%YMM8 |
(1125) 0x450578 LEA (%RAX,%R8,8),%RDI |
(1125) 0x45057c VBROADCASTSD 0x9a103(%RIP),%YMM9 |
(1125) 0x450585 XOR %R8D,%R8D |
(1125) 0x450588 NOPL (%RAX,%RAX,1) |
(1129) 0x450590 VXORPD (%RDI,%R8,8),%YMM9,%YMM4 |
(1129) 0x450596 VMULPD %YMM4,%YMM8,%YMM4 |
(1129) 0x45059a VMOVUPD %YMM4,(%RDI,%R8,8) |
(1129) 0x4505a0 ADD $0x4,%R8 |
(1129) 0x4505a4 CMP %RSI,%R8 |
(1129) 0x4505a7 JBE 450590 |
(1125) 0x4505a9 CMP %RCX,%RDX |
(1125) 0x4505ac MOV -0x30(%RBP),%RSI |
(1125) 0x4505b0 VMOVDDUP 0x9a0d0(%RIP),%XMM5 |
(1125) 0x4505b8 MOV -0x38(%RBP),%R8 |
(1125) 0x4505bc MOV -0x58(%RBP),%RDX |
(1125) 0x4505c0 JNE 4508cd |
(1125) 0x4505c6 JMP 4508ea |
0x4505cb NOPL (%RAX,%RAX,1) |
(1130) 0x4505d0 MOV -0x68(%RBP),%RDX |
(1130) 0x4505d4 MOV (%RDX),%RDX |
(1130) 0x4505d7 VMOVSD (%RDX,%RSI,8),%XMM7 |
(1130) 0x4505dc MOV -0x78(%RBP),%RDI |
(1130) 0x4505e0 VADDSD (%RDI,%RAX,8),%XMM7,%XMM7 |
(1130) 0x4505e5 VMOVSD %XMM7,(%RDX,%RSI,8) |
(1130) 0x4505ea INC %RAX |
(1130) 0x4505ed CMP %RCX,%RAX |
(1130) 0x4505f0 MOV -0xb8(%RBP),%R10 |
(1130) 0x4505f7 MOV -0x100(%RBP),%R11 |
(1130) 0x4505fe JE 450538 |
(1130) 0x450604 MOV -0x140(%RBP),%RDX |
(1130) 0x45060b MOV (%RDX,%RAX,8),%RDX |
(1130) 0x45060f MOV -0x40(%RBP),%RSI |
(1130) 0x450613 MOV (%RSI,%RDX,8),%RSI |
(1130) 0x450617 CMP %R9,%RSI |
(1130) 0x45061a JGE 4505d0 |
(1130) 0x45061c CMP -0x60(%RBP),%RSI |
(1130) 0x450620 JNE 450690 |
(1130) 0x450622 MOV -0x1e0(%RBP),%RDI |
(1130) 0x450629 MOV (%RDI,%RDX,8),%RSI |
(1130) 0x45062d MOV 0x8(%RDI,%RDX,8),%R11 |
(1130) 0x450632 CMP %RSI,%R11 |
(1130) 0x450635 MOV -0x1e8(%RBP),%R10 |
(1130) 0x45063c JLE 450890 |
(1130) 0x450642 MOV %R11D,%EDI |
(1130) 0x450645 SUB %ESI,%EDI |
(1130) 0x450647 LEA 0x1(%RSI),%RDX |
(1130) 0x45064b VPXOR %XMM7,%XMM7,%XMM7 |
(1130) 0x45064f MOV %RSI,%R15 |
(1130) 0x450652 TEST $0x1,%DIL |
(1130) 0x450656 JE 4506fb |
(1130) 0x45065c MOV (%R10,%RSI,8),%R8 |
(1130) 0x450660 MOV %R8,%RDI |
(1130) 0x450663 SUB -0x118(%RBP),%RDI |
(1130) 0x45066a JL 4506db |
(1130) 0x45066c CMP -0x110(%RBP),%R8 |
(1130) 0x450673 JGE 4506db |
(1130) 0x450675 MOV -0x38(%RBP),%R8 |
(1130) 0x450679 CMP %R8,(%R13,%RDI,8) |
(1130) 0x45067e JGE 4506ec |
(1130) 0x450680 CMP -0x30(%RBP),%RDI |
(1130) 0x450684 JNE 4506f8 |
(1130) 0x450686 JMP 4506ec |
0x450688 NOPL (%RAX,%RAX,1) |
(1130) 0x450690 MOV -0x120(%RBP),%RSI |
(1130) 0x450697 MOV (%RSI),%RSI |
(1130) 0x45069a CMPQ $-0x3,(%RSI,%RDX,8) |
(1130) 0x45069f JE 4505ea |
(1130) 0x4506a5 CMPQ $0x1,-0x190(%RBP) |
(1130) 0x4506ad JE 450890 |
(1130) 0x4506b3 MOV -0x188(%RBP),%RSI |
(1130) 0x4506ba MOV -0x30(%RBP),%RDI |
(1130) 0x4506be MOV (%RSI,%RDI,8),%RSI |
(1130) 0x4506c2 MOV -0x1d8(%RBP),%RDI |
(1130) 0x4506c9 MOV (%RDI),%RDI |
(1130) 0x4506cc CMP (%RDI,%RDX,8),%RSI |
(1130) 0x4506d0 JNE 4505ea |
(1130) 0x4506d6 JMP 450890 |
(1130) 0x4506db NOT %R8 |
(1130) 0x4506de MOV -0x40(%RBP),%RDI |
(1130) 0x4506e2 CMP %R9,(%RDI,%R8,8) |
(1130) 0x4506e6 MOV -0x38(%RBP),%R8 |
(1130) 0x4506ea JL 4506f8 |
(1130) 0x4506ec MOV -0x108(%RBP),%RDI |
(1130) 0x4506f3 VMOVQ (%RDI,%RSI,8),%XMM7 |
(1130) 0x4506f8 MOV %RDX,%R15 |
(1130) 0x4506fb CMP %RDX,%R11 |
(1130) 0x4506fe JNE 4507eb |
(1130) 0x450704 VUCOMISD %XMM0,%XMM7 |
(1130) 0x450708 JE 450890 |
(1130) 0x45070e MOV -0x78(%RBP),%RDX |
(1130) 0x450712 VMOVSD (%RDX,%RAX,8),%XMM8 |
(1130) 0x450717 VDIVSD %XMM7,%XMM8,%XMM7 |
(1130) 0x45071b JMP 45072c |
0x45071d NOPL (%RAX) |
(1131) 0x450720 INC %RSI |
(1131) 0x450723 CMP %RSI,%R11 |
(1131) 0x450726 JE 4505ea |
(1131) 0x45072c MOV (%R10,%RSI,8),%RDI |
(1131) 0x450730 MOV %RDI,%RDX |
(1131) 0x450733 SUB -0x118(%RBP),%RDX |
(1131) 0x45073a JL 450790 |
(1131) 0x45073c CMP -0x110(%RBP),%RDI |
(1131) 0x450743 JGE 450790 |
(1131) 0x450745 MOV (%R13,%RDX,8),%RDI |
(1131) 0x45074a CMP %R8,%RDI |
(1131) 0x45074d JL 45076f |
(1131) 0x45074f MOV -0x108(%RBP),%R8 |
(1131) 0x450756 VMOVSD (%R8,%RSI,8),%XMM8 |
(1131) 0x45075c MOV (%RBX),%R8 |
(1131) 0x45075f VFMADD213SD (%R8,%RDI,8),%XMM7,%XMM8 |
(1131) 0x450765 VMOVSD %XMM8,(%R8,%RDI,8) |
(1131) 0x45076b MOV -0x38(%RBP),%R8 |
(1131) 0x45076f CMP -0x30(%RBP),%RDX |
(1131) 0x450773 JNE 450720 |
(1131) 0x450775 MOV -0x108(%RBP),%RDX |
(1131) 0x45077c VFMADD231SD (%RDX,%RSI,8),%XMM7,%XMM6 |
(1131) 0x450782 JMP 450720 |
0x450784 NOPW %CS:(%RAX,%RAX,1) |
(1131) 0x450790 NOT %RDI |
(1131) 0x450793 MOV -0x40(%RBP),%RDX |
(1131) 0x450797 MOV (%RDX,%RDI,8),%RDX |
(1131) 0x45079b CMP %R9,%RDX |
(1131) 0x45079e JL 450720 |
(1131) 0x4507a0 MOV -0x108(%RBP),%RDI |
(1131) 0x4507a7 VMOVSD (%RDI,%RSI,8),%XMM8 |
(1131) 0x4507ac MOV -0x68(%RBP),%RDI |
(1131) 0x4507b0 MOV (%RDI),%RDI |
(1131) 0x4507b3 VFMADD213SD (%RDI,%RDX,8),%XMM7,%XMM8 |
(1131) 0x4507b9 VMOVSD %XMM8,(%RDI,%RDX,8) |
(1131) 0x4507be JMP 450720 |
0x4507c3 NOPW %CS:(%RAX,%RAX,1) |
(1132) 0x4507d0 MOV -0x108(%RBP),%RDX |
(1132) 0x4507d7 VADDSD 0x8(%RDX,%R15,8),%XMM7,%XMM7 |
(1132) 0x4507de ADD $0x2,%R15 |
(1132) 0x4507e2 CMP %R15,%R11 |
(1132) 0x4507e5 JE 450704 |
(1132) 0x4507eb MOV (%R10,%R15,8),%RDI |
(1132) 0x4507ef MOV %RDI,%RDX |
(1132) 0x4507f2 SUB -0x118(%RBP),%RDX |
(1132) 0x4507f9 JL 450820 |
(1132) 0x4507fb CMP -0x110(%RBP),%RDI |
(1132) 0x450802 JGE 450820 |
(1132) 0x450804 CMP %R8,(%R13,%RDX,8) |
(1132) 0x450809 JGE 45082d |
(1132) 0x45080b CMP -0x30(%RBP),%RDX |
(1132) 0x45080f JNE 45083a |
(1132) 0x450811 JMP 45082d |
0x450813 NOPW %CS:(%RAX,%RAX,1) |
(1132) 0x450820 NOT %RDI |
(1132) 0x450823 MOV -0x40(%RBP),%RDX |
(1132) 0x450827 CMP %R9,(%RDX,%RDI,8) |
(1132) 0x45082b JL 45083a |
(1132) 0x45082d MOV -0x108(%RBP),%RDX |
(1132) 0x450834 VADDSD (%RDX,%R15,8),%XMM7,%XMM7 |
(1132) 0x45083a MOV 0x8(%R10,%R15,8),%RDI |
(1132) 0x45083f MOV %RDI,%RDX |
(1132) 0x450842 SUB -0x118(%RBP),%RDX |
(1132) 0x450849 JL 450870 |
(1132) 0x45084b CMP -0x110(%RBP),%RDI |
(1132) 0x450852 JGE 450870 |
(1132) 0x450854 CMP %R8,(%R13,%RDX,8) |
(1132) 0x450859 JGE 4507d0 |
(1132) 0x45085f CMP -0x30(%RBP),%RDX |
(1132) 0x450863 JNE 4507de |
(1132) 0x450869 JMP 4507d0 |
0x45086e XCHG %AX,%AX |
(1132) 0x450870 NOT %RDI |
(1132) 0x450873 MOV -0x40(%RBP),%RDX |
(1132) 0x450877 CMP %R9,(%RDX,%RDI,8) |
(1132) 0x45087b JL 4507de |
(1132) 0x450881 JMP 4507d0 |
0x450886 NOPW %CS:(%RAX,%RAX,1) |
(1130) 0x450890 MOV -0x78(%RBP),%RDX |
(1130) 0x450894 VADDSD (%RDX,%RAX,8),%XMM6,%XMM6 |
(1130) 0x450899 JMP 4505ea |
(1125) 0x45089e MOV -0xb8(%RBP),%R10 |
(1125) 0x4508a5 MOV -0x100(%RBP),%R11 |
(1125) 0x4508ac VMOVDDUP 0x99dd4(%RIP),%XMM5 |
(1125) 0x4508b4 VUCOMISD %XMM0,%XMM6 |
(1125) 0x4508b8 JNE 450542 |
(1125) 0x4508be MOV -0x30(%RBP),%RSI |
(1125) 0x4508c2 JMP 44f9fc |
(1125) 0x4508c7 XOR %ECX,%ECX |
(1125) 0x4508c9 MOV -0x58(%RBP),%RDX |
(1125) 0x4508cd ADD %R8,%RCX |
(1128) 0x4508d0 VMOVSD (%RAX,%RCX,8),%XMM4 |
(1128) 0x4508d5 VXORPD %XMM5,%XMM4,%XMM4 |
(1128) 0x4508d9 VMULSD %XMM4,%XMM7,%XMM4 |
(1128) 0x4508dd VMOVSD %XMM4,(%RAX,%RCX,8) |
(1128) 0x4508e2 INC %RCX |
(1128) 0x4508e5 CMP %RCX,%RDX |
(1128) 0x4508e8 JNE 4508d0 |
(1125) 0x4508ea MOV -0x48(%RBP),%RDX |
(1125) 0x4508ee SUB %R9,%RDX |
(1125) 0x4508f1 JLE 44f9fc |
(1125) 0x4508f7 MOV -0x68(%RBP),%RAX |
(1125) 0x4508fb MOV (%RAX),%RAX |
(1125) 0x4508fe VMOVSD 0x9770a(%RIP),%XMM4 |
(1125) 0x450906 VDIVSD %XMM6,%XMM4,%XMM6 |
(1125) 0x45090a MOV %RDX,%RCX |
(1125) 0x45090d AND $-0x4,%RCX |
(1125) 0x450911 JE 450958 |
(1125) 0x450913 LEA -0x1(%RCX),%RSI |
(1125) 0x450917 VBROADCASTSD %XMM6,%YMM7 |
(1125) 0x45091c LEA (%RAX,%R9,8),%RDI |
(1125) 0x450920 VBROADCASTSD 0x99d5f(%RIP),%YMM8 |
(1125) 0x450929 XOR %R8D,%R8D |
(1125) 0x45092c NOPL (%RAX) |
(1127) 0x450930 VXORPD (%RDI,%R8,8),%YMM8,%YMM4 |
(1127) 0x450936 VMULPD %YMM4,%YMM7,%YMM4 |
(1127) 0x45093a VMOVUPD %YMM4,(%RDI,%R8,8) |
(1127) 0x450940 ADD $0x4,%R8 |
(1127) 0x450944 CMP %RSI,%R8 |
(1127) 0x450947 JBE 450930 |
(1125) 0x450949 CMP %RCX,%RDX |
(1125) 0x45094c MOV -0x30(%RBP),%RSI |
(1125) 0x450950 JE 44f9fc |
(1125) 0x450956 JMP 45095a |
(1125) 0x450958 XOR %ECX,%ECX |
(1125) 0x45095a ADD %R9,%RCX |
(1125) 0x45095d MOV -0x48(%RBP),%RDX |
(1125) 0x450961 NOPW %CS:(%RAX,%RAX,1) |
(1126) 0x450970 VMOVSD (%RAX,%RCX,8),%XMM4 |
(1126) 0x450975 VXORPD %XMM5,%XMM4,%XMM4 |
(1126) 0x450979 VMULSD %XMM4,%XMM6,%XMM4 |
(1126) 0x45097d VMOVSD %XMM4,(%RAX,%RCX,8) |
(1126) 0x450982 INC %RCX |
(1126) 0x450985 CMP %RCX,%RDX |
(1126) 0x450988 JNE 450970 |
(1125) 0x45098a JMP 44f9fc |
0x45098f ADD $0x1c8,%RSP |
0x450996 POP %RBX |
0x450997 POP %R12 |
0x450999 POP %R13 |
0x45099b POP %R14 |
0x45099d POP %R15 |
0x45099f POP %RBP |
0x4509a0 VZEROUPPER |
0x4509a3 RET |
0x4509a4 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | par_lr_interp.c:1196-1757 |
Module | exec |
nb instructions | 622 |
nb uops | 664 |
loop length | 2950 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 4 |
used zmm registers | 0 |
nb stack references | 98 |
micro-operation queue | 110.67 cycles |
front end | 110.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 38.50 | 37.20 | 70.00 | 70.00 | 52.00 | 37.40 | 38.50 | 52.00 | 52.00 | 52.00 | 37.40 | 70.00 |
cycles | 38.50 | 37.20 | 70.00 | 70.00 | 52.00 | 37.40 | 38.50 | 52.00 | 52.00 | 52.00 | 37.40 | 70.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 108.12-108.15 |
Stall cycles | 0.00 |
Front-end | 110.67 |
Dispatch | 70.00 |
DIV/SQRT | 16.00 |
Overall L1 | 110.67 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 16% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 11% |
all | 13% |
load | 11% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 14% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
all | 13% |
load | 11% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x1c8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x170(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x168(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x1b8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x1a0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1e8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x100(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1e0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1d8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x198(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x1b0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x1c0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,-0x1d0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 44ecba <hypre_BoomerAMGBuildExtPIInterp.extracted+0x27a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,(%RCX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 44ecb1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x271> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44ecba <hypre_BoomerAMGBuildExtPIInterp.extracted+0x27a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 44ecf2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2b2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,(%RBX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JLE 44ecf2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2b2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44ecf2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2b2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
CALL 4d1410 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4d1400 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 44ed23 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2e3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R8 | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 44ed2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %R8D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV -0x50(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RSI,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA -0x1(%R8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RSI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x1a8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RCX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xb8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JG 44ee98 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x458> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51cf90,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,(%RBX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RAX,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,(%RCX,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RAX,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51cfb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R15,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R15,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %AL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %DL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 44f1c4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x784> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %SIL,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f1c4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x784> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %DL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f1c4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x784> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x2,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 44f255 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x815> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44f2b8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x878> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44eeda <hypre_BoomerAMGBuildExtPIInterp.extracted+0x49a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R15,%R9,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %DIL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA (%R11,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R15,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %R8B | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA (%R10,%R9,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %CL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %SIL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R15,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %DL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
TEST %R8B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 44f2d2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x892> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND %SIL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JNE 44f2d2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x892> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND %DL,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JNE 44f2d2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x892> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND $-0x2,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TESTB $0x1,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
JE 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,0x8(%R11,%RDI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RCX,0x8(%R15,%RDI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RAX,0x8(%R10,%RDI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
JMP 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51cfd0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x80(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R14,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 44f63c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xbfc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 44f63c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xbfc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%RDX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x80(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x8(%RDX,%R12,8),%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xe0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R12,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RAX,%R9,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAEB -0x48(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R14B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%R9,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R15,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R11B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %AL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R9B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETBB -0xe0(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SETB %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %R14B,-0x48(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
JNE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %AL,%R11B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR -0xe0(%RBP),%R9B | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1-2 | 0.33 |
JE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %CL,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %R10B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0x130(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 44f50a <hypre_BoomerAMGBuildExtPIInterp.extracted+0xaca> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %RDX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %XMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ %RSI,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %XMM1,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x1a8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x80(%RBP),%R10 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R10,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%R10,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44f526 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xae6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 44f542 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb02> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44f542 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb02> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x30(%RBP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R12,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R15,%R11,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R12,%RDX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 44f58e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb4e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 44f58e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb4e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44f57c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb3c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f844 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe04> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPCMPEQD %YMM0,%YMM0,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JMP 44f5b9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb79> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44f84a <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe0a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51cff0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x80(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 44f670 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xc30> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44f8dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe9c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMPQ $0x4,-0x170(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44f6d0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xc90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CALL 4d14a0 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x1b8(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VSUBSD (%R15),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM0,(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x1b0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4ee4f8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf910 <hypre_printf> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 410700 <fflush@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL 4d14a0 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM0,(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x178(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 44f741 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd01> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x100(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 44f77c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd3c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x148(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 44f798 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd58> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44f8dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe9c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 44f7bc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd7c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x1d0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x1c8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 49a280 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0x138(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 44f901 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xec1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R12,%RAX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 44f86e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe2e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %R12,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 44f86e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe2e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44f8dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe9c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 44f85c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe1c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f8bc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe7c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RCX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NEG %RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVQ %RSI,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %XMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 44f8be <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 44f8dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe9c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 44f901 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xec1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMPQ $0,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 44f920 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xee0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51d010,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,-0xa8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xb8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x100(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JG 44f994 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf54> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 44f966 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf26> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4cf830 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 45098f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f4f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x1c8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4cf830 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $-0x2,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x9acbc(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPCMPEQD %YMM2,%YMM2,%YMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD 0x9acaf(%RIP),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
JMP 44fa10 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfd0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x1c8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_lr_interp.c:1196-1757 |
Module | exec |
nb instructions | 622 |
nb uops | 664 |
loop length | 2950 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 4 |
used zmm registers | 0 |
nb stack references | 98 |
micro-operation queue | 110.67 cycles |
front end | 110.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 38.50 | 37.20 | 70.00 | 70.00 | 52.00 | 37.40 | 38.50 | 52.00 | 52.00 | 52.00 | 37.40 | 70.00 |
cycles | 38.50 | 37.20 | 70.00 | 70.00 | 52.00 | 37.40 | 38.50 | 52.00 | 52.00 | 52.00 | 37.40 | 70.00 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 108.12-108.15 |
Stall cycles | 0.00 |
Front-end | 110.67 |
Dispatch | 70.00 |
DIV/SQRT | 16.00 |
Overall L1 | 110.67 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 16% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 11% |
all | 13% |
load | 11% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 14% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
all | 13% |
load | 11% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 14% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x1c8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x188(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x190(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x170(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x168(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x1b8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x1a0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x118(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1c8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x108(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1e8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x100(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1e0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x1d8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xe0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x168(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x180(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x160(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x198(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x1b0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x1c0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0x158(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,-0x1d0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 44ecba <hypre_BoomerAMGBuildExtPIInterp.extracted+0x27a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,(%RCX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 44ecb1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x271> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44ecba <hypre_BoomerAMGBuildExtPIInterp.extracted+0x27a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 44ecf2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2b2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,(%RBX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JLE 44ecf2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2b2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44ecf2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2b2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
CALL 4d1410 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4d1400 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 44ed23 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2e3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R8 | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 44ed2a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2ea> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %ECX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %R8D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV -0x50(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RSI,%RDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA -0x1(%R8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RSI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,-0x1a8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RCX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xb8(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JG 44ee98 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x458> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51cf90,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,(%RBX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RAX,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,(%RCX,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xe0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,(%RAX,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51cfb0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %RBX,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R15,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R15,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %AL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R10,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %SIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %DL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %R8B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 44f1c4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x784> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %SIL,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f1c4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x784> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %DL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f1c4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x784> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x2,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 44f255 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x815> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44f2b8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x878> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44eeda <hypre_BoomerAMGBuildExtPIInterp.extracted+0x49a> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R15,%R9,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %DIL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA (%R11,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R15,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %R8B | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA (%R10,%R9,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R11,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %CL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %SIL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R15,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
CMP %R10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETA %DL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
TEST %R8B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 44f2d2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x892> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND %SIL,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JNE 44f2d2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x892> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND %DL,%AL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JNE 44f2d2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x892> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R15),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND $-0x2,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TESTB $0x1,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
JE 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %RDX,0x8(%R11,%RDI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RCX,0x8(%R15,%RDI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %RAX,0x8(%R10,%RDI,8) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
JMP 44f303 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x8c3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51cfd0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x80(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R14,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 44f63c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xbfc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 44f63c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xbfc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%RDX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x80(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x8(%RDX,%R12,8),%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xe0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%R12,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%RAX,%R9,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAEB -0x48(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETAE %R14B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%R8,%R9,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R15,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R11B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %AL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R9B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETBB -0xe0(%RBP) | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %CL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %R15,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SETB %DIL | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%R12),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SETB %R10B | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
TEST %R14B,-0x48(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 2 | 0.33 |
JNE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %AL,%R11B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR -0xe0(%RBP),%R9B | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1-2 | 0.33 |
JE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %CL,%R8B | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
OR %R10B,%DIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f4b5 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xa75> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV -0x130(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 44f50a <hypre_BoomerAMGBuildExtPIInterp.extracted+0xaca> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %RDX,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %XMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVQ %RSI,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %XMM1,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x1a8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x80(%RBP),%R10 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RAX,%R10,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%R10,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x8,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44f526 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xae6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 44f542 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb02> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x130(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44f542 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb02> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x58(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x30(%RBP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R12,%R9,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R15,%R11,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R12,%RDX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 44f58e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb4e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 44f58e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb4e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44f57c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb3c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x10,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f844 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe04> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPCMPEQD %YMM0,%YMM0,%YMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
JMP 44f5b9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xb79> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44f84a <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe0a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51cff0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x80(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 44f670 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xc30> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44f8dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe9c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
CMPQ $0x4,-0x170(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44f6d0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xc90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CALL 4d14a0 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x1b8(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VSUBSD (%R15),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM0,(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x1b0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4ee4f8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf910 <hypre_printf> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 410700 <fflush@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CALL 4d14a0 <time_getWallclockSeconds> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD %XMM0,(%R15) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x178(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 44f741 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd01> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x100(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xf8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RCX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 44f77c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd3c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x148(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4cf760 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 44f798 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd58> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 44f8dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe9c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 44f7bc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd7c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x1d0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xe8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x1c0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x1c8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 49a280 <hypre_alt_insert_new_nodes> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x88(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0x138(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 44f901 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xec1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA (%R12,%RAX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $-0x8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 44f86e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe2e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP %R12,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 44f86e <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe2e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 44f8dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe9c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 44f85c <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe1c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 44f8bc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe7c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RCX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NEG %RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVQ %RSI,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VPBROADCASTQ %XMM0,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 44f8be <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 44f8dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe9c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xf0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 44f901 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xec1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMPQ $0,(%RDI) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 44f920 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xee0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x51d010,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 410570 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,-0xa8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xb8(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x100(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JG 44f994 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf54> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 44f966 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf26> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 4cf830 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 45098f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1f4f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x40(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x1c8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4cf830 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x178(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x170(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $-0x2,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x9acbc(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPCMPEQD %YMM2,%YMM2,%YMM2 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBROADCASTSD 0x9acaf(%RIP),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
JMP 44fa10 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfd0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD $0x1c8,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildExtPIInterp.extracted– | 0.26 | 0.11 |
○Loop 1168 - par_lr_interp.c:1224-1225 - exec | 0.01 | 0 |
○Loop 1148 - par_lr_interp.c:1455-1456 - exec | 0.01 | 0.01 |
▼Loop 1125 - par_lr_interp.c:1221-1748 - exec– | 0 | 0 |
▼Loop 1133 - par_lr_interp.c:1221-1675 - exec– | 0.05 | 0.02 |
○Loop 1136 - par_lr_interp.c:1644-1650 - exec | 0.06 | 0.02 |
○Loop 1140 - par_lr_interp.c:1221-1627 - exec | 0.05 | 0.02 |
○Loop 1135 - par_lr_interp.c:1655-1660 - exec | 0 | 0 |
○Loop 1139 - par_lr_interp.c:1624-1667 - exec | 0 | 0 |
○Loop 1137 - par_lr_interp.c:1627-1636 - exec | 0 | 0 |
○Loop 1134 - par_lr_interp.c:1655-1660 - exec | 0 | 0 |
○Loop 1138 - par_lr_interp.c:1632-1636 - exec | 0 | 0 |
▼Loop 1143 - par_lr_interp.c:1494-1545 - exec– | 0.01 | 0.01 |
○Loop 1145 - par_lr_interp.c:1516-1526 - exec | 0.03 | 0.01 |
○Loop 1144 - par_lr_interp.c:1532-1545 - exec | 0 | 0 |
○Loop 1127 - par_lr_interp.c:1221-1745 - exec | 0 | 0 |
○Loop 1129 - par_lr_interp.c:1221-1743 - exec | 0 | 0 |
○Loop 1126 - par_lr_interp.c:1744-1745 - exec | 0 | 0 |
▼Loop 1141 - par_lr_interp.c:1534-1596 - exec– | 0 | 0 |
○Loop 1142 - par_lr_interp.c:1573-1596 - exec | 0 | 0 |
○Loop 1128 - par_lr_interp.c:1742-1743 - exec | 0 | 0 |
▼Loop 1130 - par_lr_interp.c:1221-1735 - exec– | 0 | 0 |
○Loop 1132 - par_lr_interp.c:1688-1723 - exec | 0 | 0 |
○Loop 1131 - par_lr_interp.c:1707-1724 - exec | 0 | 0 |
▼Loop 1161 - par_lr_interp.c:1244-1350 - exec– | 0 | 0 |
▼Loop 1164 - par_lr_interp.c:1264-1303 - exec– | 0.01 | 0.01 |
○Loop 1166 - par_lr_interp.c:1277-1285 - exec | 0.03 | 0.01 |
○Loop 1165 - par_lr_interp.c:1291-1303 - exec | 0 | 0 |
▼Loop 1162 - par_lr_interp.c:1293-1350 - exec– | 0 | 0 |
○Loop 1163 - par_lr_interp.c:1331-1350 - exec | 0 | 0 |
○Loop 1150 - par_lr_interp.c:1451-1452 - exec | 0 | 0 |
○Loop 1158 - par_lr_interp.c:1378-1382 - exec | 0 | 0 |
○Loop 1149 - par_lr_interp.c:1451-1452 - exec | 0 | 0 |
○Loop 1146 - par_lr_interp.c:1458-1459 - exec | 0 | 0 |
○Loop 1154 - par_lr_interp.c:1221-1403 - exec | 0 | 0 |
○Loop 1147 - par_lr_interp.c:1451-1452 - exec | 0 | 0 |
○Loop 1157 - par_lr_interp.c:1393-1396 - exec | 0 | 0 |
○Loop 1156 - par_lr_interp.c:1393-1396 - exec | 0 | 0 |
○Loop 1151 - par_lr_interp.c:1444-1445 - exec | 0 | 0 |
○Loop 1160 - par_lr_interp.c:1378-1382 - exec | 0 | 0 |
○Loop 1167 - par_lr_interp.c:1230-1231 - exec | 0 | 0 |
○Loop 1152 - par_lr_interp.c:1393-1396 - exec | 0 | 0 |
○Loop 1155 - par_lr_interp.c:1400-1403 - exec | 0 | 0 |
○Loop 1153 - par_lr_interp.c:1400-1403 - exec | 0 | 0 |
○Loop 1159 - par_lr_interp.c:1378-1382 - exec | 0 | 0 |