Loop Id: 3567 | Module: exec | Source: par_csr_matop.c:109-231 [...] | Coverage: 0.49% |
---|
Loop Id: 3567 | Module: exec | Source: par_csr_matop.c:109-231 [...] | Coverage: 0.49% |
---|
0x4bc450 MOV -0x30(%RBP),%R11 |
0x4bc454 MOV -0x60(%RBP),%RDI |
0x4bc458 LEA 0x1(%RDI),%RAX |
0x4bc45c MOV -0x38(%RBP),%RCX |
0x4bc460 CMP %RCX,%RDI |
0x4bc463 JE 4bbfc0 |
0x4bc469 MOV %RAX,-0x60(%RBP) |
0x4bc46d ADD %R11,%RAX |
0x4bc470 MOV -0x80(%RBP),%RCX |
0x4bc474 MOV (%RCX,%RAX,8),%RDI |
0x4bc478 MOV 0x20(%RBP),%RCX |
0x4bc47c MOV (%RCX,%RDI,8),%RAX |
0x4bc480 MOV 0x8(%RCX,%RDI,8),%R13 |
0x4bc485 MOV %R13,%R9 |
0x4bc488 SUB %RAX,%R9 |
0x4bc48b JLE 4bc4ab |
0x4bc48d CMP $0x8,%R9 |
0x4bc491 JAE 4bc520 |
0x4bc497 MOV %R9,%RCX |
0x4bc49a AND $-0x8,%RCX |
0x4bc49e CMP %R9,%RCX |
0x4bc4a1 JNE 4bc630 |
0x4bc4a7 MOV -0x30(%RBP),%R11 |
0x4bc4ab MOV 0x30(%RBP),%RCX |
0x4bc4af MOV (%RCX,%RDI,8),%RAX |
0x4bc4b3 MOV 0x8(%RCX,%RDI,8),%RCX |
0x4bc4b8 MOV %RCX,%RDI |
0x4bc4bb SUB %RAX,%RDI |
0x4bc4be JLE 4bc454 |
0x4bc4c0 CMP $0x4,%RDI |
0x4bc4c4 JAE 4bc660 |
0x4bc4ca MOV %RDI,%R9 |
0x4bc4cd AND $-0x4,%R9 |
0x4bc4d1 CMP %RDI,%R9 |
0x4bc4d4 JE 4bc450 |
0x4bc4da ADD %R9,%RAX |
0x4bc4dd MOV 0x38(%RBP),%R9 |
0x4bc4e1 MOV -0x30(%RBP),%R11 |
0x4bc4e5 JMP 4bc4fc |
(3568) 0x4bc4f0 INC %RAX |
(3568) 0x4bc4f3 CMP %RAX,%RCX |
(3568) 0x4bc4f6 JE 4bc454 |
(3568) 0x4bc4fc MOV (%R9,%RAX,8),%RDI |
(3568) 0x4bc500 MOV (%RSI,%RDI,8),%RDI |
(3568) 0x4bc504 ADD %R15,%RDI |
(3568) 0x4bc507 CMP %R10,(%R14,%RDI,8) |
(3568) 0x4bc50b JGE 4bc4f0 |
(3568) 0x4bc50d MOV %RDX,(%R14,%RDI,8) |
(3568) 0x4bc511 INC %RDX |
(3568) 0x4bc514 JMP 4bc4f0 |
0x4bc520 MOV %R9,%RCX |
0x4bc523 SHR $0x3,%RCX |
0x4bc527 MOV -0x78(%RBP),%R11 |
0x4bc52b LEA (%R11,%RAX,8),%R11 |
0x4bc52f JMP 4bc54d |
(3571) 0x4bc540 ADD $0x40,%R11 |
(3571) 0x4bc544 DEC %RCX |
(3571) 0x4bc547 JE 4bc497 |
(3571) 0x4bc54d MOV -0x38(%R11),%R12 |
(3571) 0x4bc551 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc555 JGE 4bc5c0 |
(3571) 0x4bc557 MOV %RBX,(%R14,%R12,8) |
(3571) 0x4bc55b INC %RBX |
(3571) 0x4bc55e MOV -0x30(%R11),%R12 |
(3571) 0x4bc562 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc566 JL 4bc5ca |
(3571) 0x4bc568 MOV -0x28(%R11),%R12 |
(3571) 0x4bc56c CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc570 JGE 4bc5db |
(3571) 0x4bc572 MOV %RBX,(%R14,%R12,8) |
(3571) 0x4bc576 INC %RBX |
(3571) 0x4bc579 MOV -0x20(%R11),%R12 |
(3571) 0x4bc57d CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc581 JL 4bc5e5 |
(3571) 0x4bc583 MOV -0x18(%R11),%R12 |
(3571) 0x4bc587 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc58b JGE 4bc5f6 |
(3571) 0x4bc58d MOV %RBX,(%R14,%R12,8) |
(3571) 0x4bc591 INC %RBX |
(3571) 0x4bc594 MOV -0x10(%R11),%R12 |
(3571) 0x4bc598 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc59c JL 4bc600 |
(3571) 0x4bc59e MOV -0x8(%R11),%R12 |
(3571) 0x4bc5a2 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc5a6 JGE 4bc611 |
(3571) 0x4bc5a8 MOV %RBX,(%R14,%R12,8) |
(3571) 0x4bc5ac INC %RBX |
(3571) 0x4bc5af MOV (%R11),%R12 |
(3571) 0x4bc5b2 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc5b6 JGE 4bc540 |
(3571) 0x4bc5b8 JMP 4bc61e |
(3571) 0x4bc5c0 MOV -0x30(%R11),%R12 |
(3571) 0x4bc5c4 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc5c8 JGE 4bc568 |
(3571) 0x4bc5ca MOV %RBX,(%R14,%R12,8) |
(3571) 0x4bc5ce INC %RBX |
(3571) 0x4bc5d1 MOV -0x28(%R11),%R12 |
(3571) 0x4bc5d5 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc5d9 JL 4bc572 |
(3571) 0x4bc5db MOV -0x20(%R11),%R12 |
(3571) 0x4bc5df CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc5e3 JGE 4bc583 |
(3571) 0x4bc5e5 MOV %RBX,(%R14,%R12,8) |
(3571) 0x4bc5e9 INC %RBX |
(3571) 0x4bc5ec MOV -0x18(%R11),%R12 |
(3571) 0x4bc5f0 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc5f4 JL 4bc58d |
(3571) 0x4bc5f6 MOV -0x10(%R11),%R12 |
(3571) 0x4bc5fa CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc5fe JGE 4bc59e |
(3571) 0x4bc600 MOV %RBX,(%R14,%R12,8) |
(3571) 0x4bc604 INC %RBX |
(3571) 0x4bc607 MOV -0x8(%R11),%R12 |
(3571) 0x4bc60b CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc60f JL 4bc5a8 |
(3571) 0x4bc611 MOV (%R11),%R12 |
(3571) 0x4bc614 CMP %R8,(%R14,%R12,8) |
(3571) 0x4bc618 JGE 4bc540 |
(3571) 0x4bc61e MOV %RBX,(%R14,%R12,8) |
(3571) 0x4bc622 INC %RBX |
(3571) 0x4bc625 JMP 4bc540 |
0x4bc630 ADD %RCX,%RAX |
0x4bc633 MOV 0x28(%RBP),%R9 |
0x4bc637 MOV -0x30(%RBP),%R11 |
0x4bc63b JMP 4bc64c |
(3570) 0x4bc640 INC %RAX |
(3570) 0x4bc643 CMP %RAX,%R13 |
(3570) 0x4bc646 JE 4bc4ab |
(3570) 0x4bc64c MOV (%R9,%RAX,8),%RCX |
(3570) 0x4bc650 CMP %R8,(%R14,%RCX,8) |
(3570) 0x4bc654 JGE 4bc640 |
(3570) 0x4bc656 MOV %RBX,(%R14,%RCX,8) |
(3570) 0x4bc65a INC %RBX |
(3570) 0x4bc65d JMP 4bc640 |
0x4bc660 MOV %RDI,%R9 |
0x4bc663 SHR $0x2,%R9 |
0x4bc667 MOV -0xc0(%RBP),%R11 |
0x4bc66e LEA (%R11,%RAX,8),%R11 |
0x4bc672 JMP 4bc68d |
(3569) 0x4bc680 ADD $0x20,%R11 |
(3569) 0x4bc684 DEC %R9 |
(3569) 0x4bc687 JE 4bc4ca |
(3569) 0x4bc68d MOV -0x18(%R11),%R12 |
(3569) 0x4bc691 MOV (%RSI,%R12,8),%R13 |
(3569) 0x4bc695 ADD %R15,%R13 |
(3569) 0x4bc698 CMP %R10,(%R14,%R13,8) |
(3569) 0x4bc69c JGE 4bc6a5 |
(3569) 0x4bc69e MOV %RDX,(%R14,%R13,8) |
(3569) 0x4bc6a2 INC %RDX |
(3569) 0x4bc6a5 MOV -0x10(%R11),%R12 |
(3569) 0x4bc6a9 MOV (%RSI,%R12,8),%R13 |
(3569) 0x4bc6ad ADD %R15,%R13 |
(3569) 0x4bc6b0 CMP %R10,(%R14,%R13,8) |
(3569) 0x4bc6b4 JGE 4bc6bd |
(3569) 0x4bc6b6 MOV %RDX,(%R14,%R13,8) |
(3569) 0x4bc6ba INC %RDX |
(3569) 0x4bc6bd MOV -0x8(%R11),%R12 |
(3569) 0x4bc6c1 MOV (%RSI,%R12,8),%R13 |
(3569) 0x4bc6c5 ADD %R15,%R13 |
(3569) 0x4bc6c8 CMP %R10,(%R14,%R13,8) |
(3569) 0x4bc6cc JGE 4bc6d5 |
(3569) 0x4bc6ce MOV %RDX,(%R14,%R13,8) |
(3569) 0x4bc6d2 INC %RDX |
(3569) 0x4bc6d5 MOV (%R11),%R12 |
(3569) 0x4bc6d8 MOV (%RSI,%R12,8),%R13 |
(3569) 0x4bc6dc ADD %R15,%R13 |
(3569) 0x4bc6df CMP %R10,(%R14,%R13,8) |
(3569) 0x4bc6e3 JGE 4bc680 |
(3569) 0x4bc6e5 MOV %RDX,(%R14,%R13,8) |
(3569) 0x4bc6e9 INC %RDX |
(3569) 0x4bc6ec JMP 4bc680 |
/scratch_na/users/xoserete/qaas_runs/171-415-3872/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 109 - 231 |
-------------------------------------------------------------------------------- |
109: if (ii < rest) |
[...] |
187: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
188: { |
189: i2 = A_diag_j[jj2]; |
[...] |
195: for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++) |
196: { |
197: i3 = B_diag_j[jj3]; |
[...] |
205: if (B_marker[i3] < jj_row_begin_diag) |
206: { |
207: B_marker[i3] = jj_count_diag; |
208: jj_count_diag++; |
[...] |
216: if (num_cols_offd_B) |
217: { |
218: for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++) |
219: { |
220: i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]]; |
[...] |
228: if (B_marker[i3] < jj_row_begin_offd) |
229: { |
230: B_marker[i3] = jj_count_offd; |
231: jj_count_offd++; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.47 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes.extracted |
Source | par_csr_matop.c:109-109,par_csr_matop.c:187-189,par_csr_matop.c:195-195,par_csr_matop.c:216-218 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.83 |
CQA cycles if no scalar integer | 8.83 |
CQA cycles if FP arith vectorized | 8.83 |
CQA cycles if fully vectorized | 1.10 |
Front-end cycles | 8.83 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 4.00 |
P1 cycles | 6.00 |
P2 cycles | 6.00 |
P3 cycles | 0.50 |
P4 cycles | 4.00 |
P5 cycles | 4.50 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 4.00 |
P10 cycles | 6.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 17.05 - 18.26 |
Stall cycles (UFS) | 7.78 - 8.98 |
Nb insns | 53.00 |
Nb uops | 53.00 |
Nb loads | 18.00 |
Nb stores | 1.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 144.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.47 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul_RowSizes.extracted |
Source | par_csr_matop.c:109-109,par_csr_matop.c:187-189,par_csr_matop.c:195-195,par_csr_matop.c:216-218 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.83 |
CQA cycles if no scalar integer | 8.83 |
CQA cycles if FP arith vectorized | 8.83 |
CQA cycles if fully vectorized | 1.10 |
Front-end cycles | 8.83 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 4.00 |
P1 cycles | 6.00 |
P2 cycles | 6.00 |
P3 cycles | 0.50 |
P4 cycles | 4.00 |
P5 cycles | 4.50 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 4.00 |
P10 cycles | 6.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 17.05 - 18.26 |
Stall cycles (UFS) | 7.78 - 8.98 |
Nb insns | 53.00 |
Nb uops | 53.00 |
Nb loads | 18.00 |
Nb stores | 1.00 |
Nb stack references | 10.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.21 |
Bytes prefetched | 0.00 |
Bytes loaded | 144.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_ParMatmul_RowSizes.extracted |
Source file and lines | par_csr_matop.c:109-231 |
Module | exec |
nb instructions | 53 |
nb uops | 53 |
loop length | 201 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 8.83 cycles |
front end | 8.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.00 | 6.00 | 6.00 | 0.50 | 4.00 | 4.50 | 0.50 | 0.50 | 0.50 | 4.00 | 6.00 |
cycles | 4.50 | 4.00 | 6.00 | 6.00 | 0.50 | 4.00 | 4.50 | 0.50 | 0.50 | 0.50 | 4.00 | 6.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 17.05-18.26 |
Stall cycles | 7.78-8.98 |
LM full (events) | 10.03-11.77 |
Front-end | 8.83 |
Dispatch | 6.00 |
Overall L1 | 8.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4bbfc0 <hypre_ParMatmul_RowSizes.extracted+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R11,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4bc4ab <hypre_ParMatmul_RowSizes.extracted+0x75b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bc520 <hypre_ParMatmul_RowSizes.extracted+0x7d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4bc630 <hypre_ParMatmul_RowSizes.extracted+0x8e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4bc454 <hypre_ParMatmul_RowSizes.extracted+0x704> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bc660 <hypre_ParMatmul_RowSizes.extracted+0x910> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4bc450 <hypre_ParMatmul_RowSizes.extracted+0x700> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4bc4fc <hypre_ParMatmul_RowSizes.extracted+0x7ac> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x78(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4bc54d <hypre_ParMatmul_RowSizes.extracted+0x7fd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4bc64c <hypre_ParMatmul_RowSizes.extracted+0x8fc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xc0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4bc68d <hypre_ParMatmul_RowSizes.extracted+0x93d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_ParMatmul_RowSizes.extracted |
Source file and lines | par_csr_matop.c:109-231 |
Module | exec |
nb instructions | 53 |
nb uops | 53 |
loop length | 201 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 8.83 cycles |
front end | 8.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.00 | 6.00 | 6.00 | 0.50 | 4.00 | 4.50 | 0.50 | 0.50 | 0.50 | 4.00 | 6.00 |
cycles | 4.50 | 4.00 | 6.00 | 6.00 | 0.50 | 4.00 | 4.50 | 0.50 | 0.50 | 0.50 | 4.00 | 6.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 17.05-18.26 |
Stall cycles | 7.78-8.98 |
LM full (events) | 10.03-11.77 |
Front-end | 8.83 |
Dispatch | 6.00 |
Overall L1 | 8.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4bbfc0 <hypre_ParMatmul_RowSizes.extracted+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R11,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4bc4ab <hypre_ParMatmul_RowSizes.extracted+0x75b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bc520 <hypre_ParMatmul_RowSizes.extracted+0x7d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 4bc630 <hypre_ParMatmul_RowSizes.extracted+0x8e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDI,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4bc454 <hypre_ParMatmul_RowSizes.extracted+0x704> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 4bc660 <hypre_ParMatmul_RowSizes.extracted+0x910> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4bc450 <hypre_ParMatmul_RowSizes.extracted+0x700> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4bc4fc <hypre_ParMatmul_RowSizes.extracted+0x7ac> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x3,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x78(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4bc54d <hypre_ParMatmul_RowSizes.extracted+0x7fd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x28(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4bc64c <hypre_ParMatmul_RowSizes.extracted+0x8fc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RDI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xc0(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RAX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4bc68d <hypre_ParMatmul_RowSizes.extracted+0x93d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |