Loop Id: 3591 | Module: exec | Source: par_csr_matop.c:865-989 [...] | Coverage: 0.03% |
---|
Loop Id: 3591 | Module: exec | Source: par_csr_matop.c:865-989 [...] | Coverage: 0.03% |
---|
0x4bd5a0 MOV %RCX,-0x30(%RBP) |
0x4bd5a4 MOV %RAX,%RBX |
0x4bd5a7 MOV -0x40(%RBP),%RCX |
0x4bd5ab CMP %RCX,%R8 |
0x4bd5ae JGE 4bd8ef |
0x4bd5b4 MOV %R8,%RDX |
0x4bd5b7 CMPQ $0,-0x98(%RBP) |
0x4bd5bf JE 4bd5d9 |
0x4bd5c1 MOV %RBX,(%RDI,%RDX,8) |
0x4bd5c5 MOVQ $0,(%R12,%RBX,8) |
0x4bd5cd MOV -0x60(%RBP),%RAX |
0x4bd5d1 MOV %RDX,(%RAX,%RBX,8) |
0x4bd5d5 LEA 0x1(%RBX),%RAX |
0x4bd5d9 CMPQ $0,-0x90(%RBP) |
0x4bd5e1 JE 4bd760 |
0x4bd5e7 MOV -0x68(%RBP),%RCX |
0x4bd5eb MOV (%RCX,%RDX,8),%R9 |
0x4bd5ef LEA 0x1(%RDX),%R8 |
0x4bd5f3 CMP 0x8(%RCX,%RDX,8),%R9 |
0x4bd5f8 JGE 4bd764 |
0x4bd5fe MOV %R8,-0x50(%RBP) |
0x4bd602 MOV -0x30(%RBP),%RCX |
0x4bd606 MOV %RDX,-0xc8(%RBP) |
0x4bd60d JMP 4bd631 |
(3595) 0x4bd610 MOV -0x38(%RBP),%R9 |
(3595) 0x4bd614 INC %R9 |
(3595) 0x4bd617 MOV -0x68(%RBP),%RDX |
(3595) 0x4bd61b MOV -0xc8(%RBP),%RSI |
(3595) 0x4bd622 CMP 0x8(%RDX,%RSI,8),%R9 |
(3595) 0x4bd627 MOV -0x58(%RBP),%R14 |
(3595) 0x4bd62b JGE 4bd780 |
(3595) 0x4bd631 MOV -0xb0(%RBP),%RDX |
(3595) 0x4bd638 MOV (%RDX,%R9,8),%R8 |
(3595) 0x4bd63c MOV -0xc0(%RBP),%RDX |
(3595) 0x4bd643 MOV %R9,-0x38(%RBP) |
(3595) 0x4bd647 VMOVSD (%RDX,%R9,8),%XMM0 |
(3595) 0x4bd64d MOV -0x80(%RBP),%RDX |
(3595) 0x4bd651 MOV (%RDX,%R8,8),%R9 |
(3595) 0x4bd655 MOV 0x8(%RDX,%R8,8),%R10 |
(3595) 0x4bd65a CMP %R10,%R9 |
(3595) 0x4bd65d JGE 4bd6cb |
(3595) 0x4bd65f MOV -0xa8(%RBP),%R14 |
(3595) 0x4bd666 MOV -0x110(%RBP),%R15 |
(3595) 0x4bd66d JMP 4bd686 |
(3597) 0x4bd670 VADDSD (%R13,%RSI,8),%XMM1,%XMM1 |
(3597) 0x4bd677 VMOVSD %XMM1,(%R13,%RSI,8) |
(3597) 0x4bd67e INC %R9 |
(3597) 0x4bd681 CMP %R10,%R9 |
(3597) 0x4bd684 JGE 4bd6cb |
(3597) 0x4bd686 MOV (%R14,%R9,8),%R11 |
(3597) 0x4bd68a MOV -0x48(%RBP),%RDX |
(3597) 0x4bd68e ADD %R11,%RDX |
(3597) 0x4bd691 MOV (%RDI,%RDX,8),%RSI |
(3597) 0x4bd695 VMULSD (%R15,%R9,8),%XMM0,%XMM1 |
(3597) 0x4bd69b CMP -0x30(%RBP),%RSI |
(3597) 0x4bd69f JGE 4bd670 |
(3597) 0x4bd6a1 MOV %RCX,(%RDI,%RDX,8) |
(3597) 0x4bd6a5 VMOVSD %XMM1,(%R13,%RCX,8) |
(3597) 0x4bd6ac MOV -0x88(%RBP),%RDX |
(3597) 0x4bd6b3 MOV %R11,(%RDX,%RCX,8) |
(3597) 0x4bd6b7 INC %RCX |
(3597) 0x4bd6ba MOV -0x80(%RBP),%RDX |
(3597) 0x4bd6be MOV 0x8(%RDX,%R8,8),%R10 |
(3597) 0x4bd6c3 INC %R9 |
(3597) 0x4bd6c6 CMP %R10,%R9 |
(3597) 0x4bd6c9 JL 4bd686 |
(3595) 0x4bd6cb MOV -0xb8(%RBP),%R15 |
(3595) 0x4bd6d2 MOV (%R15,%R8,8),%R9 |
(3595) 0x4bd6d6 MOV 0x8(%R15,%R8,8),%R10 |
(3595) 0x4bd6db CMP %R10,%R9 |
(3595) 0x4bd6de JGE 4bd610 |
(3595) 0x4bd6e4 MOV -0xa0(%RBP),%RSI |
(3595) 0x4bd6eb MOV -0x108(%RBP),%R14 |
(3595) 0x4bd6f2 JMP 4bd718 |
(3596) 0x4bd700 VADDSD (%R12,%RDX,8),%XMM1,%XMM1 |
(3596) 0x4bd706 VMOVSD %XMM1,(%R12,%RDX,8) |
(3596) 0x4bd70c INC %R9 |
(3596) 0x4bd70f CMP %R10,%R9 |
(3596) 0x4bd712 JGE 4bd610 |
(3596) 0x4bd718 MOV (%RSI,%R9,8),%R11 |
(3596) 0x4bd71c MOV (%RDI,%R11,8),%RDX |
(3596) 0x4bd720 VMULSD (%R14,%R9,8),%XMM0,%XMM1 |
(3596) 0x4bd726 CMP %RBX,%RDX |
(3596) 0x4bd729 JGE 4bd700 |
(3596) 0x4bd72b MOV %RAX,(%RDI,%R11,8) |
(3596) 0x4bd72f VMOVSD %XMM1,(%R12,%RAX,8) |
(3596) 0x4bd735 MOV -0x60(%RBP),%RDX |
(3596) 0x4bd739 MOV %R11,(%RDX,%RAX,8) |
(3596) 0x4bd73d INC %RAX |
(3596) 0x4bd740 MOV 0x8(%R15,%R8,8),%R10 |
(3596) 0x4bd745 INC %R9 |
(3596) 0x4bd748 CMP %R10,%R9 |
(3596) 0x4bd74b JL 4bd718 |
(3595) 0x4bd74d JMP 4bd610 |
0x4bd760 LEA 0x1(%RDX),%R8 |
0x4bd764 MOV -0x30(%RBP),%RCX |
0x4bd768 MOV -0x70(%RBP),%RSI |
0x4bd76c MOV (%RSI,%RDX,8),%R9 |
0x4bd770 CMP (%RSI,%R8,8),%R9 |
0x4bd774 JGE 4bd5a0 |
0x4bd77a JMP 4bd799 |
0x4bd780 MOV %RSI,%RDX |
0x4bd783 MOV -0x50(%RBP),%R8 |
0x4bd787 MOV -0x70(%RBP),%RSI |
0x4bd78b MOV (%RSI,%RDX,8),%R9 |
0x4bd78f CMP (%RSI,%R8,8),%R9 |
0x4bd793 JGE 4bd5a0 |
0x4bd799 MOV %R8,-0x50(%RBP) |
0x4bd79d JMP 4bd7bd |
(3592) 0x4bd7a0 MOV -0x38(%RBP),%R9 |
(3592) 0x4bd7a4 INC %R9 |
(3592) 0x4bd7a7 MOV -0x70(%RBP),%RSI |
(3592) 0x4bd7ab MOV -0x50(%RBP),%R8 |
(3592) 0x4bd7af CMP (%RSI,%R8,8),%R9 |
(3592) 0x4bd7b3 MOV -0x58(%RBP),%R14 |
(3592) 0x4bd7b7 JGE 4bd5a0 |
(3592) 0x4bd7bd MOV -0xe8(%RBP),%RSI |
(3592) 0x4bd7c4 MOV (%RSI,%R9,8),%RSI |
(3592) 0x4bd7c8 MOV -0xe0(%RBP),%R8 |
(3592) 0x4bd7cf MOV %R9,-0x38(%RBP) |
(3592) 0x4bd7d3 VMOVSD (%R8,%R9,8),%XMM0 |
(3592) 0x4bd7d9 MOV -0xd0(%RBP),%R15 |
(3592) 0x4bd7e0 MOV (%R15,%RSI,8),%R8 |
(3592) 0x4bd7e4 MOV 0x8(%R15,%RSI,8),%R9 |
(3592) 0x4bd7e9 CMP %R9,%R8 |
(3592) 0x4bd7ec JGE 4bd849 |
(3592) 0x4bd7ee MOV -0x118(%RBP),%RDX |
(3592) 0x4bd7f5 JMP 4bd814 |
(3594) 0x4bd800 VADDSD (%R12,%R11,8),%XMM1,%XMM1 |
(3594) 0x4bd806 VMOVSD %XMM1,(%R12,%R11,8) |
(3594) 0x4bd80c INC %R8 |
(3594) 0x4bd80f CMP %R9,%R8 |
(3594) 0x4bd812 JGE 4bd849 |
(3594) 0x4bd814 MOV (%R14,%R8,8),%R10 |
(3594) 0x4bd818 MOV (%RDI,%R10,8),%R11 |
(3594) 0x4bd81c VMULSD (%RDX,%R8,8),%XMM0,%XMM1 |
(3594) 0x4bd822 CMP %RBX,%R11 |
(3594) 0x4bd825 JGE 4bd800 |
(3594) 0x4bd827 MOV %RAX,(%RDI,%R10,8) |
(3594) 0x4bd82b VMOVSD %XMM1,(%R12,%RAX,8) |
(3594) 0x4bd831 MOV -0x60(%RBP),%R9 |
(3594) 0x4bd835 MOV %R10,(%R9,%RAX,8) |
(3594) 0x4bd839 INC %RAX |
(3594) 0x4bd83c MOV 0x8(%R15,%RSI,8),%R9 |
(3594) 0x4bd841 INC %R8 |
(3594) 0x4bd844 CMP %R9,%R8 |
(3594) 0x4bd847 JL 4bd814 |
(3592) 0x4bd849 CMPQ $0,-0xd8(%RBP) |
(3592) 0x4bd851 JE 4bd7a0 |
(3592) 0x4bd857 MOV -0x78(%RBP),%R9 |
(3592) 0x4bd85b MOV (%R9,%RSI,8),%R8 |
(3592) 0x4bd85f MOV 0x8(%R9,%RSI,8),%R9 |
(3592) 0x4bd864 CMP %R9,%R8 |
(3592) 0x4bd867 JGE 4bd7a0 |
(3592) 0x4bd86d MOV -0xf0(%RBP),%R14 |
(3592) 0x4bd874 MOV -0x88(%RBP),%RDX |
(3592) 0x4bd87b JMP 4bd89a |
(3593) 0x4bd880 VADDSD (%R13,%R15,8),%XMM1,%XMM1 |
(3593) 0x4bd887 VMOVSD %XMM1,(%R13,%R15,8) |
(3593) 0x4bd88e INC %R8 |
(3593) 0x4bd891 CMP %R9,%R8 |
(3593) 0x4bd894 JGE 4bd7a0 |
(3593) 0x4bd89a MOV -0xf8(%RBP),%R10 |
(3593) 0x4bd8a1 MOV (%R10,%R8,8),%R10 |
(3593) 0x4bd8a5 MOV -0x100(%RBP),%R11 |
(3593) 0x4bd8ac MOV (%R11,%R10,8),%R10 |
(3593) 0x4bd8b0 MOV -0x48(%RBP),%R11 |
(3593) 0x4bd8b4 ADD %R10,%R11 |
(3593) 0x4bd8b7 MOV (%RDI,%R11,8),%R15 |
(3593) 0x4bd8bb VMULSD (%R14,%R8,8),%XMM0,%XMM1 |
(3593) 0x4bd8c1 CMP -0x30(%RBP),%R15 |
(3593) 0x4bd8c5 JGE 4bd880 |
(3593) 0x4bd8c7 MOV %RCX,(%RDI,%R11,8) |
(3593) 0x4bd8cb VMOVSD %XMM1,(%R13,%RCX,8) |
(3593) 0x4bd8d2 MOV %R10,(%RDX,%RCX,8) |
(3593) 0x4bd8d6 INC %RCX |
(3593) 0x4bd8d9 MOV -0x78(%RBP),%R9 |
(3593) 0x4bd8dd MOV 0x8(%R9,%RSI,8),%R9 |
(3593) 0x4bd8e2 INC %R8 |
(3593) 0x4bd8e5 CMP %R9,%R8 |
(3593) 0x4bd8e8 JL 4bd89a |
(3592) 0x4bd8ea JMP 4bd7a0 |
/scratch_na/users/xoserete/qaas_runs/171-415-3872/intel/AMG/build/AMG/AMG/parcsr_mv/par_csr_matop.c: 865 - 989 |
-------------------------------------------------------------------------------- |
865: for (i1 = ns; i1 < ne; i1++) |
[...] |
874: if ( allsquare ) |
875: { |
876: B_marker[i1] = jj_count_diag; |
877: C_diag_data[jj_count_diag] = zero; |
878: C_diag_j[jj_count_diag] = i1; |
879: jj_count_diag++; |
[...] |
886: if (num_cols_offd_A) |
887: { |
888: for (jj2 = A_offd_i[i1]; jj2 < A_offd_i[i1+1]; jj2++) |
889: { |
890: i2 = A_offd_j[jj2]; |
891: a_entry = A_offd_data[jj2]; |
[...] |
897: for (jj3 = B_ext_offd_i[i2]; jj3 < B_ext_offd_i[i2+1]; jj3++) |
898: { |
899: i3 = num_cols_diag_B+B_ext_offd_j[jj3]; |
[...] |
907: if (B_marker[i3] < jj_row_begin_offd) |
908: { |
909: B_marker[i3] = jj_count_offd; |
910: C_offd_data[jj_count_offd] = a_entry*B_ext_offd_data[jj3]; |
911: C_offd_j[jj_count_offd] = i3-num_cols_diag_B; |
912: jj_count_offd++; |
913: } |
914: else |
915: C_offd_data[B_marker[i3]] += a_entry*B_ext_offd_data[jj3]; |
916: } |
917: for (jj3 = B_ext_diag_i[i2]; jj3 < B_ext_diag_i[i2+1]; jj3++) |
918: { |
919: i3 = B_ext_diag_j[jj3]; |
920: if (B_marker[i3] < jj_row_begin_diag) |
921: { |
922: B_marker[i3] = jj_count_diag; |
923: C_diag_data[jj_count_diag] = a_entry*B_ext_diag_data[jj3]; |
924: C_diag_j[jj_count_diag] = i3; |
925: jj_count_diag++; |
926: } |
927: else |
928: C_diag_data[B_marker[i3]] += a_entry*B_ext_diag_data[jj3]; |
[...] |
937: for (jj2 = A_diag_i[i1]; jj2 < A_diag_i[i1+1]; jj2++) |
938: { |
939: i2 = A_diag_j[jj2]; |
940: a_entry = A_diag_data[jj2]; |
[...] |
946: for (jj3 = B_diag_i[i2]; jj3 < B_diag_i[i2+1]; jj3++) |
947: { |
948: i3 = B_diag_j[jj3]; |
[...] |
956: if (B_marker[i3] < jj_row_begin_diag) |
957: { |
958: B_marker[i3] = jj_count_diag; |
959: C_diag_data[jj_count_diag] = a_entry*B_diag_data[jj3]; |
960: C_diag_j[jj_count_diag] = i3; |
961: jj_count_diag++; |
962: } |
963: else |
964: { |
965: C_diag_data[B_marker[i3]] += a_entry*B_diag_data[jj3]; |
966: } |
967: } |
968: if (num_cols_offd_B) |
969: { |
970: for (jj3 = B_offd_i[i2]; jj3 < B_offd_i[i2+1]; jj3++) |
971: { |
972: i3 = num_cols_diag_B+map_B_to_C[B_offd_j[jj3]]; |
[...] |
980: if (B_marker[i3] < jj_row_begin_offd) |
981: { |
982: B_marker[i3] = jj_count_offd; |
983: C_offd_data[jj_count_offd] = a_entry*B_offd_data[jj3]; |
984: C_offd_j[jj_count_offd] = i3-num_cols_diag_B; |
985: jj_count_offd++; |
986: } |
987: else |
988: { |
989: C_offd_data[B_marker[i3]] += a_entry*B_offd_data[jj3]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 12.48 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.31 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul.extracted.12 |
Source | par_csr_matop.c:865-865,par_csr_matop.c:874-879,par_csr_matop.c:886-888,par_csr_matop.c:937-937 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 7.00 |
CQA cycles if no scalar integer | 7.00 |
CQA cycles if FP arith vectorized | 7.00 |
CQA cycles if fully vectorized | 0.56 |
Front-end cycles | 7.00 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 2.00 |
P1 cycles | 5.33 |
P2 cycles | 5.33 |
P3 cycles | 3.50 |
P4 cycles | 2.00 |
P5 cycles | 3.00 |
P6 cycles | 3.50 |
P7 cycles | 3.50 |
P8 cycles | 3.50 |
P9 cycles | 2.00 |
P10 cycles | 5.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 7.14 |
Stall cycles (UFS) | 0.00 |
Nb insns | 39.00 |
Nb uops | 39.00 |
Nb loads | 16.00 |
Nb stores | 7.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.29 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 56.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 11.98 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 11.61 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 12.48 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.31 |
Bottlenecks | micro-operation queue, |
Function | hypre_ParMatmul.extracted.12 |
Source | par_csr_matop.c:865-865,par_csr_matop.c:874-879,par_csr_matop.c:886-888,par_csr_matop.c:937-937 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 7.00 |
CQA cycles if no scalar integer | 7.00 |
CQA cycles if FP arith vectorized | 7.00 |
CQA cycles if fully vectorized | 0.56 |
Front-end cycles | 7.00 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 2.00 |
P1 cycles | 5.33 |
P2 cycles | 5.33 |
P3 cycles | 3.50 |
P4 cycles | 2.00 |
P5 cycles | 3.00 |
P6 cycles | 3.50 |
P7 cycles | 3.50 |
P8 cycles | 3.50 |
P9 cycles | 2.00 |
P10 cycles | 5.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 7.14 |
Stall cycles (UFS) | 0.00 |
Nb insns | 39.00 |
Nb uops | 39.00 |
Nb loads | 16.00 |
Nb stores | 7.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.29 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 56.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 11.98 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 11.61 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_ParMatmul.extracted.12 |
Source file and lines | par_csr_matop.c:865-989 |
Module | exec |
nb instructions | 39 |
nb uops | 39 |
loop length | 170 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 7.00 cycles |
front end | 7.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 2.00 | 5.33 | 5.33 | 3.50 | 2.00 | 3.00 | 3.50 | 3.50 | 3.50 | 2.00 | 5.33 |
cycles | 3.00 | 2.00 | 5.33 | 5.33 | 3.50 | 2.00 | 3.00 | 3.50 | 3.50 | 3.50 | 2.00 | 5.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 7.14 |
Stall cycles | 0.00 |
Front-end | 7.00 |
Dispatch | 5.33 |
Overall L1 | 7.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 12% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV %RCX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4bd8ef <hypre_ParMatmul.extracted.12+0x58f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4bd5d9 <hypre_ParMatmul.extracted.12+0x279> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,(%RDI,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RAX,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RBX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMPQ $0,-0x90(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4bd760 <hypre_ParMatmul.extracted.12+0x400> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP 0x8(%RCX,%RDX,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4bd764 <hypre_ParMatmul.extracted.12+0x404> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4bd631 <hypre_ParMatmul.extracted.12+0x2d1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA 0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RSI,%R8,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4bd5a0 <hypre_ParMatmul.extracted.12+0x240> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4bd799 <hypre_ParMatmul.extracted.12+0x439> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RSI,%R8,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4bd5a0 <hypre_ParMatmul.extracted.12+0x240> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4bd7bd <hypre_ParMatmul.extracted.12+0x45d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_ParMatmul.extracted.12 |
Source file and lines | par_csr_matop.c:865-989 |
Module | exec |
nb instructions | 39 |
nb uops | 39 |
loop length | 170 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 7.00 cycles |
front end | 7.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 2.00 | 5.33 | 5.33 | 3.50 | 2.00 | 3.00 | 3.50 | 3.50 | 3.50 | 2.00 | 5.33 |
cycles | 3.00 | 2.00 | 5.33 | 5.33 | 3.50 | 2.00 | 3.00 | 3.50 | 3.50 | 3.50 | 2.00 | 5.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 7.14 |
Stall cycles | 0.00 |
Front-end | 7.00 |
Dispatch | 5.33 |
Overall L1 | 7.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 12% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV %RCX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4bd8ef <hypre_ParMatmul.extracted.12+0x58f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMPQ $0,-0x98(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4bd5d9 <hypre_ParMatmul.extracted.12+0x279> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,(%RDI,%RDX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,(%RAX,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RBX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMPQ $0,-0x90(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4bd760 <hypre_ParMatmul.extracted.12+0x400> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP 0x8(%RCX,%RDX,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4bd764 <hypre_ParMatmul.extracted.12+0x404> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4bd631 <hypre_ParMatmul.extracted.12+0x2d1> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
LEA 0x1(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RSI,%R8,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4bd5a0 <hypre_ParMatmul.extracted.12+0x240> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4bd799 <hypre_ParMatmul.extracted.12+0x439> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x50(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RSI,%R8,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 4bd5a0 <hypre_ParMatmul.extracted.12+0x240> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R8,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 4bd7bd <hypre_ParMatmul.extracted.12+0x45d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |