Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.61% |
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Function: hypre_BoomerAMGBuildMultipass.extracted.34 | Module: exec | Source: par_multi_interp.c:891-1134 [...] | Coverage: 1.61% |
---|
/scratch_na/users/xoserete/qaas_runs/171-415-3872/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 891 - 1134 |
-------------------------------------------------------------------------------- |
891: #pragma omp parallel private(i,my_thread_num,num_threads,thread_start,thread_stop,cnt_nz,cnt_nz_offd,i1,j,j1,j_start,j_end,k1,k,P_marker,P_marker_offd) |
[...] |
900: my_thread_num = hypre_GetThreadNum(); |
901: num_threads = hypre_NumActiveThreads(); |
902: thread_start = (pass_length/num_threads)*my_thread_num; |
903: if (my_thread_num == num_threads-1) |
904: { thread_stop = pass_length; } |
905: else |
906: { thread_stop = (pass_length/num_threads)*(my_thread_num+1); } |
907: thread_start += pass_pointer[pass]; |
908: thread_stop += pass_pointer[pass]; |
[...] |
916: P_marker = hypre_CTAlloc(HYPRE_Int, n_coarse); /* marks points to see if they're counted */ |
917: for (i=0; i < n_coarse; i++) |
918: { P_marker[i] = -1; } |
919: if (new_num_cols_offd == local_index+1) |
[...] |
925: else if (n_coarse_offd) |
[...] |
939: for (i=thread_start; i < thread_stop; i++) |
940: { |
941: i1 = pass_array[i]; |
942: P_diag_start[i1] = cnt_nz; |
943: P_offd_start[i1] = cnt_nz_offd; |
944: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
945: { |
946: j1 = S_diag_j[j]; |
947: if (assigned[j1] == pass-1) |
948: { |
949: j_start = P_diag_start[j1]; |
950: j_end = j_start+P_diag_i[j1+1]; |
951: for (k=j_start; k < j_end; k++) |
952: { |
953: k1 = P_diag_pass[pass-1][k]; |
954: if (P_marker[k1] != i1) |
955: { |
956: cnt_nz++; |
957: P_diag_i[i1+1]++; |
958: P_marker[k1] = i1; |
959: } |
960: } |
961: j_start = P_offd_start[j1]; |
962: j_end = j_start+P_offd_i[j1+1]; |
963: for (k=j_start; k < j_end; k++) |
964: { |
965: k1 = P_offd_pass[pass-1][k]; |
966: if (P_marker_offd[k1] != i1) |
967: { |
968: cnt_nz_offd++; |
969: P_offd_i[i1+1]++; |
970: P_marker_offd[k1] = i1; |
[...] |
976: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
977: { |
978: j1 = S_offd_j[j]; |
979: if (assigned_offd[j1] == pass-1) |
980: { |
981: j_start = Pext_start[j1]; |
982: j_end = j_start+Pext_i[j1+1]; |
983: for (k=j_start; k < j_end; k++) |
984: { |
985: k1 = Pext_pass[pass][k]; |
986: if (k1 < 0) |
987: { |
988: if (P_marker[-k1-1] != i1) |
989: { |
990: cnt_nz++; |
991: P_diag_i[i1+1]++; |
992: P_marker[-k1-1] = i1; |
993: } |
994: } |
995: else if (P_marker_offd[k1] != i1) |
996: { |
997: cnt_nz_offd++; |
[...] |
1008: if(my_thread_num == 0) |
1009: { max_num_threads[0] = num_threads; } |
1010: cnt_nz_offd_per_thread[my_thread_num] = cnt_nz_offd; |
1011: cnt_nz_per_thread[my_thread_num] = cnt_nz; |
1012: #ifdef HYPRE_USING_OPENMP |
1013: #pragma omp barrier |
1014: #endif |
1015: if(my_thread_num == 0) |
1016: { |
1017: for(i = 1; i < max_num_threads[0]; i++) |
1018: { |
1019: cnt_nz_offd_per_thread[i] += cnt_nz_offd_per_thread[i-1]; |
1020: cnt_nz_per_thread[i] += cnt_nz_per_thread[i-1]; |
[...] |
1026: if(my_thread_num > 0) |
1027: { |
1028: /* update this thread's section of P_diag_start and P_offd_start |
1029: * with the num of nz's counted by previous threads */ |
1030: for (i=thread_start; i < thread_stop; i++) |
1031: { |
1032: i1 = pass_array[i]; |
1033: P_diag_start[i1] += cnt_nz_per_thread[my_thread_num-1]; |
1034: P_offd_start[i1] += cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1040: cnt_nz = cnt_nz_per_thread[max_num_threads[0]-1]; |
1041: cnt_nz_offd = cnt_nz_offd_per_thread[max_num_threads[0]-1]; |
1042: |
1043: /* Updated total nz count */ |
1044: total_nz += cnt_nz; |
1045: total_nz_offd += cnt_nz_offd; |
1046: |
1047: /* Allocate P_diag_pass and P_offd_pass for all threads */ |
1048: P_diag_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz); |
1049: if (cnt_nz_offd) |
1050: P_offd_pass[pass] = hypre_CTAlloc(HYPRE_Int, cnt_nz_offd); |
1051: else if (num_procs > 1) |
[...] |
1060: if(my_thread_num > 0) |
1061: { |
1062: cnt_nz = cnt_nz_per_thread[my_thread_num-1]; |
1063: cnt_nz_offd = cnt_nz_offd_per_thread[my_thread_num-1]; |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
[...] |
1132: hypre_TFree(P_marker); |
1133: if ( (n_coarse_offd) || (new_num_cols_offd == local_index+1) ) |
1134: { hypre_TFree(P_marker_offd); } |
0x4440c0 PUSH %RBP |
0x4440c1 MOV %RSP,%RBP |
0x4440c4 PUSH %R15 |
0x4440c6 PUSH %R14 |
0x4440c8 PUSH %R13 |
0x4440ca PUSH %R12 |
0x4440cc PUSH %RBX |
0x4440cd SUB $0x128,%RSP |
0x4440d4 MOV %R9,-0x130(%RBP) |
0x4440db MOV %R8,-0xa8(%RBP) |
0x4440e2 MOV %RCX,-0x128(%RBP) |
0x4440e9 MOV %RDX,-0xb0(%RBP) |
0x4440f0 MOV %RDI,-0xc8(%RBP) |
0x4440f7 MOV 0xd0(%RBP),%RAX |
0x4440fe MOV %RAX,-0x78(%RBP) |
0x444102 MOV 0xc8(%RBP),%RAX |
0x444109 MOV %RAX,-0xf0(%RBP) |
0x444110 MOV 0xc0(%RBP),%RAX |
0x444117 MOV %RAX,-0xe0(%RBP) |
0x44411e MOV 0xb8(%RBP),%RBX |
0x444125 MOV 0xb0(%RBP),%RAX |
0x44412c MOV %RAX,-0xf8(%RBP) |
0x444133 MOV 0xa8(%RBP),%RAX |
0x44413a MOV %RAX,-0xc0(%RBP) |
0x444141 MOV 0xa0(%RBP),%RAX |
0x444148 MOV %RAX,-0x150(%RBP) |
0x44414f MOV 0x98(%RBP),%RAX |
0x444156 MOV %RAX,-0x138(%RBP) |
0x44415d MOV 0x90(%RBP),%RAX |
0x444164 MOV %RAX,-0x120(%RBP) |
0x44416b MOV 0x88(%RBP),%RAX |
0x444172 MOV %RAX,-0x118(%RBP) |
0x444179 MOV 0x80(%RBP),%RAX |
0x444180 MOV %RAX,-0xe8(%RBP) |
0x444187 MOV 0x78(%RBP),%R15 |
0x44418b MOV 0x70(%RBP),%RAX |
0x44418f MOV %RAX,-0x30(%RBP) |
0x444193 MOV 0x68(%RBP),%RAX |
0x444197 MOV %RAX,-0x148(%RBP) |
0x44419e MOV 0x60(%RBP),%RAX |
0x4441a2 MOV %RAX,-0x110(%RBP) |
0x4441a9 MOV 0x58(%RBP),%RAX |
0x4441ad MOV %RAX,-0x108(%RBP) |
0x4441b4 MOV 0x50(%RBP),%RAX |
0x4441b8 MOV %RAX,-0x48(%RBP) |
0x4441bc MOV 0x48(%RBP),%RAX |
0x4441c0 MOV %RAX,-0x40(%RBP) |
0x4441c4 MOV 0x40(%RBP),%RAX |
0x4441c8 MOV %RAX,-0xa0(%RBP) |
0x4441cf MOV 0x38(%RBP),%RAX |
0x4441d3 MOV %RAX,-0x90(%RBP) |
0x4441da MOV 0x30(%RBP),%R12 |
0x4441de MOV 0x28(%RBP),%RAX |
0x4441e2 MOV %RAX,-0x98(%RBP) |
0x4441e9 MOV 0x20(%RBP),%RAX |
0x4441ed MOV %RAX,-0x100(%RBP) |
0x4441f4 MOV 0x18(%RBP),%RAX |
0x4441f8 MOV %RAX,-0x58(%RBP) |
0x4441fc MOV 0x10(%RBP),%RAX |
0x444200 MOV %RAX,-0x50(%RBP) |
0x444204 CALL 4e86c0 <hypre_GetThreadNum> |
0x444209 MOV %RAX,%R13 |
0x44420c CALL 4e86b0 <hypre_NumActiveThreads> |
0x444211 MOV %RAX,%RCX |
0x444214 MOV %RBX,%RAX |
0x444217 OR %RCX,%RAX |
0x44421a SHR $0x20,%RAX |
0x44421e JE 44422a |
0x444220 MOV %RBX,%RAX |
0x444223 CQTO |
0x444225 IDIV %RCX |
0x444228 JMP 444230 |
0x44422a MOV %EBX,%EAX |
0x44422c XOR %EDX,%EDX |
0x44422e DIV %ECX |
0x444230 MOV %RCX,-0x140(%RBP) |
0x444237 DEC %RCX |
0x44423a LEA 0x1(%R13),%RDX |
0x44423e MOV %RAX,%R14 |
0x444241 IMUL %RAX,%RDX |
0x444245 MOV %R13,-0x68(%RBP) |
0x444249 CMP %RCX,%R13 |
0x44424c CMOVE %RBX,%RDX |
0x444250 MOV %RDX,-0xb8(%RBP) |
0x444257 MOV -0x30(%RBP),%RAX |
0x44425b MOV (%RAX),%R13 |
0x44425e MOV (%R12,%R13,8),%RAX |
0x444262 MOV %RAX,-0xd8(%RBP) |
0x444269 MOV $0x8,%ESI |
0x44426e MOV %R15,%RDI |
0x444271 CALL 4e6980 <hypre_CAlloc> |
0x444276 MOV %RAX,%RBX |
0x444279 TEST %R15,%R15 |
0x44427c JLE 444292 |
0x44427e SAL $0x3,%R15 |
0x444282 MOV %RBX,%RDI |
0x444285 MOV $0xff,%ESI |
0x44428a MOV %R15,%RDX |
0x44428d CALL 4efbb0 <_intel_fast_memset> |
0x444292 IMUL -0x68(%RBP),%R14 |
0x444297 MOV %R14,-0x70(%RBP) |
0x44429b MOV -0xc0(%RBP),%RAX |
0x4442a2 INC %RAX |
0x4442a5 MOV -0xf8(%RBP),%RDI |
0x4442ac MOV %RAX,-0xc0(%RBP) |
0x4442b3 CMP %RDI,%RAX |
0x4442b6 JE 4442c4 |
0x4442b8 MOV -0xe8(%RBP),%RDI |
0x4442bf TEST %RDI,%RDI |
0x4442c2 JE 4442ef |
0x4442c4 MOV $0x8,%ESI |
0x4442c9 MOV %RDI,%R14 |
0x4442cc CALL 4e6980 <hypre_CAlloc> |
0x4442d1 MOV %RAX,%R15 |
0x4442d4 MOV %R14,%RDX |
0x4442d7 TEST %R14,%R14 |
0x4442da JLE 4442ef |
0x4442dc SAL $0x3,%RDX |
0x4442e0 MOV %R15,%RDI |
0x4442e3 MOV $0xff,%ESI |
0x4442e8 CALL 4efbb0 <_intel_fast_memset> |
0x4442ed JMP 4442ef |
0x4442ef MOV -0x70(%RBP),%RDX |
0x4442f3 MOV -0xd8(%RBP),%RCX |
0x4442fa LEA (%RCX,%RDX,1),%RAX |
0x4442fe MOV -0xb8(%RBP),%RSI |
0x444305 ADD %RSI,%RCX |
0x444308 MOV %RCX,-0xd0(%RBP) |
0x44430f CMP %RSI,%RDX |
0x444312 MOV %RAX,-0x80(%RBP) |
0x444316 JGE 4447f0 |
0x44431c LEA -0x1(%R13),%R10 |
0x444320 XOR %ECX,%ECX |
0x444322 MOV %RAX,%RSI |
0x444325 XOR %EAX,%EAX |
0x444327 MOV %R10,-0x30(%RBP) |
0x44432b JMP 444347 |
0x44432d NOPL (%RAX) |
(996) 0x444330 MOV -0x88(%RBP),%RSI |
(996) 0x444337 INC %RSI |
(996) 0x44433a CMP -0xd0(%RBP),%RSI |
(996) 0x444341 JGE 4447f4 |
(996) 0x444347 MOV -0x98(%RBP),%RDX |
(996) 0x44434e MOV %RSI,-0x88(%RBP) |
(996) 0x444355 MOV (%RDX,%RSI,8),%RDI |
(996) 0x444359 MOV -0x90(%RBP),%RDX |
(996) 0x444360 MOV %RAX,(%RDX,%RDI,8) |
(996) 0x444364 MOV -0xa0(%RBP),%RDX |
(996) 0x44436b MOV %RCX,(%RDX,%RDI,8) |
(996) 0x44436f MOV -0xb0(%RBP),%RDX |
(996) 0x444376 MOV (%RDX,%RDI,8),%R8 |
(996) 0x44437a JMP 44438e |
0x44437c NOPL (%RAX) |
(999) 0x444380 MOV -0x30(%RBP),%R10 |
(999) 0x444384 INC %R8 |
(999) 0x444387 MOV -0xb0(%RBP),%RDX |
(999) 0x44438e CMP 0x8(%RDX,%RDI,8),%R8 |
(999) 0x444393 JGE 444660 |
(999) 0x444399 MOV -0x128(%RBP),%RDX |
(999) 0x4443a0 MOV (%RDX,%R8,8),%R14 |
(999) 0x4443a4 MOV -0x118(%RBP),%RDX |
(999) 0x4443ab CMP %R10,(%RDX,%R14,8) |
(999) 0x4443af JNE 444384 |
(999) 0x4443b1 MOV -0x50(%RBP),%RDX |
(999) 0x4443b5 MOV 0x8(%RDX,%R14,8),%RSI |
(999) 0x4443ba TEST %RSI,%RSI |
(999) 0x4443bd JLE 444411 |
(999) 0x4443bf MOV -0x90(%RBP),%RDX |
(999) 0x4443c6 MOV %R14,-0x38(%RBP) |
(999) 0x4443ca MOV (%RDX,%R14,8),%R10 |
(999) 0x4443ce ADD %R10,%RSI |
(999) 0x4443d1 MOV -0x40(%RBP),%RDX |
(999) 0x4443d5 MOV -0x8(%RDX,%R13,8),%R11 |
(999) 0x4443da LEA 0x1(%R10),%RDX |
(999) 0x4443de CMP %RDX,%RSI |
(999) 0x4443e1 CMOVLE %RDX,%RSI |
(999) 0x4443e5 MOV %RSI,%RDX |
(999) 0x4443e8 SUB %R10,%RDX |
(999) 0x4443eb CMP $0x4,%RDX |
(999) 0x4443ef MOV %RDX,-0x60(%RBP) |
(999) 0x4443f3 JAE 4444a4 |
(999) 0x4443f9 MOV -0x60(%RBP),%R9 |
(999) 0x4443fd MOV %R9,%RDX |
(999) 0x444400 AND $-0x4,%RDX |
(999) 0x444404 CMP %R9,%RDX |
(999) 0x444407 JNE 444569 |
(999) 0x44440d MOV -0x38(%RBP),%R14 |
(999) 0x444411 MOV -0x58(%RBP),%RDX |
(999) 0x444415 MOV 0x8(%RDX,%R14,8),%RSI |
(999) 0x44441a TEST %RSI,%RSI |
(999) 0x44441d JLE 444380 |
(999) 0x444423 MOV -0xa0(%RBP),%RDX |
(999) 0x44442a MOV (%RDX,%R14,8),%R9 |
(999) 0x44442e ADD %R9,%RSI |
(999) 0x444431 MOV -0x48(%RBP),%RDX |
(999) 0x444435 MOV -0x8(%RDX,%R13,8),%R10 |
(999) 0x44443a LEA 0x1(%R9),%RDX |
(999) 0x44443e CMP %RDX,%RSI |
(999) 0x444441 CMOVLE %RDX,%RSI |
(999) 0x444445 MOV %RSI,%R11 |
(999) 0x444448 SUB %R9,%R11 |
(999) 0x44444b CMP $0x4,%R11 |
(999) 0x44444f MOV %R11,-0x38(%RBP) |
(999) 0x444453 JAE 4445a4 |
(999) 0x444459 MOV -0x38(%RBP),%RDX |
(999) 0x44445d MOV %RDX,%R11 |
(999) 0x444460 AND $-0x4,%R11 |
(999) 0x444464 CMP %RDX,%R11 |
(999) 0x444467 JE 444380 |
(999) 0x44446d ADD %R11,%R9 |
(999) 0x444470 MOV -0x58(%RBP),%R11 |
(999) 0x444474 JMP 44448c |
0x444476 NOPW %CS:(%RAX,%RAX,1) |
(1000) 0x444480 INC %R9 |
(1000) 0x444483 CMP %R9,%RSI |
(1000) 0x444486 JE 444380 |
(1000) 0x44448c MOV (%R10,%R9,8),%RDX |
(1000) 0x444490 CMP %RDI,(%R15,%RDX,8) |
(1000) 0x444494 JE 444480 |
(1000) 0x444496 INC %RCX |
(1000) 0x444499 INCQ 0x8(%R11,%RDI,8) |
(1000) 0x44449e MOV %RDI,(%R15,%RDX,8) |
(1000) 0x4444a2 JMP 444480 |
(999) 0x4444a4 MOV %RDX,%R14 |
(999) 0x4444a7 SHR $0x2,%R14 |
(999) 0x4444ab LEA 0x18(%R11,%R10,8),%R12 |
(999) 0x4444b0 JMP 4444cd |
0x4444b2 NOPW %CS:(%RAX,%RAX,1) |
(1003) 0x4444c0 ADD $0x20,%R12 |
(1003) 0x4444c4 DEC %R14 |
(1003) 0x4444c7 JE 4443f9 |
(1003) 0x4444cd MOV -0x18(%R12),%RDX |
(1003) 0x4444d2 CMP %RDI,(%RBX,%RDX,8) |
(1003) 0x4444d6 JNE 444500 |
(1003) 0x4444d8 MOV -0x10(%R12),%RDX |
(1003) 0x4444dd CMP %RDI,(%RBX,%RDX,8) |
(1003) 0x4444e1 JNE 44451b |
(1003) 0x4444e3 MOV -0x8(%R12),%RDX |
(1003) 0x4444e8 CMP %RDI,(%RBX,%RDX,8) |
(1003) 0x4444ec JNE 444536 |
(1003) 0x4444ee MOV (%R12),%RDX |
(1003) 0x4444f2 CMP %RDI,(%RBX,%RDX,8) |
(1003) 0x4444f6 JE 4444c0 |
(1003) 0x4444f8 JMP 444554 |
0x4444fa NOPW (%RAX,%RAX,1) |
(1003) 0x444500 INC %RAX |
(1003) 0x444503 MOV -0x50(%RBP),%R9 |
(1003) 0x444507 INCQ 0x8(%R9,%RDI,8) |
(1003) 0x44450c MOV %RDI,(%RBX,%RDX,8) |
(1003) 0x444510 MOV -0x10(%R12),%RDX |
(1003) 0x444515 CMP %RDI,(%RBX,%RDX,8) |
(1003) 0x444519 JE 4444e3 |
(1003) 0x44451b INC %RAX |
(1003) 0x44451e MOV -0x50(%RBP),%R9 |
(1003) 0x444522 INCQ 0x8(%R9,%RDI,8) |
(1003) 0x444527 MOV %RDI,(%RBX,%RDX,8) |
(1003) 0x44452b MOV -0x8(%R12),%RDX |
(1003) 0x444530 CMP %RDI,(%RBX,%RDX,8) |
(1003) 0x444534 JE 4444ee |
(1003) 0x444536 INC %RAX |
(1003) 0x444539 MOV -0x50(%RBP),%R9 |
(1003) 0x44453d INCQ 0x8(%R9,%RDI,8) |
(1003) 0x444542 MOV %RDI,(%RBX,%RDX,8) |
(1003) 0x444546 MOV (%R12),%RDX |
(1003) 0x44454a CMP %RDI,(%RBX,%RDX,8) |
(1003) 0x44454e JE 4444c0 |
(1003) 0x444554 INC %RAX |
(1003) 0x444557 MOV -0x50(%RBP),%R9 |
(1003) 0x44455b INCQ 0x8(%R9,%RDI,8) |
(1003) 0x444560 MOV %RDI,(%RBX,%RDX,8) |
(1003) 0x444564 JMP 4444c0 |
(999) 0x444569 ADD %RDX,%R10 |
(999) 0x44456c MOV -0x38(%RBP),%R14 |
(999) 0x444570 MOV -0x50(%RBP),%R9 |
(999) 0x444574 JMP 44458c |
0x444576 NOPW %CS:(%RAX,%RAX,1) |
(1002) 0x444580 INC %R10 |
(1002) 0x444583 CMP %R10,%RSI |
(1002) 0x444586 JE 444411 |
(1002) 0x44458c MOV (%R11,%R10,8),%RDX |
(1002) 0x444590 CMP %RDI,(%RBX,%RDX,8) |
(1002) 0x444594 JE 444580 |
(1002) 0x444596 INC %RAX |
(1002) 0x444599 INCQ 0x8(%R9,%RDI,8) |
(1002) 0x44459e MOV %RDI,(%RBX,%RDX,8) |
(1002) 0x4445a2 JMP 444580 |
(999) 0x4445a4 SHR $0x2,%R11 |
(999) 0x4445a8 LEA 0x18(%R10,%R9,8),%R14 |
(999) 0x4445ad JMP 4445bd |
0x4445af NOP |
(1001) 0x4445b0 ADD $0x20,%R14 |
(1001) 0x4445b4 DEC %R11 |
(1001) 0x4445b7 JE 444459 |
(1001) 0x4445bd MOV -0x18(%R14),%R12 |
(1001) 0x4445c1 CMP %RDI,(%R15,%R12,8) |
(1001) 0x4445c5 JNE 4445f0 |
(1001) 0x4445c7 MOV -0x10(%R14),%R12 |
(1001) 0x4445cb CMP %RDI,(%R15,%R12,8) |
(1001) 0x4445cf JNE 44460a |
(1001) 0x4445d1 MOV -0x8(%R14),%R12 |
(1001) 0x4445d5 CMP %RDI,(%R15,%R12,8) |
(1001) 0x4445d9 JNE 444624 |
(1001) 0x4445db MOV (%R14),%R12 |
(1001) 0x4445de CMP %RDI,(%R15,%R12,8) |
(1001) 0x4445e2 JE 4445b0 |
(1001) 0x4445e4 JMP 444641 |
0x4445e6 NOPW %CS:(%RAX,%RAX,1) |
(1001) 0x4445f0 INC %RCX |
(1001) 0x4445f3 MOV -0x58(%RBP),%RDX |
(1001) 0x4445f7 INCQ 0x8(%RDX,%RDI,8) |
(1001) 0x4445fc MOV %RDI,(%R15,%R12,8) |
(1001) 0x444600 MOV -0x10(%R14),%R12 |
(1001) 0x444604 CMP %RDI,(%R15,%R12,8) |
(1001) 0x444608 JE 4445d1 |
(1001) 0x44460a INC %RCX |
(1001) 0x44460d MOV -0x58(%RBP),%RDX |
(1001) 0x444611 INCQ 0x8(%RDX,%RDI,8) |
(1001) 0x444616 MOV %RDI,(%R15,%R12,8) |
(1001) 0x44461a MOV -0x8(%R14),%R12 |
(1001) 0x44461e CMP %RDI,(%R15,%R12,8) |
(1001) 0x444622 JE 4445db |
(1001) 0x444624 INC %RCX |
(1001) 0x444627 MOV -0x58(%RBP),%RDX |
(1001) 0x44462b INCQ 0x8(%RDX,%RDI,8) |
(1001) 0x444630 MOV %RDI,(%R15,%R12,8) |
(1001) 0x444634 MOV (%R14),%R12 |
(1001) 0x444637 CMP %RDI,(%R15,%R12,8) |
(1001) 0x44463b JE 4445b0 |
(1001) 0x444641 INC %RCX |
(1001) 0x444644 MOV -0x58(%RBP),%RDX |
(1001) 0x444648 INCQ 0x8(%RDX,%RDI,8) |
(1001) 0x44464d MOV %RDI,(%R15,%R12,8) |
(1001) 0x444651 JMP 4445b0 |
0x444656 NOPW %CS:(%RAX,%RAX,1) |
(996) 0x444660 MOV -0xa8(%RBP),%RDX |
(996) 0x444667 MOV (%RDX,%RDI,8),%R8 |
(996) 0x44466b MOV 0x8(%RDX,%RDI,8),%RDX |
(996) 0x444670 CMP %RDX,%R8 |
(996) 0x444673 JL 44468c |
(996) 0x444675 JMP 444330 |
0x44467a NOPW (%RAX,%RAX,1) |
(997) 0x444680 INC %R8 |
(997) 0x444683 CMP %RDX,%R8 |
(997) 0x444686 JGE 444330 |
(997) 0x44468c MOV -0x130(%RBP),%RSI |
(997) 0x444693 MOV (%RSI,%R8,8),%R9 |
(997) 0x444697 MOV -0x120(%RBP),%RSI |
(997) 0x44469e CMP %R10,(%RSI,%R9,8) |
(997) 0x4446a2 JNE 444680 |
(997) 0x4446a4 MOV -0x110(%RBP),%RSI |
(997) 0x4446ab MOV 0x8(%RSI,%R9,8),%RSI |
(997) 0x4446b0 TEST %RSI,%RSI |
(997) 0x4446b3 JLE 444680 |
(997) 0x4446b5 MOV -0x100(%RBP),%RDX |
(997) 0x4446bc MOV (%RDX,%R9,8),%R9 |
(997) 0x4446c0 ADD %R9,%RSI |
(997) 0x4446c3 MOV -0x108(%RBP),%RDX |
(997) 0x4446ca MOV (%RDX,%R13,8),%R14 |
(997) 0x4446ce LEA 0x1(%R9),%R10 |
(997) 0x4446d2 CMP %R10,%RSI |
(997) 0x4446d5 MOV %R10,%RDX |
(997) 0x4446d8 CMOVG %RSI,%RDX |
(997) 0x4446dc SUB %R9,%RDX |
(997) 0x4446df CMP %RSI,%R10 |
(997) 0x4446e2 MOV %R14,-0x38(%RBP) |
(997) 0x4446e6 JGE 444789 |
(997) 0x4446ec MOV %RDX,%R11 |
(997) 0x4446ef AND $-0x2,%R11 |
(997) 0x4446f3 LEA 0x8(%R14,%R9,8),%R10 |
(997) 0x4446f8 XOR %ESI,%ESI |
(997) 0x4446fa JMP 444711 |
0x4446fc NOPL (%RAX) |
(998) 0x444700 INCQ 0x8(%R12,%RDI,8) |
(998) 0x444705 MOV %RDI,(%R14) |
(998) 0x444708 ADD $0x2,%RSI |
(998) 0x44470c CMP %RSI,%R11 |
(998) 0x44470f JE 44478b |
(998) 0x444711 MOV -0x8(%R10,%RSI,8),%R14 |
(998) 0x444716 TEST %R14,%R14 |
(998) 0x444719 JS 444730 |
(998) 0x44471b CMP %RDI,(%R15,%R14,8) |
(998) 0x44471f JE 44474c |
(998) 0x444721 LEA (%R15,%R14,8),%R14 |
(998) 0x444725 INC %RCX |
(998) 0x444728 MOV -0x58(%RBP),%R12 |
(998) 0x44472c JMP 444744 |
0x44472e XCHG %AX,%AX |
(998) 0x444730 NOT %R14 |
(998) 0x444733 CMP %RDI,(%RBX,%R14,8) |
(998) 0x444737 JE 44474c |
(998) 0x444739 LEA (%RBX,%R14,8),%R14 |
(998) 0x44473d INC %RAX |
(998) 0x444740 MOV -0x50(%RBP),%R12 |
(998) 0x444744 INCQ 0x8(%R12,%RDI,8) |
(998) 0x444749 MOV %RDI,(%R14) |
(998) 0x44474c MOV (%R10,%RSI,8),%R14 |
(998) 0x444750 TEST %R14,%R14 |
(998) 0x444753 JS 444770 |
(998) 0x444755 CMP %RDI,(%R15,%R14,8) |
(998) 0x444759 JE 444708 |
(998) 0x44475b LEA (%R15,%R14,8),%R14 |
(998) 0x44475f INC %RCX |
(998) 0x444762 MOV -0x58(%RBP),%R12 |
(998) 0x444766 JMP 444700 |
0x444768 NOPL (%RAX,%RAX,1) |
(998) 0x444770 NOT %R14 |
(998) 0x444773 CMP %RDI,(%RBX,%R14,8) |
(998) 0x444777 JE 444708 |
(998) 0x444779 LEA (%RBX,%R14,8),%R14 |
(998) 0x44477d INC %RAX |
(998) 0x444780 MOV -0x50(%RBP),%R12 |
(998) 0x444784 JMP 444700 |
(997) 0x444789 XOR %ESI,%ESI |
(997) 0x44478b TEST $0x1,%DL |
(997) 0x44478e MOV -0x30(%RBP),%R10 |
(997) 0x444792 JE 4447d3 |
(997) 0x444794 ADD %RSI,%R9 |
(997) 0x444797 MOV -0x38(%RBP),%RDX |
(997) 0x44479b MOV (%RDX,%R9,8),%RDX |
(997) 0x44479f TEST %RDX,%RDX |
(997) 0x4447a2 JS 4447b7 |
(997) 0x4447a4 CMP %RDI,(%R15,%RDX,8) |
(997) 0x4447a8 JE 4447d3 |
(997) 0x4447aa LEA (%R15,%RDX,8),%RDX |
(997) 0x4447ae INC %RCX |
(997) 0x4447b1 MOV -0x58(%RBP),%RSI |
(997) 0x4447b5 JMP 4447cb |
(997) 0x4447b7 NOT %RDX |
(997) 0x4447ba CMP %RDI,(%RBX,%RDX,8) |
(997) 0x4447be JE 4447d3 |
(997) 0x4447c0 LEA (%RBX,%RDX,8),%RDX |
(997) 0x4447c4 INC %RAX |
(997) 0x4447c7 MOV -0x50(%RBP),%RSI |
(997) 0x4447cb INCQ 0x8(%RSI,%RDI,8) |
(997) 0x4447d0 MOV %RDI,(%RDX) |
(997) 0x4447d3 MOV -0xa8(%RBP),%RDX |
(997) 0x4447da MOV 0x8(%RDX,%RDI,8),%RDX |
(997) 0x4447df INC %R8 |
(997) 0x4447e2 CMP %RDX,%R8 |
(997) 0x4447e5 JL 44468c |
(996) 0x4447eb JMP 444330 |
0x4447f0 XOR %EAX,%EAX |
0x4447f2 XOR %ECX,%ECX |
0x4447f4 MOV -0x68(%RBP),%R12 |
0x4447f8 TEST %R12,%R12 |
0x4447fb JNE 44480e |
0x4447fd MOV -0xe0(%RBP),%RDX |
0x444804 MOV -0x140(%RBP),%RSI |
0x44480b MOV %RSI,(%RDX) |
0x44480e MOV -0x78(%RBP),%RDX |
0x444812 MOV %RCX,(%RDX,%R12,8) |
0x444816 MOV -0xf0(%RBP),%R14 |
0x44481d MOV %RAX,(%R14,%R12,8) |
0x444821 MOV -0xc8(%RBP),%RAX |
0x444828 MOV (%RAX),%ESI |
0x44482a MOV $0x732870,%EDI |
0x44482f CALL 410030 <__kmpc_barrier@plt> |
0x444834 MOV -0x78(%RBP),%RDI |
0x444838 TEST %R12,%R12 |
0x44483b MOV -0xe0(%RBP),%R12 |
0x444842 JNE 44487d |
0x444844 CMPQ $0x2,(%R12) |
0x444849 JL 44487d |
0x44484b MOV $0x1,%EAX |
(995) 0x444850 MOV -0x8(%RDI,%RAX,8),%RCX |
(995) 0x444855 LEA (%RDI,%RAX,8),%RDX |
(995) 0x444859 MOV (%RDX),%RSI |
(995) 0x44485c ADD %RCX,%RSI |
(995) 0x44485f MOV %RSI,(%RDX) |
(995) 0x444862 MOV -0x8(%R14,%RAX,8),%RCX |
(995) 0x444867 LEA (%R14,%RAX,8),%RDX |
(995) 0x44486b MOV (%RDX),%RSI |
(995) 0x44486e ADD %RCX,%RSI |
(995) 0x444871 MOV %RSI,(%RDX) |
(995) 0x444874 INC %RAX |
(995) 0x444877 CMP (%R12),%RAX |
(995) 0x44487b JL 444850 |
0x44487d MOV -0xc8(%RBP),%RAX |
0x444884 MOV (%RAX),%ESI |
0x444886 MOV $0x732890,%EDI |
0x44488b CALL 410030 <__kmpc_barrier@plt> |
0x444890 CMPQ $0,-0x68(%RBP) |
0x444895 JLE 444a2f |
0x44489b MOV -0xb8(%RBP),%RAX |
0x4448a2 CMP %RAX,-0x70(%RBP) |
0x4448a6 MOV -0xa0(%RBP),%R10 |
0x4448ad MOV %R14,%R11 |
0x4448b0 MOV -0x78(%RBP),%R12 |
0x4448b4 MOV -0x68(%RBP),%R14 |
0x4448b8 JGE 444a9a |
0x4448be MOV -0x80(%RBP),%RDX |
0x4448c2 LEA 0x1(%RDX),%RAX |
0x4448c6 MOV -0xd0(%RBP),%RCX |
0x4448cd CMP %RCX,%RAX |
0x4448d0 CMOVLE %RCX,%RAX |
0x4448d4 MOV %RAX,-0x38(%RBP) |
0x4448d8 SUB %RDX,%RAX |
0x4448db MOV %RAX,-0x30(%RBP) |
0x4448df CMP $0x4,%RAX |
0x4448e3 JB 4449c2 |
0x4448e9 MOV -0x30(%RBP),%RDX |
0x4448ed SHR $0x2,%RDX |
0x4448f1 MOV -0x98(%RBP),%RSI |
0x4448f8 MOV -0x80(%RBP),%RDI |
0x4448fc LEA 0x18(%RSI,%RDI,8),%RSI |
0x444901 MOV -0x90(%RBP),%RAX |
0x444908 NOPL (%RAX,%RAX,1) |
(994) 0x444910 MOV -0x18(%RSI),%RDI |
(994) 0x444914 MOV -0x8(%R11,%R14,8),%R8 |
(994) 0x444919 LEA (%RAX,%RDI,8),%R9 |
(994) 0x44491d MOV %R10,%RCX |
(994) 0x444920 MOV (%R9),%R10 |
(994) 0x444923 ADD %R8,%R10 |
(994) 0x444926 MOV %R10,(%R9) |
(994) 0x444929 MOV -0x8(%R12,%R14,8),%R8 |
(994) 0x44492e LEA (%RCX,%RDI,8),%RDI |
(994) 0x444932 MOV (%RDI),%R9 |
(994) 0x444935 ADD %R8,%R9 |
(994) 0x444938 MOV %R9,(%RDI) |
(994) 0x44493b MOV -0x10(%RSI),%RDI |
(994) 0x44493f MOV -0x8(%R11,%R14,8),%R8 |
(994) 0x444944 LEA (%RAX,%RDI,8),%R9 |
(994) 0x444948 MOV (%R9),%R10 |
(994) 0x44494b ADD %R8,%R10 |
(994) 0x44494e MOV %R10,(%R9) |
(994) 0x444951 MOV -0x8(%R12,%R14,8),%R8 |
(994) 0x444956 LEA (%RCX,%RDI,8),%RDI |
(994) 0x44495a MOV (%RDI),%R9 |
(994) 0x44495d ADD %R8,%R9 |
(994) 0x444960 MOV %R9,(%RDI) |
(994) 0x444963 MOV -0x8(%RSI),%RDI |
(994) 0x444967 MOV -0x8(%R11,%R14,8),%R8 |
(994) 0x44496c LEA (%RAX,%RDI,8),%R9 |
(994) 0x444970 MOV (%R9),%R10 |
(994) 0x444973 ADD %R8,%R10 |
(994) 0x444976 MOV %R10,(%R9) |
(994) 0x444979 MOV -0x8(%R12,%R14,8),%R8 |
(994) 0x44497e LEA (%RCX,%RDI,8),%RDI |
(994) 0x444982 MOV (%RDI),%R9 |
(994) 0x444985 ADD %R8,%R9 |
(994) 0x444988 MOV %R9,(%RDI) |
(994) 0x44498b MOV (%RSI),%RDI |
(994) 0x44498e MOV -0x8(%R11,%R14,8),%R8 |
(994) 0x444993 LEA (%RAX,%RDI,8),%R9 |
(994) 0x444997 MOV (%R9),%R10 |
(994) 0x44499a ADD %R8,%R10 |
(994) 0x44499d MOV %R10,(%R9) |
(994) 0x4449a0 MOV %RCX,%R10 |
(994) 0x4449a3 MOV -0x8(%R12,%R14,8),%R8 |
(994) 0x4449a8 LEA (%RCX,%RDI,8),%RDI |
(994) 0x4449ac MOV (%RDI),%R9 |
(994) 0x4449af ADD %R8,%R9 |
(994) 0x4449b2 MOV %R9,(%RDI) |
(994) 0x4449b5 ADD $0x20,%RSI |
(994) 0x4449b9 DEC %RDX |
(994) 0x4449bc JNE 444910 |
0x4449c2 MOV -0x30(%RBP),%RAX |
0x4449c6 MOV %RAX,%RDX |
0x4449c9 AND $-0x4,%RDX |
0x4449cd CMP %RAX,%RDX |
0x4449d0 MOV -0x98(%RBP),%RAX |
0x4449d7 MOV -0xd8(%RBP),%R9 |
0x4449de MOV -0x38(%RBP),%R8 |
0x4449e2 JE 444a9a |
0x4449e8 ADD -0x70(%RBP),%R9 |
0x4449ec ADD %RDX,%R9 |
0x4449ef NOP |
(993) 0x4449f0 MOV (%RAX,%R9,8),%RCX |
(993) 0x4449f4 MOV -0x8(%R11,%R14,8),%RDX |
(993) 0x4449f9 MOV %RAX,%RDI |
(993) 0x4449fc MOV -0x90(%RBP),%RAX |
(993) 0x444a03 LEA (%RAX,%RCX,8),%RSI |
(993) 0x444a07 MOV %RDI,%RAX |
(993) 0x444a0a MOV (%RSI),%RDI |
(993) 0x444a0d ADD %RDX,%RDI |
(993) 0x444a10 MOV %RDI,(%RSI) |
(993) 0x444a13 MOV -0x8(%R12,%R14,8),%RDX |
(993) 0x444a18 LEA (%R10,%RCX,8),%RCX |
(993) 0x444a1c MOV (%RCX),%RSI |
(993) 0x444a1f ADD %RDX,%RSI |
(993) 0x444a22 MOV %RSI,(%RCX) |
(993) 0x444a25 INC %R9 |
(993) 0x444a28 CMP %R9,%R8 |
(993) 0x444a2b JNE 4449f0 |
0x444a2d JMP 444a9a |
0x444a2f MOV (%R12),%RAX |
0x444a33 MOV -0x8(%R14,%RAX,8),%RDI |
0x444a38 MOV -0x78(%RBP),%RCX |
0x444a3c MOV -0x8(%RCX,%RAX,8),%R14 |
0x444a41 MOV -0x148(%RBP),%RAX |
0x444a48 ADD %RDI,(%RAX) |
0x444a4b MOV -0x150(%RBP),%RAX |
0x444a52 ADD %R14,(%RAX) |
0x444a55 MOV $0x8,%ESI |
0x444a5a CALL 4e6980 <hypre_CAlloc> |
0x444a5f MOV -0x40(%RBP),%RCX |
0x444a63 MOV %RAX,(%RCX,%R13,8) |
0x444a67 TEST %R14,%R14 |
0x444a6a JE 444a7b |
0x444a6c MOV $0x8,%ESI |
0x444a71 MOV %R14,%RDI |
0x444a74 CALL 4e6980 <hypre_CAlloc> |
0x444a79 JMP 444a8e |
0x444a7b MOV -0x138(%RBP),%RAX |
0x444a82 CMPQ $0x2,(%RAX) |
0x444a86 MOV -0x68(%RBP),%R14 |
0x444a8a JL 444a9a |
0x444a8c XOR %EAX,%EAX |
0x444a8e MOV -0x48(%RBP),%RCX |
0x444a92 MOV %RAX,(%RCX,%R13,8) |
0x444a96 MOV -0x68(%RBP),%R14 |
0x444a9a MOV -0xc8(%RBP),%RAX |
0x444aa1 MOV (%RAX),%ESI |
0x444aa3 MOV $0x7328b0,%EDI |
0x444aa8 CALL 410030 <__kmpc_barrier@plt> |
0x444aad TEST %R14,%R14 |
0x444ab0 JLE 444add |
0x444ab2 MOV -0xf0(%RBP),%RAX |
0x444ab9 MOV -0x8(%RAX,%R14,8),%RAX |
0x444abe MOV -0x78(%RBP),%RCX |
0x444ac2 MOV -0x8(%RCX,%R14,8),%RCX |
0x444ac7 MOV -0x70(%RBP),%RDX |
0x444acb CMP -0xb8(%RBP),%RDX |
0x444ad2 MOV -0x80(%RBP),%RSI |
0x444ad6 JL 444af6 |
0x444ad8 JMP 445024 |
0x444add XOR %EAX,%EAX |
0x444adf XOR %ECX,%ECX |
0x444ae1 MOV -0x70(%RBP),%RDX |
0x444ae5 CMP -0xb8(%RBP),%RDX |
0x444aec MOV -0x80(%RBP),%RSI |
0x444af0 JGE 445024 |
0x444af6 LEA -0x1(%R13),%R11 |
0x444afa MOV %R11,-0x38(%RBP) |
0x444afe JMP 444b14 |
(985) 0x444b00 MOV -0x80(%RBP),%RSI |
(985) 0x444b04 INC %RSI |
(985) 0x444b07 CMP -0xd0(%RBP),%RSI |
(985) 0x444b0e JGE 445024 |
(985) 0x444b14 MOV -0x98(%RBP),%RDX |
(985) 0x444b1b MOV %RSI,-0x80(%RBP) |
(985) 0x444b1f MOV (%RDX,%RSI,8),%RSI |
(985) 0x444b23 MOV -0xb0(%RBP),%RDX |
(985) 0x444b2a MOV (%RDX,%RSI,8),%R8 |
(985) 0x444b2e MOV %RSI,%RDI |
(985) 0x444b31 NOT %RDI |
(985) 0x444b34 JMP 444b52 |
0x444b36 NOPW %CS:(%RAX,%RAX,1) |
(988) 0x444b40 MOV -0x38(%RBP),%R11 |
(988) 0x444b44 MOV -0x30(%RBP),%R8 |
(988) 0x444b48 INC %R8 |
(988) 0x444b4b MOV -0xb0(%RBP),%RDX |
(988) 0x444b52 CMP 0x8(%RDX,%RSI,8),%R8 |
(988) 0x444b57 JGE 444e20 |
(988) 0x444b5d MOV -0x128(%RBP),%RDX |
(988) 0x444b64 MOV (%RDX,%R8,8),%R14 |
(988) 0x444b68 MOV -0x118(%RBP),%RDX |
(988) 0x444b6f CMP %R11,(%RDX,%R14,8) |
(988) 0x444b73 JNE 444b48 |
(988) 0x444b75 MOV %R8,-0x30(%RBP) |
(988) 0x444b79 MOV -0x50(%RBP),%RDX |
(988) 0x444b7d MOV 0x8(%RDX,%R14,8),%R10 |
(988) 0x444b82 TEST %R10,%R10 |
(988) 0x444b85 JLE 444bdf |
(988) 0x444b87 MOV -0x90(%RBP),%RDX |
(988) 0x444b8e MOV %R14,-0x60(%RBP) |
(988) 0x444b92 MOV (%RDX,%R14,8),%R11 |
(988) 0x444b96 ADD %R11,%R10 |
(988) 0x444b99 MOV -0x40(%RBP),%RDX |
(988) 0x444b9d MOV -0x8(%RDX,%R13,8),%RDX |
(988) 0x444ba2 LEA 0x1(%R11),%R9 |
(988) 0x444ba6 CMP %R9,%R10 |
(988) 0x444ba9 CMOVLE %R9,%R10 |
(988) 0x444bad MOV %R10,%R12 |
(988) 0x444bb0 SUB %R11,%R12 |
(988) 0x444bb3 CMP $0x4,%R12 |
(988) 0x444bb7 MOV %R12,-0x88(%RBP) |
(988) 0x444bbe JAE 444c72 |
(988) 0x444bc4 MOV -0x88(%RBP),%R8 |
(988) 0x444bcb MOV %R8,%R9 |
(988) 0x444bce AND $-0x4,%R9 |
(988) 0x444bd2 CMP %R8,%R9 |
(988) 0x444bd5 JNE 444d25 |
(988) 0x444bdb MOV -0x60(%RBP),%R14 |
(988) 0x444bdf MOV -0x58(%RBP),%RDX |
(988) 0x444be3 MOV 0x8(%RDX,%R14,8),%R10 |
(988) 0x444be8 TEST %R10,%R10 |
(988) 0x444beb JLE 444b40 |
(988) 0x444bf1 MOV -0xa0(%RBP),%RDX |
(988) 0x444bf8 MOV (%RDX,%R14,8),%R9 |
(988) 0x444bfc ADD %R9,%R10 |
(988) 0x444bff MOV -0x48(%RBP),%RDX |
(988) 0x444c03 MOV -0x8(%RDX,%R13,8),%RDX |
(988) 0x444c08 LEA 0x1(%R9),%R8 |
(988) 0x444c0c CMP %R8,%R10 |
(988) 0x444c0f CMOVLE %R8,%R10 |
(988) 0x444c13 MOV %R10,%R8 |
(988) 0x444c16 SUB %R9,%R8 |
(988) 0x444c19 CMP $0x4,%R8 |
(988) 0x444c1d MOV %R8,-0x60(%RBP) |
(988) 0x444c21 JAE 444d62 |
(988) 0x444c27 MOV -0x60(%RBP),%R8 |
(988) 0x444c2b MOV %R8,%R11 |
(988) 0x444c2e AND $-0x4,%R11 |
(988) 0x444c32 CMP %R8,%R11 |
(988) 0x444c35 JE 444b40 |
(988) 0x444c3b ADD %R11,%R9 |
(988) 0x444c3e JMP 444c4c |
(989) 0x444c40 INC %R9 |
(989) 0x444c43 CMP %R9,%R10 |
(989) 0x444c46 JE 444b40 |
(989) 0x444c4c MOV (%RDX,%R9,8),%R11 |
(989) 0x444c50 MOV (%R15,%R11,8),%R8 |
(989) 0x444c54 XOR %RSI,%R8 |
(989) 0x444c57 CMP $-0x1,%R8 |
(989) 0x444c5b JE 444c40 |
(989) 0x444c5d MOV -0x48(%RBP),%R8 |
(989) 0x444c61 MOV (%R8,%R13,8),%R8 |
(989) 0x444c65 MOV %R11,(%R8,%RCX,8) |
(989) 0x444c69 INC %RCX |
(989) 0x444c6c MOV %RDI,(%R15,%R11,8) |
(989) 0x444c70 JMP 444c40 |
(988) 0x444c72 SHR $0x2,%R12 |
(988) 0x444c76 LEA 0x18(%RDX,%R11,8),%R14 |
(988) 0x444c7b JMP 444c8d |
0x444c7d NOPL (%RAX) |
(992) 0x444c80 ADD $0x20,%R14 |
(992) 0x444c84 DEC %R12 |
(992) 0x444c87 JE 444bc4 |
(992) 0x444c8d MOV -0x18(%R14),%R9 |
(992) 0x444c91 MOV (%RBX,%R9,8),%R8 |
(992) 0x444c95 XOR %RSI,%R8 |
(992) 0x444c98 CMP $-0x1,%R8 |
(992) 0x444c9c JE 444cb1 |
(992) 0x444c9e MOV -0x40(%RBP),%R8 |
(992) 0x444ca2 MOV (%R8,%R13,8),%R8 |
(992) 0x444ca6 MOV %R9,(%R8,%RAX,8) |
(992) 0x444caa INC %RAX |
(992) 0x444cad MOV %RDI,(%RBX,%R9,8) |
(992) 0x444cb1 MOV -0x10(%R14),%R9 |
(992) 0x444cb5 MOV (%RBX,%R9,8),%R8 |
(992) 0x444cb9 XOR %RSI,%R8 |
(992) 0x444cbc CMP $-0x1,%R8 |
(992) 0x444cc0 JE 444cd5 |
(992) 0x444cc2 MOV -0x40(%RBP),%R8 |
(992) 0x444cc6 MOV (%R8,%R13,8),%R8 |
(992) 0x444cca MOV %R9,(%R8,%RAX,8) |
(992) 0x444cce INC %RAX |
(992) 0x444cd1 MOV %RDI,(%RBX,%R9,8) |
(992) 0x444cd5 MOV -0x8(%R14),%R9 |
(992) 0x444cd9 MOV (%RBX,%R9,8),%R8 |
(992) 0x444cdd XOR %RSI,%R8 |
(992) 0x444ce0 CMP $-0x1,%R8 |
(992) 0x444ce4 JE 444cf9 |
(992) 0x444ce6 MOV -0x40(%RBP),%R8 |
(992) 0x444cea MOV (%R8,%R13,8),%R8 |
(992) 0x444cee MOV %R9,(%R8,%RAX,8) |
(992) 0x444cf2 INC %RAX |
(992) 0x444cf5 MOV %RDI,(%RBX,%R9,8) |
(992) 0x444cf9 MOV (%R14),%R9 |
(992) 0x444cfc MOV (%RBX,%R9,8),%R8 |
(992) 0x444d00 XOR %RSI,%R8 |
(992) 0x444d03 CMP $-0x1,%R8 |
(992) 0x444d07 JE 444c80 |
(992) 0x444d0d MOV -0x40(%RBP),%R8 |
(992) 0x444d11 MOV (%R8,%R13,8),%R8 |
(992) 0x444d15 MOV %R9,(%R8,%RAX,8) |
(992) 0x444d19 INC %RAX |
(992) 0x444d1c MOV %RDI,(%RBX,%R9,8) |
(992) 0x444d20 JMP 444c80 |
(988) 0x444d25 ADD %R9,%R11 |
(988) 0x444d28 MOV -0x60(%RBP),%R14 |
(988) 0x444d2c JMP 444d3c |
0x444d2e XCHG %AX,%AX |
(991) 0x444d30 INC %R11 |
(991) 0x444d33 CMP %R11,%R10 |
(991) 0x444d36 JE 444bdf |
(991) 0x444d3c MOV (%RDX,%R11,8),%R9 |
(991) 0x444d40 MOV (%RBX,%R9,8),%R8 |
(991) 0x444d44 XOR %RSI,%R8 |
(991) 0x444d47 CMP $-0x1,%R8 |
(991) 0x444d4b JE 444d30 |
(991) 0x444d4d MOV -0x40(%RBP),%R8 |
(991) 0x444d51 MOV (%R8,%R13,8),%R8 |
(991) 0x444d55 MOV %R9,(%R8,%RAX,8) |
(991) 0x444d59 INC %RAX |
(991) 0x444d5c MOV %RDI,(%RBX,%R9,8) |
(991) 0x444d60 JMP 444d30 |
(988) 0x444d62 MOV %R8,%R14 |
(988) 0x444d65 SHR $0x2,%R14 |
(988) 0x444d69 LEA 0x18(%RDX,%R9,8),%R12 |
(988) 0x444d6e JMP 444d7d |
(990) 0x444d70 ADD $0x20,%R12 |
(990) 0x444d74 DEC %R14 |
(990) 0x444d77 JE 444c27 |
(990) 0x444d7d MOV -0x18(%R12),%R11 |
(990) 0x444d82 MOV (%R15,%R11,8),%R8 |
(990) 0x444d86 XOR %RSI,%R8 |
(990) 0x444d89 CMP $-0x1,%R8 |
(990) 0x444d8d JE 444da2 |
(990) 0x444d8f MOV -0x48(%RBP),%R8 |
(990) 0x444d93 MOV (%R8,%R13,8),%R8 |
(990) 0x444d97 MOV %R11,(%R8,%RCX,8) |
(990) 0x444d9b INC %RCX |
(990) 0x444d9e MOV %RDI,(%R15,%R11,8) |
(990) 0x444da2 MOV -0x10(%R12),%R11 |
(990) 0x444da7 MOV (%R15,%R11,8),%R8 |
(990) 0x444dab XOR %RSI,%R8 |
(990) 0x444dae CMP $-0x1,%R8 |
(990) 0x444db2 JE 444dc7 |
(990) 0x444db4 MOV -0x48(%RBP),%R8 |
(990) 0x444db8 MOV (%R8,%R13,8),%R8 |
(990) 0x444dbc MOV %R11,(%R8,%RCX,8) |
(990) 0x444dc0 INC %RCX |
(990) 0x444dc3 MOV %RDI,(%R15,%R11,8) |
(990) 0x444dc7 MOV -0x8(%R12),%R11 |
(990) 0x444dcc MOV (%R15,%R11,8),%R8 |
(990) 0x444dd0 XOR %RSI,%R8 |
(990) 0x444dd3 CMP $-0x1,%R8 |
(990) 0x444dd7 JE 444dec |
(990) 0x444dd9 MOV -0x48(%RBP),%R8 |
(990) 0x444ddd MOV (%R8,%R13,8),%R8 |
(990) 0x444de1 MOV %R11,(%R8,%RCX,8) |
(990) 0x444de5 INC %RCX |
(990) 0x444de8 MOV %RDI,(%R15,%R11,8) |
(990) 0x444dec MOV (%R12),%R11 |
(990) 0x444df0 MOV (%R15,%R11,8),%R8 |
(990) 0x444df4 XOR %RSI,%R8 |
(990) 0x444df7 CMP $-0x1,%R8 |
(990) 0x444dfb JE 444d70 |
(990) 0x444e01 MOV -0x48(%RBP),%R8 |
(990) 0x444e05 MOV (%R8,%R13,8),%R8 |
(990) 0x444e09 MOV %R11,(%R8,%RCX,8) |
(990) 0x444e0d INC %RCX |
(990) 0x444e10 MOV %RDI,(%R15,%R11,8) |
(990) 0x444e14 JMP 444d70 |
0x444e19 NOPL (%RAX) |
(985) 0x444e20 MOV -0xa8(%RBP),%RDX |
(985) 0x444e27 MOV (%RDX,%RSI,8),%R8 |
(985) 0x444e2b MOV 0x8(%RDX,%RSI,8),%RDX |
(985) 0x444e30 CMP %RDX,%R8 |
(985) 0x444e33 JL 444e4c |
(985) 0x444e35 JMP 444b00 |
0x444e3a NOPW (%RAX,%RAX,1) |
(986) 0x444e40 INC %R8 |
(986) 0x444e43 CMP %RDX,%R8 |
(986) 0x444e46 JGE 444b00 |
(986) 0x444e4c MOV -0x130(%RBP),%R9 |
(986) 0x444e53 MOV (%R9,%R8,8),%R10 |
(986) 0x444e57 MOV -0x120(%RBP),%R9 |
(986) 0x444e5e CMP %R11,(%R9,%R10,8) |
(986) 0x444e62 JNE 444e40 |
(986) 0x444e64 MOV -0x110(%RBP),%R9 |
(986) 0x444e6b MOV 0x8(%R9,%R10,8),%R9 |
(986) 0x444e70 TEST %R9,%R9 |
(986) 0x444e73 JLE 444e40 |
(986) 0x444e75 MOV %R8,-0x30(%RBP) |
(986) 0x444e79 MOV -0x100(%RBP),%RDX |
(986) 0x444e80 MOV (%RDX,%R10,8),%R10 |
(986) 0x444e84 ADD %R10,%R9 |
(986) 0x444e87 MOV -0x108(%RBP),%RDX |
(986) 0x444e8e MOV %R13,%R8 |
(986) 0x444e91 MOV (%RDX,%R13,8),%R8 |
(986) 0x444e95 LEA 0x1(%R10),%RDX |
(986) 0x444e99 CMP %RDX,%R9 |
(986) 0x444e9c MOV %RDX,%R11 |
(986) 0x444e9f CMOVG %R9,%R11 |
(986) 0x444ea3 SUB %R10,%R11 |
(986) 0x444ea6 CMP %R9,%RDX |
(986) 0x444ea9 MOV %R8,-0x88(%RBP) |
(986) 0x444eb0 MOV %R11,-0x60(%RBP) |
(986) 0x444eb4 JGE 444f9c |
(986) 0x444eba AND $-0x2,%R11 |
(986) 0x444ebe LEA 0x8(%R8,%R10,8),%R9 |
(986) 0x444ec3 XOR %EDX,%EDX |
(986) 0x444ec5 MOV %R10,%R8 |
(986) 0x444ec8 JMP 444ee4 |
0x444eca NOPW (%RAX,%RAX,1) |
(987) 0x444ed0 MOV %RDI,(%R12) |
(987) 0x444ed4 MOV %R8,%R10 |
(987) 0x444ed7 ADD $0x2,%RDX |
(987) 0x444edb CMP %RDX,%R11 |
(987) 0x444ede JE 444f9e |
(987) 0x444ee4 MOV -0x8(%R9,%RDX,8),%R14 |
(987) 0x444ee9 TEST %R14,%R14 |
(987) 0x444eec JS 444f10 |
(987) 0x444eee MOV (%R15,%R14,8),%R10 |
(987) 0x444ef2 XOR %RSI,%R10 |
(987) 0x444ef5 CMP $-0x1,%R10 |
(987) 0x444ef9 JE 444f37 |
(987) 0x444efb LEA (%R15,%R14,8),%R12 |
(987) 0x444eff MOV -0x48(%RBP),%R10 |
(987) 0x444f03 MOV (%R10,%R13,8),%R10 |
(987) 0x444f07 MOV %R14,(%R10,%RCX,8) |
(987) 0x444f0b INC %RCX |
(987) 0x444f0e JMP 444f33 |
(987) 0x444f10 NOT %R14 |
(987) 0x444f13 MOV (%RBX,%R14,8),%R12 |
(987) 0x444f17 XOR %RSI,%R12 |
(987) 0x444f1a CMP $-0x1,%R12 |
(987) 0x444f1e JE 444f37 |
(987) 0x444f20 LEA (%RBX,%R14,8),%R12 |
(987) 0x444f24 MOV -0x40(%RBP),%R10 |
(987) 0x444f28 MOV (%R10,%R13,8),%R10 |
(987) 0x444f2c MOV %R14,(%R10,%RAX,8) |
(987) 0x444f30 INC %RAX |
(987) 0x444f33 MOV %RDI,(%R12) |
(987) 0x444f37 MOV (%R9,%RDX,8),%R14 |
(987) 0x444f3b TEST %R14,%R14 |
(987) 0x444f3e JS 444f70 |
(987) 0x444f40 MOV (%R15,%R14,8),%R10 |
(987) 0x444f44 XOR %RSI,%R10 |
(987) 0x444f47 CMP $-0x1,%R10 |
(987) 0x444f4b JE 444ed4 |
(987) 0x444f4d LEA (%R15,%R14,8),%R12 |
(987) 0x444f51 MOV -0x48(%RBP),%R10 |
(987) 0x444f55 MOV (%R10,%R13,8),%R10 |
(987) 0x444f59 MOV %R14,(%R10,%RCX,8) |
(987) 0x444f5d INC %RCX |
(987) 0x444f60 JMP 444ed0 |
0x444f65 NOPW %CS:(%RAX,%RAX,1) |
(987) 0x444f70 NOT %R14 |
(987) 0x444f73 MOV (%RBX,%R14,8),%R10 |
(987) 0x444f77 XOR %RSI,%R10 |
(987) 0x444f7a CMP $-0x1,%R10 |
(987) 0x444f7e JE 444ed4 |
(987) 0x444f84 LEA (%RBX,%R14,8),%R12 |
(987) 0x444f88 MOV -0x40(%RBP),%R10 |
(987) 0x444f8c MOV (%R10,%R13,8),%R10 |
(987) 0x444f90 MOV %R14,(%R10,%RAX,8) |
(987) 0x444f94 INC %RAX |
(987) 0x444f97 JMP 444ed0 |
(986) 0x444f9c XOR %EDX,%EDX |
(986) 0x444f9e TESTB $0x1,-0x60(%RBP) |
(986) 0x444fa2 MOV -0x38(%RBP),%R11 |
(986) 0x444fa6 MOV -0x30(%RBP),%R8 |
(986) 0x444faa JE 445007 |
(986) 0x444fac ADD %RDX,%R10 |
(986) 0x444faf MOV -0x88(%RBP),%RDX |
(986) 0x444fb6 MOV (%RDX,%R10,8),%RDX |
(986) 0x444fba TEST %RDX,%RDX |
(986) 0x444fbd JS 444fe1 |
(986) 0x444fbf MOV (%R15,%RDX,8),%R9 |
(986) 0x444fc3 XOR %RSI,%R9 |
(986) 0x444fc6 CMP $-0x1,%R9 |
(986) 0x444fca JE 445007 |
(986) 0x444fcc LEA (%R15,%RDX,8),%R9 |
(986) 0x444fd0 MOV -0x48(%RBP),%R10 |
(986) 0x444fd4 MOV (%R10,%R13,8),%R10 |
(986) 0x444fd8 MOV %RDX,(%R10,%RCX,8) |
(986) 0x444fdc INC %RCX |
(986) 0x444fdf JMP 445004 |
(986) 0x444fe1 NOT %RDX |
(986) 0x444fe4 MOV (%RBX,%RDX,8),%R9 |
(986) 0x444fe8 XOR %RSI,%R9 |
(986) 0x444feb CMP $-0x1,%R9 |
(986) 0x444fef JE 445007 |
(986) 0x444ff1 LEA (%RBX,%RDX,8),%R9 |
(986) 0x444ff5 MOV -0x40(%RBP),%R10 |
(986) 0x444ff9 MOV (%R10,%R13,8),%R10 |
(986) 0x444ffd MOV %RDX,(%R10,%RAX,8) |
(986) 0x445001 INC %RAX |
(986) 0x445004 MOV %RDI,(%R9) |
(986) 0x445007 MOV -0xa8(%RBP),%RDX |
(986) 0x44500e MOV 0x8(%RDX,%RSI,8),%RDX |
(986) 0x445013 INC %R8 |
(986) 0x445016 CMP %RDX,%R8 |
(986) 0x445019 JL 444e4c |
(985) 0x44501f JMP 444b00 |
0x445024 MOV %RBX,%RDI |
0x445027 CALL 4e6a60 <hypre_Free> |
0x44502c CMPQ $0,-0xe8(%RBP) |
0x445034 JNE 445058 |
0x445036 MOV -0xc0(%RBP),%RAX |
0x44503d CMP -0xf8(%RBP),%RAX |
0x445044 JE 445058 |
0x445046 ADD $0x128,%RSP |
0x44504d POP %RBX |
0x44504e POP %R12 |
0x445050 POP %R13 |
0x445052 POP %R14 |
0x445054 POP %R15 |
0x445056 POP %RBP |
0x445057 RET |
0x445058 MOV %R15,%RDI |
0x44505b ADD $0x128,%RSP |
0x445062 POP %RBX |
0x445063 POP %R12 |
0x445065 POP %R13 |
0x445067 POP %R14 |
0x445069 POP %R15 |
0x44506b POP %RBP |
0x44506c JMP 4e6a60 |
0x445071 NOPW %CS:(%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 297 |
nb uops | 318 |
loop length | 1346 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 53.00 cycles |
front end | 53.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.80 | 15.80 | 35.33 | 35.33 | 32.00 | 15.80 | 15.80 | 32.00 | 32.00 | 32.00 | 15.80 | 35.33 |
cycles | 15.80 | 17.40 | 35.33 | 35.33 | 32.00 | 15.80 | 15.80 | 32.00 | 32.00 | 32.00 | 15.80 | 35.33 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 51.02-51.07 |
Stall cycles | 0.00 |
Front-end | 53.00 |
Dispatch | 35.33 |
DIV/SQRT | 16.00 |
Overall L1 | 53.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4e86c0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e86b0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 44422a <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 444230 <hypre_BoomerAMGBuildMultipass.extracted.34+0x170> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R13),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R13,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RBX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12,%R13,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6980 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444292 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4efbb0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL -0x68(%RBP),%R14 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4442c4 <hypre_BoomerAMGBuildMultipass.extracted.34+0x204> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4442ef <hypre_BoomerAMGBuildMultipass.extracted.34+0x22f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6980 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4442ef <hypre_BoomerAMGBuildMultipass.extracted.34+0x22f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4efbb0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 4442ef <hypre_BoomerAMGBuildMultipass.extracted.34+0x22f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 4447f0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x730> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R13),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444347 <hypre_BoomerAMGBuildMultipass.extracted.34+0x287> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 44480e <hypre_BoomerAMGBuildMultipass.extracted.34+0x74e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf0(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R14,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x732870,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410030 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xe0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44487d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%R12) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 44487d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x732890,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410030 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x68(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 444a2f <hypre_BoomerAMGBuildMultipass.extracted.34+0x96f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x70(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x78(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 444a9a <hypre_BoomerAMGBuildMultipass.extracted.34+0x9da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4449c2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x902> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RSI,%RDI,8),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 444a9a <hypre_BoomerAMGBuildMultipass.extracted.34+0x9da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x70(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 444a9a <hypre_BoomerAMGBuildMultipass.extracted.34+0x9da> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R14,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4e6980 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 444a7b <hypre_BoomerAMGBuildMultipass.extracted.34+0x9bb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6980 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 444a8e <hypre_BoomerAMGBuildMultipass.extracted.34+0x9ce> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 444a9a <hypre_BoomerAMGBuildMultipass.extracted.34+0x9da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7328b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410030 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444add <hypre_BoomerAMGBuildMultipass.extracted.34+0xa1d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%R14,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%R14,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb8(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 444af6 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa36> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 445024 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf64> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb8(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 445024 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444b14 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa54> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6a60 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445058 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf98> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xf8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 445058 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf98> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4e6a60 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | par_multi_interp.c:891-1134 |
Module | exec |
nb instructions | 297 |
nb uops | 318 |
loop length | 1346 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 60 |
micro-operation queue | 53.00 cycles |
front end | 53.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 15.80 | 15.80 | 35.33 | 35.33 | 32.00 | 15.80 | 15.80 | 32.00 | 32.00 | 32.00 | 15.80 | 35.33 |
cycles | 15.80 | 17.40 | 35.33 | 35.33 | 32.00 | 15.80 | 15.80 | 32.00 | 32.00 | 32.00 | 15.80 | 35.33 |
Cycles executing div or sqrt instructions | 16.00 |
FE+BE cycles | 51.02-51.07 |
Stall cycles | 0.00 |
Front-end | 53.00 |
Dispatch | 35.33 |
DIV/SQRT | 16.00 |
Overall L1 | 53.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 9% |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R9,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0xc8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xb8(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xf8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x88(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xe8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x78(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x108(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x98(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x100(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4e86c0 <hypre_GetThreadNum> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e86b0 <hypre_NumActiveThreads> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
OR %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SHR $0x20,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
JE 44422a <hypre_BoomerAMGBuildMultipass.extracted.34+0x16a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CQTO | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %RCX | 5 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 10 |
JMP 444230 <hypre_BoomerAMGBuildMultipass.extracted.34+0x170> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %EBX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIV %ECX | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
DEC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R13),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R13,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVE %RBX,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDX,-0xb8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12,%R13,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6980 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R15,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444292 <hypre_BoomerAMGBuildMultipass.extracted.34+0x1d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4efbb0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL -0x68(%RBP),%R14 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV %R14,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 4442c4 <hypre_BoomerAMGBuildMultipass.extracted.34+0x204> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %RDI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 4442ef <hypre_BoomerAMGBuildMultipass.extracted.34+0x22f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6980 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 4442ef <hypre_BoomerAMGBuildMultipass.extracted.34+0x22f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0xff,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4efbb0 <_intel_fast_memset> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 4442ef <hypre_BoomerAMGBuildMultipass.extracted.34+0x22f> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0xd0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 4447f0 <hypre_BoomerAMGBuildMultipass.extracted.34+0x730> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R13),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R10,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444347 <hypre_BoomerAMGBuildMultipass.extracted.34+0x287> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JNE 44480e <hypre_BoomerAMGBuildMultipass.extracted.34+0x74e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x78(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,(%RDX,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf0(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R14,%R12,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x732870,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410030 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x78(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %R12,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV -0xe0(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 44487d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,(%R12) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 44487d <hypre_BoomerAMGBuildMultipass.extracted.34+0x7bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x1,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x732890,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410030 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0x68(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 444a2f <hypre_BoomerAMGBuildMultipass.extracted.34+0x96f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,-0x70(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x78(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 444a9a <hypre_BoomerAMGBuildMultipass.extracted.34+0x9da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x80(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %RCX,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 4449c2 <hypre_BoomerAMGBuildMultipass.extracted.34+0x902> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0x98(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x18(%RSI,%RDI,8),%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x30(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x98(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xd8(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 444a9a <hypre_BoomerAMGBuildMultipass.extracted.34+0x9da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD -0x70(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 444a9a <hypre_BoomerAMGBuildMultipass.extracted.34+0x9da> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV (%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%R14,%RAX,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%RAX,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RDI,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R14,(%RAX) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4e6980 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x40(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 444a7b <hypre_BoomerAMGBuildMultipass.extracted.34+0x9bb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x8,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6980 <hypre_CAlloc> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
JMP 444a8e <hypre_BoomerAMGBuildMultipass.extracted.34+0x9ce> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x138(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $0x2,(%RAX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 444a9a <hypre_BoomerAMGBuildMultipass.extracted.34+0x9da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x48(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RCX,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x68(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x7328b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 410030 <__kmpc_barrier@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
TEST %R14,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 444add <hypre_BoomerAMGBuildMultipass.extracted.34+0xa1d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xf0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RAX,%R14,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x8(%RCX,%R14,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb8(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JL 444af6 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa36> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 445024 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf64> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xb8(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 445024 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R13),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R11,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 444b14 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa54> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4e6a60 <hypre_Free> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
CMPQ $0,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 445058 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf98> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0xf8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 445058 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf98> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x128,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 4e6a60 <hypre_Free> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass.extracted.34– | 1.61 | 0.32 |
○Loop 994 - par_multi_interp.c:1030-1034 - exec | 0.1 | 0.02 |
▼Loop 996 - par_multi_interp.c:917-997 - exec– | 0.04 | 0.01 |
▼Loop 999 - par_multi_interp.c:917-970 - exec– | 0.55 | 0.1 |
○Loop 1002 - par_multi_interp.c:951-958 - exec | 0.2 | 0.04 |
○Loop 1003 - par_multi_interp.c:951-958 - exec | 0 | 0.01 |
○Loop 1001 - par_multi_interp.c:963-970 - exec | 0 | 0 |
○Loop 1000 - par_multi_interp.c:963-970 - exec | 0 | 0 |
▼Loop 997 - par_multi_interp.c:976-997 - exec– | 0 | 0 |
○Loop 998 - par_multi_interp.c:983-997 - exec | 0 | 0 |
▼Loop 985 - par_multi_interp.c:917-1124 - exec– | 0.04 | 0.01 |
▼Loop 988 - par_multi_interp.c:917-1099 - exec– | 0.49 | 0.09 |
○Loop 991 - par_multi_interp.c:1082-1088 - exec | 0.19 | 0.04 |
○Loop 992 - par_multi_interp.c:1082-1088 - exec | 0 | 0.01 |
○Loop 990 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
○Loop 989 - par_multi_interp.c:1093-1099 - exec | 0 | 0 |
▼Loop 986 - par_multi_interp.c:1104-1124 - exec– | 0 | 0 |
○Loop 987 - par_multi_interp.c:1111-1124 - exec | 0 | 0 |
○Loop 993 - par_multi_interp.c:1030-1034 - exec | 0 | 0 |
○Loop 995 - par_multi_interp.c:1017-1020 - exec | 0 | 0 |