Loop Id: 985 | Module: exec | Source: par_multi_interp.c:917-1124 [...] | Coverage: 0.04% |
---|
Loop Id: 985 | Module: exec | Source: par_multi_interp.c:917-1124 [...] | Coverage: 0.04% |
---|
0x444b00 MOV -0x80(%RBP),%RSI |
0x444b04 INC %RSI |
0x444b07 CMP -0xd0(%RBP),%RSI |
0x444b0e JGE 445024 |
0x444b14 MOV -0x98(%RBP),%RDX |
0x444b1b MOV %RSI,-0x80(%RBP) |
0x444b1f MOV (%RDX,%RSI,8),%RSI |
0x444b23 MOV -0xb0(%RBP),%RDX |
0x444b2a MOV (%RDX,%RSI,8),%R8 |
0x444b2e MOV %RSI,%RDI |
0x444b31 NOT %RDI |
0x444b34 JMP 444b52 |
(988) 0x444b40 MOV -0x38(%RBP),%R11 |
(988) 0x444b44 MOV -0x30(%RBP),%R8 |
(988) 0x444b48 INC %R8 |
(988) 0x444b4b MOV -0xb0(%RBP),%RDX |
(988) 0x444b52 CMP 0x8(%RDX,%RSI,8),%R8 |
(988) 0x444b57 JGE 444e20 |
(988) 0x444b5d MOV -0x128(%RBP),%RDX |
(988) 0x444b64 MOV (%RDX,%R8,8),%R14 |
(988) 0x444b68 MOV -0x118(%RBP),%RDX |
(988) 0x444b6f CMP %R11,(%RDX,%R14,8) |
(988) 0x444b73 JNE 444b48 |
(988) 0x444b75 MOV %R8,-0x30(%RBP) |
(988) 0x444b79 MOV -0x50(%RBP),%RDX |
(988) 0x444b7d MOV 0x8(%RDX,%R14,8),%R10 |
(988) 0x444b82 TEST %R10,%R10 |
(988) 0x444b85 JLE 444bdf |
(988) 0x444b87 MOV -0x90(%RBP),%RDX |
(988) 0x444b8e MOV %R14,-0x60(%RBP) |
(988) 0x444b92 MOV (%RDX,%R14,8),%R11 |
(988) 0x444b96 ADD %R11,%R10 |
(988) 0x444b99 MOV -0x40(%RBP),%RDX |
(988) 0x444b9d MOV -0x8(%RDX,%R13,8),%RDX |
(988) 0x444ba2 LEA 0x1(%R11),%R9 |
(988) 0x444ba6 CMP %R9,%R10 |
(988) 0x444ba9 CMOVLE %R9,%R10 |
(988) 0x444bad MOV %R10,%R12 |
(988) 0x444bb0 SUB %R11,%R12 |
(988) 0x444bb3 CMP $0x4,%R12 |
(988) 0x444bb7 MOV %R12,-0x88(%RBP) |
(988) 0x444bbe JAE 444c72 |
(988) 0x444bc4 MOV -0x88(%RBP),%R8 |
(988) 0x444bcb MOV %R8,%R9 |
(988) 0x444bce AND $-0x4,%R9 |
(988) 0x444bd2 CMP %R8,%R9 |
(988) 0x444bd5 JNE 444d25 |
(988) 0x444bdb MOV -0x60(%RBP),%R14 |
(988) 0x444bdf MOV -0x58(%RBP),%RDX |
(988) 0x444be3 MOV 0x8(%RDX,%R14,8),%R10 |
(988) 0x444be8 TEST %R10,%R10 |
(988) 0x444beb JLE 444b40 |
(988) 0x444bf1 MOV -0xa0(%RBP),%RDX |
(988) 0x444bf8 MOV (%RDX,%R14,8),%R9 |
(988) 0x444bfc ADD %R9,%R10 |
(988) 0x444bff MOV -0x48(%RBP),%RDX |
(988) 0x444c03 MOV -0x8(%RDX,%R13,8),%RDX |
(988) 0x444c08 LEA 0x1(%R9),%R8 |
(988) 0x444c0c CMP %R8,%R10 |
(988) 0x444c0f CMOVLE %R8,%R10 |
(988) 0x444c13 MOV %R10,%R8 |
(988) 0x444c16 SUB %R9,%R8 |
(988) 0x444c19 CMP $0x4,%R8 |
(988) 0x444c1d MOV %R8,-0x60(%RBP) |
(988) 0x444c21 JAE 444d62 |
(988) 0x444c27 MOV -0x60(%RBP),%R8 |
(988) 0x444c2b MOV %R8,%R11 |
(988) 0x444c2e AND $-0x4,%R11 |
(988) 0x444c32 CMP %R8,%R11 |
(988) 0x444c35 JE 444b40 |
(988) 0x444c3b ADD %R11,%R9 |
(988) 0x444c3e JMP 444c4c |
(989) 0x444c40 INC %R9 |
(989) 0x444c43 CMP %R9,%R10 |
(989) 0x444c46 JE 444b40 |
(989) 0x444c4c MOV (%RDX,%R9,8),%R11 |
(989) 0x444c50 MOV (%R15,%R11,8),%R8 |
(989) 0x444c54 XOR %RSI,%R8 |
(989) 0x444c57 CMP $-0x1,%R8 |
(989) 0x444c5b JE 444c40 |
(989) 0x444c5d MOV -0x48(%RBP),%R8 |
(989) 0x444c61 MOV (%R8,%R13,8),%R8 |
(989) 0x444c65 MOV %R11,(%R8,%RCX,8) |
(989) 0x444c69 INC %RCX |
(989) 0x444c6c MOV %RDI,(%R15,%R11,8) |
(989) 0x444c70 JMP 444c40 |
(988) 0x444c72 SHR $0x2,%R12 |
(988) 0x444c76 LEA 0x18(%RDX,%R11,8),%R14 |
(988) 0x444c7b JMP 444c8d |
(992) 0x444c80 ADD $0x20,%R14 |
(992) 0x444c84 DEC %R12 |
(992) 0x444c87 JE 444bc4 |
(992) 0x444c8d MOV -0x18(%R14),%R9 |
(992) 0x444c91 MOV (%RBX,%R9,8),%R8 |
(992) 0x444c95 XOR %RSI,%R8 |
(992) 0x444c98 CMP $-0x1,%R8 |
(992) 0x444c9c JE 444cb1 |
(992) 0x444c9e MOV -0x40(%RBP),%R8 |
(992) 0x444ca2 MOV (%R8,%R13,8),%R8 |
(992) 0x444ca6 MOV %R9,(%R8,%RAX,8) |
(992) 0x444caa INC %RAX |
(992) 0x444cad MOV %RDI,(%RBX,%R9,8) |
(992) 0x444cb1 MOV -0x10(%R14),%R9 |
(992) 0x444cb5 MOV (%RBX,%R9,8),%R8 |
(992) 0x444cb9 XOR %RSI,%R8 |
(992) 0x444cbc CMP $-0x1,%R8 |
(992) 0x444cc0 JE 444cd5 |
(992) 0x444cc2 MOV -0x40(%RBP),%R8 |
(992) 0x444cc6 MOV (%R8,%R13,8),%R8 |
(992) 0x444cca MOV %R9,(%R8,%RAX,8) |
(992) 0x444cce INC %RAX |
(992) 0x444cd1 MOV %RDI,(%RBX,%R9,8) |
(992) 0x444cd5 MOV -0x8(%R14),%R9 |
(992) 0x444cd9 MOV (%RBX,%R9,8),%R8 |
(992) 0x444cdd XOR %RSI,%R8 |
(992) 0x444ce0 CMP $-0x1,%R8 |
(992) 0x444ce4 JE 444cf9 |
(992) 0x444ce6 MOV -0x40(%RBP),%R8 |
(992) 0x444cea MOV (%R8,%R13,8),%R8 |
(992) 0x444cee MOV %R9,(%R8,%RAX,8) |
(992) 0x444cf2 INC %RAX |
(992) 0x444cf5 MOV %RDI,(%RBX,%R9,8) |
(992) 0x444cf9 MOV (%R14),%R9 |
(992) 0x444cfc MOV (%RBX,%R9,8),%R8 |
(992) 0x444d00 XOR %RSI,%R8 |
(992) 0x444d03 CMP $-0x1,%R8 |
(992) 0x444d07 JE 444c80 |
(992) 0x444d0d MOV -0x40(%RBP),%R8 |
(992) 0x444d11 MOV (%R8,%R13,8),%R8 |
(992) 0x444d15 MOV %R9,(%R8,%RAX,8) |
(992) 0x444d19 INC %RAX |
(992) 0x444d1c MOV %RDI,(%RBX,%R9,8) |
(992) 0x444d20 JMP 444c80 |
(988) 0x444d25 ADD %R9,%R11 |
(988) 0x444d28 MOV -0x60(%RBP),%R14 |
(988) 0x444d2c JMP 444d3c |
(991) 0x444d30 INC %R11 |
(991) 0x444d33 CMP %R11,%R10 |
(991) 0x444d36 JE 444bdf |
(991) 0x444d3c MOV (%RDX,%R11,8),%R9 |
(991) 0x444d40 MOV (%RBX,%R9,8),%R8 |
(991) 0x444d44 XOR %RSI,%R8 |
(991) 0x444d47 CMP $-0x1,%R8 |
(991) 0x444d4b JE 444d30 |
(991) 0x444d4d MOV -0x40(%RBP),%R8 |
(991) 0x444d51 MOV (%R8,%R13,8),%R8 |
(991) 0x444d55 MOV %R9,(%R8,%RAX,8) |
(991) 0x444d59 INC %RAX |
(991) 0x444d5c MOV %RDI,(%RBX,%R9,8) |
(991) 0x444d60 JMP 444d30 |
(988) 0x444d62 MOV %R8,%R14 |
(988) 0x444d65 SHR $0x2,%R14 |
(988) 0x444d69 LEA 0x18(%RDX,%R9,8),%R12 |
(988) 0x444d6e JMP 444d7d |
(990) 0x444d70 ADD $0x20,%R12 |
(990) 0x444d74 DEC %R14 |
(990) 0x444d77 JE 444c27 |
(990) 0x444d7d MOV -0x18(%R12),%R11 |
(990) 0x444d82 MOV (%R15,%R11,8),%R8 |
(990) 0x444d86 XOR %RSI,%R8 |
(990) 0x444d89 CMP $-0x1,%R8 |
(990) 0x444d8d JE 444da2 |
(990) 0x444d8f MOV -0x48(%RBP),%R8 |
(990) 0x444d93 MOV (%R8,%R13,8),%R8 |
(990) 0x444d97 MOV %R11,(%R8,%RCX,8) |
(990) 0x444d9b INC %RCX |
(990) 0x444d9e MOV %RDI,(%R15,%R11,8) |
(990) 0x444da2 MOV -0x10(%R12),%R11 |
(990) 0x444da7 MOV (%R15,%R11,8),%R8 |
(990) 0x444dab XOR %RSI,%R8 |
(990) 0x444dae CMP $-0x1,%R8 |
(990) 0x444db2 JE 444dc7 |
(990) 0x444db4 MOV -0x48(%RBP),%R8 |
(990) 0x444db8 MOV (%R8,%R13,8),%R8 |
(990) 0x444dbc MOV %R11,(%R8,%RCX,8) |
(990) 0x444dc0 INC %RCX |
(990) 0x444dc3 MOV %RDI,(%R15,%R11,8) |
(990) 0x444dc7 MOV -0x8(%R12),%R11 |
(990) 0x444dcc MOV (%R15,%R11,8),%R8 |
(990) 0x444dd0 XOR %RSI,%R8 |
(990) 0x444dd3 CMP $-0x1,%R8 |
(990) 0x444dd7 JE 444dec |
(990) 0x444dd9 MOV -0x48(%RBP),%R8 |
(990) 0x444ddd MOV (%R8,%R13,8),%R8 |
(990) 0x444de1 MOV %R11,(%R8,%RCX,8) |
(990) 0x444de5 INC %RCX |
(990) 0x444de8 MOV %RDI,(%R15,%R11,8) |
(990) 0x444dec MOV (%R12),%R11 |
(990) 0x444df0 MOV (%R15,%R11,8),%R8 |
(990) 0x444df4 XOR %RSI,%R8 |
(990) 0x444df7 CMP $-0x1,%R8 |
(990) 0x444dfb JE 444d70 |
(990) 0x444e01 MOV -0x48(%RBP),%R8 |
(990) 0x444e05 MOV (%R8,%R13,8),%R8 |
(990) 0x444e09 MOV %R11,(%R8,%RCX,8) |
(990) 0x444e0d INC %RCX |
(990) 0x444e10 MOV %RDI,(%R15,%R11,8) |
(990) 0x444e14 JMP 444d70 |
0x444e20 MOV -0xa8(%RBP),%RDX |
0x444e27 MOV (%RDX,%RSI,8),%R8 |
0x444e2b MOV 0x8(%RDX,%RSI,8),%RDX |
0x444e30 CMP %RDX,%R8 |
0x444e33 JL 444e4c |
0x444e35 JMP 444b00 |
(986) 0x444e40 INC %R8 |
(986) 0x444e43 CMP %RDX,%R8 |
(986) 0x444e46 JGE 444b00 |
(986) 0x444e4c MOV -0x130(%RBP),%R9 |
(986) 0x444e53 MOV (%R9,%R8,8),%R10 |
(986) 0x444e57 MOV -0x120(%RBP),%R9 |
(986) 0x444e5e CMP %R11,(%R9,%R10,8) |
(986) 0x444e62 JNE 444e40 |
(986) 0x444e64 MOV -0x110(%RBP),%R9 |
(986) 0x444e6b MOV 0x8(%R9,%R10,8),%R9 |
(986) 0x444e70 TEST %R9,%R9 |
(986) 0x444e73 JLE 444e40 |
(986) 0x444e75 MOV %R8,-0x30(%RBP) |
(986) 0x444e79 MOV -0x100(%RBP),%RDX |
(986) 0x444e80 MOV (%RDX,%R10,8),%R10 |
(986) 0x444e84 ADD %R10,%R9 |
(986) 0x444e87 MOV -0x108(%RBP),%RDX |
(986) 0x444e8e MOV %R13,%R8 |
(986) 0x444e91 MOV (%RDX,%R13,8),%R8 |
(986) 0x444e95 LEA 0x1(%R10),%RDX |
(986) 0x444e99 CMP %RDX,%R9 |
(986) 0x444e9c MOV %RDX,%R11 |
(986) 0x444e9f CMOVG %R9,%R11 |
(986) 0x444ea3 SUB %R10,%R11 |
(986) 0x444ea6 CMP %R9,%RDX |
(986) 0x444ea9 MOV %R8,-0x88(%RBP) |
(986) 0x444eb0 MOV %R11,-0x60(%RBP) |
(986) 0x444eb4 JGE 444f9c |
(986) 0x444eba AND $-0x2,%R11 |
(986) 0x444ebe LEA 0x8(%R8,%R10,8),%R9 |
(986) 0x444ec3 XOR %EDX,%EDX |
(986) 0x444ec5 MOV %R10,%R8 |
(986) 0x444ec8 JMP 444ee4 |
(987) 0x444ed0 MOV %RDI,(%R12) |
(987) 0x444ed4 MOV %R8,%R10 |
(987) 0x444ed7 ADD $0x2,%RDX |
(987) 0x444edb CMP %RDX,%R11 |
(987) 0x444ede JE 444f9e |
(987) 0x444ee4 MOV -0x8(%R9,%RDX,8),%R14 |
(987) 0x444ee9 TEST %R14,%R14 |
(987) 0x444eec JS 444f10 |
(987) 0x444eee MOV (%R15,%R14,8),%R10 |
(987) 0x444ef2 XOR %RSI,%R10 |
(987) 0x444ef5 CMP $-0x1,%R10 |
(987) 0x444ef9 JE 444f37 |
(987) 0x444efb LEA (%R15,%R14,8),%R12 |
(987) 0x444eff MOV -0x48(%RBP),%R10 |
(987) 0x444f03 MOV (%R10,%R13,8),%R10 |
(987) 0x444f07 MOV %R14,(%R10,%RCX,8) |
(987) 0x444f0b INC %RCX |
(987) 0x444f0e JMP 444f33 |
(987) 0x444f10 NOT %R14 |
(987) 0x444f13 MOV (%RBX,%R14,8),%R12 |
(987) 0x444f17 XOR %RSI,%R12 |
(987) 0x444f1a CMP $-0x1,%R12 |
(987) 0x444f1e JE 444f37 |
(987) 0x444f20 LEA (%RBX,%R14,8),%R12 |
(987) 0x444f24 MOV -0x40(%RBP),%R10 |
(987) 0x444f28 MOV (%R10,%R13,8),%R10 |
(987) 0x444f2c MOV %R14,(%R10,%RAX,8) |
(987) 0x444f30 INC %RAX |
(987) 0x444f33 MOV %RDI,(%R12) |
(987) 0x444f37 MOV (%R9,%RDX,8),%R14 |
(987) 0x444f3b TEST %R14,%R14 |
(987) 0x444f3e JS 444f70 |
(987) 0x444f40 MOV (%R15,%R14,8),%R10 |
(987) 0x444f44 XOR %RSI,%R10 |
(987) 0x444f47 CMP $-0x1,%R10 |
(987) 0x444f4b JE 444ed4 |
(987) 0x444f4d LEA (%R15,%R14,8),%R12 |
(987) 0x444f51 MOV -0x48(%RBP),%R10 |
(987) 0x444f55 MOV (%R10,%R13,8),%R10 |
(987) 0x444f59 MOV %R14,(%R10,%RCX,8) |
(987) 0x444f5d INC %RCX |
(987) 0x444f60 JMP 444ed0 |
(987) 0x444f70 NOT %R14 |
(987) 0x444f73 MOV (%RBX,%R14,8),%R10 |
(987) 0x444f77 XOR %RSI,%R10 |
(987) 0x444f7a CMP $-0x1,%R10 |
(987) 0x444f7e JE 444ed4 |
(987) 0x444f84 LEA (%RBX,%R14,8),%R12 |
(987) 0x444f88 MOV -0x40(%RBP),%R10 |
(987) 0x444f8c MOV (%R10,%R13,8),%R10 |
(987) 0x444f90 MOV %R14,(%R10,%RAX,8) |
(987) 0x444f94 INC %RAX |
(987) 0x444f97 JMP 444ed0 |
(986) 0x444f9c XOR %EDX,%EDX |
(986) 0x444f9e TESTB $0x1,-0x60(%RBP) |
(986) 0x444fa2 MOV -0x38(%RBP),%R11 |
(986) 0x444fa6 MOV -0x30(%RBP),%R8 |
(986) 0x444faa JE 445007 |
(986) 0x444fac ADD %RDX,%R10 |
(986) 0x444faf MOV -0x88(%RBP),%RDX |
(986) 0x444fb6 MOV (%RDX,%R10,8),%RDX |
(986) 0x444fba TEST %RDX,%RDX |
(986) 0x444fbd JS 444fe1 |
(986) 0x444fbf MOV (%R15,%RDX,8),%R9 |
(986) 0x444fc3 XOR %RSI,%R9 |
(986) 0x444fc6 CMP $-0x1,%R9 |
(986) 0x444fca JE 445007 |
(986) 0x444fcc LEA (%R15,%RDX,8),%R9 |
(986) 0x444fd0 MOV -0x48(%RBP),%R10 |
(986) 0x444fd4 MOV (%R10,%R13,8),%R10 |
(986) 0x444fd8 MOV %RDX,(%R10,%RCX,8) |
(986) 0x444fdc INC %RCX |
(986) 0x444fdf JMP 445004 |
(986) 0x444fe1 NOT %RDX |
(986) 0x444fe4 MOV (%RBX,%RDX,8),%R9 |
(986) 0x444fe8 XOR %RSI,%R9 |
(986) 0x444feb CMP $-0x1,%R9 |
(986) 0x444fef JE 445007 |
(986) 0x444ff1 LEA (%RBX,%RDX,8),%R9 |
(986) 0x444ff5 MOV -0x40(%RBP),%R10 |
(986) 0x444ff9 MOV (%R10,%R13,8),%R10 |
(986) 0x444ffd MOV %RDX,(%R10,%RAX,8) |
(986) 0x445001 INC %RAX |
(986) 0x445004 MOV %RDI,(%R9) |
(986) 0x445007 MOV -0xa8(%RBP),%RDX |
(986) 0x44500e MOV 0x8(%RDX,%RSI,8),%RDX |
(986) 0x445013 INC %R8 |
(986) 0x445016 CMP %RDX,%R8 |
(986) 0x445019 JL 444e4c |
0x44501f JMP 444b00 |
/scratch_na/users/xoserete/qaas_runs/171-415-3872/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1124 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.17 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.40 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 0.50 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 1.00 |
P10 cycles | 3.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.86 |
Stall cycles (UFS) | 0.53 |
Nb insns | 19.00 |
Nb uops | 19.00 |
Nb loads | 9.00 |
Nb stores | 1.00 |
Nb stack references | 5.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 25.26 |
Bytes prefetched | 0.00 |
Bytes loaded | 72.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.17 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.40 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 3.00 |
P2 cycles | 3.00 |
P3 cycles | 0.50 |
P4 cycles | 1.00 |
P5 cycles | 1.00 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 1.00 |
P10 cycles | 3.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.86 |
Stall cycles (UFS) | 0.53 |
Nb insns | 19.00 |
Nb uops | 19.00 |
Nb loads | 9.00 |
Nb stores | 1.00 |
Nb stack references | 5.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 25.26 |
Bytes prefetched | 0.00 |
Bytes loaded | 72.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1124 |
Module | exec |
nb instructions | 19 |
nb uops | 19 |
loop length | 85 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 3.00 | 3.00 | 0.50 | 1.00 | 1.00 | 0.50 | 0.50 | 0.50 | 1.00 | 3.00 |
cycles | 1.00 | 1.00 | 3.00 | 3.00 | 0.50 | 1.00 | 1.00 | 0.50 | 0.50 | 0.50 | 1.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.86 |
Stall cycles | 0.53 |
LM full (events) | 1.33 |
Front-end | 3.17 |
Dispatch | 3.00 |
Overall L1 | 3.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xd0(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 445024 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RSI,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 444b52 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa92> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%RSI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 444e4c <hypre_BoomerAMGBuildMultipass.extracted.34+0xd8c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 444b00 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa40> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 444b00 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa40> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1124 |
Module | exec |
nb instructions | 19 |
nb uops | 19 |
loop length | 85 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 3.00 | 3.00 | 0.50 | 1.00 | 1.00 | 0.50 | 0.50 | 0.50 | 1.00 | 3.00 |
cycles | 1.00 | 1.00 | 3.00 | 3.00 | 0.50 | 1.00 | 1.00 | 0.50 | 0.50 | 0.50 | 1.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.86 |
Stall cycles | 0.53 |
LM full (events) | 1.33 |
Front-end | 3.17 |
Dispatch | 3.00 |
Overall L1 | 3.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x80(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xd0(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 445024 <hypre_BoomerAMGBuildMultipass.extracted.34+0xf64> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x98(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RSI,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 444b52 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa92> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RDX,%RSI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 444e4c <hypre_BoomerAMGBuildMultipass.extracted.34+0xd8c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 444b00 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa40> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 444b00 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa40> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |