Loop Id: 1441 | Module: libparcsr_ls.so | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.04% |
---|
Loop Id: 1441 | Module: libparcsr_ls.so | Source: par_multi_interp.c:917-1125 [...] | Coverage: 0.04% |
---|
0x528d0 MOV -0x68(%RBP),%RDX |
0x528d4 INC %RDX |
0x528d7 CMP -0xe0(%RBP),%RDX |
0x528de JGE 52da7 |
0x528e4 MOV %RDX,-0x68(%RBP) |
0x528e8 MOV -0x38(%RBP),%RSI |
0x528ec MOV (%RSI,%RDX,8),%RSI |
0x528f0 MOV -0xa0(%RBP),%RDX |
0x528f7 MOV (%RDX,%RSI,8),%R9 |
0x528fb MOV %RSI,%R8 |
0x528fe NOT %R8 |
0x52901 MOV %R8,-0x30(%RBP) |
0x52905 CMP 0x8(%RDX,%RSI,8),%R9 |
0x5290a JGE 52c90 |
0x52910 MOV -0x110(%RBP),%RDX |
0x52917 MOV (%RDX),%R8 |
0x5291a MOV %R8,-0x40(%RBP) |
0x5291e JMP 52941 |
(1444) 0x52920 MOV -0x50(%RBP),%RDI |
(1444) 0x52924 MOV -0x60(%RBP),%R9 |
(1444) 0x52928 MOV -0x40(%RBP),%R8 |
(1444) 0x5292c INC %R9 |
(1444) 0x5292f MOV -0xa0(%RBP),%RDX |
(1444) 0x52936 CMP 0x8(%RDX,%RSI,8),%R9 |
(1444) 0x5293b JGE 52c90 |
(1444) 0x52941 MOV -0x138(%RBP),%RDX |
(1444) 0x52948 MOV (%RDX,%R9,8),%RBX |
(1444) 0x5294c MOV (%R15),%RDX |
(1444) 0x5294f DEC %RDX |
(1444) 0x52952 CMP %RDX,(%R8,%RBX,8) |
(1444) 0x52956 JNE 5292c |
(1444) 0x52958 MOV %R9,-0x60(%RBP) |
(1444) 0x5295c MOV -0xf8(%RBP),%RDX |
(1444) 0x52963 MOV (%RDX),%RDX |
(1444) 0x52966 MOV 0x8(%RDX,%RBX,8),%R10 |
(1444) 0x5296b TEST %R10,%R10 |
(1444) 0x5296e JLE 529c4 |
(1444) 0x52970 MOV -0x78(%RBP),%RDX |
(1444) 0x52974 MOV %RBX,-0x58(%RBP) |
(1444) 0x52978 MOV (%RDX,%RBX,8),%RDX |
(1444) 0x5297c ADD %RDX,%R10 |
(1444) 0x5297f MOV -0xa8(%RBP),%R8 |
(1444) 0x52986 MOV (%R8),%R9 |
(1444) 0x52989 LEA 0x1(%RDX),%R8 |
(1444) 0x5298d CMP %R8,%R10 |
(1444) 0x52990 CMOVLE %R8,%R10 |
(1444) 0x52994 MOV %R10,-0xf0(%RBP) |
(1444) 0x5299b SUB %RDX,%R10 |
(1444) 0x5299e CMP $0x4,%R10 |
(1444) 0x529a2 MOV %R10,-0x70(%RBP) |
(1444) 0x529a6 JAE 52a7a |
(1444) 0x529ac MOV -0x70(%RBP),%R10 |
(1444) 0x529b0 MOV %R10,%R8 |
(1444) 0x529b3 AND $-0x4,%R8 |
(1444) 0x529b7 CMP %R10,%R8 |
(1444) 0x529ba JNE 52b5c |
(1444) 0x529c0 MOV -0x58(%RBP),%RBX |
(1444) 0x529c4 MOV -0x100(%RBP),%RDX |
(1444) 0x529cb MOV (%RDX),%RDX |
(1444) 0x529ce MOV 0x8(%RDX,%RBX,8),%R10 |
(1444) 0x529d3 TEST %R10,%R10 |
(1444) 0x529d6 JLE 52924 |
(1444) 0x529dc MOV -0xe8(%RBP),%RDX |
(1444) 0x529e3 MOV (%RDX),%RDX |
(1444) 0x529e6 MOV (%RDX,%RBX,8),%RDX |
(1444) 0x529ea ADD %RDX,%R10 |
(1444) 0x529ed MOV -0x80(%RBP),%R8 |
(1444) 0x529f1 MOV (%R8),%R9 |
(1444) 0x529f4 LEA 0x1(%RDX),%R8 |
(1444) 0x529f8 CMP %R8,%R10 |
(1444) 0x529fb CMOVLE %R8,%R10 |
(1444) 0x529ff MOV %R10,-0x70(%RBP) |
(1444) 0x52a03 SUB %RDX,%R10 |
(1444) 0x52a06 CMP $0x4,%R10 |
(1444) 0x52a0a MOV %R10,-0x58(%RBP) |
(1444) 0x52a0e JAE 52baa |
(1444) 0x52a14 MOV -0x58(%RBP),%RDI |
(1444) 0x52a18 MOV %RDI,%R8 |
(1444) 0x52a1b AND $-0x4,%R8 |
(1444) 0x52a1f CMP %RDI,%R8 |
(1444) 0x52a22 JE 52920 |
(1444) 0x52a28 ADD %R8,%RDX |
(1444) 0x52a2b MOV -0x50(%RBP),%RDI |
(1444) 0x52a2f MOV -0x70(%RBP),%R14 |
(1444) 0x52a33 MOV -0x48(%RBP),%RBX |
(1444) 0x52a37 JMP 52a4c |
(1445) 0x52a40 INC %RDX |
(1445) 0x52a43 CMP %RDX,%R14 |
(1445) 0x52a46 JE 52924 |
(1445) 0x52a4c MOV (%R15),%R10 |
(1445) 0x52a4f MOV -0x8(%R9,%R10,8),%R8 |
(1445) 0x52a54 MOV (%R8,%RDX,8),%R8 |
(1445) 0x52a58 MOV (%RBX,%R8,8),%R11 |
(1445) 0x52a5c XOR %RSI,%R11 |
(1445) 0x52a5f CMP $-0x1,%R11 |
(1445) 0x52a63 JE 52a40 |
(1445) 0x52a65 MOV (%R9,%R10,8),%R10 |
(1445) 0x52a69 MOV %R8,(%R10,%RCX,8) |
(1445) 0x52a6d INC %RCX |
(1445) 0x52a70 MOV -0x30(%RBP),%R10 |
(1445) 0x52a74 MOV %R10,(%RBX,%R8,8) |
(1445) 0x52a78 JMP 52a40 |
(1444) 0x52a7a MOV %R10,%R13 |
(1444) 0x52a7d SHR $0x2,%R13 |
(1444) 0x52a81 LEA (,%RDX,8),%R12 |
(1444) 0x52a89 JMP 52a9d |
(1448) 0x52a90 ADD $0x20,%R12 |
(1448) 0x52a94 DEC %R13 |
(1448) 0x52a97 JE 529ac |
(1448) 0x52a9d MOV (%R15),%R10 |
(1448) 0x52aa0 MOV -0x8(%R9,%R10,8),%R8 |
(1448) 0x52aa5 MOV (%R8,%R12,1),%R11 |
(1448) 0x52aa9 MOV (%RDI,%R11,8),%RBX |
(1448) 0x52aad XOR %RSI,%RBX |
(1448) 0x52ab0 CMP $-0x1,%RBX |
(1448) 0x52ab4 JE 52ad4 |
(1448) 0x52ab6 MOV %R15,%R14 |
(1448) 0x52ab9 MOV (%R9,%R10,8),%R8 |
(1448) 0x52abd MOV %R11,(%R8,%RAX,8) |
(1448) 0x52ac1 INC %RAX |
(1448) 0x52ac4 MOV -0x30(%RBP),%R8 |
(1448) 0x52ac8 MOV %R8,(%RDI,%R11,8) |
(1448) 0x52acc MOV (%R15),%R10 |
(1448) 0x52acf MOV -0x8(%R9,%R10,8),%R8 |
(1448) 0x52ad4 MOV 0x8(%R8,%R12,1),%R11 |
(1448) 0x52ad9 MOV (%RDI,%R11,8),%RBX |
(1448) 0x52add XOR %RSI,%RBX |
(1448) 0x52ae0 CMP $-0x1,%RBX |
(1448) 0x52ae4 JE 52b01 |
(1448) 0x52ae6 MOV (%R9,%R10,8),%R8 |
(1448) 0x52aea MOV %R11,(%R8,%RAX,8) |
(1448) 0x52aee INC %RAX |
(1448) 0x52af1 MOV -0x30(%RBP),%R8 |
(1448) 0x52af5 MOV %R8,(%RDI,%R11,8) |
(1448) 0x52af9 MOV (%R15),%R10 |
(1448) 0x52afc MOV -0x8(%R9,%R10,8),%R8 |
(1448) 0x52b01 MOV 0x10(%R8,%R12,1),%R11 |
(1448) 0x52b06 MOV (%RDI,%R11,8),%RBX |
(1448) 0x52b0a XOR %RSI,%RBX |
(1448) 0x52b0d CMP $-0x1,%RBX |
(1448) 0x52b11 JE 52b2e |
(1448) 0x52b13 MOV (%R9,%R10,8),%R8 |
(1448) 0x52b17 MOV %R11,(%R8,%RAX,8) |
(1448) 0x52b1b INC %RAX |
(1448) 0x52b1e MOV -0x30(%RBP),%R8 |
(1448) 0x52b22 MOV %R8,(%RDI,%R11,8) |
(1448) 0x52b26 MOV (%R15),%R10 |
(1448) 0x52b29 MOV -0x8(%R9,%R10,8),%R8 |
(1448) 0x52b2e MOV 0x18(%R8,%R12,1),%R8 |
(1448) 0x52b33 MOV (%RDI,%R8,8),%R11 |
(1448) 0x52b37 XOR %RSI,%R11 |
(1448) 0x52b3a CMP $-0x1,%R11 |
(1448) 0x52b3e JE 52a90 |
(1448) 0x52b44 MOV (%R9,%R10,8),%R10 |
(1448) 0x52b48 MOV %R8,(%R10,%RAX,8) |
(1448) 0x52b4c INC %RAX |
(1448) 0x52b4f MOV -0x30(%RBP),%R10 |
(1448) 0x52b53 MOV %R10,(%RDI,%R8,8) |
(1448) 0x52b57 JMP 52a90 |
(1444) 0x52b5c ADD %R8,%RDX |
(1444) 0x52b5f MOV -0x58(%RBP),%RBX |
(1444) 0x52b63 MOV -0xf0(%RBP),%R14 |
(1444) 0x52b6a JMP 52b7c |
(1447) 0x52b70 INC %RDX |
(1447) 0x52b73 CMP %RDX,%R14 |
(1447) 0x52b76 JE 529c4 |
(1447) 0x52b7c MOV (%R15),%R10 |
(1447) 0x52b7f MOV -0x8(%R9,%R10,8),%R8 |
(1447) 0x52b84 MOV (%R8,%RDX,8),%R8 |
(1447) 0x52b88 MOV (%RDI,%R8,8),%R11 |
(1447) 0x52b8c XOR %RSI,%R11 |
(1447) 0x52b8f CMP $-0x1,%R11 |
(1447) 0x52b93 JE 52b70 |
(1447) 0x52b95 MOV (%R9,%R10,8),%R10 |
(1447) 0x52b99 MOV %R8,(%R10,%RAX,8) |
(1447) 0x52b9d INC %RAX |
(1447) 0x52ba0 MOV -0x30(%RBP),%R10 |
(1447) 0x52ba4 MOV %R10,(%RDI,%R8,8) |
(1447) 0x52ba8 JMP 52b70 |
(1444) 0x52baa MOV %R10,%R12 |
(1444) 0x52bad SHR $0x2,%R12 |
(1444) 0x52bb1 LEA (,%RDX,8),%R13 |
(1444) 0x52bb9 MOV -0x48(%RBP),%R14 |
(1444) 0x52bbd JMP 52bcd |
(1446) 0x52bc0 ADD $0x20,%R13 |
(1446) 0x52bc4 DEC %R12 |
(1446) 0x52bc7 JE 52a14 |
(1446) 0x52bcd MOV (%R15),%R10 |
(1446) 0x52bd0 MOV -0x8(%R9,%R10,8),%R8 |
(1446) 0x52bd5 MOV (%R8,%R13,1),%R11 |
(1446) 0x52bd9 MOV (%R14,%R11,8),%RBX |
(1446) 0x52bdd XOR %RSI,%RBX |
(1446) 0x52be0 CMP $-0x1,%RBX |
(1446) 0x52be4 JE 52c04 |
(1446) 0x52be6 MOV %R15,%RDI |
(1446) 0x52be9 MOV (%R9,%R10,8),%R8 |
(1446) 0x52bed MOV %R11,(%R8,%RCX,8) |
(1446) 0x52bf1 INC %RCX |
(1446) 0x52bf4 MOV -0x30(%RBP),%R8 |
(1446) 0x52bf8 MOV %R8,(%R14,%R11,8) |
(1446) 0x52bfc MOV (%R15),%R10 |
(1446) 0x52bff MOV -0x8(%R9,%R10,8),%R8 |
(1446) 0x52c04 MOV 0x8(%R8,%R13,1),%R11 |
(1446) 0x52c09 MOV (%R14,%R11,8),%RBX |
(1446) 0x52c0d XOR %RSI,%RBX |
(1446) 0x52c10 CMP $-0x1,%RBX |
(1446) 0x52c14 JE 52c31 |
(1446) 0x52c16 MOV (%R9,%R10,8),%R8 |
(1446) 0x52c1a MOV %R11,(%R8,%RCX,8) |
(1446) 0x52c1e INC %RCX |
(1446) 0x52c21 MOV -0x30(%RBP),%RDI |
(1446) 0x52c25 MOV %RDI,(%R14,%R11,8) |
(1446) 0x52c29 MOV (%R15),%R10 |
(1446) 0x52c2c MOV -0x8(%R9,%R10,8),%R8 |
(1446) 0x52c31 MOV 0x10(%R8,%R13,1),%R11 |
(1446) 0x52c36 MOV (%R14,%R11,8),%RBX |
(1446) 0x52c3a XOR %RSI,%RBX |
(1446) 0x52c3d CMP $-0x1,%RBX |
(1446) 0x52c41 JE 52c5e |
(1446) 0x52c43 MOV (%R9,%R10,8),%R8 |
(1446) 0x52c47 MOV %R11,(%R8,%RCX,8) |
(1446) 0x52c4b INC %RCX |
(1446) 0x52c4e MOV -0x30(%RBP),%RDI |
(1446) 0x52c52 MOV %RDI,(%R14,%R11,8) |
(1446) 0x52c56 MOV (%R15),%R10 |
(1446) 0x52c59 MOV -0x8(%R9,%R10,8),%R8 |
(1446) 0x52c5e MOV 0x18(%R8,%R13,1),%R8 |
(1446) 0x52c63 MOV (%R14,%R8,8),%R11 |
(1446) 0x52c67 XOR %RSI,%R11 |
(1446) 0x52c6a CMP $-0x1,%R11 |
(1446) 0x52c6e JE 52bc0 |
(1446) 0x52c74 MOV (%R9,%R10,8),%R10 |
(1446) 0x52c78 MOV %R8,(%R10,%RCX,8) |
(1446) 0x52c7c INC %RCX |
(1446) 0x52c7f MOV -0x30(%RBP),%RDI |
(1446) 0x52c83 MOV %RDI,(%R14,%R8,8) |
(1446) 0x52c87 JMP 52bc0 |
0x52c90 MOV -0x98(%RBP),%R8 |
0x52c97 MOV (%R8,%RSI,8),%RDX |
0x52c9b MOV 0x8(%R8,%RSI,8),%R9 |
0x52ca0 CMP %R9,%RDX |
0x52ca3 JGE 528d0 |
0x52ca9 MOV -0x48(%RBP),%R14 |
0x52cad JMP 52cc8 |
(1442) 0x52cb0 MOV -0x98(%RBP),%R8 |
(1442) 0x52cb7 MOV 0x8(%R8,%RSI,8),%R9 |
(1442) 0x52cbc INC %RDX |
(1442) 0x52cbf CMP %R9,%RDX |
(1442) 0x52cc2 JGE 528d0 |
(1442) 0x52cc8 MOV -0x140(%RBP),%R8 |
(1442) 0x52ccf MOV (%R8,%RDX,8),%R10 |
(1442) 0x52cd3 MOV (%R15),%R8 |
(1442) 0x52cd6 DEC %R8 |
(1442) 0x52cd9 MOV -0x130(%RBP),%R11 |
(1442) 0x52ce0 CMP %R8,(%R11,%R10,8) |
(1442) 0x52ce4 JNE 52cbc |
(1442) 0x52ce6 MOV -0x128(%RBP),%R8 |
(1442) 0x52ced MOV 0x8(%R8,%R10,8),%R8 |
(1442) 0x52cf2 TEST %R8,%R8 |
(1442) 0x52cf5 JLE 52cbc |
(1442) 0x52cf7 MOV -0x118(%RBP),%R9 |
(1442) 0x52cfe MOV (%R9,%R10,8),%R9 |
(1442) 0x52d02 ADD %R9,%R8 |
(1442) 0x52d05 MOV -0x120(%RBP),%R10 |
(1442) 0x52d0c MOV (%R10),%R10 |
(1442) 0x52d0f JMP 52d28 |
(1443) 0x52d20 INC %R9 |
(1443) 0x52d23 CMP %R8,%R9 |
(1443) 0x52d26 JGE 52cb0 |
(1443) 0x52d28 MOV (%R15),%R12 |
(1443) 0x52d2b MOV (%R10,%R12,8),%R11 |
(1443) 0x52d2f MOV (%R11,%R9,8),%R11 |
(1443) 0x52d33 TEST %R11,%R11 |
(1443) 0x52d36 JS 52d70 |
(1443) 0x52d38 MOV (%R14,%R11,8),%R13 |
(1443) 0x52d3c XOR %RSI,%R13 |
(1443) 0x52d3f CMP $-0x1,%R13 |
(1443) 0x52d43 JE 52d20 |
(1443) 0x52d45 MOV -0x80(%RBP),%RBX |
(1443) 0x52d49 MOV (%RBX),%R13 |
(1443) 0x52d4c MOV -0x50(%RBP),%RDI |
(1443) 0x52d50 MOV (%R13,%R12,8),%R12 |
(1443) 0x52d55 MOV %R11,(%R12,%RCX,8) |
(1443) 0x52d59 INC %RCX |
(1443) 0x52d5c MOV -0x30(%RBP),%RBX |
(1443) 0x52d60 MOV %RBX,(%R14,%R11,8) |
(1443) 0x52d64 JMP 52d20 |
(1443) 0x52d70 NOT %R11 |
(1443) 0x52d73 MOV (%RDI,%R11,8),%R13 |
(1443) 0x52d77 XOR %RSI,%R13 |
(1443) 0x52d7a CMP $-0x1,%R13 |
(1443) 0x52d7e JE 52d20 |
(1443) 0x52d80 MOV -0xa8(%RBP),%RBX |
(1443) 0x52d87 MOV (%RBX),%R13 |
(1443) 0x52d8a MOV -0x50(%RBP),%RDI |
(1443) 0x52d8e MOV (%R13,%R12,8),%R12 |
(1443) 0x52d93 MOV %R11,(%R12,%RAX,8) |
(1443) 0x52d97 INC %RAX |
(1443) 0x52d9a MOV -0x30(%RBP),%RBX |
(1443) 0x52d9e MOV %RBX,(%RDI,%R11,8) |
(1443) 0x52da2 JMP 52d20 |
/scratch_na/users/xoserete/qaas_runs/171-415-3872/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1125 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.89 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.33 |
CQA cycles if no scalar integer | 4.33 |
CQA cycles if FP arith vectorized | 4.33 |
CQA cycles if fully vectorized | 0.54 |
Front-end cycles | 4.33 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 1.40 |
P1 cycles | 4.33 |
P2 cycles | 4.33 |
P3 cycles | 1.50 |
P4 cycles | 1.40 |
P5 cycles | 1.50 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 1.20 |
P10 cycles | 4.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.45 |
Stall cycles (UFS) | 0.94 |
Nb insns | 25.00 |
Nb uops | 25.00 |
Nb loads | 13.00 |
Nb stores | 3.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 29.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.89 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source | par_multi_interp.c:1072-1075,par_multi_interp.c:1078-1078,par_multi_interp.c:1099-1099,par_multi_interp.c:1104-1104 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.33 |
CQA cycles if no scalar integer | 4.33 |
CQA cycles if FP arith vectorized | 4.33 |
CQA cycles if fully vectorized | 0.54 |
Front-end cycles | 4.33 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 1.40 |
P1 cycles | 4.33 |
P2 cycles | 4.33 |
P3 cycles | 1.50 |
P4 cycles | 1.40 |
P5 cycles | 1.50 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 1.20 |
P10 cycles | 4.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 5.45 |
Stall cycles (UFS) | 0.94 |
Nb insns | 25.00 |
Nb uops | 25.00 |
Nb loads | 13.00 |
Nb stores | 3.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 29.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 24.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | libparcsr_ls.so |
nb instructions | 25 |
nb uops | 25 |
loop length | 111 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 4.33 cycles |
front end | 4.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.40 | 4.33 | 4.33 | 1.50 | 1.40 | 1.50 | 1.50 | 1.50 | 1.50 | 1.20 | 4.33 |
cycles | 1.50 | 1.40 | 4.33 | 4.33 | 1.50 | 1.40 | 1.50 | 1.50 | 1.50 | 1.50 | 1.20 | 4.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.45 |
Stall cycles | 0.94 |
LM full (events) | 2.62 |
Front-end | 4.33 |
Dispatch | 4.33 |
Overall L1 | 4.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xe0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 52da7 <hypre_BoomerAMGBuildMultipass.extracted.34+0xed7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%RDX,%RSI,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 52c90 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x110(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 52941 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%RSI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R8,%RSI,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 528d0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa00> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 52cc8 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdf8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
Source file and lines | par_multi_interp.c:917-1125 |
Module | libparcsr_ls.so |
nb instructions | 25 |
nb uops | 25 |
loop length | 111 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 4.33 cycles |
front end | 4.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 1.40 | 4.33 | 4.33 | 1.50 | 1.40 | 1.50 | 1.50 | 1.50 | 1.50 | 1.20 | 4.33 |
cycles | 1.50 | 1.40 | 4.33 | 4.33 | 1.50 | 1.40 | 1.50 | 1.50 | 1.50 | 1.50 | 1.20 | 4.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 5.45 |
Stall cycles | 0.94 |
LM full (events) | 2.62 |
Front-end | 4.33 |
Dispatch | 4.33 |
Overall L1 | 4.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0xe0(%RBP),%RDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 52da7 <hypre_BoomerAMGBuildMultipass.extracted.34+0xed7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RSI,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP 0x8(%RDX,%RSI,8),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JGE 52c90 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x110(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 52941 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x98(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%RSI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R8,%RSI,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 528d0 <hypre_BoomerAMGBuildMultipass.extracted.34+0xa00> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x48(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 52cc8 <hypre_BoomerAMGBuildMultipass.extracted.34+0xdf8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |