Loop Id: 1312 | Module: exec | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.04% |
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Loop Id: 1312 | Module: exec | Source: par_lr_interp.c:1221-1675 [...] | Coverage: 0.04% |
---|
0x454180 MOV (%RSI,%R11,8),%R15 |
0x454184 MOV (%RBX,%R15,8),%RAX |
0x454188 CMP %R9,%RAX |
0x45418b JGE 4545f0 |
0x454191 CMP -0x50(%RBP),%RAX |
0x454195 JNE 454630 |
0x45419b MOV -0x1a8(%RBP),%RCX |
0x4541a2 MOV (%RCX,%R15,8),%RDI |
0x4541a6 VXORPD %XMM10,%XMM10,%XMM10 |
0x4541ab XOR %EAX,%EAX |
0x4541ad MOV -0xa0(%RBP),%RDX |
0x4541b4 VUCOMISD (%RDX,%RDI,8),%XMM10 |
0x4541b9 MOV 0x8(%RCX,%R15,8),%R12 |
0x4541be SETBE %AL |
0x4541c1 LEA -0x1(%RAX,%RAX,1),%RAX |
0x4541c6 MOV %RAX,-0xb0(%RBP) |
0x4541cd LEA 0x1(%RDI),%RAX |
0x4541d1 CMP %R12,%RAX |
0x4541d4 MOV %RDI,-0x148(%RBP) |
0x4541db JGE 4542c0 |
0x4541e1 VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 |
0x4541e8 MOV %RDI,%RSI |
0x4541eb NOT %RSI |
0x4541ee ADD %R12,%RSI |
0x4541f1 MOV %RSI,%RDX |
0x4541f4 AND $-0x4,%RDX |
0x4541f8 JE 454682 |
0x4541fe MOV %RDI,%R14 |
0x454201 LEA -0x1(%RDX),%RDI |
0x454205 VBROADCASTSD %XMM11,%YMM12 |
0x45420a MOV -0x58(%RBP),%RCX |
0x45420e LEA (%RCX,%R14,8),%R13 |
0x454212 MOV -0x78(%RBP),%RCX |
0x454216 LEA (%RCX,%R14,8),%RCX |
0x45421a VXORPD %XMM10,%XMM10,%XMM10 |
0x45421f XOR %R14D,%R14D |
0x454222 NOPW %CS:(%RAX,%RAX,1) |
(1319) 0x454230 VMOVDQU (%RCX,%R14,8),%YMM13 |
(1319) 0x454236 VPXOR %XMM14,%XMM14,%XMM14 |
(1319) 0x45423b KXNORW %K0,%K0,%K1 |
(1319) 0x45423f VPGATHERQQ (%RBX,%YMM13,8),%YMM14{%K1} |
(1319) 0x454246 VPCMPNLTQ %YMM7,%YMM14,%K0 |
(1319) 0x45424d VPCMPEQQ %YMM8,%YMM13,%K1 |
(1319) 0x454253 KORW %K1,%K0,%K1 |
(1319) 0x454257 VMOVUPD (%R13,%R14,8),%YMM13{%K1}{z} |
(1319) 0x45425f VMULPD %YMM12,%YMM13,%YMM14 |
(1319) 0x454264 VCMPPD $0x1,%YMM2,%YMM14,%K1{%K1} |
(1319) 0x45426b VADDPD %YMM13,%YMM10,%YMM10{%K1} |
(1319) 0x454271 ADD $0x4,%R14 |
(1319) 0x454275 CMP %RDI,%R14 |
(1319) 0x454278 JBE 454230 |
0x45427a VEXTRACTF128 $0x1,%YMM10,%XMM12 |
0x454280 VADDPD %XMM12,%XMM10,%XMM10 |
0x454285 VSHUFPD $0x1,%XMM10,%XMM10,%XMM12 |
0x45428b VADDSD %XMM12,%XMM10,%XMM10 |
0x454290 CMP %RDX,%RSI |
0x454293 MOV -0x130(%RBP),%R13 |
0x45429a MOV -0x68(%RBP),%RSI |
0x45429e MOV -0xf8(%RBP),%R14 |
0x4542a5 MOV -0x148(%RBP),%RDI |
0x4542ac JNE 454688 |
0x4542b2 NOPW %CS:(%RAX,%RAX,1) |
0x4542c0 MOV -0xc8(%RBP),%RCX |
0x4542c7 MOV (%RCX),%RCX |
0x4542ca CMP $0x2,%RCX |
0x4542ce MOV %RCX,-0x140(%RBP) |
0x4542d5 JL 4543d0 |
0x4542db MOV -0x178(%RBP),%RCX |
0x4542e2 MOV (%RCX,%R15,8),%RSI |
0x4542e6 MOV 0x8(%RCX,%R15,8),%RDX |
0x4542eb MOV %RDX,%RDI |
0x4542ee SUB %RSI,%RDI |
0x4542f1 JLE 4543d0 |
0x4542f7 MOV %RSI,-0xf0(%RBP) |
0x4542fe VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 |
0x454305 MOV %RDI,%RSI |
0x454308 AND $-0x4,%RSI |
0x45430c JE 4546dd |
0x454312 LEA -0x1(%RSI),%RCX |
0x454316 VBROADCASTSD %XMM11,%YMM13 |
0x45431b MOV -0x80(%RBP),%R8 |
0x45431f MOV -0xf0(%RBP),%R10 |
0x454326 LEA (%R8,%R10,8),%R13 |
0x45432a MOV -0xd8(%RBP),%R8 |
0x454331 MOV %R14,%R10 |
0x454334 MOV -0xf0(%RBP),%R14 |
0x45433b LEA (%R8,%R14,8),%R14 |
0x45433f VXORPD %XMM12,%XMM12,%XMM12 |
0x454344 XOR %R8D,%R8D |
0x454347 NOPW (%RAX,%RAX,1) |
(1317) 0x454350 VMOVDQU (%R14,%R8,8),%YMM14 |
(1317) 0x454356 VPXOR %XMM15,%XMM15,%XMM15 |
(1317) 0x45435b KXNORW %K0,%K0,%K1 |
(1317) 0x45435f VPGATHERQQ (%R10,%YMM14,8),%YMM15{%K1} |
(1317) 0x454366 VPCMPNLTQ %YMM9,%YMM15,%K1 |
(1317) 0x45436d VMOVUPD (%R13,%R8,8),%YMM14{%K1}{z} |
(1317) 0x454375 VMULPD %YMM13,%YMM14,%YMM15 |
(1317) 0x45437a VCMPPD $0x1,%YMM2,%YMM15,%K1{%K1} |
(1317) 0x454381 VADDPD %YMM14,%YMM12,%YMM12{%K1} |
(1317) 0x454387 ADD $0x4,%R8 |
(1317) 0x45438b CMP %RCX,%R8 |
(1317) 0x45438e JBE 454350 |
0x454390 VEXTRACTF128 $0x1,%YMM12,%XMM13 |
0x454396 VADDPD %XMM13,%XMM12,%XMM12 |
0x45439b VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 |
0x4543a1 VADDSD %XMM13,%XMM12,%XMM12 |
0x4543a6 VADDSD %XMM12,%XMM10,%XMM10 |
0x4543ab CMP %RSI,%RDI |
0x4543ae MOV -0x130(%RBP),%R13 |
0x4543b5 MOV %R10,%R14 |
0x4543b8 MOV -0x60(%RBP),%R10 |
0x4543bc MOV -0x128(%RBP),%R8 |
0x4543c3 JNE 4546df |
0x4543c9 NOPL (%RAX) |
0x4543d0 VUCOMISD %XMM0,%XMM10 |
0x4543d4 MOV -0xa0(%RBP),%RCX |
0x4543db VMOVSD (%RCX,%R11,8),%XMM11 |
0x4543e1 JE 454668 |
0x4543e7 VDIVSD %XMM10,%XMM11,%XMM10 |
0x4543ec CMP %R12,%RAX |
0x4543ef MOV -0x68(%RBP),%RSI |
0x4543f3 JGE 45448d |
0x4543f9 VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 |
0x454400 MOV -0x148(%RBP),%RDI |
0x454407 MOV %EDI,%ECX |
0x454409 NOT %ECX |
0x45440b ADD %R12D,%ECX |
0x45440e TEST $0x1,%CL |
0x454411 JE 454483 |
0x454413 MOV 0x8(%RSI,%RDI,8),%RAX |
0x454418 MOV (%RBX,%RAX,8),%RCX |
0x45441c CMP %R9,%RCX |
0x45441f JL 45444e |
0x454421 MOV -0xa0(%RBP),%RDX |
0x454428 VMOVSD 0x8(%RDX,%RDI,8),%XMM12 |
0x45442e VMULSD %XMM11,%XMM12,%XMM13 |
0x454433 VUCOMISD %XMM0,%XMM13 |
0x454437 JAE 45444e |
0x454439 MOV -0x88(%RBP),%RDX |
0x454440 MOV (%RDX),%RDX |
0x454443 VFMADD213SD (%RDX,%RCX,8),%XMM10,%XMM12 |
0x454449 VMOVSD %XMM12,(%RDX,%RCX,8) |
0x45444e CMP %R10,%RAX |
0x454451 JNE 45447f |
0x454453 MOV -0xa0(%RBP),%RAX |
0x45445a VMOVSD 0x8(%RAX,%RDI,8),%XMM12 |
0x454460 VMULSD %XMM11,%XMM12,%XMM13 |
0x454465 VMULSD %XMM10,%XMM12,%XMM12 |
0x45446a VCMPSD $0x1,%XMM0,%XMM13,%K1 |
0x454471 VMOVAPD %XMM1,%XMM13 |
0x454475 VMOVSD %XMM12,%XMM13,%XMM13{%K1} |
0x45447b VADDSD %XMM6,%XMM13,%XMM6 |
0x45447f LEA 0x2(%RDI),%RAX |
0x454483 LEA -0x2(%R12),%RCX |
0x454488 CMP %RDI,%RCX |
0x45448b JNE 454509 |
0x45448d CMPQ $0x2,-0x140(%RBP) |
0x454495 JL 454679 |
0x45449b MOV -0x178(%RBP),%RCX |
0x4544a2 MOV (%RCX,%R15,8),%RAX |
0x4544a6 MOV 0x8(%RCX,%R15,8),%RCX |
0x4544ab MOV %RCX,%RSI |
0x4544ae SUB %RAX,%RSI |
0x4544b1 MOV -0xa8(%RBP),%R12 |
0x4544b8 JLE 4546d4 |
0x4544be VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 |
0x4544c5 CMP $0x4,%RSI |
0x4544c9 JAE 454733 |
0x4544cf MOV %RSI,%RDX |
0x4544d2 AND $-0x4,%RDX |
0x4544d6 CMP %RSI,%RDX |
0x4544d9 JNE 454858 |
0x4544df MOV -0x68(%RBP),%RSI |
0x4544e3 MOV -0x38(%RBP),%R15 |
0x4544e7 MOV -0x128(%RBP),%R8 |
0x4544ee JMP 454615 |
(1315) 0x454500 ADD $0x2,%RAX |
(1315) 0x454504 CMP %RAX,%R12 |
(1315) 0x454507 JE 45448d |
(1315) 0x454509 MOV -0x78(%RBP),%RCX |
(1315) 0x45450d MOV -0x8(%RCX,%RAX,8),%RCX |
(1315) 0x454512 MOV (%RBX,%RCX,8),%RDX |
(1315) 0x454516 CMP %R9,%RDX |
(1315) 0x454519 JL 454549 |
(1315) 0x45451b MOV -0x58(%RBP),%RDI |
(1315) 0x45451f VMOVSD -0x8(%RDI,%RAX,8),%XMM12 |
(1315) 0x454525 VMULSD %XMM11,%XMM12,%XMM13 |
(1315) 0x45452a VUCOMISD %XMM0,%XMM13 |
(1315) 0x45452e JAE 454549 |
(1315) 0x454530 MOV -0x88(%RBP),%RSI |
(1315) 0x454537 MOV (%RSI),%RSI |
(1315) 0x45453a VFMADD213SD (%RSI,%RDX,8),%XMM10,%XMM12 |
(1315) 0x454540 VMOVSD %XMM12,(%RSI,%RDX,8) |
(1315) 0x454545 MOV -0x68(%RBP),%RSI |
(1315) 0x454549 CMP %R10,%RCX |
(1315) 0x45454c JNE 454577 |
(1315) 0x45454e MOV -0x58(%RBP),%RCX |
(1315) 0x454552 VMOVSD -0x8(%RCX,%RAX,8),%XMM12 |
(1315) 0x454558 VMULSD %XMM11,%XMM12,%XMM13 |
(1315) 0x45455d VMULSD %XMM10,%XMM12,%XMM12 |
(1315) 0x454562 VCMPSD $0x1,%XMM0,%XMM13,%K1 |
(1315) 0x454569 VMOVAPD %XMM1,%XMM13 |
(1315) 0x45456d VMOVSD %XMM12,%XMM13,%XMM13{%K1} |
(1315) 0x454573 VADDSD %XMM6,%XMM13,%XMM6 |
(1315) 0x454577 MOV -0x78(%RBP),%RCX |
(1315) 0x45457b MOV (%RCX,%RAX,8),%RCX |
(1315) 0x45457f MOV (%RBX,%RCX,8),%RDX |
(1315) 0x454583 CMP %R9,%RDX |
(1315) 0x454586 JL 4545b5 |
(1315) 0x454588 MOV -0x58(%RBP),%RDI |
(1315) 0x45458c VMOVSD (%RDI,%RAX,8),%XMM12 |
(1315) 0x454591 VMULSD %XMM11,%XMM12,%XMM13 |
(1315) 0x454596 VUCOMISD %XMM0,%XMM13 |
(1315) 0x45459a JAE 4545b5 |
(1315) 0x45459c MOV -0x88(%RBP),%RSI |
(1315) 0x4545a3 MOV (%RSI),%RSI |
(1315) 0x4545a6 VFMADD213SD (%RSI,%RDX,8),%XMM10,%XMM12 |
(1315) 0x4545ac VMOVSD %XMM12,(%RSI,%RDX,8) |
(1315) 0x4545b1 MOV -0x68(%RBP),%RSI |
(1315) 0x4545b5 CMP %R10,%RCX |
(1315) 0x4545b8 JNE 454500 |
(1315) 0x4545be MOV -0x58(%RBP),%RCX |
(1315) 0x4545c2 VMOVSD (%RCX,%RAX,8),%XMM12 |
(1315) 0x4545c7 VMULSD %XMM11,%XMM12,%XMM13 |
(1315) 0x4545cc VMULSD %XMM10,%XMM12,%XMM12 |
(1315) 0x4545d1 VCMPSD $0x1,%XMM0,%XMM13,%K1 |
(1315) 0x4545d8 VMOVAPD %XMM1,%XMM13 |
(1315) 0x4545dc VMOVSD %XMM12,%XMM13,%XMM13{%K1} |
(1315) 0x4545e2 VADDSD %XMM6,%XMM13,%XMM6 |
(1315) 0x4545e6 JMP 454500 |
0x4545f0 MOV -0x88(%RBP),%RCX |
0x4545f7 MOV (%RCX),%RCX |
0x4545fa VMOVSD (%RCX,%RAX,8),%XMM10 |
0x4545ff MOV -0xa0(%RBP),%RDX |
0x454606 VADDSD (%RDX,%R11,8),%XMM10,%XMM10 |
0x45460c VMOVSD %XMM10,(%RCX,%RAX,8) |
0x454611 MOV -0x38(%RBP),%R15 |
0x454615 INC %R11 |
0x454618 CMP %R8,%R11 |
0x45461b JNE 454180 |
0x454630 MOV -0xe8(%RBP),%RAX |
0x454637 CMPQ $-0x3,(%RAX,%R15,8) |
0x45463c JE 454611 |
0x45463e CMPQ $0x1,-0x1a0(%RBP) |
0x454646 JE 454659 |
0x454648 MOV -0x198(%RBP),%RCX |
0x45464f MOV (%RCX,%R10,8),%RAX |
0x454653 CMP (%RCX,%R15,8),%RAX |
0x454657 JNE 454611 |
0x454659 MOV -0xa0(%RBP),%RAX |
0x454660 VADDSD (%RAX,%R11,8),%XMM6,%XMM6 |
0x454666 JMP 454611 |
0x454668 VADDSD %XMM6,%XMM11,%XMM6 |
0x45466c MOV -0xa8(%RBP),%R12 |
0x454673 MOV -0x68(%RBP),%RSI |
0x454677 JMP 454611 |
0x454679 MOV -0xa8(%RBP),%R12 |
0x454680 JMP 454611 |
0x454682 XOR %EDX,%EDX |
0x454684 MOV -0x68(%RBP),%RSI |
0x454688 LEA 0x1(%RDX,%RDI,1),%RDX |
0x45468d JMP 4546c3 |
(1318) 0x454690 MOV -0xa0(%RBP),%RCX |
(1318) 0x454697 VMOVSD (%RCX,%RDX,8),%XMM12 |
(1318) 0x45469c VMULSD %XMM11,%XMM12,%XMM13 |
(1318) 0x4546a1 VCMPSD $0x1,%XMM0,%XMM13,%K1 |
(1318) 0x4546a8 VMOVAPD %XMM1,%XMM13 |
(1318) 0x4546ac VMOVSD %XMM12,%XMM13,%XMM13{%K1} |
(1318) 0x4546b2 VADDSD %XMM10,%XMM13,%XMM10 |
(1318) 0x4546b7 INC %RDX |
(1318) 0x4546ba CMP %RDX,%R12 |
(1318) 0x4546bd JE 4542c0 |
(1318) 0x4546c3 MOV (%RSI,%RDX,8),%RCX |
(1318) 0x4546c7 CMP %R10,%RCX |
(1318) 0x4546ca JE 454690 |
(1318) 0x4546cc CMP %R9,(%RBX,%RCX,8) |
(1318) 0x4546d0 JL 4546b7 |
(1318) 0x4546d2 JMP 454690 |
0x4546d4 MOV -0x68(%RBP),%RSI |
0x4546d8 JMP 454611 |
0x4546dd XOR %ESI,%ESI |
0x4546df ADD -0xf0(%RBP),%RSI |
0x4546e6 MOV -0x30(%RBP),%RDI |
0x4546ea JMP 4546fc |
(1316) 0x4546f0 INC %RSI |
(1316) 0x4546f3 CMP %RSI,%RDX |
(1316) 0x4546f6 JE 4543d0 |
(1316) 0x4546fc MOV -0xd8(%RBP),%RCX |
(1316) 0x454703 MOV (%RCX,%RSI,8),%RCX |
(1316) 0x454707 CMP %RDI,(%R14,%RCX,8) |
(1316) 0x45470b JL 4546f0 |
(1316) 0x45470d MOV -0x80(%RBP),%RCX |
(1316) 0x454711 VMOVSD (%RCX,%RSI,8),%XMM12 |
(1316) 0x454716 VMULSD %XMM11,%XMM12,%XMM13 |
(1316) 0x45471b VCMPSD $0x1,%XMM0,%XMM13,%K1 |
(1316) 0x454722 VMOVAPD %XMM1,%XMM13 |
(1316) 0x454726 VMOVSD %XMM12,%XMM13,%XMM13{%K1} |
(1316) 0x45472c VADDSD %XMM10,%XMM13,%XMM10 |
(1316) 0x454731 JMP 4546f0 |
0x454733 MOV %RSI,%RDX |
0x454736 SHR $0x2,%RDX |
0x45473a LEA 0x18(,%RAX,8),%R15 |
0x454742 JMP 45475d |
(1314) 0x454750 ADD $0x20,%R15 |
(1314) 0x454754 DEC %RDX |
(1314) 0x454757 JE 4544cf |
(1314) 0x45475d MOV -0xd8(%RBP),%RDI |
(1314) 0x454764 MOV -0x18(%RDI,%R15,1),%RDI |
(1314) 0x454769 MOV (%R14,%RDI,8),%RDI |
(1314) 0x45476d CMP -0x30(%RBP),%RDI |
(1314) 0x454771 JL 454799 |
(1314) 0x454773 MOV -0x80(%RBP),%R8 |
(1314) 0x454777 VMOVSD -0x18(%R8,%R15,1),%XMM12 |
(1314) 0x45477e VMULSD %XMM11,%XMM12,%XMM13 |
(1314) 0x454783 VUCOMISD %XMM0,%XMM13 |
(1314) 0x454787 JAE 454799 |
(1314) 0x454789 MOV (%R13),%R8 |
(1314) 0x45478d VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1314) 0x454793 VMOVSD %XMM12,(%R8,%RDI,8) |
(1314) 0x454799 MOV -0xd8(%RBP),%RDI |
(1314) 0x4547a0 MOV -0x10(%RDI,%R15,1),%RDI |
(1314) 0x4547a5 MOV (%R14,%RDI,8),%RDI |
(1314) 0x4547a9 CMP -0x30(%RBP),%RDI |
(1314) 0x4547ad JL 4547d5 |
(1314) 0x4547af MOV -0x80(%RBP),%R8 |
(1314) 0x4547b3 VMOVSD -0x10(%R8,%R15,1),%XMM12 |
(1314) 0x4547ba VMULSD %XMM11,%XMM12,%XMM13 |
(1314) 0x4547bf VUCOMISD %XMM0,%XMM13 |
(1314) 0x4547c3 JAE 4547d5 |
(1314) 0x4547c5 MOV (%R13),%R8 |
(1314) 0x4547c9 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1314) 0x4547cf VMOVSD %XMM12,(%R8,%RDI,8) |
(1314) 0x4547d5 MOV -0xd8(%RBP),%RDI |
(1314) 0x4547dc MOV -0x8(%RDI,%R15,1),%RDI |
(1314) 0x4547e1 MOV (%R14,%RDI,8),%RDI |
(1314) 0x4547e5 CMP -0x30(%RBP),%RDI |
(1314) 0x4547e9 JL 454811 |
(1314) 0x4547eb MOV -0x80(%RBP),%R8 |
(1314) 0x4547ef VMOVSD -0x8(%R8,%R15,1),%XMM12 |
(1314) 0x4547f6 VMULSD %XMM11,%XMM12,%XMM13 |
(1314) 0x4547fb VUCOMISD %XMM0,%XMM13 |
(1314) 0x4547ff JAE 454811 |
(1314) 0x454801 MOV (%R13),%R8 |
(1314) 0x454805 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1314) 0x45480b VMOVSD %XMM12,(%R8,%RDI,8) |
(1314) 0x454811 MOV -0xd8(%RBP),%RDI |
(1314) 0x454818 MOV (%RDI,%R15,1),%RDI |
(1314) 0x45481c MOV (%R14,%RDI,8),%RDI |
(1314) 0x454820 CMP -0x30(%RBP),%RDI |
(1314) 0x454824 JL 454750 |
(1314) 0x45482a MOV -0x80(%RBP),%R8 |
(1314) 0x45482e VMOVSD (%R8,%R15,1),%XMM12 |
(1314) 0x454834 VMULSD %XMM11,%XMM12,%XMM13 |
(1314) 0x454839 VUCOMISD %XMM0,%XMM13 |
(1314) 0x45483d JAE 454750 |
(1314) 0x454843 MOV (%R13),%R8 |
(1314) 0x454847 VFMADD213SD (%R8,%RDI,8),%XMM10,%XMM12 |
(1314) 0x45484d VMOVSD %XMM12,(%R8,%RDI,8) |
(1314) 0x454853 JMP 454750 |
0x454858 ADD %RDX,%RAX |
0x45485b MOV -0x68(%RBP),%RSI |
0x45485f MOV -0x38(%RBP),%R15 |
0x454863 MOV -0x128(%RBP),%R8 |
0x45486a JMP 45487c |
(1313) 0x454870 INC %RAX |
(1313) 0x454873 CMP %RAX,%RCX |
(1313) 0x454876 JE 454615 |
(1313) 0x45487c MOV -0xd8(%RBP),%RDX |
(1313) 0x454883 MOV (%RDX,%RAX,8),%RDX |
(1313) 0x454887 MOV (%R14,%RDX,8),%RDX |
(1313) 0x45488b CMP -0x30(%RBP),%RDX |
(1313) 0x45488f JL 454870 |
(1313) 0x454891 MOV -0x80(%RBP),%RSI |
(1313) 0x454895 VMOVSD (%RSI,%RAX,8),%XMM12 |
(1313) 0x45489a MOV -0x68(%RBP),%RSI |
(1313) 0x45489e VMULSD %XMM11,%XMM12,%XMM13 |
(1313) 0x4548a3 VUCOMISD %XMM0,%XMM13 |
(1313) 0x4548a7 JAE 454870 |
(1313) 0x4548a9 MOV (%R13),%RSI |
(1313) 0x4548ad VFMADD213SD (%RSI,%RDX,8),%XMM10,%XMM12 |
(1313) 0x4548b3 VMOVSD %XMM12,(%RSI,%RDX,8) |
(1313) 0x4548b8 MOV -0x68(%RBP),%RSI |
(1313) 0x4548bc JMP 454870 |
/scratch_na/users/xoserete/qaas_runs/171-415-3872/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1221 - 1675 |
-------------------------------------------------------------------------------- |
1221: if (n_fine) |
[...] |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.11 |
CQA speedup if FP arith vectorized | 3.09 |
CQA speedup if fully vectorized | 7.76 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.35 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1650,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.83 |
CQA cycles if no scalar integer | 16.00 |
CQA cycles if FP arith vectorized | 10.96 |
CQA cycles if fully vectorized | 4.36 |
Front-end cycles | 33.83 |
DIV/SQRT cycles | 17.30 |
P0 cycles | 17.43 |
P1 cycles | 25.00 |
P2 cycles | 25.00 |
P3 cycles | 3.00 |
P4 cycles | 17.47 |
P5 cycles | 17.40 |
P6 cycles | 3.00 |
P7 cycles | 3.00 |
P8 cycles | 3.00 |
P9 cycles | 17.40 |
P10 cycles | 25.00 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 34.17 - 34.25 |
Stall cycles (UFS) | 0.00 |
Nb insns | 197.00 |
Nb uops | 199.00 |
Nb loads | 75.00 |
Nb stores | 6.00 |
Nb stack references | 25.00 |
FLOP/cycle | 0.50 |
Nb FLOP add-sub | 11.00 |
Nb FLOP mul | 3.00 |
Nb FLOP fma | 1.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.15 |
Bytes prefetched | 0.00 |
Bytes loaded | 600.00 |
Bytes stored | 48.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 16.13 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 22.22 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 22.22 |
Vector-efficiency ratio all | 14.52 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 15.28 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 15.28 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.11 |
CQA speedup if FP arith vectorized | 3.09 |
CQA speedup if fully vectorized | 7.76 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.35 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source | par_lr_interp.c:1221-1221,par_lr_interp.c:1609-1609,par_lr_interp.c:1612-1617,par_lr_interp.c:1621-1621,par_lr_interp.c:1624-1624,par_lr_interp.c:1627-1627,par_lr_interp.c:1630-1632,par_lr_interp.c:1635-1636,par_lr_interp.c:1640-1650,par_lr_interp.c:1653-1655,par_lr_interp.c:1659-1660,par_lr_interp.c:1667-1667,par_lr_interp.c:1672-1675 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 33.83 |
CQA cycles if no scalar integer | 16.00 |
CQA cycles if FP arith vectorized | 10.96 |
CQA cycles if fully vectorized | 4.36 |
Front-end cycles | 33.83 |
DIV/SQRT cycles | 17.30 |
P0 cycles | 17.43 |
P1 cycles | 25.00 |
P2 cycles | 25.00 |
P3 cycles | 3.00 |
P4 cycles | 17.47 |
P5 cycles | 17.40 |
P6 cycles | 3.00 |
P7 cycles | 3.00 |
P8 cycles | 3.00 |
P9 cycles | 17.40 |
P10 cycles | 25.00 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 34.17 - 34.25 |
Stall cycles (UFS) | 0.00 |
Nb insns | 197.00 |
Nb uops | 199.00 |
Nb loads | 75.00 |
Nb stores | 6.00 |
Nb stack references | 25.00 |
FLOP/cycle | 0.50 |
Nb FLOP add-sub | 11.00 |
Nb FLOP mul | 3.00 |
Nb FLOP fma | 1.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 19.15 |
Bytes prefetched | 0.00 |
Bytes loaded | 600.00 |
Bytes stored | 48.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 16.13 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 22.22 |
Vectorization ratio fma | 0.00 |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 22.22 |
Vector-efficiency ratio all | 14.52 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 15.28 |
Vector-efficiency ratio fma | 12.50 |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 15.28 |
Path / |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | exec |
nb instructions | 197 |
nb uops | 199 |
loop length | 950 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 3 |
used zmm registers | 0 |
nb stack references | 25 |
ADD-SUB / MUL ratio | 3.00 |
micro-operation queue | 33.83 cycles |
front end | 33.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 17.30 | 17.43 | 25.00 | 25.00 | 3.00 | 17.47 | 17.40 | 3.00 | 3.00 | 3.00 | 17.40 | 25.00 |
cycles | 17.30 | 17.43 | 25.00 | 25.00 | 3.00 | 17.47 | 17.40 | 3.00 | 3.00 | 3.00 | 17.40 | 25.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 34.17-34.25 |
Stall cycles | 0.00 |
Front-end | 33.83 |
Dispatch | 25.00 |
DIV/SQRT | 4.00 |
Overall L1 | 33.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 28% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 22% |
fma | 0% |
div/sqrt | 0% |
other | 53% |
all | 16% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 22% |
fma | 0% |
div/sqrt | 0% |
other | 22% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 16% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 15% |
fma | 12% |
div/sqrt | 12% |
other | 19% |
all | 14% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 15% |
fma | 12% |
div/sqrt | 12% |
other | 15% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%RSI,%R11,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%R15,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4545f0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP -0x50(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 454630 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x1a8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R15,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%RDI,8),%XMM10 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x8(%RCX,%R15,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA -0x1(%RAX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 4542c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1720> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 454682 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ae2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM11,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%R14,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF128 $0x1,%YMM10,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %XMM12,%XMM10,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSHUFPD $0x1,%XMM10,%XMM10,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM12,%XMM10,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x130(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf8(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 454688 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ae8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x2,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JL 4543d0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1830> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x178(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R15,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%R15,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4543d0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1830> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 4546dd <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b3d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM11,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x80(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%R10,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%R14,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF128 $0x1,%YMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %XMM13,%XMM12,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM13,%XMM12,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDSD %XMM12,%XMM10,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
CMP %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x130(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 4546df <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b3f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VUCOMISD %XMM0,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0xa0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%R11,8),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 454668 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ac8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM10,%XMM11,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 45448d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV -0x148(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R12D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x1,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 454483 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18e3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%RSI,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%RAX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 45444e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18ae> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RDX,%RDI,8),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM11,%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM0,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 45444e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18ae> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD (%RDX,%RCX,8),%XMM10,%XMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM12,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 45447f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RAX,%RDI,8),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM11,%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM10,%XMM12,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPSD $0x1,%XMM0,%XMM13,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %XMM1,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD %XMM12,%XMM13,%XMM13{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM6,%XMM13,%XMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
LEA 0x2(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%R12),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 454509 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1969> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,-0x140(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 454679 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ad9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x178(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R15,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%R15,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xa8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 4546d4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b34> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 454733 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b93> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 454858 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1cb8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 454615 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a75> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R11,8),%XMM10,%XMM10 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM10,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R8,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 454180 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $-0x3,(%RAX,%R15,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x1a0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 454659 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ab9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x198(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R10,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%R15,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R11,8),%XMM6,%XMM6 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VADDSD %XMM6,%XMM11,%XMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0xa8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xa8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX,%RDI,1),%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 4546c3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b23> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD -0xf0(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4546fc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b5c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 45475d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1bbd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 45487c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1cdc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | hypre_BoomerAMGBuildExtPIInterp.extracted |
Source file and lines | par_lr_interp.c:1221-1675 |
Module | exec |
nb instructions | 197 |
nb uops | 199 |
loop length | 950 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 3 |
used zmm registers | 0 |
nb stack references | 25 |
ADD-SUB / MUL ratio | 3.00 |
micro-operation queue | 33.83 cycles |
front end | 33.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 17.30 | 17.43 | 25.00 | 25.00 | 3.00 | 17.47 | 17.40 | 3.00 | 3.00 | 3.00 | 17.40 | 25.00 |
cycles | 17.30 | 17.43 | 25.00 | 25.00 | 3.00 | 17.47 | 17.40 | 3.00 | 3.00 | 3.00 | 17.40 | 25.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 34.17-34.25 |
Stall cycles | 0.00 |
Front-end | 33.83 |
Dispatch | 25.00 |
DIV/SQRT | 4.00 |
Overall L1 | 33.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 28% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 22% |
fma | 0% |
div/sqrt | 0% |
other | 53% |
all | 16% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 22% |
fma | 0% |
div/sqrt | 0% |
other | 22% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 16% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 15% |
fma | 12% |
div/sqrt | 12% |
other | 19% |
all | 14% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 15% |
fma | 12% |
div/sqrt | 12% |
other | 15% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV (%RSI,%R11,8),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%R15,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4545f0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP -0x50(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 454630 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a90> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x1a8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R15,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VUCOMISD (%RDX,%RDI,8),%XMM10 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x8(%RCX,%R15,8),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SETBE %AL | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
LEA -0x1(%RAX,%RAX,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RAX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA 0x1(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDI,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JGE 4542c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1720> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R12,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 454682 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ae2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x1(%RDX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM11,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x58(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%R14,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%R14,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM10,%XMM10,%XMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF128 $0x1,%YMM10,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %XMM12,%XMM10,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSHUFPD $0x1,%XMM10,%XMM10,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM12,%XMM10,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
CMP %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x130(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf8(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 454688 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ae8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x2,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JL 4543d0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1830> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x178(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R15,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%R15,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 4543d0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1830> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0xf0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 4546dd <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b3d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%RSI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM11,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x80(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%R10,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xd8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xf0(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%R14,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VXORPD %XMM12,%XMM12,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VEXTRACTF128 $0x1,%YMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VADDPD %XMM13,%XMM12,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VADDSD %XMM13,%XMM12,%XMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VADDSD %XMM12,%XMM10,%XMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
CMP %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x130(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 4546df <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b3f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VUCOMISD %XMM0,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0xa0(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%R11,8),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 454668 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ac8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VDIVSD %XMM10,%XMM11,%XMM10 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
CMP %R12,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JGE 45448d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
MOV -0x148(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDI,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R12D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x1,%CL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 454483 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18e3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x8(%RSI,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX,%RAX,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 45444e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18ae> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RDX,%RDI,8),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM11,%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VUCOMISD %XMM0,%XMM13 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JAE 45444e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18ae> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VFMADD213SD (%RDX,%RCX,8),%XMM10,%XMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM12,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 45447f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18df> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x8(%RAX,%RDI,8),%XMM12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD %XMM11,%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VMULSD %XMM10,%XMM12,%XMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
VCMPSD $0x1,%XMM0,%XMM13,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD %XMM1,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
VMOVSD %XMM12,%XMM13,%XMM13{%K1} | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
VADDSD %XMM6,%XMM13,%XMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
LEA 0x2(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2(%R12),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 454509 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1969> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x2,-0x140(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JL 454679 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ad9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x178(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R15,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%R15,8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0xa8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JLE 4546d4 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b34> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VCVTSI2SDQ -0xb0(%RBP),%XMM16,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 7 | 0.50 |
CMP $0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 454733 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b93> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %RSI,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 454858 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1cb8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 454615 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a75> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x88(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RCX,%RAX,8),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xa0(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RDX,%R11,8),%XMM10,%XMM10 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVSD %XMM10,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R8,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 454180 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xe8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $-0x3,(%RAX,%R15,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0x1a0(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 454659 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1ab9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x198(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%R10,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%RCX,%R15,8),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD (%RAX,%R11,8),%XMM6,%XMM6 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
VADDSD %XMM6,%XMM11,%XMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV -0xa8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0xa8(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDX,%RDI,1),%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JMP 4546c3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b23> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 454611 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1a71> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD -0xf0(%RBP),%RSI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4546fc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1b5c> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RAX,8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 45475d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1bbd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x128(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 45487c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1cdc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |