Loop Id: 897 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1774-1876 | Coverage: 0.16% |
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Loop Id: 897 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1774-1876 | Coverage: 0.16% |
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0x8d7d8 MOV 0x110(%RSP),%RCX |
0x8d7e0 MOV 0xf0(%RSP),%R8 |
0x8d7e8 MOV 0x98(%RSP),%RDX |
0x8d7f0 MOV (%RCX),%RDI |
0x8d7f3 LEA (,%RDI,8),%RAX |
0x8d7fb MOV (%RDX,%RDI,8),%RDX |
0x8d7ff LEA 0x8(%RAX),%RCX |
0x8d803 MOV %RAX,0x168(%RSP) |
0x8d80b ADD %R8,%RAX |
0x8d80e LEA (%R8,%RCX,1),%RSI |
0x8d812 MOV %RAX,0xd8(%RSP) |
0x8d81a MOV (%RAX),%RAX |
0x8d81d MOV (%RSI),%R9 |
0x8d820 MOV %RSI,0xe0(%RSP) |
0x8d828 ADD %RDX,%R9 |
0x8d82b SUB %RAX,%R9 |
0x8d82e CMP %R9,%RDX |
0x8d831 JGE 8da65 |
0x8d837 MOV %RAX,%RSI |
0x8d83a MOV 0x60(%RSP),%R8 |
0x8d83f SUB %RDX,%RSI |
0x8d842 SUB %RAX,%RDX |
0x8d845 ADD %R9,%RSI |
0x8d848 MOV 0x100(%RSP),%R9 |
0x8d850 MOV (%R8,%R9,1),%R8 |
0x8d854 MOV %RSI,%R9 |
0x8d857 SUB %RAX,%R9 |
0x8d85a LEA (%R8,%RDX,8),%RDX |
0x8d85e AND $0x7,%R9D |
0x8d862 JE 8ea0a |
0x8d868 CMP $0x1,%R9 |
0x8d86c JE 8d958 |
0x8d872 CMP $0x2,%R9 |
0x8d876 JE 8d938 |
0x8d87c CMP $0x3,%R9 |
0x8d880 JE 8d918 |
0x8d886 CMP $0x4,%R9 |
0x8d88a JE 8d8f8 |
0x8d88c CMP $0x5,%R9 |
0x8d890 JE 8d8d8 |
0x8d892 CMP $0x6,%R9 |
0x8d896 JE 8d8b8 |
0x8d898 MOV (%RDX,%RAX,8),%R8 |
0x8d89c MOV 0x130(%RSP),%R9 |
0x8d8a4 MOV %RAX,(%R9,%R8,8) |
0x8d8a8 MOVQ $0,(%R12,%RAX,8) |
0x8d8b0 INC %RAX |
0x8d8b3 MOV %R8,-0x8(%R13,%RAX,8) |
0x8d8b8 MOV (%RDX,%RAX,8),%R8 |
0x8d8bc MOV 0x130(%RSP),%R9 |
0x8d8c4 MOV %RAX,(%R9,%R8,8) |
0x8d8c8 MOVQ $0,(%R12,%RAX,8) |
0x8d8d0 INC %RAX |
0x8d8d3 MOV %R8,-0x8(%R13,%RAX,8) |
0x8d8d8 MOV (%RDX,%RAX,8),%R8 |
0x8d8dc MOV 0x130(%RSP),%R9 |
0x8d8e4 MOV %RAX,(%R9,%R8,8) |
0x8d8e8 MOVQ $0,(%R12,%RAX,8) |
0x8d8f0 INC %RAX |
0x8d8f3 MOV %R8,-0x8(%R13,%RAX,8) |
0x8d8f8 MOV (%RDX,%RAX,8),%R8 |
0x8d8fc MOV 0x130(%RSP),%R9 |
0x8d904 MOV %RAX,(%R9,%R8,8) |
0x8d908 MOVQ $0,(%R12,%RAX,8) |
0x8d910 INC %RAX |
0x8d913 MOV %R8,-0x8(%R13,%RAX,8) |
0x8d918 MOV (%RDX,%RAX,8),%R8 |
0x8d91c MOV 0x130(%RSP),%R9 |
0x8d924 MOV %RAX,(%R9,%R8,8) |
0x8d928 MOVQ $0,(%R12,%RAX,8) |
0x8d930 INC %RAX |
0x8d933 MOV %R8,-0x8(%R13,%RAX,8) |
0x8d938 MOV (%RDX,%RAX,8),%R8 |
0x8d93c MOV 0x130(%RSP),%R9 |
0x8d944 MOV %RAX,(%R9,%R8,8) |
0x8d948 MOVQ $0,(%R12,%RAX,8) |
0x8d950 INC %RAX |
0x8d953 MOV %R8,-0x8(%R13,%RAX,8) |
0x8d958 MOV (%RDX,%RAX,8),%R8 |
0x8d95c MOV 0x130(%RSP),%R9 |
0x8d964 MOV %RAX,(%R9,%R8,8) |
0x8d968 MOVQ $0,(%R12,%RAX,8) |
0x8d970 INC %RAX |
0x8d973 MOV %R8,-0x8(%R13,%RAX,8) |
0x8d978 CMP %RAX,%RSI |
0x8d97b JE 8da65 |
0x8d981 MOV %RBX,0x178(%RSP) |
0x8d989 MOV %R9,%R8 |
(908) 0x8d98c MOV (%RDX,%RAX,8),%RBX |
(908) 0x8d990 LEA 0x1(%RAX),%R9 |
(908) 0x8d994 MOV %RAX,(%R8,%RBX,8) |
(908) 0x8d998 MOVQ $0,(%R12,%RAX,8) |
(908) 0x8d9a0 MOV %RBX,-0x8(%R13,%R9,8) |
(908) 0x8d9a5 MOV (%RDX,%R9,8),%RBX |
(908) 0x8d9a9 MOV %R9,(%R8,%RBX,8) |
(908) 0x8d9ad MOVQ $0,(%R12,%R9,8) |
(908) 0x8d9b5 LEA 0x2(%RAX),%R9 |
(908) 0x8d9b9 MOV %RBX,-0x8(%R13,%R9,8) |
(908) 0x8d9be MOV (%RDX,%R9,8),%RBX |
(908) 0x8d9c2 MOV %R9,(%R8,%RBX,8) |
(908) 0x8d9c6 MOVQ $0,(%R12,%R9,8) |
(908) 0x8d9ce LEA 0x3(%RAX),%R9 |
(908) 0x8d9d2 MOV %RBX,-0x8(%R13,%R9,8) |
(908) 0x8d9d7 MOV (%RDX,%R9,8),%RBX |
(908) 0x8d9db MOV %R9,(%R8,%RBX,8) |
(908) 0x8d9df MOVQ $0,(%R12,%R9,8) |
(908) 0x8d9e7 LEA 0x4(%RAX),%R9 |
(908) 0x8d9eb MOV %RBX,-0x8(%R13,%R9,8) |
(908) 0x8d9f0 MOV (%RDX,%R9,8),%RBX |
(908) 0x8d9f4 MOV %R9,(%R8,%RBX,8) |
(908) 0x8d9f8 MOVQ $0,(%R12,%R9,8) |
(908) 0x8da00 LEA 0x5(%RAX),%R9 |
(908) 0x8da04 MOV %RBX,-0x8(%R13,%R9,8) |
(908) 0x8da09 MOV (%RDX,%R9,8),%RBX |
(908) 0x8da0d MOV %R9,(%R8,%RBX,8) |
(908) 0x8da11 MOVQ $0,(%R12,%R9,8) |
(908) 0x8da19 LEA 0x6(%RAX),%R9 |
(908) 0x8da1d MOV %RBX,-0x8(%R13,%R9,8) |
(908) 0x8da22 MOV (%RDX,%R9,8),%RBX |
(908) 0x8da26 MOV %R9,(%R8,%RBX,8) |
(908) 0x8da2a MOVQ $0,(%R12,%R9,8) |
(908) 0x8da32 LEA 0x7(%RAX),%R9 |
(908) 0x8da36 ADD $0x8,%RAX |
(908) 0x8da3a MOV %RBX,-0x8(%R13,%R9,8) |
(908) 0x8da3f MOV (%RDX,%R9,8),%RBX |
(908) 0x8da43 MOV %R9,(%R8,%RBX,8) |
(908) 0x8da47 MOVQ $0,(%R12,%R9,8) |
(908) 0x8da4f MOV %RBX,-0x8(%R13,%RAX,8) |
(908) 0x8da54 CMP %RAX,%RSI |
(908) 0x8da57 JNE 8d98c |
0x8da5d MOV 0x178(%RSP),%RBX |
0x8da65 MOV 0xf8(%RSP),%R8 |
0x8da6d MOV 0x168(%RSP),%R9 |
0x8da75 MOV 0xa0(%RSP),%RAX |
0x8da7d LEA (%R8,%RCX,1),%RSI |
0x8da81 ADD %R9,%R8 |
0x8da84 MOV (%RAX,%RDI,8),%RDX |
0x8da88 MOV (%R8),%RAX |
0x8da8b MOV %R8,0xc8(%RSP) |
0x8da93 MOV (%RSI),%R8 |
0x8da96 MOV %RSI,0xd0(%RSP) |
0x8da9e ADD %RDX,%R8 |
0x8daa1 SUB %RAX,%R8 |
0x8daa4 CMP %R8,%RDX |
0x8daa7 JGE 8dc8c |
0x8daad MOV %RAX,%RSI |
0x8dab0 MOV 0x100(%RSP),%R9 |
0x8dab8 SUB %RDX,%RSI |
0x8dabb SUB %RAX,%RDX |
0x8dabe ADD %R8,%RSI |
0x8dac1 MOV 0x68(%RSP),%R8 |
0x8dac6 MOV (%R8,%R9,1),%R8 |
0x8daca MOV %RSI,%R9 |
0x8dacd SUB %RAX,%R9 |
0x8dad0 LEA (%R8,%RDX,8),%RDX |
0x8dad4 AND $0x7,%R9D |
0x8dad8 JE 8dbbb |
0x8dade CMP $0x1,%R9 |
0x8dae2 JE 8db9a |
0x8dae8 CMP $0x2,%R9 |
0x8daec JE 8db82 |
0x8daf2 CMP $0x3,%R9 |
0x8daf6 JE 8db6a |
0x8daf8 CMP $0x4,%R9 |
0x8dafc JE 8db52 |
0x8dafe CMP $0x5,%R9 |
0x8db02 JE 8db3a |
0x8db04 CMP $0x6,%R9 |
0x8db08 JE 8db22 |
0x8db0a MOV (%RDX,%RAX,8),%R8 |
0x8db0e MOV %RAX,(%RBX,%R8,8) |
0x8db12 MOVQ $0,(%R11,%RAX,8) |
0x8db1a INC %RAX |
0x8db1d MOV %R8,-0x8(%R10,%RAX,8) |
0x8db22 MOV (%RDX,%RAX,8),%R9 |
0x8db26 MOV %RAX,(%RBX,%R9,8) |
0x8db2a MOVQ $0,(%R11,%RAX,8) |
0x8db32 INC %RAX |
0x8db35 MOV %R9,-0x8(%R10,%RAX,8) |
0x8db3a MOV (%RDX,%RAX,8),%R8 |
0x8db3e MOV %RAX,(%RBX,%R8,8) |
0x8db42 MOVQ $0,(%R11,%RAX,8) |
0x8db4a INC %RAX |
0x8db4d MOV %R8,-0x8(%R10,%RAX,8) |
0x8db52 MOV (%RDX,%RAX,8),%R9 |
0x8db56 MOV %RAX,(%RBX,%R9,8) |
0x8db5a MOVQ $0,(%R11,%RAX,8) |
0x8db62 INC %RAX |
0x8db65 MOV %R9,-0x8(%R10,%RAX,8) |
0x8db6a MOV (%RDX,%RAX,8),%R8 |
0x8db6e MOV %RAX,(%RBX,%R8,8) |
0x8db72 MOVQ $0,(%R11,%RAX,8) |
0x8db7a INC %RAX |
0x8db7d MOV %R8,-0x8(%R10,%RAX,8) |
0x8db82 MOV (%RDX,%RAX,8),%R9 |
0x8db86 MOV %RAX,(%RBX,%R9,8) |
0x8db8a MOVQ $0,(%R11,%RAX,8) |
0x8db92 INC %RAX |
0x8db95 MOV %R9,-0x8(%R10,%RAX,8) |
0x8db9a MOV (%RDX,%RAX,8),%R8 |
0x8db9e MOV %RAX,(%RBX,%R8,8) |
0x8dba2 MOVQ $0,(%R11,%RAX,8) |
0x8dbaa INC %RAX |
0x8dbad MOV %R8,-0x8(%R10,%RAX,8) |
0x8dbb2 CMP %RAX,%RSI |
0x8dbb5 JE 8dc8c |
(907) 0x8dbbb MOV (%RDX,%RAX,8),%R9 |
(907) 0x8dbbf LEA 0x1(%RAX),%R8 |
(907) 0x8dbc3 MOV %RAX,(%RBX,%R9,8) |
(907) 0x8dbc7 MOVQ $0,(%R11,%RAX,8) |
(907) 0x8dbcf MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x8dbd4 MOV (%RDX,%R8,8),%R9 |
(907) 0x8dbd8 MOV %R8,(%RBX,%R9,8) |
(907) 0x8dbdc MOVQ $0,(%R11,%R8,8) |
(907) 0x8dbe4 LEA 0x2(%RAX),%R8 |
(907) 0x8dbe8 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x8dbed MOV (%RDX,%R8,8),%R9 |
(907) 0x8dbf1 MOV %R8,(%RBX,%R9,8) |
(907) 0x8dbf5 MOVQ $0,(%R11,%R8,8) |
(907) 0x8dbfd LEA 0x3(%RAX),%R8 |
(907) 0x8dc01 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x8dc06 MOV (%RDX,%R8,8),%R9 |
(907) 0x8dc0a MOV %R8,(%RBX,%R9,8) |
(907) 0x8dc0e MOVQ $0,(%R11,%R8,8) |
(907) 0x8dc16 LEA 0x4(%RAX),%R8 |
(907) 0x8dc1a MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x8dc1f MOV (%RDX,%R8,8),%R9 |
(907) 0x8dc23 MOV %R8,(%RBX,%R9,8) |
(907) 0x8dc27 MOVQ $0,(%R11,%R8,8) |
(907) 0x8dc2f LEA 0x5(%RAX),%R8 |
(907) 0x8dc33 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x8dc38 MOV (%RDX,%R8,8),%R9 |
(907) 0x8dc3c MOV %R8,(%RBX,%R9,8) |
(907) 0x8dc40 MOVQ $0,(%R11,%R8,8) |
(907) 0x8dc48 LEA 0x6(%RAX),%R8 |
(907) 0x8dc4c MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x8dc51 MOV (%RDX,%R8,8),%R9 |
(907) 0x8dc55 MOV %R8,(%RBX,%R9,8) |
(907) 0x8dc59 MOVQ $0,(%R11,%R8,8) |
(907) 0x8dc61 LEA 0x7(%RAX),%R8 |
(907) 0x8dc65 ADD $0x8,%RAX |
(907) 0x8dc69 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x8dc6e MOV (%RDX,%R8,8),%R9 |
(907) 0x8dc72 MOV %R8,(%RBX,%R9,8) |
(907) 0x8dc76 MOVQ $0,(%R11,%R8,8) |
(907) 0x8dc7e MOV %R9,-0x8(%R10,%RAX,8) |
(907) 0x8dc83 CMP %RAX,%RSI |
(907) 0x8dc86 JNE 8dbbb |
0x8dc8c MOV 0x88(%RSP),%RSI |
0x8dc94 LEA (%RSI,%RCX,1),%R8 |
0x8dc98 MOV (%RSI,%RDI,8),%RAX |
0x8dc9c MOV (%R8),%RSI |
0x8dc9f CMP %RSI,%RAX |
0x8dca2 JGE 8dcce |
0x8dca4 NOPL (%RAX) |
(906) 0x8dca8 MOV 0x140(%RSP),%RDX |
(906) 0x8dcb0 MOV 0x150(%RSP),%R9 |
(906) 0x8dcb8 MOV (%RDX,%RAX,8),%RDX |
(906) 0x8dcbc CMP (%R9,%RDX,8),%R14 |
(906) 0x8dcc0 JE 8df30 |
(906) 0x8dcc6 INC %RAX |
(906) 0x8dcc9 CMP %RSI,%RAX |
(906) 0x8dccc JL 8dca8 |
0x8dcce MOV 0x90(%RSP),%R8 |
0x8dcd6 ADD %R8,%RCX |
0x8dcd9 MOV (%R8,%RDI,8),%RAX |
0x8dcdd MOV (%RCX),%RSI |
0x8dce0 CMP %RSI,%RAX |
0x8dce3 JGE 8dd0e |
0x8dce5 NOPL (%RAX) |
(905) 0x8dce8 MOV 0x148(%RSP),%RDX |
(905) 0x8dcf0 MOV 0x158(%RSP),%R9 |
(905) 0x8dcf8 MOV (%RDX,%RAX,8),%R8 |
(905) 0x8dcfc CMP (%R9,%R8,8),%R14 |
(905) 0x8dd00 JE 8df10 |
(905) 0x8dd06 INC %RAX |
(905) 0x8dd09 CMP %RSI,%RAX |
(905) 0x8dd0c JL 8dce8 |
0x8dd0e MOV 0x78(%RSP),%RCX |
0x8dd13 MOV 0x168(%RSP),%RDX |
0x8dd1b MOV (%RCX,%RDI,8),%R8 |
0x8dd1f MOV 0x8(%RCX,%RDX,1),%RDX |
0x8dd24 LEA 0x1(%R8),%RAX |
0x8dd28 CMP %RDX,%RAX |
0x8dd2b JGE 8ea1f |
0x8dd31 MOV 0x40(%RSP),%RCX |
0x8dd36 MOV 0xe8(%RSP),%R9 |
0x8dd3e SAL $0x3,%RAX |
0x8dd42 VXORPD %XMM0,%XMM0,%XMM0 |
0x8dd46 MOV %R15,0xc0(%RSP) |
0x8dd4e VMOVSD %XMM0,%XMM0,%XMM1 |
0x8dd52 MOV 0x130(%RSP),%R15 |
0x8dd5a LEA (%RCX,%RAX,1),%RSI |
0x8dd5e MOV %R8,0xb8(%RSP) |
0x8dd66 ADD %R9,%RAX |
0x8dd69 LEA (%RCX,%RDX,8),%R9 |
0x8dd6d MOV %R14,0xb0(%RSP) |
0x8dd75 JMP 8dda7 |
(902) 0x8dd80 MOV 0x120(%RSP),%R8 |
(902) 0x8dd88 MOV 0x168(%RSP),%R14 |
(902) 0x8dd90 MOV (%R8,%RCX,8),%RCX |
(902) 0x8dd94 CMP %RCX,(%R8,%R14,1) |
(902) 0x8dd98 JE 8ddde |
(902) 0x8dd9a ADD $0x8,%RSI |
(902) 0x8dd9e ADD $0x8,%RAX |
(902) 0x8dda2 CMP %RSI,%R9 |
(902) 0x8dda5 JE 8ddef |
(902) 0x8dda7 MOV (%RSI),%RCX |
(902) 0x8ddaa MOV 0x170(%RSP),%R14 |
(902) 0x8ddb2 LEA (,%RCX,8),%R8 |
(902) 0x8ddba CMP (%R14,%RCX,8),%RDI |
(902) 0x8ddbe JE 8df50 |
(902) 0x8ddc4 MOV 0x128(%RSP),%RDX |
(902) 0x8ddcc CMPQ $-0x3,(%RDX,%RCX,8) |
(902) 0x8ddd1 JE 8dd9a |
(902) 0x8ddd3 CMPQ $0x1,0x160(%RSP) |
(902) 0x8dddc JNE 8dd80 |
(902) 0x8ddde ADD $0x8,%RSI |
(902) 0x8dde2 VADDSD (%RAX),%XMM0,%XMM0 |
(902) 0x8dde6 ADD $0x8,%RAX |
(902) 0x8ddea CMP %RSI,%R9 |
(902) 0x8dded JNE 8dda7 |
0x8ddef MOV 0xc0(%RSP),%R15 |
0x8ddf7 MOV 0xb8(%RSP),%R8 |
0x8ddff MOV 0xb0(%RSP),%R14 |
0x8de07 MOV 0x80(%RSP),%RCX |
0x8de0f MOV 0x168(%RSP),%RAX |
0x8de17 MOV (%RCX,%RDI,8),%RDX |
0x8de1b MOV 0x8(%RCX,%RAX,1),%RCX |
0x8de20 CMP %RCX,%RDX |
0x8de23 JGE 8e283 |
0x8de29 MOV 0x50(%RSP),%RSI |
0x8de2e SAL $0x3,%RDX |
0x8de32 MOV 0x48(%RSP),%R9 |
0x8de37 MOV %R13,0xb8(%RSP) |
0x8de3f MOV %R10,0xc0(%RSP) |
0x8de47 MOV 0x58(%RSP),%R13 |
0x8de4c LEA (%RSI,%RDX,1),%RAX |
0x8de50 MOV %R14,0xb0(%RSP) |
0x8de58 ADD %R9,%RDX |
0x8de5b LEA (%RSI,%RCX,8),%RSI |
0x8de5f MOV %RAX,0x178(%RSP) |
0x8de67 MOV %R8,%RAX |
0x8de6a JMP 8deb0 |
(900) 0x8de70 MOV 0x120(%RSP),%R10 |
(900) 0x8de78 MOV 0x168(%RSP),%R14 |
(900) 0x8de80 MOV 0x108(%RSP),%RCX |
(900) 0x8de88 MOV (%R10,%R14,1),%R9 |
(900) 0x8de8c CMP %R9,(%RCX,%R8,1) |
(900) 0x8de90 JE 8df02 |
(900) 0x8de92 ADDQ $0x8,0x178(%RSP) |
(900) 0x8de9b ADD $0x8,%RDX |
(900) 0x8de9f MOV 0x178(%RSP),%RCX |
(900) 0x8dea7 CMP %RSI,%RCX |
(900) 0x8deaa JE 8e268 |
(900) 0x8deb0 MOV 0x178(%RSP),%R10 |
(900) 0x8deb8 MOV (%R10),%RCX |
(900) 0x8debb TEST %R15,%R15 |
(900) 0x8debe JE 8decc |
(900) 0x8dec0 MOV 0x118(%RSP),%R14 |
(900) 0x8dec8 MOV (%R14,%RCX,8),%RCX |
(900) 0x8decc LEA (,%RCX,8),%R8 |
(900) 0x8ded4 TEST %RCX,%RCX |
(900) 0x8ded7 JS 8deeb |
(900) 0x8ded9 MOV 0x138(%RSP),%R9 |
(900) 0x8dee1 CMP (%R9,%RCX,8),%RDI |
(900) 0x8dee5 JE 8e708 |
(900) 0x8deeb CMPQ $-0x3,(%R13,%R8,1) |
(900) 0x8def1 JE 8de92 |
(900) 0x8def3 CMPQ $0x1,0x160(%RSP) |
(900) 0x8defc JNE 8de70 |
(900) 0x8df02 VADDSD (%RDX),%XMM0,%XMM0 |
(900) 0x8df06 JMP 8de92 |
(905) 0x8df10 MOV 0x138(%RSP),%RSI |
(905) 0x8df18 INC %RAX |
(905) 0x8df1b MOV %RDI,(%RSI,%R8,8) |
(905) 0x8df1f MOV (%RCX),%RSI |
(905) 0x8df22 CMP %RAX,%RSI |
(905) 0x8df25 JG 8dce8 |
0x8df2b JMP 8dd0e |
(906) 0x8df30 MOV 0x170(%RSP),%RSI |
(906) 0x8df38 INC %RAX |
(906) 0x8df3b MOV %RDI,(%RSI,%RDX,8) |
(906) 0x8df3f MOV (%R8),%RSI |
(906) 0x8df42 CMP %RAX,%RSI |
(906) 0x8df45 JG 8dca8 |
0x8df4b JMP 8dcce |
(902) 0x8df50 MOV 0xf0(%RSP),%R14 |
(902) 0x8df58 MOV (%R14,%RCX,8),%RDX |
(902) 0x8df5c MOV 0x8(%R14,%R8,1),%R14 |
(902) 0x8df61 MOV %R14,0x178(%RSP) |
(902) 0x8df69 CMP %R14,%RDX |
(902) 0x8df6c JGE 8e0e8 |
(902) 0x8df72 SUB %RDX,%R14 |
(902) 0x8df75 AND $0x3,%R14D |
(902) 0x8df79 JE 8e024 |
(902) 0x8df7f CMP $0x1,%R14 |
(902) 0x8df83 JE 8dfe5 |
(902) 0x8df85 CMP $0x2,%R14 |
(902) 0x8df89 JE 8dfb7 |
(902) 0x8df8b VMOVSD (%RAX),%XMM5 |
(902) 0x8df8f MOV (%R13,%RDX,8),%R14 |
(902) 0x8df94 VMULSD (%R12,%RDX,8),%XMM5,%XMM6 |
(902) 0x8df9a MOV (%R15,%R14,8),%R14 |
(902) 0x8df9e INC %RDX |
(902) 0x8dfa1 LEA (%R12,%R14,8),%R14 |
(902) 0x8dfa5 VADDSD (%R14),%XMM6,%XMM7 |
(902) 0x8dfaa VADDSD %XMM6,%XMM1,%XMM1 |
(902) 0x8dfae VADDSD %XMM6,%XMM0,%XMM0 |
(902) 0x8dfb2 VMOVSD %XMM7,(%R14) |
(902) 0x8dfb7 VMOVSD (%RAX),%XMM8 |
(902) 0x8dfbb MOV (%R13,%RDX,8),%R14 |
(902) 0x8dfc0 VMULSD (%R12,%RDX,8),%XMM8,%XMM9 |
(902) 0x8dfc6 MOV (%R15,%R14,8),%R14 |
(902) 0x8dfca INC %RDX |
(902) 0x8dfcd LEA (%R12,%R14,8),%R14 |
(902) 0x8dfd1 VADDSD (%R14),%XMM9,%XMM10 |
(902) 0x8dfd6 VADDSD %XMM9,%XMM1,%XMM1 |
(902) 0x8dfdb VADDSD %XMM9,%XMM0,%XMM0 |
(902) 0x8dfe0 VMOVSD %XMM10,(%R14) |
(902) 0x8dfe5 VMOVSD (%RAX),%XMM11 |
(902) 0x8dfe9 MOV (%R13,%RDX,8),%R14 |
(902) 0x8dfee VMULSD (%R12,%RDX,8),%XMM11,%XMM12 |
(902) 0x8dff4 MOV (%R15,%R14,8),%R14 |
(902) 0x8dff8 INC %RDX |
(902) 0x8dffb LEA (%R12,%R14,8),%R14 |
(902) 0x8dfff VADDSD (%R14),%XMM12,%XMM13 |
(902) 0x8e004 VADDSD %XMM12,%XMM1,%XMM1 |
(902) 0x8e009 VADDSD %XMM12,%XMM0,%XMM0 |
(902) 0x8e00e VMOVSD %XMM13,(%R14) |
(902) 0x8e013 MOV 0x178(%RSP),%R14 |
(902) 0x8e01b CMP %R14,%RDX |
(902) 0x8e01e JE 8e0e8 |
(904) 0x8e024 VMOVSD (%RAX),%XMM14 |
(904) 0x8e028 MOV (%R13,%RDX,8),%R14 |
(904) 0x8e02d VMULSD (%R12,%RDX,8),%XMM14,%XMM15 |
(904) 0x8e033 MOV (%R15,%R14,8),%R14 |
(904) 0x8e037 LEA (%R12,%R14,8),%R14 |
(904) 0x8e03b VADDSD (%R14),%XMM15,%XMM2 |
(904) 0x8e040 VADDSD %XMM15,%XMM1,%XMM6 |
(904) 0x8e045 VADDSD %XMM15,%XMM0,%XMM7 |
(904) 0x8e04a VMOVSD %XMM2,(%R14) |
(904) 0x8e04f MOV 0x8(%R13,%RDX,8),%R14 |
(904) 0x8e054 VMOVSD (%RAX),%XMM5 |
(904) 0x8e058 MOV (%R15,%R14,8),%R14 |
(904) 0x8e05c VMULSD 0x8(%R12,%RDX,8),%XMM5,%XMM8 |
(904) 0x8e063 LEA (%R12,%R14,8),%R14 |
(904) 0x8e067 VADDSD (%R14),%XMM8,%XMM9 |
(904) 0x8e06c VADDSD %XMM8,%XMM6,%XMM10 |
(904) 0x8e071 VADDSD %XMM8,%XMM7,%XMM11 |
(904) 0x8e076 VMOVSD %XMM9,(%R14) |
(904) 0x8e07b MOV 0x10(%R13,%RDX,8),%R14 |
(904) 0x8e080 VMOVSD (%RAX),%XMM12 |
(904) 0x8e084 MOV (%R15,%R14,8),%R14 |
(904) 0x8e088 VMULSD 0x10(%R12,%RDX,8),%XMM12,%XMM13 |
(904) 0x8e08f LEA (%R12,%R14,8),%R14 |
(904) 0x8e093 VADDSD (%R14),%XMM13,%XMM1 |
(904) 0x8e098 VADDSD %XMM13,%XMM10,%XMM14 |
(904) 0x8e09d VADDSD %XMM13,%XMM11,%XMM0 |
(904) 0x8e0a2 VMOVSD %XMM1,(%R14) |
(904) 0x8e0a7 MOV 0x18(%R13,%RDX,8),%R14 |
(904) 0x8e0ac VMOVSD (%RAX),%XMM15 |
(904) 0x8e0b0 MOV (%R15,%R14,8),%R14 |
(904) 0x8e0b4 VMULSD 0x18(%R12,%RDX,8),%XMM15,%XMM12 |
(904) 0x8e0bb ADD $0x4,%RDX |
(904) 0x8e0bf LEA (%R12,%R14,8),%R14 |
(904) 0x8e0c3 VADDSD (%R14),%XMM12,%XMM2 |
(904) 0x8e0c8 VADDSD %XMM12,%XMM14,%XMM1 |
(904) 0x8e0cd VADDSD %XMM12,%XMM0,%XMM0 |
(904) 0x8e0d2 VMOVSD %XMM2,(%R14) |
(904) 0x8e0d7 MOV 0x178(%RSP),%R14 |
(904) 0x8e0df CMP %R14,%RDX |
(904) 0x8e0e2 JNE 8e024 |
(902) 0x8e0e8 MOV 0xf8(%RSP),%R14 |
(902) 0x8e0f0 MOV (%R14,%RCX,8),%RDX |
(902) 0x8e0f4 MOV 0x8(%R14,%R8,1),%R8 |
(902) 0x8e0f9 CMP %R8,%RDX |
(902) 0x8e0fc JGE 8dd9a |
(902) 0x8e102 MOV %R8,%RCX |
(902) 0x8e105 SUB %RDX,%RCX |
(902) 0x8e108 AND $0x3,%ECX |
(902) 0x8e10b JE 8e1a9 |
(902) 0x8e111 CMP $0x1,%RCX |
(902) 0x8e115 JE 8e173 |
(902) 0x8e117 CMP $0x2,%RCX |
(902) 0x8e11b JE 8e148 |
(902) 0x8e11d VMOVSD (%RAX),%XMM6 |
(902) 0x8e121 MOV (%R10,%RDX,8),%R14 |
(902) 0x8e125 VMULSD (%R11,%RDX,8),%XMM6,%XMM7 |
(902) 0x8e12b MOV (%RBX,%R14,8),%RCX |
(902) 0x8e12f INC %RDX |
(902) 0x8e132 LEA (%R11,%RCX,8),%R14 |
(902) 0x8e136 VADDSD (%R14),%XMM7,%XMM5 |
(902) 0x8e13b VADDSD %XMM7,%XMM1,%XMM1 |
(902) 0x8e13f VADDSD %XMM7,%XMM0,%XMM0 |
(902) 0x8e143 VMOVSD %XMM5,(%R14) |
(902) 0x8e148 VMOVSD (%RAX),%XMM8 |
(902) 0x8e14c MOV (%R10,%RDX,8),%RCX |
(902) 0x8e150 VMULSD (%R11,%RDX,8),%XMM8,%XMM9 |
(902) 0x8e156 MOV (%RBX,%RCX,8),%R14 |
(902) 0x8e15a INC %RDX |
(902) 0x8e15d LEA (%R11,%R14,8),%RCX |
(902) 0x8e161 VADDSD (%RCX),%XMM9,%XMM10 |
(902) 0x8e165 VADDSD %XMM9,%XMM1,%XMM1 |
(902) 0x8e16a VADDSD %XMM9,%XMM0,%XMM0 |
(902) 0x8e16f VMOVSD %XMM10,(%RCX) |
(902) 0x8e173 VMOVSD (%RAX),%XMM11 |
(902) 0x8e177 MOV (%R10,%RDX,8),%R14 |
(902) 0x8e17b VMULSD (%R11,%RDX,8),%XMM11,%XMM12 |
(902) 0x8e181 MOV (%RBX,%R14,8),%RCX |
(902) 0x8e185 INC %RDX |
(902) 0x8e188 LEA (%R11,%RCX,8),%R14 |
(902) 0x8e18c VADDSD (%R14),%XMM12,%XMM13 |
(902) 0x8e191 VADDSD %XMM12,%XMM1,%XMM1 |
(902) 0x8e196 VADDSD %XMM12,%XMM0,%XMM0 |
(902) 0x8e19b VMOVSD %XMM13,(%R14) |
(902) 0x8e1a0 CMP %R8,%RDX |
(902) 0x8e1a3 JE 8dd9a |
(903) 0x8e1a9 VMOVSD (%RAX),%XMM12 |
(903) 0x8e1ad MOV (%R10,%RDX,8),%RCX |
(903) 0x8e1b1 VMULSD (%R11,%RDX,8),%XMM12,%XMM14 |
(903) 0x8e1b7 MOV (%RBX,%RCX,8),%R14 |
(903) 0x8e1bb LEA (%R11,%R14,8),%RCX |
(903) 0x8e1bf MOV 0x8(%R10,%RDX,8),%R14 |
(903) 0x8e1c4 VADDSD (%RCX),%XMM14,%XMM15 |
(903) 0x8e1c8 VADDSD %XMM14,%XMM1,%XMM1 |
(903) 0x8e1cd VADDSD %XMM14,%XMM0,%XMM0 |
(903) 0x8e1d2 VMOVSD %XMM15,(%RCX) |
(903) 0x8e1d6 MOV (%RBX,%R14,8),%RCX |
(903) 0x8e1da VMOVSD (%RAX),%XMM2 |
(903) 0x8e1de LEA (%R11,%RCX,8),%R14 |
(903) 0x8e1e2 MOV 0x10(%R10,%RDX,8),%RCX |
(903) 0x8e1e7 VMULSD 0x8(%R11,%RDX,8),%XMM2,%XMM6 |
(903) 0x8e1ee VADDSD (%R14),%XMM6,%XMM7 |
(903) 0x8e1f3 VADDSD %XMM6,%XMM1,%XMM8 |
(903) 0x8e1f7 VADDSD %XMM6,%XMM0,%XMM9 |
(903) 0x8e1fb VMOVSD %XMM7,(%R14) |
(903) 0x8e200 MOV (%RBX,%RCX,8),%R14 |
(903) 0x8e204 VMOVSD (%RAX),%XMM5 |
(903) 0x8e208 LEA (%R11,%R14,8),%RCX |
(903) 0x8e20c MOV 0x18(%R10,%RDX,8),%R14 |
(903) 0x8e211 VMULSD 0x10(%R11,%RDX,8),%XMM5,%XMM10 |
(903) 0x8e218 VADDSD (%RCX),%XMM10,%XMM11 |
(903) 0x8e21c VADDSD %XMM10,%XMM8,%XMM13 |
(903) 0x8e221 VADDSD %XMM10,%XMM9,%XMM14 |
(903) 0x8e226 VMOVSD %XMM11,(%RCX) |
(903) 0x8e22a MOV (%RBX,%R14,8),%RCX |
(903) 0x8e22e VMOVSD (%RAX),%XMM12 |
(903) 0x8e232 LEA (%R11,%RCX,8),%R14 |
(903) 0x8e236 VMULSD 0x18(%R11,%RDX,8),%XMM12,%XMM12 |
(903) 0x8e23d ADD $0x4,%RDX |
(903) 0x8e241 VADDSD (%R14),%XMM12,%XMM15 |
(903) 0x8e246 VADDSD %XMM12,%XMM13,%XMM1 |
(903) 0x8e24b VADDSD %XMM12,%XMM14,%XMM0 |
(903) 0x8e250 VMOVSD %XMM15,(%R14) |
(903) 0x8e255 CMP %R8,%RDX |
(903) 0x8e258 JNE 8e1a9 |
(902) 0x8e25e JMP 8dd9a |
0x8e268 MOV 0xc0(%RSP),%R10 |
0x8e270 MOV 0xb8(%RSP),%R13 |
0x8e278 MOV %RAX,%R8 |
0x8e27b MOV 0xb0(%RSP),%R14 |
0x8e283 MOV 0xe8(%RSP),%RDI |
0x8e28b VMULSD (%RDI,%R8,8),%XMM1,%XMM9 |
0x8e291 VCOMISD %XMM3,%XMM9 |
0x8e295 JE 8e2a0 |
0x8e297 VXORPD %XMM4,%XMM0,%XMM10 |
0x8e29b VDIVSD %XMM9,%XMM10,%XMM12 |
0x8e2a0 MOV 0xd8(%RSP),%R8 |
0x8e2a8 MOV 0xe0(%RSP),%R9 |
0x8e2b0 MOV (%R8),%RCX |
0x8e2b3 MOV (%R9),%RDI |
0x8e2b6 CMP %RDI,%RCX |
0x8e2b9 JGE 8e4a1 |
0x8e2bf MOV %RDI,%RSI |
0x8e2c2 MOV %RCX,%R8 |
0x8e2c5 SUB %RCX,%RSI |
0x8e2c8 LEA -0x1(%RSI),%RAX |
0x8e2cc CMP $0x6,%RAX |
0x8e2d0 JBE 8ea34 |
0x8e2d6 MOV %RSI,%RDX |
0x8e2d9 LEA (%R12,%RCX,8),%RAX |
0x8e2dd VBROADCASTSD %XMM12,%ZMM5 |
0x8e2e3 SHR $0x3,%RDX |
0x8e2e7 SAL $0x6,%RDX |
0x8e2eb LEA (%RDX,%RAX,1),%R9 |
0x8e2ef SUB $0x40,%RDX |
0x8e2f3 SHR $0x6,%RDX |
0x8e2f7 INC %RDX |
0x8e2fa AND $0x7,%EDX |
0x8e2fd JE 8e3a7 |
0x8e303 CMP $0x1,%RDX |
0x8e307 JE 8e391 |
0x8e30d CMP $0x2,%RDX |
0x8e311 JE 8e380 |
0x8e313 CMP $0x3,%RDX |
0x8e317 JE 8e36f |
0x8e319 CMP $0x4,%RDX |
0x8e31d JE 8e35e |
0x8e31f CMP $0x5,%RDX |
0x8e323 JE 8e34d |
0x8e325 CMP $0x6,%RDX |
0x8e329 JE 8e33c |
0x8e32b VMULPD (%RAX),%ZMM5,%ZMM11 |
0x8e331 ADD $0x40,%RAX |
0x8e335 VMOVUPD %ZMM11,-0x40(%RAX) |
0x8e33c VMULPD (%RAX),%ZMM5,%ZMM13 |
0x8e342 ADD $0x40,%RAX |
0x8e346 VMOVUPD %ZMM13,-0x40(%RAX) |
0x8e34d VMULPD (%RAX),%ZMM5,%ZMM14 |
0x8e353 ADD $0x40,%RAX |
0x8e357 VMOVUPD %ZMM14,-0x40(%RAX) |
0x8e35e VMULPD (%RAX),%ZMM5,%ZMM15 |
0x8e364 ADD $0x40,%RAX |
0x8e368 VMOVUPD %ZMM15,-0x40(%RAX) |
0x8e36f VMULPD (%RAX),%ZMM5,%ZMM2 |
0x8e375 ADD $0x40,%RAX |
0x8e379 VMOVUPD %ZMM2,-0x40(%RAX) |
0x8e380 VMULPD (%RAX),%ZMM5,%ZMM6 |
0x8e386 ADD $0x40,%RAX |
0x8e38a VMOVUPD %ZMM6,-0x40(%RAX) |
0x8e391 VMULPD (%RAX),%ZMM5,%ZMM7 |
0x8e397 ADD $0x40,%RAX |
0x8e39b VMOVUPD %ZMM7,-0x40(%RAX) |
0x8e3a2 CMP %R9,%RAX |
0x8e3a5 JE 8e421 |
(899) 0x8e3a7 VMULPD (%RAX),%ZMM5,%ZMM1 |
(899) 0x8e3ad ADD $0x200,%RAX |
(899) 0x8e3b3 VMULPD -0x1c0(%RAX),%ZMM5,%ZMM0 |
(899) 0x8e3ba VMULPD -0x180(%RAX),%ZMM5,%ZMM8 |
(899) 0x8e3c1 VMULPD -0x140(%RAX),%ZMM5,%ZMM9 |
(899) 0x8e3c8 VMULPD -0x100(%RAX),%ZMM5,%ZMM10 |
(899) 0x8e3cf VMULPD -0xc0(%RAX),%ZMM5,%ZMM11 |
(899) 0x8e3d6 VMOVUPD %ZMM1,-0x200(%RAX) |
(899) 0x8e3dd VMULPD -0x80(%RAX),%ZMM5,%ZMM13 |
(899) 0x8e3e4 VMOVUPD %ZMM0,-0x1c0(%RAX) |
(899) 0x8e3eb VMULPD -0x40(%RAX),%ZMM5,%ZMM14 |
(899) 0x8e3f2 VMOVUPD %ZMM8,-0x180(%RAX) |
(899) 0x8e3f9 VMOVUPD %ZMM9,-0x140(%RAX) |
(899) 0x8e400 VMOVUPD %ZMM10,-0x100(%RAX) |
(899) 0x8e407 VMOVUPD %ZMM11,-0xc0(%RAX) |
(899) 0x8e40e VMOVUPD %ZMM13,-0x80(%RAX) |
(899) 0x8e415 VMOVUPD %ZMM14,-0x40(%RAX) |
(899) 0x8e41c CMP %R9,%RAX |
(899) 0x8e41f JNE 8e3a7 |
0x8e421 MOV %RSI,%R9 |
0x8e424 AND $-0x8,%R9 |
0x8e428 ADD %R9,%RCX |
0x8e42b TEST $0x7,%SIL |
0x8e42f JE 8e4a1 |
0x8e431 SUB %R9,%RSI |
0x8e434 LEA -0x1(%RSI),%RAX |
0x8e438 CMP $0x2,%RAX |
0x8e43c JBE 8e461 |
0x8e43e ADD %R8,%R9 |
0x8e441 VBROADCASTSD %XMM12,%YMM5 |
0x8e446 LEA (%R12,%R9,8),%R8 |
0x8e44a VMULPD (%R8),%YMM5,%YMM15 |
0x8e44f VMOVUPD %YMM15,(%R8) |
0x8e454 TEST $0x3,%SIL |
0x8e458 JE 8e4a1 |
0x8e45a AND $-0x4,%RSI |
0x8e45e ADD %RSI,%RCX |
0x8e461 LEA (,%RCX,8),%RSI |
0x8e469 LEA 0x1(%RCX),%R9 |
0x8e46d LEA (%R12,%RSI,1),%RDX |
0x8e471 VMULSD (%RDX),%XMM12,%XMM2 |
0x8e475 VMOVSD %XMM2,(%RDX) |
0x8e479 CMP %RDI,%R9 |
0x8e47c JGE 8e4a1 |
0x8e47e LEA 0x8(%R12,%RSI,1),%RAX |
0x8e483 ADD $0x2,%RCX |
0x8e487 VMULSD (%RAX),%XMM12,%XMM6 |
0x8e48b VMOVSD %XMM6,(%RAX) |
0x8e48f CMP %RCX,%RDI |
0x8e492 JLE 8e4a1 |
0x8e494 LEA 0x10(%R12,%RSI,1),%RCX |
0x8e499 VMULSD (%RCX),%XMM12,%XMM7 |
0x8e49d VMOVSD %XMM7,(%RCX) |
0x8e4a1 MOV 0xc8(%RSP),%RDI |
0x8e4a9 MOV 0xd0(%RSP),%R8 |
0x8e4b1 MOV (%RDI),%RCX |
0x8e4b4 MOV (%R8),%RDI |
0x8e4b7 CMP %RCX,%RDI |
0x8e4ba JLE 8e6a2 |
0x8e4c0 MOV %RDI,%RSI |
0x8e4c3 MOV %RCX,%R8 |
0x8e4c6 SUB %RCX,%RSI |
0x8e4c9 LEA -0x1(%RSI),%RDX |
0x8e4cd CMP $0x6,%RDX |
0x8e4d1 JBE 8ea2c |
0x8e4d7 MOV %RSI,%RDX |
0x8e4da LEA (%R11,%RCX,8),%RAX |
0x8e4de VBROADCASTSD %XMM12,%ZMM0 |
0x8e4e4 SHR $0x3,%RDX |
0x8e4e8 SAL $0x6,%RDX |
0x8e4ec LEA (%RDX,%RAX,1),%R9 |
0x8e4f0 SUB $0x40,%RDX |
0x8e4f4 SHR $0x6,%RDX |
0x8e4f8 INC %RDX |
0x8e4fb AND $0x7,%EDX |
0x8e4fe JE 8e5a8 |
0x8e504 CMP $0x1,%RDX |
0x8e508 JE 8e592 |
0x8e50e CMP $0x2,%RDX |
0x8e512 JE 8e581 |
0x8e514 CMP $0x3,%RDX |
0x8e518 JE 8e570 |
0x8e51a CMP $0x4,%RDX |
0x8e51e JE 8e55f |
0x8e520 CMP $0x5,%RDX |
0x8e524 JE 8e54e |
0x8e526 CMP $0x6,%RDX |
0x8e52a JE 8e53d |
0x8e52c VMULPD (%RAX),%ZMM0,%ZMM1 |
0x8e532 ADD $0x40,%RAX |
0x8e536 VMOVUPD %ZMM1,-0x40(%RAX) |
0x8e53d VMULPD (%RAX),%ZMM0,%ZMM8 |
0x8e543 ADD $0x40,%RAX |
0x8e547 VMOVUPD %ZMM8,-0x40(%RAX) |
0x8e54e VMULPD (%RAX),%ZMM0,%ZMM9 |
0x8e554 ADD $0x40,%RAX |
0x8e558 VMOVUPD %ZMM9,-0x40(%RAX) |
0x8e55f VMULPD (%RAX),%ZMM0,%ZMM10 |
0x8e565 ADD $0x40,%RAX |
0x8e569 VMOVUPD %ZMM10,-0x40(%RAX) |
0x8e570 VMULPD (%RAX),%ZMM0,%ZMM11 |
0x8e576 ADD $0x40,%RAX |
0x8e57a VMOVUPD %ZMM11,-0x40(%RAX) |
0x8e581 VMULPD (%RAX),%ZMM0,%ZMM13 |
0x8e587 ADD $0x40,%RAX |
0x8e58b VMOVUPD %ZMM13,-0x40(%RAX) |
0x8e592 VMULPD (%RAX),%ZMM0,%ZMM14 |
0x8e598 ADD $0x40,%RAX |
0x8e59c VMOVUPD %ZMM14,-0x40(%RAX) |
0x8e5a3 CMP %RAX,%R9 |
0x8e5a6 JE 8e622 |
(898) 0x8e5a8 VMULPD (%RAX),%ZMM0,%ZMM5 |
(898) 0x8e5ae ADD $0x200,%RAX |
(898) 0x8e5b4 VMULPD -0x1c0(%RAX),%ZMM0,%ZMM15 |
(898) 0x8e5bb VMULPD -0x180(%RAX),%ZMM0,%ZMM2 |
(898) 0x8e5c2 VMULPD -0x140(%RAX),%ZMM0,%ZMM6 |
(898) 0x8e5c9 VMULPD -0x100(%RAX),%ZMM0,%ZMM7 |
(898) 0x8e5d0 VMULPD -0xc0(%RAX),%ZMM0,%ZMM1 |
(898) 0x8e5d7 VMOVUPD %ZMM5,-0x200(%RAX) |
(898) 0x8e5de VMULPD -0x80(%RAX),%ZMM0,%ZMM8 |
(898) 0x8e5e5 VMOVUPD %ZMM15,-0x1c0(%RAX) |
(898) 0x8e5ec VMULPD -0x40(%RAX),%ZMM0,%ZMM9 |
(898) 0x8e5f3 VMOVUPD %ZMM2,-0x180(%RAX) |
(898) 0x8e5fa VMOVUPD %ZMM6,-0x140(%RAX) |
(898) 0x8e601 VMOVUPD %ZMM7,-0x100(%RAX) |
(898) 0x8e608 VMOVUPD %ZMM1,-0xc0(%RAX) |
(898) 0x8e60f VMOVUPD %ZMM8,-0x80(%RAX) |
(898) 0x8e616 VMOVUPD %ZMM9,-0x40(%RAX) |
(898) 0x8e61d CMP %RAX,%R9 |
(898) 0x8e620 JNE 8e5a8 |
0x8e622 MOV %RSI,%R9 |
0x8e625 AND $-0x8,%R9 |
0x8e629 ADD %R9,%RCX |
0x8e62c TEST $0x7,%SIL |
0x8e630 JE 8e6a2 |
0x8e632 SUB %R9,%RSI |
0x8e635 LEA -0x1(%RSI),%RAX |
0x8e639 CMP $0x2,%RAX |
0x8e63d JBE 8e662 |
0x8e63f ADD %R8,%R9 |
0x8e642 VBROADCASTSD %XMM12,%YMM0 |
0x8e647 LEA (%R11,%R9,8),%R8 |
0x8e64b VMULPD (%R8),%YMM0,%YMM10 |
0x8e650 VMOVUPD %YMM10,(%R8) |
0x8e655 TEST $0x3,%SIL |
0x8e659 JE 8e6a2 |
0x8e65b AND $-0x4,%RSI |
0x8e65f ADD %RSI,%RCX |
0x8e662 LEA (,%RCX,8),%RSI |
0x8e66a LEA 0x1(%RCX),%R9 |
0x8e66e LEA (%R11,%RSI,1),%RDX |
0x8e672 VMULSD (%RDX),%XMM12,%XMM11 |
0x8e676 VMOVSD %XMM11,(%RDX) |
0x8e67a CMP %R9,%RDI |
0x8e67d JLE 8e6a2 |
0x8e67f LEA 0x8(%R11,%RSI,1),%RAX |
0x8e684 ADD $0x2,%RCX |
0x8e688 VMULSD (%RAX),%XMM12,%XMM13 |
0x8e68c VMOVSD %XMM13,(%RAX) |
0x8e690 CMP %RCX,%RDI |
0x8e693 JLE 8e6a2 |
0x8e695 LEA 0x10(%R11,%RSI,1),%RCX |
0x8e69a VMULSD (%RCX),%XMM12,%XMM14 |
0x8e69e VMOVSD %XMM14,(%RCX) |
0x8e6a2 ADDQ $0x8,0x110(%RSP) |
0x8e6ab MOV 0x70(%RSP),%RDI |
0x8e6b0 MOV 0x110(%RSP),%R8 |
0x8e6b8 CMP %RDI,%R8 |
0x8e6bb JNE 8d7d8 |
(900) 0x8e708 MOV 0x30(%RSP),%RCX |
(900) 0x8e70d MOV 0x38(%RSP),%R10 |
(900) 0x8e712 MOV (%RCX,%R8,1),%RCX |
(900) 0x8e716 MOV 0x8(%R10,%R8,1),%R10 |
(900) 0x8e71b ADD %RCX,%R10 |
(900) 0x8e71e CMP %R10,%RCX |
(900) 0x8e721 JGE 8de92 |
(900) 0x8e727 MOV 0x28(%RSP),%R8 |
(900) 0x8e72c MOV 0x100(%RSP),%R14 |
(900) 0x8e734 MOV %R10,%R9 |
(900) 0x8e737 SUB %RCX,%R9 |
(900) 0x8e73a MOV (%R8,%R14,1),%R8 |
(900) 0x8e73e AND $0x3,%R9D |
(900) 0x8e742 JE 8e819 |
(900) 0x8e748 CMP $0x1,%R9 |
(900) 0x8e74c JE 8e7d2 |
(900) 0x8e752 CMP $0x2,%R9 |
(900) 0x8e756 JE 8e794 |
(900) 0x8e758 VMOVSD (%RDX),%XMM2 |
(900) 0x8e75c MOV 0xa8(%RSP),%R14 |
(900) 0x8e764 MOV (%R8,%RCX,8),%R9 |
(900) 0x8e768 VMULSD (%R14,%RCX,8),%XMM2,%XMM6 |
(900) 0x8e76e TEST %R9,%R9 |
(900) 0x8e771 JS 8ea3c |
(900) 0x8e777 MOV (%RBX,%R9,8),%R9 |
(900) 0x8e77b LEA (%R11,%R9,8),%R14 |
(900) 0x8e77f VADDSD (%R14),%XMM6,%XMM7 |
(900) 0x8e784 VMOVSD %XMM7,(%R14) |
(900) 0x8e789 VADDSD %XMM6,%XMM1,%XMM1 |
(900) 0x8e78d VADDSD %XMM6,%XMM0,%XMM0 |
(900) 0x8e791 INC %RCX |
(900) 0x8e794 VMOVSD (%RDX),%XMM9 |
(900) 0x8e798 MOV 0xa8(%RSP),%R14 |
(900) 0x8e7a0 MOV (%R8,%RCX,8),%R9 |
(900) 0x8e7a4 VMULSD (%R14,%RCX,8),%XMM9,%XMM10 |
(900) 0x8e7aa TEST %R9,%R9 |
(900) 0x8e7ad JS 8e9e8 |
(900) 0x8e7b3 MOV (%RBX,%R9,8),%R9 |
(900) 0x8e7b7 LEA (%R11,%R9,8),%R14 |
(900) 0x8e7bb VADDSD (%R14),%XMM10,%XMM5 |
(900) 0x8e7c0 VMOVSD %XMM5,(%R14) |
(900) 0x8e7c5 VADDSD %XMM10,%XMM1,%XMM1 |
(900) 0x8e7ca VADDSD %XMM10,%XMM0,%XMM0 |
(900) 0x8e7cf INC %RCX |
(900) 0x8e7d2 VMOVSD (%RDX),%XMM13 |
(900) 0x8e7d6 MOV 0xa8(%RSP),%R14 |
(900) 0x8e7de MOV (%R8,%RCX,8),%R9 |
(900) 0x8e7e2 VMULSD (%R14,%RCX,8),%XMM13,%XMM12 |
(900) 0x8e7e8 TEST %R9,%R9 |
(900) 0x8e7eb JS 8e9b0 |
(900) 0x8e7f1 MOV (%RBX,%R9,8),%R9 |
(900) 0x8e7f5 LEA (%R11,%R9,8),%R14 |
(900) 0x8e7f9 VADDSD (%R14),%XMM12,%XMM14 |
(900) 0x8e7fe VMOVSD %XMM14,(%R14) |
(900) 0x8e803 INC %RCX |
(900) 0x8e806 VADDSD %XMM12,%XMM1,%XMM1 |
(900) 0x8e80b VADDSD %XMM12,%XMM0,%XMM0 |
(900) 0x8e810 CMP %RCX,%R10 |
(900) 0x8e813 JE 8de92 |
(900) 0x8e819 MOV %R13,0x20(%RSP) |
(900) 0x8e81e MOV 0xa8(%RSP),%R14 |
(900) 0x8e826 JMP 8e8c7 |
(901) 0x8e830 MOV (%RBX,%R9,8),%R13 |
(901) 0x8e834 LEA (%R11,%R13,8),%R9 |
(901) 0x8e838 VADDSD (%R9),%XMM9,%XMM10 |
(901) 0x8e83d VMOVSD %XMM10,(%R9) |
(901) 0x8e842 LEA 0x1(%RCX),%R13 |
(901) 0x8e846 VMOVSD (%RDX),%XMM14 |
(901) 0x8e84a VADDSD %XMM9,%XMM1,%XMM11 |
(901) 0x8e84f MOV (%R8,%R13,8),%R9 |
(901) 0x8e853 VADDSD %XMM9,%XMM0,%XMM13 |
(901) 0x8e858 VMULSD (%R14,%R13,8),%XMM14,%XMM15 |
(901) 0x8e85e TEST %R9,%R9 |
(901) 0x8e861 JS 8e988 |
(901) 0x8e867 MOV (%RBX,%R9,8),%R13 |
(901) 0x8e86b LEA (%R11,%R13,8),%R9 |
(901) 0x8e86f VADDSD (%R9),%XMM15,%XMM12 |
(901) 0x8e874 VMOVSD %XMM12,(%R9) |
(901) 0x8e879 LEA 0x2(%RCX),%R13 |
(901) 0x8e87d VMOVSD (%RDX),%XMM1 |
(901) 0x8e881 VADDSD %XMM15,%XMM11,%XMM6 |
(901) 0x8e886 MOV (%R8,%R13,8),%R9 |
(901) 0x8e88a VADDSD %XMM15,%XMM13,%XMM7 |
(901) 0x8e88f VMULSD (%R14,%R13,8),%XMM1,%XMM12 |
(901) 0x8e895 TEST %R9,%R9 |
(901) 0x8e898 JS 8e960 |
(901) 0x8e89e MOV (%RBX,%R9,8),%R13 |
(901) 0x8e8a2 LEA (%R11,%R13,8),%R9 |
(901) 0x8e8a6 VADDSD (%R9),%XMM12,%XMM0 |
(901) 0x8e8ab VMOVSD %XMM0,(%R9) |
(901) 0x8e8b0 ADD $0x3,%RCX |
(901) 0x8e8b4 VADDSD %XMM12,%XMM6,%XMM1 |
(901) 0x8e8b9 VADDSD %XMM12,%XMM7,%XMM0 |
(901) 0x8e8be CMP %RCX,%R10 |
(901) 0x8e8c1 JE 8e9d8 |
(901) 0x8e8c7 VMOVSD (%RDX),%XMM12 |
(901) 0x8e8cb MOV (%R8,%RCX,8),%R9 |
(901) 0x8e8cf VMULSD (%R14,%RCX,8),%XMM12,%XMM2 |
(901) 0x8e8d5 TEST %R9,%R9 |
(901) 0x8e8d8 JS 8e938 |
(901) 0x8e8da MOV (%RBX,%R9,8),%R13 |
(901) 0x8e8de LEA (%R11,%R13,8),%R9 |
(901) 0x8e8e2 VADDSD (%R9),%XMM2,%XMM6 |
(901) 0x8e8e7 VMOVSD %XMM6,(%R9) |
(901) 0x8e8ec INC %RCX |
(901) 0x8e8ef VMOVSD (%RDX),%XMM8 |
(901) 0x8e8f3 VADDSD %XMM2,%XMM1,%XMM1 |
(901) 0x8e8f7 VADDSD %XMM2,%XMM0,%XMM0 |
(901) 0x8e8fb MOV (%R8,%RCX,8),%R9 |
(901) 0x8e8ff VMULSD (%R14,%RCX,8),%XMM8,%XMM9 |
(901) 0x8e905 TEST %R9,%R9 |
(901) 0x8e908 JNS 8e830 |
(901) 0x8e90e MOV 0x130(%RSP),%R13 |
(901) 0x8e916 NOT %R9 |
(901) 0x8e919 MOV (%R13,%R9,8),%R9 |
(901) 0x8e91e LEA (%R12,%R9,8),%R13 |
(901) 0x8e922 VADDSD (%R13),%XMM9,%XMM5 |
(901) 0x8e928 VMOVSD %XMM5,(%R13) |
(901) 0x8e92e JMP 8e842 |
(901) 0x8e938 MOV 0x130(%RSP),%R13 |
(901) 0x8e940 NOT %R9 |
(901) 0x8e943 MOV (%R13,%R9,8),%R9 |
(901) 0x8e948 LEA (%R12,%R9,8),%R13 |
(901) 0x8e94c VADDSD (%R13),%XMM2,%XMM7 |
(901) 0x8e952 VMOVSD %XMM7,(%R13) |
(901) 0x8e958 JMP 8e8ec |
(901) 0x8e960 MOV 0x130(%RSP),%R13 |
(901) 0x8e968 NOT %R9 |
(901) 0x8e96b MOV (%R13,%R9,8),%R9 |
(901) 0x8e970 LEA (%R12,%R9,8),%R13 |
(901) 0x8e974 VADDSD (%R13),%XMM12,%XMM8 |
(901) 0x8e97a VMOVSD %XMM8,(%R13) |
(901) 0x8e980 JMP 8e8b0 |
(901) 0x8e988 MOV 0x130(%RSP),%R13 |
(901) 0x8e990 NOT %R9 |
(901) 0x8e993 MOV (%R13,%R9,8),%R9 |
(901) 0x8e998 LEA (%R12,%R9,8),%R13 |
(901) 0x8e99c VADDSD (%R13),%XMM15,%XMM2 |
(901) 0x8e9a2 VMOVSD %XMM2,(%R13) |
(901) 0x8e9a8 JMP 8e879 |
(900) 0x8e9b0 MOV 0x130(%RSP),%R14 |
(900) 0x8e9b8 NOT %R9 |
(900) 0x8e9bb MOV (%R14,%R9,8),%R9 |
(900) 0x8e9bf LEA (%R12,%R9,8),%R14 |
(900) 0x8e9c3 VADDSD (%R14),%XMM12,%XMM15 |
(900) 0x8e9c8 VMOVSD %XMM15,(%R14) |
(900) 0x8e9cd JMP 8e803 |
(900) 0x8e9d8 MOV 0x20(%RSP),%R13 |
(900) 0x8e9dd JMP 8de92 |
(900) 0x8e9e8 MOV 0x130(%RSP),%R14 |
(900) 0x8e9f0 NOT %R9 |
(900) 0x8e9f3 MOV (%R14,%R9,8),%R9 |
(900) 0x8e9f7 LEA (%R12,%R9,8),%R14 |
(900) 0x8e9fb VADDSD (%R14),%XMM10,%XMM11 |
(900) 0x8ea00 VMOVSD %XMM11,(%R14) |
(900) 0x8ea05 JMP 8e7c5 |
0x8ea0a MOV %RBX,0x178(%RSP) |
0x8ea12 MOV 0x130(%RSP),%R8 |
0x8ea1a JMP 8d98c |
0x8ea1f VXORPD %XMM0,%XMM0,%XMM0 |
0x8ea23 VMOVSD %XMM0,%XMM0,%XMM1 |
0x8ea27 JMP 8de07 |
0x8ea2c XOR %R9D,%R9D |
0x8ea2f JMP 8e632 |
0x8ea34 XOR %R9D,%R9D |
0x8ea37 JMP 8e431 |
(900) 0x8ea3c MOV 0x130(%RSP),%R14 |
(900) 0x8ea44 NOT %R9 |
(900) 0x8ea47 MOV (%R14,%R9,8),%R9 |
(900) 0x8ea4b LEA (%R12,%R9,8),%R14 |
(900) 0x8ea4f VADDSD (%R14),%XMM6,%XMM8 |
(900) 0x8ea54 VMOVSD %XMM8,(%R14) |
(900) 0x8ea59 JMP 8e789 |
/scratch_na/users/xoserete/qaas_runs/171-415-3872/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1774 - 1876 |
-------------------------------------------------------------------------------- |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○97.56 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○2.44 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.58 |
CQA speedup if FP arith vectorized | 1.01 |
CQA speedup if fully vectorized | 1.35 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.83 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass._omp_fn.10 |
Source | par_multi_interp.c:1774-1799,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1856-1856,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 72.17 |
CQA cycles if no scalar integer | 28.00 |
CQA cycles if FP arith vectorized | 71.42 |
CQA cycles if fully vectorized | 53.52 |
Front-end cycles | 72.17 |
DIV/SQRT cycles | 36.60 |
P0 cycles | 36.60 |
P1 cycles | 34.33 |
P2 cycles | 34.33 |
P3 cycles | 39.50 |
P4 cycles | 36.60 |
P5 cycles | 36.60 |
P6 cycles | 39.50 |
P7 cycles | 39.50 |
P8 cycles | 39.50 |
P9 cycles | 36.60 |
P10 cycles | 34.33 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 72.65 - 72.69 |
Stall cycles (UFS) | 0.00 - 0.01 |
Nb insns | 431.00 |
Nb uops | 432.00 |
Nb loads | 103.00 |
Nb stores | 79.00 |
Nb stack references | 28.00 |
FLOP/cycle | 1.77 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 127.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 43.23 |
Bytes prefetched | 0.00 |
Bytes loaded | 1656.00 |
Bytes stored | 1464.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 21.74 |
Vectorization ratio load | 57.14 |
Vectorization ratio store | 20.25 |
Vectorization ratio mul | 69.57 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 5.56 |
Vector-efficiency ratio all | 28.34 |
Vector-efficiency ratio load | 58.93 |
Vector-efficiency ratio store | 27.85 |
Vector-efficiency ratio mul | 69.02 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.19 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.58 |
CQA speedup if FP arith vectorized | 1.01 |
CQA speedup if fully vectorized | 1.35 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.83 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass._omp_fn.10 |
Source | par_multi_interp.c:1774-1799,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1856-1856,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 72.17 |
CQA cycles if no scalar integer | 28.00 |
CQA cycles if FP arith vectorized | 71.42 |
CQA cycles if fully vectorized | 53.52 |
Front-end cycles | 72.17 |
DIV/SQRT cycles | 36.60 |
P0 cycles | 36.60 |
P1 cycles | 34.33 |
P2 cycles | 34.33 |
P3 cycles | 39.50 |
P4 cycles | 36.60 |
P5 cycles | 36.60 |
P6 cycles | 39.50 |
P7 cycles | 39.50 |
P8 cycles | 39.50 |
P9 cycles | 36.60 |
P10 cycles | 34.33 |
P11 cycles | 4.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 72.65 - 72.69 |
Stall cycles (UFS) | 0.00 - 0.01 |
Nb insns | 431.00 |
Nb uops | 432.00 |
Nb loads | 103.00 |
Nb stores | 79.00 |
Nb stack references | 28.00 |
FLOP/cycle | 1.77 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 127.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 43.23 |
Bytes prefetched | 0.00 |
Bytes loaded | 1656.00 |
Bytes stored | 1464.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 21.74 |
Vectorization ratio load | 57.14 |
Vectorization ratio store | 20.25 |
Vectorization ratio mul | 69.57 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 5.56 |
Vector-efficiency ratio all | 28.34 |
Vector-efficiency ratio load | 58.93 |
Vector-efficiency ratio store | 27.85 |
Vector-efficiency ratio mul | 69.02 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 13.19 |
Path / |
Function | hypre_BoomerAMGBuildMultipass._omp_fn.10 |
Source file and lines | par_multi_interp.c:1774-1876 |
Module | libparcsr_ls.so |
nb instructions | 431 |
nb uops | 432 |
loop length | 1999 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 13 |
used ymm registers | 4 |
used zmm registers | 13 |
nb stack references | 28 |
micro-operation queue | 72.17 cycles |
front end | 72.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 36.60 | 36.60 | 34.33 | 34.33 | 39.50 | 36.60 | 36.60 | 39.50 | 39.50 | 39.50 | 36.60 | 34.33 |
cycles | 36.60 | 36.60 | 34.33 | 34.33 | 39.50 | 36.60 | 36.60 | 39.50 | 39.50 | 39.50 | 36.60 | 34.33 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 72.65-72.69 |
Stall cycles | 0.00-0.01 |
Front-end | 72.17 |
Dispatch | 39.50 |
DIV/SQRT | 4.00 |
Overall L1 | 72.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 62% |
load | 69% |
store | 72% |
mul | 69% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 30% |
all | 21% |
load | 57% |
store | 20% |
mul | 69% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 5% |
all | 11% |
load | 12% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 59% |
load | 69% |
store | 71% |
mul | 69% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 16% |
all | 28% |
load | 58% |
store | 27% |
mul | 69% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x110(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RDI,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV (%RDX,%RDI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R8,%RCX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8da65 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6a5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x60(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x100(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%R9,1),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R8,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $0x7,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 8ea0a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x164a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d958 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x598> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d938 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x578> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d918 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x558> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d8f8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x538> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d8d8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x518> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d8b8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4f8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8da65 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6a5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x178(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x168(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%RCX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R9,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%RAX,%RDI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RSI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R8,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8dc8c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x100(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x68(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%R9,1),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R8,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $0x7,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 8dbbb <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x7fb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db9a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x7da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db82 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x7c2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db6a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x7aa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db52 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x792> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db3a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x77a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db22 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x762> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R9,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R9,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R9,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8dc8c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x88(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RCX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV (%RSI,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8dcce <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x90e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x90(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R8,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8dd0e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x94e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x168(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,1),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8ea1f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x165f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x40(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM0,%XMM0,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV 0x130(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RCX,%RDX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 8dda7 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x9e7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV 0xc0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x168(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RAX,1),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8e283 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xec3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x50(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV 0x48(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RSI,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 8deb0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xaf0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
JMP 8dd0e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x94e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 8dcce <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x90e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xb0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD (%RDI,%R8,8),%XMM1,%XMM9 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VCOMISD %XMM3,%XMM9 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JE 8e2a0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xee0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VXORPD %XMM4,%XMM0,%XMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VDIVSD %XMM9,%XMM10,%XMM12 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x6,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 8ea34 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1674> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R12,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM12,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SHR $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RDX,%RAX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB $0x40,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 8e3a7 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfe7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e391 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfd1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e380 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e36f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfaf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e35e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf9e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e34d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf8d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e33c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf7c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMULPD (%RAX),%ZMM5,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM11,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM13,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM14,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM15,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM2,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM6,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM7 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM7,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e421 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1061> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x7,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 8e461 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10a1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VBROADCASTSD %XMM12,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R12,%R9,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULPD (%R8),%YMM5,%YMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %YMM15,(%R8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
TEST $0x3,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RCX),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R12,%RSI,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULSD (%RDX),%XMM12,%XMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM2,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA 0x8(%R12,%RSI,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD $0x2,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMULSD (%RAX),%XMM12,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM6,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA 0x10(%R12,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULSD (%RCX),%XMM12,%XMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM7,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RSI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 8ea2c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x166c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R11,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM12,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SHR $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RDX,%RAX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB $0x40,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 8e5a8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x11e8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e592 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x11d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e581 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x11c1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e570 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x11b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e55f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x119f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e54e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x118e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e53d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x117d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMULPD (%RAX),%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM1,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM8,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM9,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM10,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM11,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM13,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM14,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e622 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1262> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x7,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 8e662 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12a2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VBROADCASTSD %XMM12,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R11,%R9,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULPD (%R8),%YMM0,%YMM10 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %YMM10,(%R8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
TEST $0x3,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RCX),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R11,%RSI,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULSD (%RDX),%XMM12,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM11,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA 0x8(%R11,%RSI,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD $0x2,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMULSD (%RAX),%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM13,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA 0x10(%R11,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULSD (%RCX),%XMM12,%XMM14 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM14,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADDQ $0x8,0x110(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV 0x70(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 8d7d8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x418> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 8d98c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x5cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM0,%XMM0,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 8de07 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xa47> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 8e632 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1272> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 8e431 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1071> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildMultipass._omp_fn.10 |
Source file and lines | par_multi_interp.c:1774-1876 |
Module | libparcsr_ls.so |
nb instructions | 431 |
nb uops | 432 |
loop length | 1999 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 13 |
used ymm registers | 4 |
used zmm registers | 13 |
nb stack references | 28 |
micro-operation queue | 72.17 cycles |
front end | 72.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 36.60 | 36.60 | 34.33 | 34.33 | 39.50 | 36.60 | 36.60 | 39.50 | 39.50 | 39.50 | 36.60 | 34.33 |
cycles | 36.60 | 36.60 | 34.33 | 34.33 | 39.50 | 36.60 | 36.60 | 39.50 | 39.50 | 39.50 | 36.60 | 34.33 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 72.65-72.69 |
Stall cycles | 0.00-0.01 |
Front-end | 72.17 |
Dispatch | 39.50 |
DIV/SQRT | 4.00 |
Overall L1 | 72.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 62% |
load | 69% |
store | 72% |
mul | 69% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 30% |
all | 21% |
load | 57% |
store | 20% |
mul | 69% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 5% |
all | 11% |
load | 12% |
store | 10% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 59% |
load | 69% |
store | 71% |
mul | 69% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 16% |
all | 28% |
load | 58% |
store | 27% |
mul | 69% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0x110(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x98(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%RDI,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV (%RDX,%RDI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x8(%RAX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R8,%RCX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8da65 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6a5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x60(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x100(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%R9,1),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R8,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $0x7,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 8ea0a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x164a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d958 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x598> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d938 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x578> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d918 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x558> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d8f8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x538> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d8d8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x518> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8d8b8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x4f8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x130(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%R9,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R12,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R13,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8da65 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x6a5> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x178(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xf8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x168(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R8,%RCX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R9,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%RAX,%RDI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RSI),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %RDX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R8,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8dc8c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x100(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
SUB %RAX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x68(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%R9,1),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R8,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
AND $0x7,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 8dbbb <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x7fb> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db9a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x7da> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db82 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x7c2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db6a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x7aa> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db52 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x792> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db3a <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x77a> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8db22 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x762> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R9,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R9,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R9,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX,%RAX,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,(%RBX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0,(%R11,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,-0x8(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8dc8c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x8cc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x88(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RCX,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV (%RSI,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8dcce <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x90e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x90(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV (%R8,%RDI,8),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RSI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8dd0e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x94e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x168(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RDX,1),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RDX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8ea1f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x165f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x40(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R15,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD %XMM0,%XMM0,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV 0x130(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RAX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RCX,%RDX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 8dda7 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x9e7> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV 0xc0(%RSP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x80(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x168(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RDI,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RCX,%RAX,1),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8e283 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xec3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x50(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV 0x48(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x58(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RSI,%RDX,1),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %R9,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RSI,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RAX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 8deb0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xaf0> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
JMP 8dd0e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x94e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
JMP 8dcce <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x90e> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xb8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xb0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD (%RDI,%R8,8),%XMM1,%XMM9 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VCOMISD %XMM3,%XMM9 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
JE 8e2a0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xee0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VXORPD %XMM4,%XMM0,%XMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VDIVSD %XMM9,%XMM10,%XMM12 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe0(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R9),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x6,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 8ea34 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1674> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R12,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM12,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SHR $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RDX,%RAX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB $0x40,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 8e3a7 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfe7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e391 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfd1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e380 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e36f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xfaf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e35e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf9e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e34d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf8d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e33c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xf7c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMULPD (%RAX),%ZMM5,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM11,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM13,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM14,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM15 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM15,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM2 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM2,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM6 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM6,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM5,%ZMM7 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM7,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e421 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1061> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x7,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 8e461 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10a1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VBROADCASTSD %XMM12,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R12,%R9,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULPD (%R8),%YMM5,%YMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %YMM15,(%R8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
TEST $0x3,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RCX),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R12,%RSI,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULSD (%RDX),%XMM12,%XMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM2,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA 0x8(%R12,%RSI,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD $0x2,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMULSD (%RAX),%XMM12,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM6,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8e4a1 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x10e1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA 0x10(%R12,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULSD (%RCX),%XMM12,%XMM7 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM7,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RSI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 8ea2c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x166c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA (%R11,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD %XMM12,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SHR $0x3,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
SAL $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%RDX,%RAX,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB $0x40,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x6,%RDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x7,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 8e5a8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x11e8> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x1,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e592 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x11d2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e581 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x11c1> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e570 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x11b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e55f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x119f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x5,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e54e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x118e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x6,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e53d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x117d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMULPD (%RAX),%ZMM0,%ZMM1 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM1,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM8 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM8,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM9 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM9,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM10 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM10,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM11 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM11,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM13 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM13,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VMULPD (%RAX),%ZMM0,%ZMM14 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD $0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVUPD %ZMM14,-0x40(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
CMP %RAX,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 8e622 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1262> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $0x7,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SUB %R9,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA -0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP $0x2,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 8e662 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12a2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD %R8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VBROADCASTSD %XMM12,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R11,%R9,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULPD (%R8),%YMM0,%YMM10 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %YMM10,(%R8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
TEST $0x3,%SIL | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
AND $-0x4,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %RSI,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x1(%RCX),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R11,%RSI,1),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMULSD (%RDX),%XMM12,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM11,(%RDX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA 0x8(%R11,%RSI,1),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD $0x2,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMULSD (%RAX),%XMM12,%XMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM13,(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RCX,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 8e6a2 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x12e2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA 0x10(%R11,%RSI,1),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMULSD (%RCX),%XMM12,%XMM14 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM14,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADDQ $0x8,0x110(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV 0x70(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x110(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 8d7d8 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x418> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RBX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x130(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 8d98c <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x5cc> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM0,%XMM0,%XMM1 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JMP 8de07 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0xa47> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 8e632 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1272> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 8e431 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1071> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |