Loop Id: 970 | Module: exec | Source: par_multi_interp.c:1747-1837 [...] | Coverage: 0.43% |
---|
Loop Id: 970 | Module: exec | Source: par_multi_interp.c:1747-1837 [...] | Coverage: 0.43% |
---|
0x443980 MOV -0x50(%RBP),%RAX |
0x443984 MOV -0x48(%RBP),%R9 |
0x443988 INC %RDX |
0x44398b CMP %R11,%RDX |
0x44398e JE 443ca0 |
0x443994 MOV -0x168(%RBP),%RSI |
0x44399b MOV (%RSI,%RDX,8),%RSI |
0x44399f MOV -0x80(%RBP),%RDI |
0x4439a3 CMP %R9,(%RDI,%RSI,8) |
0x4439a7 JNE 4439d0 |
0x4439a9 MOV -0xa8(%RBP),%R8 |
0x4439b0 MOV (%R8,%RSI,8),%RDI |
0x4439b4 MOV 0x8(%R8,%RSI,8),%R8 |
0x4439b9 MOV %R8,%R9 |
0x4439bc SUB %RDI,%R9 |
0x4439bf JLE 443b1f |
0x4439c5 CMP $0x4,%R9 |
0x4439c9 JAE 443a00 |
0x4439cb JMP 443ac5 |
0x4439d0 MOV -0x150(%RBP),%RDI |
0x4439d7 CMPQ $-0x3,(%RDI,%RSI,8) |
0x4439dc JE 443988 |
0x4439de CMPQ $0x1,-0xe8(%RBP) |
0x4439e6 JE 4439f9 |
0x4439e8 MOV -0xc8(%RBP),%R8 |
0x4439ef MOV (%R8,%R9,8),%RDI |
0x4439f3 CMP (%R8,%RSI,8),%RDI |
0x4439f7 JNE 443988 |
0x4439f9 VADDSD (%RBX,%RDX,8),%XMM0,%XMM0 |
0x4439fe JMP 443988 |
0x443a00 MOV %R9,%R10 |
0x443a03 SHR $0x2,%R10 |
0x443a07 LEA 0x18(,%RDI,8),%R11 |
0x443a0f NOP |
(973) 0x443a10 MOV -0x18(%RAX,%R11,1),%R12 |
(973) 0x443a15 VMOVSD -0x18(%R14,%R11,1),%XMM2 |
(973) 0x443a1c VMOVSD (%RBX,%RDX,8),%XMM3 |
(973) 0x443a21 MOV (%RCX,%R12,8),%R12 |
(973) 0x443a25 VMOVSD (%R14,%R12,8),%XMM4 |
(973) 0x443a2b VFMADD231SD %XMM2,%XMM3,%XMM4 |
(973) 0x443a30 VMOVSD %XMM4,(%R14,%R12,8) |
(973) 0x443a36 MOV -0x10(%RAX,%R11,1),%R12 |
(973) 0x443a3b VMOVSD -0x10(%R14,%R11,1),%XMM4 |
(973) 0x443a42 VMOVSD (%RBX,%RDX,8),%XMM5 |
(973) 0x443a47 MOV (%RCX,%R12,8),%R12 |
(973) 0x443a4b VMOVSD (%R14,%R12,8),%XMM6 |
(973) 0x443a51 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(973) 0x443a56 VMOVSD %XMM6,(%R14,%R12,8) |
(973) 0x443a5c MOV -0x8(%RAX,%R11,1),%R12 |
(973) 0x443a61 VMOVSD -0x8(%R14,%R11,1),%XMM6 |
(973) 0x443a68 VMOVSD (%RBX,%RDX,8),%XMM7 |
(973) 0x443a6d MOV (%RCX,%R12,8),%R12 |
(973) 0x443a71 VMOVSD (%R14,%R12,8),%XMM8 |
(973) 0x443a77 VFMADD231SD %XMM6,%XMM7,%XMM8 |
(973) 0x443a7c VMOVSD %XMM8,(%R14,%R12,8) |
(973) 0x443a82 VMOVSD (%R14,%R11,1),%XMM8 |
(973) 0x443a88 VMULSD (%RBX,%RDX,8),%XMM8,%XMM10 |
(973) 0x443a8d MOV (%RAX,%R11,1),%R12 |
(973) 0x443a91 MOV (%RCX,%R12,8),%R12 |
(973) 0x443a95 VADDSD (%R14,%R12,8),%XMM10,%XMM8 |
(973) 0x443a9b VMOVSD %XMM8,(%R14,%R12,8) |
(973) 0x443aa1 VFMADD213SD %XMM10,%XMM5,%XMM4 |
(973) 0x443aa6 VFMADD231SD %XMM2,%XMM3,%XMM4 |
(973) 0x443aab VFMADD231SD %XMM6,%XMM7,%XMM4 |
(973) 0x443ab0 VADDSD %XMM1,%XMM4,%XMM1 |
(973) 0x443ab4 VADDSD %XMM0,%XMM4,%XMM0 |
(973) 0x443ab8 ADD $0x20,%R11 |
(973) 0x443abc DEC %R10 |
(973) 0x443abf JNE 443a10 |
0x443ac5 MOV %R9,%R10 |
0x443ac8 AND $-0x4,%R10 |
0x443acc CMP %R9,%R10 |
0x443acf MOV -0x70(%RBP),%R11 |
0x443ad3 JNE 443adf |
0x443ad5 MOV -0x38(%RBP),%R10 |
0x443ad9 MOV -0x30(%RBP),%R12 |
0x443add JMP 443b1f |
0x443adf ADD %R10,%RDI |
0x443ae2 MOV -0x38(%RBP),%R10 |
0x443ae6 MOV -0x30(%RBP),%R12 |
0x443aea NOPW (%RAX,%RAX,1) |
(974) 0x443af0 MOV (%RAX,%RDI,8),%R9 |
(974) 0x443af4 VMOVSD (%R14,%RDI,8),%XMM2 |
(974) 0x443afa VMULSD (%RBX,%RDX,8),%XMM2,%XMM10 |
(974) 0x443aff MOV (%R12,%R9,8),%R9 |
(974) 0x443b03 VADDSD (%R14,%R9,8),%XMM10,%XMM2 |
(974) 0x443b09 VMOVSD %XMM2,(%R14,%R9,8) |
(974) 0x443b0f VADDSD %XMM1,%XMM10,%XMM1 |
(974) 0x443b13 VADDSD %XMM0,%XMM10,%XMM0 |
(974) 0x443b17 INC %RDI |
(974) 0x443b1a CMP %RDI,%R8 |
(974) 0x443b1d JNE 443af0 |
0x443b1f MOV -0xb0(%RBP),%RAX |
0x443b26 MOV (%RAX,%RSI,8),%RDI |
0x443b2a MOV 0x8(%RAX,%RSI,8),%RSI |
0x443b2f MOV %RSI,%R8 |
0x443b32 SUB %RDI,%R8 |
0x443b35 JLE 443980 |
0x443b3b CMP $0x4,%R8 |
0x443b3f JAE 443b46 |
0x443b41 JMP 443c1e |
0x443b46 MOV %R8,%R9 |
0x443b49 SHR $0x2,%R9 |
0x443b4d LEA 0x18(,%RDI,8),%R10 |
0x443b55 MOV -0x38(%RBP),%RAX |
0x443b59 NOPL (%RAX) |
(971) 0x443b60 MOV -0x18(%RAX,%R10,1),%R11 |
(971) 0x443b65 VMOVSD -0x18(%R13,%R10,1),%XMM2 |
(971) 0x443b6c VMOVSD (%RBX,%RDX,8),%XMM3 |
(971) 0x443b71 MOV (%R15,%R11,8),%R11 |
(971) 0x443b75 VMOVSD (%R13,%R11,8),%XMM4 |
(971) 0x443b7c VFMADD231SD %XMM2,%XMM3,%XMM4 |
(971) 0x443b81 VMOVSD %XMM4,(%R13,%R11,8) |
(971) 0x443b88 MOV -0x10(%RAX,%R10,1),%R11 |
(971) 0x443b8d VMOVSD -0x10(%R13,%R10,1),%XMM4 |
(971) 0x443b94 VMOVSD (%RBX,%RDX,8),%XMM5 |
(971) 0x443b99 MOV (%R15,%R11,8),%R11 |
(971) 0x443b9d VMOVSD (%R13,%R11,8),%XMM6 |
(971) 0x443ba4 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(971) 0x443ba9 VMOVSD %XMM6,(%R13,%R11,8) |
(971) 0x443bb0 MOV -0x8(%RAX,%R10,1),%R11 |
(971) 0x443bb5 VMOVSD -0x8(%R13,%R10,1),%XMM6 |
(971) 0x443bbc VMOVSD (%RBX,%RDX,8),%XMM7 |
(971) 0x443bc1 MOV (%R15,%R11,8),%R11 |
(971) 0x443bc5 VMOVSD (%R13,%R11,8),%XMM8 |
(971) 0x443bcc VFMADD231SD %XMM6,%XMM7,%XMM8 |
(971) 0x443bd1 VMOVSD %XMM8,(%R13,%R11,8) |
(971) 0x443bd8 VMOVSD (%R13,%R10,1),%XMM8 |
(971) 0x443bdf VMULSD (%RBX,%RDX,8),%XMM8,%XMM10 |
(971) 0x443be4 MOV (%RAX,%R10,1),%R11 |
(971) 0x443be8 MOV (%R15,%R11,8),%R11 |
(971) 0x443bec VADDSD (%R13,%R11,8),%XMM10,%XMM8 |
(971) 0x443bf3 VMOVSD %XMM8,(%R13,%R11,8) |
(971) 0x443bfa VFMADD213SD %XMM10,%XMM5,%XMM4 |
(971) 0x443bff VFMADD231SD %XMM2,%XMM3,%XMM4 |
(971) 0x443c04 VFMADD231SD %XMM6,%XMM7,%XMM4 |
(971) 0x443c09 VADDSD %XMM1,%XMM4,%XMM1 |
(971) 0x443c0d VADDSD %XMM0,%XMM4,%XMM0 |
(971) 0x443c11 ADD $0x20,%R10 |
(971) 0x443c15 DEC %R9 |
(971) 0x443c18 JNE 443b60 |
0x443c1e MOV %R8,%R9 |
0x443c21 AND $-0x4,%R9 |
0x443c25 CMP %R8,%R9 |
0x443c28 JNE 443c3f |
0x443c2a MOV -0x38(%RBP),%R10 |
0x443c2e MOV -0x50(%RBP),%RAX |
0x443c32 MOV -0x48(%RBP),%R9 |
0x443c36 MOV -0x70(%RBP),%R11 |
0x443c3a JMP 443988 |
0x443c3f ADD %R9,%RDI |
0x443c42 MOV -0x38(%RBP),%R10 |
0x443c46 MOV -0x50(%RBP),%RAX |
0x443c4a MOV -0x48(%RBP),%R9 |
0x443c4e MOV -0x70(%RBP),%R11 |
0x443c52 NOPW %CS:(%RAX,%RAX,1) |
(972) 0x443c60 MOV (%R10,%RDI,8),%R8 |
(972) 0x443c64 VMOVSD (%R13,%RDI,8),%XMM2 |
(972) 0x443c6b VMULSD (%RBX,%RDX,8),%XMM2,%XMM10 |
(972) 0x443c70 MOV (%R15,%R8,8),%R8 |
(972) 0x443c74 VADDSD (%R13,%R8,8),%XMM10,%XMM2 |
(972) 0x443c7b VMOVSD %XMM2,(%R13,%R8,8) |
(972) 0x443c82 VADDSD %XMM1,%XMM10,%XMM1 |
(972) 0x443c86 VADDSD %XMM0,%XMM10,%XMM0 |
(972) 0x443c8a INC %RDI |
(972) 0x443c8d CMP %RDI,%RSI |
(972) 0x443c90 JNE 443c60 |
0x443c92 JMP 443988 |
/scratch_na/users/xoserete/qaas_runs/171-415-3872/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1747 - 1837 |
-------------------------------------------------------------------------------- |
1747: if (n_fine) |
[...] |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.19 |
CQA speedup if FP arith vectorized | 2.41 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.20 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1811-1816,par_multi_interp.c:1824-1824,par_multi_interp.c:1835-1837 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 13.17 |
CQA cycles if no scalar integer | 6.00 |
CQA cycles if FP arith vectorized | 5.46 |
CQA cycles if fully vectorized | 1.65 |
Front-end cycles | 13.17 |
DIV/SQRT cycles | 6.50 |
P0 cycles | 5.30 |
P1 cycles | 11.00 |
P2 cycles | 11.00 |
P3 cycles | 0.00 |
P4 cycles | 5.30 |
P5 cycles | 6.50 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 5.40 |
P10 cycles | 11.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 14.22 |
Stall cycles (UFS) | 0.83 |
Nb insns | 76.00 |
Nb uops | 76.00 |
Nb loads | 33.00 |
Nb stores | 0.00 |
Nb stack references | 12.00 |
FLOP/cycle | 0.08 |
Nb FLOP add-sub | 1.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.05 |
Bytes prefetched | 0.00 |
Bytes loaded | 264.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.19 |
CQA speedup if FP arith vectorized | 2.41 |
CQA speedup if fully vectorized | 8.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.20 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1811-1816,par_multi_interp.c:1824-1824,par_multi_interp.c:1835-1837 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 13.17 |
CQA cycles if no scalar integer | 6.00 |
CQA cycles if FP arith vectorized | 5.46 |
CQA cycles if fully vectorized | 1.65 |
Front-end cycles | 13.17 |
DIV/SQRT cycles | 6.50 |
P0 cycles | 5.30 |
P1 cycles | 11.00 |
P2 cycles | 11.00 |
P3 cycles | 0.00 |
P4 cycles | 5.30 |
P5 cycles | 6.50 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 5.40 |
P10 cycles | 11.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 14.22 |
Stall cycles (UFS) | 0.83 |
Nb insns | 76.00 |
Nb uops | 76.00 |
Nb loads | 33.00 |
Nb stores | 0.00 |
Nb stack references | 12.00 |
FLOP/cycle | 0.08 |
Nb FLOP add-sub | 1.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 20.05 |
Bytes prefetched | 0.00 |
Bytes loaded | 264.00 |
Bytes stored | 0.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1837 |
Module | exec |
nb instructions | 76 |
nb uops | 76 |
loop length | 323 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 12 |
micro-operation queue | 13.17 cycles |
front end | 13.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.50 | 5.30 | 11.00 | 11.00 | 0.00 | 5.30 | 6.50 | 0.00 | 0.00 | 0.00 | 5.40 | 11.00 |
cycles | 6.50 | 5.30 | 11.00 | 11.00 | 0.00 | 5.30 | 6.50 | 0.00 | 0.00 | 0.00 | 5.40 | 11.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 14.22 |
Stall cycles | 0.83 |
LM full (events) | 2.00 |
Front-end | 13.17 |
Dispatch | 11.00 |
Overall L1 | 13.17 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 443ca0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xb80> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x168(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,(%RDI,%RSI,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4439d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R8,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 443b1f <hypre_BoomerAMGBuildMultipass.extracted.28+0x9ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 443a00 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 443ac5 <hypre_BoomerAMGBuildMultipass.extracted.28+0x9a5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x150(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $-0x3,(%RDI,%RSI,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4439f9 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8d9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xc8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%R9,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%R8,%RSI,8),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VADDSD (%RBX,%RDX,8),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R9,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RDI,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 443adf <hypre_BoomerAMGBuildMultipass.extracted.28+0x9bf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 443b1f <hypre_BoomerAMGBuildMultipass.extracted.28+0x9ff> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R10,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RSI,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 443980 <hypre_BoomerAMGBuildMultipass.extracted.28+0x860> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 443b46 <hypre_BoomerAMGBuildMultipass.extracted.28+0xa26> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 443c1e <hypre_BoomerAMGBuildMultipass.extracted.28+0xafe> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RDI,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 443c3f <hypre_BoomerAMGBuildMultipass.extracted.28+0xb1f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1837 |
Module | exec |
nb instructions | 76 |
nb uops | 76 |
loop length | 323 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 12 |
micro-operation queue | 13.17 cycles |
front end | 13.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.50 | 5.30 | 11.00 | 11.00 | 0.00 | 5.30 | 6.50 | 0.00 | 0.00 | 0.00 | 5.40 | 11.00 |
cycles | 6.50 | 5.30 | 11.00 | 11.00 | 0.00 | 5.30 | 6.50 | 0.00 | 0.00 | 0.00 | 5.40 | 11.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 14.22 |
Stall cycles | 0.83 |
LM full (events) | 2.00 |
Front-end | 13.17 |
Dispatch | 11.00 |
Overall L1 | 13.17 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %R11,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 443ca0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xb80> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x168(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RSI,%RDX,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %R9,(%RDI,%RSI,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4439d0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8b0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xa8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R8,%RSI,8),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 443b1f <hypre_BoomerAMGBuildMultipass.extracted.28+0x9ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 443a00 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 443ac5 <hypre_BoomerAMGBuildMultipass.extracted.28+0x9a5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV -0x150(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMPQ $-0x3,(%RDI,%RSI,8) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPQ $0x1,-0xe8(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4439f9 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8d9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0xc8(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R8,%R9,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP (%R8,%RSI,8),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VADDSD (%RBX,%RDX,8),%XMM0,%XMM0 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
JMP 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV %R9,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RDI,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R9,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R9,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 443adf <hypre_BoomerAMGBuildMultipass.extracted.28+0x9bf> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 443b1f <hypre_BoomerAMGBuildMultipass.extracted.28+0x9ff> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
ADD %R10,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RSI,8),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX,%RSI,8),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %RDI,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JLE 443980 <hypre_BoomerAMGBuildMultipass.extracted.28+0x860> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x4,%R8 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 443b46 <hypre_BoomerAMGBuildMultipass.extracted.28+0xa26> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 443c1e <hypre_BoomerAMGBuildMultipass.extracted.28+0xafe> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SHR $0x2,%R9 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA 0x18(,%RDI,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JNE 443c3f <hypre_BoomerAMGBuildMultipass.extracted.28+0xb1f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %R9,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 443988 <hypre_BoomerAMGBuildMultipass.extracted.28+0x868> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |