Function: hypre_Rand | Module: libHYPRE_utilities.so | Source: random.c:76-115 [...] | Coverage: 0.02% |
---|
Function: hypre_Rand | Module: libHYPRE_utilities.so | Source: random.c:76-115 [...] | Coverage: 0.02% |
---|
/home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/build/AMG/AMG/utilities/random.c: 76 - 115 |
-------------------------------------------------------------------------------- |
76: high = Seed / q; |
77: low = Seed % q; |
78: test = a * low - r * high; |
79: if(test > 0) |
[...] |
99: { |
[...] |
115: return ((HYPRE_Real)(hypre_RandI()) / m); |
0xb240 PUSH %RBP |
0xb241 MOV %RSP,%RBP |
0xb244 MOV 0x11155(%RIP),%RCX |
0xb24b MOV $0x41a705af1fe3fb79,%RDX |
0xb255 MOV %RCX,%RAX |
0xb258 IMUL %RDX |
0xb25b MOV %RDX,%RAX |
0xb25e SHR $0x3f,%RAX |
0xb262 SAR $0xf,%RDX |
0xb266 ADD %RAX,%RDX |
0xb269 IMUL $0x1f31d,%RDX,%RAX |
0xb270 SUB %RAX,%RCX |
0xb273 IMUL $0x41a7,%RCX,%RAX |
0xb27a IMUL $-0xb14,%RDX,%RCX |
0xb281 LEA (%RCX,%RAX,1),%RDX |
0xb285 TEST %RDX,%RDX |
0xb288 LEA 0x7fffffff(%RCX,%RAX,1),%RAX |
0xb290 CMOVG %RDX,%RAX |
0xb294 CVTSI2SD %RAX,%XMM0 |
0xb299 MOV %RAX,0x11100(%RIP) |
0xb2a0 MULSD 0xad60(%RIP),%XMM0 |
0xb2a8 POP %RBP |
0xb2a9 RET |
0xb2aa NOPW (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►13.10+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 | |
►12.88+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 | |
►12.88+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 | |
►12.23+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 | |
►10.92+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 | |
►10.48+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 | |
►10.04+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 | |
►9.83+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 | |
►1.53+ | hypre_BoomerAMGCoarsenPMIS.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 |
Path / |
Source file and lines | random.c:76-115 |
Module | libHYPRE_utilities.so |
nb instructions | 23 |
nb uops | 26 |
loop length | 106 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 4.33 cycles |
front end | 4.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.75 | 4.00 | 3.75 | 3.50 | 1.00 | 1.33 | 1.33 | 1.33 | 0.50 | 0.50 | 0.50 | 0.50 | 0.00 | 0.00 |
cycles | 3.75 | 4.00 | 3.75 | 3.50 | 1.00 | 1.33 | 1.33 | 1.33 | 0.50 | 0.50 | 0.50 | 0.50 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 4.33 |
Dispatch | 4.00 |
Overall L1 | 4.33 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV 0x11155(%RIP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x41a705af1fe3fb79,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IMUL %RDX | 2 | 0.25 | 1.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x3f,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
SAR $0xf,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
IMUL $0x1f31d,%RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
IMUL $0x41a7,%RCX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
IMUL $-0xb14,%RDX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
LEA (%RCX,%RAX,1),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA 0x7fffffff(%RCX,%RAX,1),%RAX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
CMOVG %RDX,%RAX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CVTSI2SD %RAX,%XMM0 | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1.42 | scal (12.5%) |
MOV %RAX,0x11100(%RIP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MULSD 0xad60(%RIP),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
Source file and lines | random.c:76-115 |
Module | libHYPRE_utilities.so |
nb instructions | 23 |
nb uops | 26 |
loop length | 106 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 4.33 cycles |
front end | 4.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.75 | 4.00 | 3.75 | 3.50 | 1.00 | 1.33 | 1.33 | 1.33 | 0.50 | 0.50 | 0.50 | 0.50 | 0.00 | 0.00 |
cycles | 3.75 | 4.00 | 3.75 | 3.50 | 1.00 | 1.33 | 1.33 | 1.33 | 0.50 | 0.50 | 0.50 | 0.50 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 4.33 |
Dispatch | 4.00 |
Overall L1 | 4.33 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | NA (no load vectorizable/vectorized instructions) |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV 0x11155(%RIP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x41a705af1fe3fb79,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IMUL %RDX | 2 | 0.25 | 1.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
MOV %RDX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x3f,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
SAR $0xf,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
ADD %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
IMUL $0x1f31d,%RDX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
IMUL $0x41a7,%RCX,%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
IMUL $-0xb14,%RDX,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
LEA (%RCX,%RAX,1),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA 0x7fffffff(%RCX,%RAX,1),%RAX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
CMOVG %RDX,%RAX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CVTSI2SD %RAX,%XMM0 | 2 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 1.42 | scal (12.5%) |
MOV %RAX,0x11100(%RIP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MULSD 0xad60(%RIP),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
Name | Coverage (%) | Time (s) |
---|---|---|
○hypre_Rand | 0.02 | 0.01 |