Function: hypre_BoomerAMGBuildMultipass._omp_fn.10 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 1.51% |
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Function: hypre_BoomerAMGBuildMultipass._omp_fn.10 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1737-1881 [...] | Coverage: 1.51% |
---|
/home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1737 - 1881 |
-------------------------------------------------------------------------------- |
1737: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa,tmp_array,tmp_array_offd) |
[...] |
1746: tmp_marker = NULL; |
1747: if (n_fine) |
1748: { tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); } |
1749: tmp_marker_offd = NULL; |
1750: if (num_cols_offd) |
1751: { tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1752: tmp_array = NULL; |
1753: if (n_coarse) |
1754: { tmp_array = hypre_CTAlloc(HYPRE_Int,n_coarse); } |
1755: tmp_array_offd = NULL; |
1756: if (new_num_cols_offd > n_coarse_offd) |
1757: { tmp_array_offd = hypre_CTAlloc(HYPRE_Int,new_num_cols_offd); } |
1758: else |
1759: { tmp_array_offd = hypre_CTAlloc(HYPRE_Int,n_coarse_offd);} |
1760: for (i=0; i < n_fine; i++) |
1761: { tmp_marker[i] = -1; } |
1762: for (i=0; i < num_cols_offd; i++) |
1763: { tmp_marker_offd[i] = -1; } |
1764: |
1765: /* Compute this thread's range of pass_length */ |
1766: my_thread_num = hypre_GetThreadNum(); |
1767: num_threads = hypre_NumActiveThreads(); |
1768: thread_start = pass_pointer[pass] + (pass_length/num_threads)*my_thread_num; |
1769: if (my_thread_num == num_threads-1) |
1770: { thread_stop = pass_pointer[pass] + pass_length; } |
1771: else |
1772: { thread_stop = pass_pointer[pass] + (pass_length/num_threads)*(my_thread_num+1); } |
1773: |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
1877: } |
1878: hypre_TFree(tmp_marker); |
1879: hypre_TFree(tmp_marker_offd); |
1880: hypre_TFree(tmp_array); |
1881: hypre_TFree(tmp_array_offd); |
0x84580 PUSH %RBP |
0x84581 MOV %RSP,%RBP |
0x84584 PUSH %R15 |
0x84586 PUSH %R14 |
0x84588 PUSH %R13 |
0x8458a PUSH %R12 |
0x8458c PUSH %RBX |
0x8458d AND $-0x20,%RSP |
0x84591 SUB $0x160,%RSP |
0x84598 MOV 0x148(%RDI),%RAX |
0x8459f MOV 0x138(%RDI),%RDX |
0x845a6 MOV 0x130(%RDI),%RCX |
0x845ad MOV 0x128(%RDI),%RBX |
0x845b4 MOV 0x108(%RDI),%R9 |
0x845bb MOV 0x100(%RDI),%R10 |
0x845c2 MOV %RAX,0x148(%RSP) |
0x845ca MOV 0xf8(%RDI),%R11 |
0x845d1 MOV 0xf0(%RDI),%R12 |
0x845d8 MOV %RDX,0x88(%RSP) |
0x845e0 MOV 0xe8(%RDI),%R13 |
0x845e7 MOV 0xe0(%RDI),%R14 |
0x845ee MOV %RCX,0x138(%RSP) |
0x845f6 MOV 0x110(%RDI),%RSI |
0x845fd MOV %RBX,0x130(%RSP) |
0x84605 MOV %R9,0xe8(%RSP) |
0x8460d MOV 0x140(%RDI),%R8 |
0x84614 MOV %R10,0x100(%RSP) |
0x8461c MOV 0x120(%RDI),%RDX |
0x84623 MOV %R11,0x18(%RSP) |
0x84628 MOV 0x118(%RDI),%RCX |
0x8462f MOV %R12,0x8(%RSP) |
0x84634 MOV %R13,0x48(%RSP) |
0x84639 MOV %R14,0x40(%RSP) |
0x8463e MOV %RSI,0x158(%RSP) |
0x84646 MOV 0xd8(%RDI),%R15 |
0x8464d MOV 0xd0(%RDI),%RAX |
0x84654 MOV 0xc8(%RDI),%RBX |
0x8465b MOV 0xc0(%RDI),%R9 |
0x84662 MOV %R15,0x80(%RSP) |
0x8466a MOV 0x68(%RDI),%R15 |
0x8466e MOV 0xb8(%RDI),%R10 |
0x84675 MOV %RAX,0x78(%RSP) |
0x8467a MOV 0xb0(%RDI),%R11 |
0x84681 MOV 0xa8(%RDI),%R12 |
0x84688 MOV %RBX,0xf8(%RSP) |
0x84690 MOV 0x98(%RDI),%R13 |
0x84697 MOV 0x80(%RDI),%R14 |
0x8469e MOV %R9,0xb0(%RSP) |
0x846a6 MOV 0x60(%RDI),%RAX |
0x846aa MOV 0x58(%RDI),%RBX |
0x846ae MOV %R15,0x128(%RSP) |
0x846b6 MOV 0x50(%RDI),%R9 |
0x846ba MOV 0x48(%RDI),%R15 |
0x846be MOV %R11,0x38(%RSP) |
0x846c3 MOV %R10,0xf0(%RSP) |
0x846cb MOV 0x90(%RDI),%R11 |
0x846d2 MOV %R12,0x10(%RSP) |
0x846d7 MOV 0xa0(%RDI),%R10 |
0x846de MOV %R13,0xd8(%RSP) |
0x846e6 MOV 0x78(%RDI),%R12 |
0x846ea MOV %R14,0xd0(%RSP) |
0x846f2 MOV 0x88(%RDI),%R13 |
0x846f9 MOV %RAX,0x70(%RSP) |
0x846fe MOV 0x70(%RDI),%R14 |
0x84702 MOV %RBX,0x120(%RSP) |
0x8470a MOV %R9,0x68(%RSP) |
0x8470f MOV %R15,0x30(%RSP) |
0x84714 MOV 0x40(%RDI),%RAX |
0x84718 MOV 0x38(%RDI),%RBX |
0x8471c MOV 0x30(%RDI),%R9 |
0x84720 MOV 0x28(%RDI),%R15 |
0x84724 MOV %RAX,0x60(%RSP) |
0x84729 MOV %RBX,0x28(%RSP) |
0x8472e MOV 0x20(%RDI),%RAX |
0x84732 MOV 0x18(%RDI),%RBX |
0x84736 MOV %R9,0x20(%RSP) |
0x8473b MOV %R15,0x58(%RSP) |
0x84740 MOV 0x10(%RDI),%R9 |
0x84744 MOV 0x8(%RDI),%R15 |
0x84748 MOV (%RDI),%RDI |
0x8474b MOV %RAX,0xc8(%RSP) |
0x84753 MOV %RBX,0xa8(%RSP) |
0x8475b MOV %R9,0x108(%RSP) |
0x84763 MOV %R15,0x140(%RSP) |
0x8476b MOV %RDI,0x110(%RSP) |
0x84773 TEST %RSI,%RSI |
0x84776 JNE 85bfe |
0x8477c MOVQ $0,0x150(%RSP) |
0x84788 TEST %R14,%R14 |
0x8478b JNE 85b82 |
0x84791 MOVQ $0,0x118(%RSP) |
0x8479d TEST %RCX,%RCX |
0x847a0 JNE 85b1b |
0x847a6 XOR %R15D,%R15D |
0x847a9 CMP %RDX,%R8 |
0x847ac JLE 85af5 |
0x847b2 MOV %R11,0xb8(%RSP) |
0x847ba MOV $0x8,%ESI |
0x847bf MOV %R8,%RDI |
0x847c2 MOV %R10,0xc0(%RSP) |
0x847ca VMOVSD %XMM2,0xe0(%RSP) |
0x847d3 CALL ce60 <hypre_CAlloc@plt> |
0x847d8 MOV 0xc0(%RSP),%RSI |
0x847e0 CMPQ $0,0x158(%RSP) |
0x847e9 VMOVSD 0xe0(%RSP),%XMM2 |
0x847f2 MOV %RAX,%RBX |
0x847f5 MOV 0xb8(%RSP),%RAX |
0x847fd JLE 8484f |
0x847ff MOV 0x158(%RSP),%RDX |
0x84807 MOV 0x150(%RSP),%RDI |
0x8480f MOV %RSI,0xc0(%RSP) |
0x84817 MOV $0xff,%ESI |
0x8481c VMOVSD %XMM2,0xe0(%RSP) |
0x84825 SAL $0x3,%RDX |
0x84829 MOV %RAX,0xb8(%RSP) |
0x84831 CALL c100 <memset@plt> |
0x84836 MOV 0xc0(%RSP),%RSI |
0x8483e VMOVSD 0xe0(%RSP),%XMM2 |
0x84847 MOV 0xb8(%RSP),%RAX |
0x8484f TEST %R14,%R14 |
0x84852 JLE 848a0 |
0x84854 MOV 0x118(%RSP),%RDI |
0x8485c MOV %RSI,0xe0(%RSP) |
0x84864 MOV $0xff,%ESI |
0x84869 LEA (,%R14,8),%RDX |
0x84871 VMOVSD %XMM2,0x158(%RSP) |
0x8487a MOV %RAX,0xc0(%RSP) |
0x84882 CALL c100 <memset@plt> |
0x84887 MOV 0xe0(%RSP),%RSI |
0x8488f VMOVSD 0x158(%RSP),%XMM2 |
0x84898 MOV 0xc0(%RSP),%RAX |
0x848a0 MOV %RSI,0xc0(%RSP) |
0x848a8 VMOVSD %XMM2,0x158(%RSP) |
0x848b1 MOV %RAX,0xb8(%RSP) |
0x848b9 CALL c9a0 <hypre_GetThreadNum@plt> |
0x848be MOV %RAX,%R14 |
0x848c1 CALL cb00 <hypre_NumActiveThreads@plt> |
0x848c6 MOV 0xe8(%RSP),%R8 |
0x848ce MOV %R14,%R10 |
0x848d1 MOV 0xf8(%RSP),%RDX |
0x848d9 MOV %RAX,%R9 |
0x848dc MOV 0x148(%RSP),%RAX |
0x848e4 MOV 0x148(%RSP),%R11 |
0x848ec MOV (%RDX,%R8,8),%RCX |
0x848f0 LEA (,%R8,8),%RDI |
0x848f8 VMOVSD 0x158(%RSP),%XMM12 |
0x84901 CQTO |
0x84903 MOV %RDI,0xe0(%RSP) |
0x8490b IDIV %R9 |
0x8490e ADD %RCX,%R11 |
0x84911 DEC %R9 |
0x84914 MOV %R11,%R8 |
0x84917 MOV 0xb8(%RSP),%R11 |
0x8491f IMUL %RAX,%R10 |
0x84923 ADD %R10,%RAX |
0x84926 LEA (%RCX,%R10,1),%RSI |
0x8492a MOV 0xc0(%RSP),%R10 |
0x84932 ADD %RCX,%RAX |
0x84935 CMP %R9,%R14 |
0x84938 CMOVNE %RAX,%R8 |
0x8493c CMP %RSI,%R8 |
0x8493f JLE 8578e |
0x84945 MOV 0xb0(%RSP),%R14 |
0x8494d VMOVQ 0x97c0b(%RIP),%XMM4 |
0x84955 VXORPD %XMM3,%XMM3,%XMM3 |
0x84959 LEA (%R14,%R8,8),%RDI |
0x8495d LEA (%R14,%RSI,8),%R9 |
0x84961 MOV 0xe8(%RSP),%R14 |
0x84969 MOV %RDI,0x50(%RSP) |
0x8496e MOV %R9,0xf8(%RSP) |
0x84976 MOV %R15,%R9 |
0x84979 DEC %R14 |
0x8497c MOV 0xa8(%RSP),%R15 |
0x84984 NOPL (%RAX) |
(897) 0x84988 MOV 0xf8(%RSP),%RCX |
(897) 0x84990 MOV 0xd0(%RSP),%R8 |
(897) 0x84998 MOV 0x78(%RSP),%RDX |
(897) 0x8499d MOV (%RCX),%RDI |
(897) 0x849a0 LEA (,%RDI,8),%RAX |
(897) 0x849a8 MOV (%RDX,%RDI,8),%RDX |
(897) 0x849ac LEA 0x8(%RAX),%RCX |
(897) 0x849b0 MOV %RAX,0x148(%RSP) |
(897) 0x849b8 ADD %R8,%RAX |
(897) 0x849bb LEA (%R8,%RCX,1),%RSI |
(897) 0x849bf MOV %RAX,0xb8(%RSP) |
(897) 0x849c7 MOV (%RAX),%RAX |
(897) 0x849ca MOV (%RSI),%R8 |
(897) 0x849cd MOV %RSI,0xc0(%RSP) |
(897) 0x849d5 ADD %RDX,%R8 |
(897) 0x849d8 SUB %RAX,%R8 |
(897) 0x849db CMP %R8,%RDX |
(897) 0x849de JGE 84be3 |
(897) 0x849e4 MOV %RAX,%RSI |
(897) 0x849e7 SUB %RDX,%RSI |
(897) 0x849ea SUB %RAX,%RDX |
(897) 0x849ed MOV %RDX,0x158(%RSP) |
(897) 0x849f5 ADD %R8,%RSI |
(897) 0x849f8 MOV 0xe0(%RSP),%RDX |
(897) 0x84a00 MOV 0x40(%RSP),%R8 |
(897) 0x84a05 MOV (%R8,%RDX,1),%R8 |
(897) 0x84a09 MOV 0x158(%RSP),%RDX |
(897) 0x84a11 LEA (%R8,%RDX,8),%RDX |
(897) 0x84a15 MOV %RSI,%R8 |
(897) 0x84a18 SUB %RAX,%R8 |
(897) 0x84a1b AND $0x7,%R8D |
(897) 0x84a1f JE 84b02 |
(897) 0x84a25 CMP $0x1,%R8 |
(897) 0x84a29 JE 84ae1 |
(897) 0x84a2f CMP $0x2,%R8 |
(897) 0x84a33 JE 84ac9 |
(897) 0x84a39 CMP $0x3,%R8 |
(897) 0x84a3d JE 84ab1 |
(897) 0x84a3f CMP $0x4,%R8 |
(897) 0x84a43 JE 84a99 |
(897) 0x84a45 CMP $0x5,%R8 |
(897) 0x84a49 JE 84a81 |
(897) 0x84a4b CMP $0x6,%R8 |
(897) 0x84a4f JE 84a69 |
(897) 0x84a51 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84a55 MOV %RAX,(%R9,%R8,8) |
(897) 0x84a59 MOVQ $0,(%R12,%RAX,8) |
(897) 0x84a61 INC %RAX |
(897) 0x84a64 MOV %R8,-0x8(%R13,%RAX,8) |
(897) 0x84a69 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84a6d MOV %RAX,(%R9,%R8,8) |
(897) 0x84a71 MOVQ $0,(%R12,%RAX,8) |
(897) 0x84a79 INC %RAX |
(897) 0x84a7c MOV %R8,-0x8(%R13,%RAX,8) |
(897) 0x84a81 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84a85 MOV %RAX,(%R9,%R8,8) |
(897) 0x84a89 MOVQ $0,(%R12,%RAX,8) |
(897) 0x84a91 INC %RAX |
(897) 0x84a94 MOV %R8,-0x8(%R13,%RAX,8) |
(897) 0x84a99 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84a9d MOV %RAX,(%R9,%R8,8) |
(897) 0x84aa1 MOVQ $0,(%R12,%RAX,8) |
(897) 0x84aa9 INC %RAX |
(897) 0x84aac MOV %R8,-0x8(%R13,%RAX,8) |
(897) 0x84ab1 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84ab5 MOV %RAX,(%R9,%R8,8) |
(897) 0x84ab9 MOVQ $0,(%R12,%RAX,8) |
(897) 0x84ac1 INC %RAX |
(897) 0x84ac4 MOV %R8,-0x8(%R13,%RAX,8) |
(897) 0x84ac9 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84acd MOV %RAX,(%R9,%R8,8) |
(897) 0x84ad1 MOVQ $0,(%R12,%RAX,8) |
(897) 0x84ad9 INC %RAX |
(897) 0x84adc MOV %R8,-0x8(%R13,%RAX,8) |
(897) 0x84ae1 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84ae5 MOV %RAX,(%R9,%R8,8) |
(897) 0x84ae9 MOVQ $0,(%R12,%RAX,8) |
(897) 0x84af1 INC %RAX |
(897) 0x84af4 MOV %R8,-0x8(%R13,%RAX,8) |
(897) 0x84af9 CMP %RSI,%RAX |
(897) 0x84afc JE 84be3 |
(897) 0x84b02 MOV %RBX,0x158(%RSP) |
(908) 0x84b0a MOV (%RDX,%RAX,8),%RBX |
(908) 0x84b0e LEA 0x1(%RAX),%R8 |
(908) 0x84b12 MOV %RAX,(%R9,%RBX,8) |
(908) 0x84b16 MOVQ $0,(%R12,%RAX,8) |
(908) 0x84b1e MOV %RBX,-0x8(%R13,%R8,8) |
(908) 0x84b23 MOV (%RDX,%R8,8),%RBX |
(908) 0x84b27 MOV %R8,(%R9,%RBX,8) |
(908) 0x84b2b MOVQ $0,(%R12,%R8,8) |
(908) 0x84b33 LEA 0x2(%RAX),%R8 |
(908) 0x84b37 MOV %RBX,-0x8(%R13,%R8,8) |
(908) 0x84b3c MOV (%RDX,%R8,8),%RBX |
(908) 0x84b40 MOV %R8,(%R9,%RBX,8) |
(908) 0x84b44 MOVQ $0,(%R12,%R8,8) |
(908) 0x84b4c LEA 0x3(%RAX),%R8 |
(908) 0x84b50 MOV %RBX,-0x8(%R13,%R8,8) |
(908) 0x84b55 MOV (%RDX,%R8,8),%RBX |
(908) 0x84b59 MOV %R8,(%R9,%RBX,8) |
(908) 0x84b5d MOVQ $0,(%R12,%R8,8) |
(908) 0x84b65 LEA 0x4(%RAX),%R8 |
(908) 0x84b69 MOV %RBX,-0x8(%R13,%R8,8) |
(908) 0x84b6e MOV (%RDX,%R8,8),%RBX |
(908) 0x84b72 MOV %R8,(%R9,%RBX,8) |
(908) 0x84b76 MOVQ $0,(%R12,%R8,8) |
(908) 0x84b7e LEA 0x5(%RAX),%R8 |
(908) 0x84b82 MOV %RBX,-0x8(%R13,%R8,8) |
(908) 0x84b87 MOV (%RDX,%R8,8),%RBX |
(908) 0x84b8b MOV %R8,(%R9,%RBX,8) |
(908) 0x84b8f MOVQ $0,(%R12,%R8,8) |
(908) 0x84b97 LEA 0x6(%RAX),%R8 |
(908) 0x84b9b MOV %RBX,-0x8(%R13,%R8,8) |
(908) 0x84ba0 MOV (%RDX,%R8,8),%RBX |
(908) 0x84ba4 MOV %R8,(%R9,%RBX,8) |
(908) 0x84ba8 MOVQ $0,(%R12,%R8,8) |
(908) 0x84bb0 LEA 0x7(%RAX),%R8 |
(908) 0x84bb4 ADD $0x8,%RAX |
(908) 0x84bb8 MOV %RBX,-0x8(%R13,%R8,8) |
(908) 0x84bbd MOV (%RDX,%R8,8),%RBX |
(908) 0x84bc1 MOV %R8,(%R9,%RBX,8) |
(908) 0x84bc5 MOVQ $0,(%R12,%R8,8) |
(908) 0x84bcd MOV %RBX,-0x8(%R13,%RAX,8) |
(908) 0x84bd2 CMP %RSI,%RAX |
(908) 0x84bd5 JNE 84b0a |
(897) 0x84bdb MOV 0x158(%RSP),%RBX |
(897) 0x84be3 MOV 0x80(%RSP),%RAX |
(897) 0x84beb MOV 0x148(%RSP),%R8 |
(897) 0x84bf3 MOV (%RAX,%RDI,8),%RDX |
(897) 0x84bf7 MOV 0xd8(%RSP),%RAX |
(897) 0x84bff LEA (%RAX,%RCX,1),%RSI |
(897) 0x84c03 ADD %R8,%RAX |
(897) 0x84c06 MOV (%RSI),%R8 |
(897) 0x84c09 MOV %RAX,0xa8(%RSP) |
(897) 0x84c11 MOV (%RAX),%RAX |
(897) 0x84c14 MOV %RSI,0xb0(%RSP) |
(897) 0x84c1c ADD %RDX,%R8 |
(897) 0x84c1f SUB %RAX,%R8 |
(897) 0x84c22 CMP %R8,%RDX |
(897) 0x84c25 JGE 84e2a |
(897) 0x84c2b MOV %RAX,%RSI |
(897) 0x84c2e SUB %RDX,%RSI |
(897) 0x84c31 SUB %RAX,%RDX |
(897) 0x84c34 MOV %RDX,0x158(%RSP) |
(897) 0x84c3c ADD %R8,%RSI |
(897) 0x84c3f MOV 0xe0(%RSP),%RDX |
(897) 0x84c47 MOV 0x48(%RSP),%R8 |
(897) 0x84c4c MOV (%R8,%RDX,1),%R8 |
(897) 0x84c50 MOV 0x158(%RSP),%RDX |
(897) 0x84c58 LEA (%R8,%RDX,8),%RDX |
(897) 0x84c5c MOV %RSI,%R8 |
(897) 0x84c5f SUB %RAX,%R8 |
(897) 0x84c62 AND $0x7,%R8D |
(897) 0x84c66 JE 84d49 |
(897) 0x84c6c CMP $0x1,%R8 |
(897) 0x84c70 JE 84d28 |
(897) 0x84c76 CMP $0x2,%R8 |
(897) 0x84c7a JE 84d10 |
(897) 0x84c80 CMP $0x3,%R8 |
(897) 0x84c84 JE 84cf8 |
(897) 0x84c86 CMP $0x4,%R8 |
(897) 0x84c8a JE 84ce0 |
(897) 0x84c8c CMP $0x5,%R8 |
(897) 0x84c90 JE 84cc8 |
(897) 0x84c92 CMP $0x6,%R8 |
(897) 0x84c96 JE 84cb0 |
(897) 0x84c98 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84c9c MOV %RAX,(%RBX,%R8,8) |
(897) 0x84ca0 MOVQ $0,(%R11,%RAX,8) |
(897) 0x84ca8 INC %RAX |
(897) 0x84cab MOV %R8,-0x8(%R10,%RAX,8) |
(897) 0x84cb0 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84cb4 MOV %RAX,(%RBX,%R8,8) |
(897) 0x84cb8 MOVQ $0,(%R11,%RAX,8) |
(897) 0x84cc0 INC %RAX |
(897) 0x84cc3 MOV %R8,-0x8(%R10,%RAX,8) |
(897) 0x84cc8 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84ccc MOV %RAX,(%RBX,%R8,8) |
(897) 0x84cd0 MOVQ $0,(%R11,%RAX,8) |
(897) 0x84cd8 INC %RAX |
(897) 0x84cdb MOV %R8,-0x8(%R10,%RAX,8) |
(897) 0x84ce0 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84ce4 MOV %RAX,(%RBX,%R8,8) |
(897) 0x84ce8 MOVQ $0,(%R11,%RAX,8) |
(897) 0x84cf0 INC %RAX |
(897) 0x84cf3 MOV %R8,-0x8(%R10,%RAX,8) |
(897) 0x84cf8 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84cfc MOV %RAX,(%RBX,%R8,8) |
(897) 0x84d00 MOVQ $0,(%R11,%RAX,8) |
(897) 0x84d08 INC %RAX |
(897) 0x84d0b MOV %R8,-0x8(%R10,%RAX,8) |
(897) 0x84d10 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84d14 MOV %RAX,(%RBX,%R8,8) |
(897) 0x84d18 MOVQ $0,(%R11,%RAX,8) |
(897) 0x84d20 INC %RAX |
(897) 0x84d23 MOV %R8,-0x8(%R10,%RAX,8) |
(897) 0x84d28 MOV (%RDX,%RAX,8),%R8 |
(897) 0x84d2c MOV %RAX,(%RBX,%R8,8) |
(897) 0x84d30 MOVQ $0,(%R11,%RAX,8) |
(897) 0x84d38 INC %RAX |
(897) 0x84d3b MOV %R8,-0x8(%R10,%RAX,8) |
(897) 0x84d40 CMP %RSI,%RAX |
(897) 0x84d43 JE 84e2a |
(897) 0x84d49 MOV %R9,0x158(%RSP) |
(907) 0x84d51 MOV (%RDX,%RAX,8),%R9 |
(907) 0x84d55 LEA 0x1(%RAX),%R8 |
(907) 0x84d59 MOV %RAX,(%RBX,%R9,8) |
(907) 0x84d5d MOVQ $0,(%R11,%RAX,8) |
(907) 0x84d65 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x84d6a MOV (%RDX,%R8,8),%R9 |
(907) 0x84d6e MOV %R8,(%RBX,%R9,8) |
(907) 0x84d72 MOVQ $0,(%R11,%R8,8) |
(907) 0x84d7a LEA 0x2(%RAX),%R8 |
(907) 0x84d7e MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x84d83 MOV (%RDX,%R8,8),%R9 |
(907) 0x84d87 MOV %R8,(%RBX,%R9,8) |
(907) 0x84d8b MOVQ $0,(%R11,%R8,8) |
(907) 0x84d93 LEA 0x3(%RAX),%R8 |
(907) 0x84d97 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x84d9c MOV (%RDX,%R8,8),%R9 |
(907) 0x84da0 MOV %R8,(%RBX,%R9,8) |
(907) 0x84da4 MOVQ $0,(%R11,%R8,8) |
(907) 0x84dac LEA 0x4(%RAX),%R8 |
(907) 0x84db0 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x84db5 MOV (%RDX,%R8,8),%R9 |
(907) 0x84db9 MOV %R8,(%RBX,%R9,8) |
(907) 0x84dbd MOVQ $0,(%R11,%R8,8) |
(907) 0x84dc5 LEA 0x5(%RAX),%R8 |
(907) 0x84dc9 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x84dce MOV (%RDX,%R8,8),%R9 |
(907) 0x84dd2 MOV %R8,(%RBX,%R9,8) |
(907) 0x84dd6 MOVQ $0,(%R11,%R8,8) |
(907) 0x84dde LEA 0x6(%RAX),%R8 |
(907) 0x84de2 MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x84de7 MOV (%RDX,%R8,8),%R9 |
(907) 0x84deb MOV %R8,(%RBX,%R9,8) |
(907) 0x84def MOVQ $0,(%R11,%R8,8) |
(907) 0x84df7 LEA 0x7(%RAX),%R8 |
(907) 0x84dfb ADD $0x8,%RAX |
(907) 0x84dff MOV %R9,-0x8(%R10,%R8,8) |
(907) 0x84e04 MOV (%RDX,%R8,8),%R9 |
(907) 0x84e08 MOV %R8,(%RBX,%R9,8) |
(907) 0x84e0c MOVQ $0,(%R11,%R8,8) |
(907) 0x84e14 MOV %R9,-0x8(%R10,%RAX,8) |
(907) 0x84e19 CMP %RSI,%RAX |
(907) 0x84e1c JNE 84d51 |
(897) 0x84e22 MOV 0x158(%RSP),%R9 |
(897) 0x84e2a MOV 0x68(%RSP),%RSI |
(897) 0x84e2f LEA (%RSI,%RCX,1),%R8 |
(897) 0x84e33 MOV (%RSI,%RDI,8),%RAX |
(897) 0x84e37 MOV (%R8),%RSI |
(897) 0x84e3a CMP %RSI,%RAX |
(897) 0x84e3d JGE 84e7e |
(897) 0x84e3f MOV %RCX,0x158(%RSP) |
(897) 0x84e47 NOPW (%RAX,%RAX,1) |
(906) 0x84e50 MOV 0x120(%RSP),%RCX |
(906) 0x84e58 MOV (%RCX,%RAX,8),%RDX |
(906) 0x84e5c MOV 0x130(%RSP),%RCX |
(906) 0x84e64 CMP (%RCX,%RDX,8),%R14 |
(906) 0x84e68 JE 84fb0 |
(906) 0x84e6e INC %RAX |
(906) 0x84e71 CMP %RSI,%RAX |
(906) 0x84e74 JL 84e50 |
(897) 0x84e76 MOV 0x158(%RSP),%RCX |
(897) 0x84e7e MOV 0x70(%RSP),%R8 |
(897) 0x84e83 ADD %R8,%RCX |
(897) 0x84e86 MOV (%R8,%RDI,8),%RAX |
(897) 0x84e8a MOV (%RCX),%RSI |
(897) 0x84e8d CMP %RSI,%RAX |
(897) 0x84e90 JGE 84ebe |
(897) 0x84e92 NOPW (%RAX,%RAX,1) |
(905) 0x84e98 MOV 0x128(%RSP),%RDX |
(905) 0x84ea0 MOV 0x138(%RSP),%R8 |
(905) 0x84ea8 MOV (%RDX,%RAX,8),%RDX |
(905) 0x84eac CMP (%R8,%RDX,8),%R14 |
(905) 0x84eb0 JE 84fd0 |
(905) 0x84eb6 INC %RAX |
(905) 0x84eb9 CMP %RSI,%RAX |
(905) 0x84ebc JL 84e98 |
(897) 0x84ebe MOV 0x58(%RSP),%RCX |
(897) 0x84ec3 MOV 0x148(%RSP),%RDX |
(897) 0x84ecb MOV (%RCX,%RDI,8),%R8 |
(897) 0x84ecf MOV 0x8(%RCX,%RDX,1),%RDX |
(897) 0x84ed4 LEA 0x1(%R8),%RAX |
(897) 0x84ed8 CMP %RDX,%RAX |
(897) 0x84edb JGE 85abc |
(897) 0x84ee1 MOV 0x20(%RSP),%RCX |
(897) 0x84ee6 SAL $0x3,%RAX |
(897) 0x84eea VXORPD %XMM0,%XMM0,%XMM0 |
(897) 0x84eee MOV %R15,0xa0(%RSP) |
(897) 0x84ef6 MOV %R8,0x98(%RSP) |
(897) 0x84efe VMOVSD %XMM0,%XMM0,%XMM1 |
(897) 0x84f02 LEA (%RCX,%RAX,1),%RSI |
(897) 0x84f06 LEA (%RCX,%RDX,8),%RDX |
(897) 0x84f0a MOV %RSI,0xe8(%RSP) |
(897) 0x84f12 MOV 0xc8(%RSP),%RSI |
(897) 0x84f1a MOV %RDX,0x158(%RSP) |
(897) 0x84f22 ADD %RSI,%RAX |
(897) 0x84f25 MOV 0xe8(%RSP),%RSI |
(897) 0x84f2d MOV %R14,0xe8(%RSP) |
(897) 0x84f35 JMP 84f70 |
0x84f37 NOPW (%RAX,%RAX,1) |
(902) 0x84f40 MOV 0x108(%RSP),%RDX |
(902) 0x84f48 MOV 0x148(%RSP),%R8 |
(902) 0x84f50 MOV (%RDX,%RCX,8),%RCX |
(902) 0x84f54 CMP %RCX,(%RDX,%R8,1) |
(902) 0x84f58 JE 84fa3 |
(902) 0x84f5a ADD $0x8,%RSI |
(902) 0x84f5e ADD $0x8,%RAX |
(902) 0x84f62 CMP %RSI,0x158(%RSP) |
(902) 0x84f6a JE 852f0 |
(902) 0x84f70 MOV (%RSI),%RCX |
(902) 0x84f73 MOV 0x150(%RSP),%R15 |
(902) 0x84f7b LEA (,%RCX,8),%R8 |
(902) 0x84f83 CMP (%R15,%RCX,8),%RDI |
(902) 0x84f87 JE 84ff0 |
(902) 0x84f89 MOV 0x110(%RSP),%R14 |
(902) 0x84f91 CMPQ $-0x3,(%R14,%RCX,8) |
(902) 0x84f96 JE 84f5a |
(902) 0x84f98 CMPQ $0x1,0x140(%RSP) |
(902) 0x84fa1 JNE 84f40 |
(902) 0x84fa3 VADDSD (%RAX),%XMM0,%XMM0 |
(902) 0x84fa7 JMP 84f5a |
0x84fa9 NOPL (%RAX) |
(906) 0x84fb0 MOV 0x150(%RSP),%RSI |
(906) 0x84fb8 INC %RAX |
(906) 0x84fbb MOV %RDI,(%RSI,%RDX,8) |
(906) 0x84fbf MOV (%R8),%RSI |
(906) 0x84fc2 CMP %RAX,%RSI |
(906) 0x84fc5 JG 84e50 |
(897) 0x84fcb JMP 84e76 |
(905) 0x84fd0 MOV 0x118(%RSP),%RSI |
(905) 0x84fd8 INC %RAX |
(905) 0x84fdb MOV %RDI,(%RSI,%RDX,8) |
(905) 0x84fdf MOV (%RCX),%RSI |
(905) 0x84fe2 CMP %RAX,%RSI |
(905) 0x84fe5 JG 84e98 |
(897) 0x84feb JMP 84ebe |
(902) 0x84ff0 MOV 0xd0(%RSP),%R15 |
(902) 0x84ff8 MOV (%R15,%RCX,8),%RDX |
(902) 0x84ffc MOV 0x8(%R15,%R8,1),%R15 |
(902) 0x85001 CMP %R15,%RDX |
(902) 0x85004 JGE 85173 |
(902) 0x8500a MOV %R15,%R14 |
(902) 0x8500d SUB %RDX,%R14 |
(902) 0x85010 AND $0x3,%R14D |
(902) 0x85014 JE 850b7 |
(902) 0x8501a CMP $0x1,%R14 |
(902) 0x8501e JE 85080 |
(902) 0x85020 CMP $0x2,%R14 |
(902) 0x85024 JE 85052 |
(902) 0x85026 MOV (%R13,%RDX,8),%R14 |
(902) 0x8502b VMOVSD (%RAX),%XMM5 |
(902) 0x8502f VMULSD (%R12,%RDX,8),%XMM5,%XMM6 |
(902) 0x85035 INC %RDX |
(902) 0x85038 MOV (%R9,%R14,8),%R14 |
(902) 0x8503c LEA (%R12,%R14,8),%R14 |
(902) 0x85040 VADDSD (%R14),%XMM6,%XMM7 |
(902) 0x85045 VADDSD %XMM6,%XMM1,%XMM1 |
(902) 0x85049 VADDSD %XMM6,%XMM0,%XMM0 |
(902) 0x8504d VMOVSD %XMM7,(%R14) |
(902) 0x85052 MOV (%R13,%RDX,8),%R14 |
(902) 0x85057 VMOVSD (%RAX),%XMM8 |
(902) 0x8505b VMULSD (%R12,%RDX,8),%XMM8,%XMM9 |
(902) 0x85061 INC %RDX |
(902) 0x85064 MOV (%R9,%R14,8),%R14 |
(902) 0x85068 LEA (%R12,%R14,8),%R14 |
(902) 0x8506c VADDSD (%R14),%XMM9,%XMM10 |
(902) 0x85071 VADDSD %XMM9,%XMM1,%XMM1 |
(902) 0x85076 VADDSD %XMM9,%XMM0,%XMM0 |
(902) 0x8507b VMOVSD %XMM10,(%R14) |
(902) 0x85080 MOV (%R13,%RDX,8),%R14 |
(902) 0x85085 VMOVSD (%RAX),%XMM11 |
(902) 0x85089 VMULSD (%R12,%RDX,8),%XMM11,%XMM12 |
(902) 0x8508f INC %RDX |
(902) 0x85092 MOV (%R9,%R14,8),%R14 |
(902) 0x85096 LEA (%R12,%R14,8),%R14 |
(902) 0x8509a VADDSD (%R14),%XMM12,%XMM13 |
(902) 0x8509f VADDSD %XMM12,%XMM1,%XMM1 |
(902) 0x850a4 VADDSD %XMM12,%XMM0,%XMM0 |
(902) 0x850a9 VMOVSD %XMM13,(%R14) |
(902) 0x850ae CMP %R15,%RDX |
(902) 0x850b1 JE 85173 |
(904) 0x850b7 MOV (%R13,%RDX,8),%R14 |
(904) 0x850bc VMOVSD (%RAX),%XMM14 |
(904) 0x850c0 VMULSD (%R12,%RDX,8),%XMM14,%XMM15 |
(904) 0x850c6 MOV (%R9,%R14,8),%R14 |
(904) 0x850ca LEA (%R12,%R14,8),%R14 |
(904) 0x850ce VADDSD (%R14),%XMM15,%XMM2 |
(904) 0x850d3 VADDSD %XMM15,%XMM1,%XMM6 |
(904) 0x850d8 VADDSD %XMM15,%XMM0,%XMM7 |
(904) 0x850dd VMOVSD %XMM2,(%R14) |
(904) 0x850e2 MOV 0x8(%R13,%RDX,8),%R14 |
(904) 0x850e7 VMOVSD (%RAX),%XMM5 |
(904) 0x850eb VMULSD 0x8(%R12,%RDX,8),%XMM5,%XMM8 |
(904) 0x850f2 MOV (%R9,%R14,8),%R14 |
(904) 0x850f6 LEA (%R12,%R14,8),%R14 |
(904) 0x850fa VADDSD (%R14),%XMM8,%XMM9 |
(904) 0x850ff VADDSD %XMM8,%XMM6,%XMM10 |
(904) 0x85104 VADDSD %XMM8,%XMM7,%XMM11 |
(904) 0x85109 VMOVSD %XMM9,(%R14) |
(904) 0x8510e MOV 0x10(%R13,%RDX,8),%R14 |
(904) 0x85113 VMOVSD (%RAX),%XMM12 |
(904) 0x85117 VMULSD 0x10(%R12,%RDX,8),%XMM12,%XMM13 |
(904) 0x8511e MOV (%R9,%R14,8),%R14 |
(904) 0x85122 LEA (%R12,%R14,8),%R14 |
(904) 0x85126 VADDSD (%R14),%XMM13,%XMM1 |
(904) 0x8512b VADDSD %XMM13,%XMM10,%XMM14 |
(904) 0x85130 VADDSD %XMM13,%XMM11,%XMM0 |
(904) 0x85135 VMOVSD %XMM1,(%R14) |
(904) 0x8513a MOV 0x18(%R13,%RDX,8),%R14 |
(904) 0x8513f VMOVSD (%RAX),%XMM15 |
(904) 0x85143 VMULSD 0x18(%R12,%RDX,8),%XMM15,%XMM12 |
(904) 0x8514a ADD $0x4,%RDX |
(904) 0x8514e MOV (%R9,%R14,8),%R14 |
(904) 0x85152 LEA (%R12,%R14,8),%R14 |
(904) 0x85156 VADDSD (%R14),%XMM12,%XMM2 |
(904) 0x8515b VADDSD %XMM12,%XMM14,%XMM1 |
(904) 0x85160 VADDSD %XMM12,%XMM0,%XMM0 |
(904) 0x85165 VMOVSD %XMM2,(%R14) |
(904) 0x8516a CMP %R15,%RDX |
(904) 0x8516d JNE 850b7 |
(902) 0x85173 MOV 0xd8(%RSP),%R15 |
(902) 0x8517b MOV (%R15,%RCX,8),%RDX |
(902) 0x8517f MOV 0x8(%R15,%R8,1),%R8 |
(902) 0x85184 CMP %R8,%RDX |
(902) 0x85187 JGE 84f5a |
(902) 0x8518d MOV %R8,%RCX |
(902) 0x85190 SUB %RDX,%RCX |
(902) 0x85193 AND $0x3,%ECX |
(902) 0x85196 JE 85230 |
(902) 0x8519c CMP $0x1,%RCX |
(902) 0x851a0 JE 851fc |
(902) 0x851a2 CMP $0x2,%RCX |
(902) 0x851a6 JE 851d1 |
(902) 0x851a8 MOV (%R10,%RDX,8),%R14 |
(902) 0x851ac VMOVSD (%RAX),%XMM6 |
(902) 0x851b0 VMULSD (%R11,%RDX,8),%XMM6,%XMM7 |
(902) 0x851b6 INC %RDX |
(902) 0x851b9 MOV (%RBX,%R14,8),%R15 |
(902) 0x851bd LEA (%R11,%R15,8),%RCX |
(902) 0x851c1 VADDSD (%RCX),%XMM7,%XMM5 |
(902) 0x851c5 VADDSD %XMM7,%XMM1,%XMM1 |
(902) 0x851c9 VADDSD %XMM7,%XMM0,%XMM0 |
(902) 0x851cd VMOVSD %XMM5,(%RCX) |
(902) 0x851d1 MOV (%R10,%RDX,8),%R14 |
(902) 0x851d5 VMOVSD (%RAX),%XMM8 |
(902) 0x851d9 VMULSD (%R11,%RDX,8),%XMM8,%XMM9 |
(902) 0x851df INC %RDX |
(902) 0x851e2 MOV (%RBX,%R14,8),%R15 |
(902) 0x851e6 LEA (%R11,%R15,8),%RCX |
(902) 0x851ea VADDSD (%RCX),%XMM9,%XMM10 |
(902) 0x851ee VADDSD %XMM9,%XMM1,%XMM1 |
(902) 0x851f3 VADDSD %XMM9,%XMM0,%XMM0 |
(902) 0x851f8 VMOVSD %XMM10,(%RCX) |
(902) 0x851fc MOV (%R10,%RDX,8),%R14 |
(902) 0x85200 VMOVSD (%RAX),%XMM11 |
(902) 0x85204 VMULSD (%R11,%RDX,8),%XMM11,%XMM12 |
(902) 0x8520a INC %RDX |
(902) 0x8520d MOV (%RBX,%R14,8),%R15 |
(902) 0x85211 LEA (%R11,%R15,8),%RCX |
(902) 0x85215 VADDSD (%RCX),%XMM12,%XMM13 |
(902) 0x85219 VADDSD %XMM12,%XMM1,%XMM1 |
(902) 0x8521e VADDSD %XMM12,%XMM0,%XMM0 |
(902) 0x85223 VMOVSD %XMM13,(%RCX) |
(902) 0x85227 CMP %R8,%RDX |
(902) 0x8522a JE 84f5a |
(903) 0x85230 MOV (%R10,%RDX,8),%R14 |
(903) 0x85234 VMOVSD (%RAX),%XMM12 |
(903) 0x85238 VMULSD (%R11,%RDX,8),%XMM12,%XMM14 |
(903) 0x8523e MOV (%RBX,%R14,8),%R15 |
(903) 0x85242 MOV 0x8(%R10,%RDX,8),%R14 |
(903) 0x85247 LEA (%R11,%R15,8),%RCX |
(903) 0x8524b MOV (%RBX,%R14,8),%R15 |
(903) 0x8524f MOV 0x10(%R10,%RDX,8),%R14 |
(903) 0x85254 VADDSD (%RCX),%XMM14,%XMM15 |
(903) 0x85258 VADDSD %XMM14,%XMM1,%XMM1 |
(903) 0x8525d VADDSD %XMM14,%XMM0,%XMM0 |
(903) 0x85262 VMOVSD %XMM15,(%RCX) |
(903) 0x85266 LEA (%R11,%R15,8),%RCX |
(903) 0x8526a VMOVSD (%RAX),%XMM2 |
(903) 0x8526e MOV (%RBX,%R14,8),%R15 |
(903) 0x85272 VMULSD 0x8(%R11,%RDX,8),%XMM2,%XMM6 |
(903) 0x85279 MOV 0x18(%R10,%RDX,8),%R14 |
(903) 0x8527e VADDSD (%RCX),%XMM6,%XMM7 |
(903) 0x85282 VMOVSD %XMM7,(%RCX) |
(903) 0x85286 LEA (%R11,%R15,8),%RCX |
(903) 0x8528a VMOVSD (%RAX),%XMM5 |
(903) 0x8528e MOV (%RBX,%R14,8),%R15 |
(903) 0x85292 VMULSD 0x10(%R11,%RDX,8),%XMM5,%XMM10 |
(903) 0x85299 VADDSD %XMM6,%XMM1,%XMM8 |
(903) 0x8529d VADDSD %XMM6,%XMM0,%XMM9 |
(903) 0x852a1 VADDSD (%RCX),%XMM10,%XMM11 |
(903) 0x852a5 VMOVSD %XMM11,(%RCX) |
(903) 0x852a9 VMOVSD (%RAX),%XMM12 |
(903) 0x852ad VMULSD 0x18(%R11,%RDX,8),%XMM12,%XMM12 |
(903) 0x852b4 LEA (%R11,%R15,8),%RCX |
(903) 0x852b8 VADDSD %XMM10,%XMM8,%XMM13 |
(903) 0x852bd VADDSD %XMM10,%XMM9,%XMM14 |
(903) 0x852c2 ADD $0x4,%RDX |
(903) 0x852c6 VADDSD (%RCX),%XMM12,%XMM15 |
(903) 0x852ca VADDSD %XMM12,%XMM13,%XMM1 |
(903) 0x852cf VADDSD %XMM12,%XMM14,%XMM0 |
(903) 0x852d4 VMOVSD %XMM15,(%RCX) |
(903) 0x852d8 CMP %R8,%RDX |
(903) 0x852db JNE 85230 |
(902) 0x852e1 JMP 84f5a |
0x852e6 NOPW %CS:(%RAX,%RAX,1) |
(897) 0x852f0 MOV 0xa0(%RSP),%R15 |
(897) 0x852f8 MOV 0x98(%RSP),%R8 |
(897) 0x85300 MOV 0xe8(%RSP),%R14 |
(897) 0x85308 MOV 0x60(%RSP),%RCX |
(897) 0x8530d MOV 0x148(%RSP),%RAX |
(897) 0x85315 MOV (%RCX,%RDI,8),%RDX |
(897) 0x85319 MOV 0x8(%RCX,%RAX,1),%RCX |
(897) 0x8531e CMP %RCX,%RDX |
(897) 0x85321 JGE 85423 |
(897) 0x85327 MOV 0x30(%RSP),%RAX |
(897) 0x8532c SAL $0x3,%RDX |
(897) 0x85330 MOV %R10,0xa0(%RSP) |
(897) 0x85338 MOV %R13,0x98(%RSP) |
(897) 0x85340 LEA (%RAX,%RDX,1),%RSI |
(897) 0x85344 MOV %R8,0x90(%RSP) |
(897) 0x8534c MOV %RSI,0x158(%RSP) |
(897) 0x85354 MOV 0x28(%RSP),%RSI |
(897) 0x85359 ADD %RSI,%RDX |
(897) 0x8535c LEA (%RAX,%RCX,8),%RSI |
(897) 0x85360 MOV %R14,%RAX |
(897) 0x85363 MOV 0x38(%RSP),%R14 |
(897) 0x85368 JMP 853ac |
0x8536a NOPW (%RAX,%RAX,1) |
(900) 0x85370 MOV 0x108(%RSP),%R10 |
(900) 0x85378 MOV 0x148(%RSP),%R13 |
(900) 0x85380 MOV 0xf0(%RSP),%RCX |
(900) 0x85388 MOV (%R10,%R13,1),%R10 |
(900) 0x8538c CMP %R10,(%RCX,%R8,1) |
(900) 0x85390 JE 853ff |
(900) 0x85392 ADDQ $0x8,0x158(%RSP) |
(900) 0x8539b ADD $0x8,%RDX |
(900) 0x8539f MOV 0x158(%RSP),%RCX |
(900) 0x853a7 CMP %RSI,%RCX |
(900) 0x853aa JE 85408 |
(900) 0x853ac MOV 0x158(%RSP),%R13 |
(900) 0x853b4 MOV (%R13),%RCX |
(900) 0x853b8 TEST %R15,%R15 |
(900) 0x853bb JE 853c9 |
(900) 0x853bd MOV 0x100(%RSP),%R10 |
(900) 0x853c5 MOV (%R10,%RCX,8),%RCX |
(900) 0x853c9 LEA (,%RCX,8),%R8 |
(900) 0x853d1 TEST %RCX,%RCX |
(900) 0x853d4 JS 853e9 |
(900) 0x853d6 MOV 0x118(%RSP),%R13 |
(900) 0x853de CMP (%R13,%RCX,8),%RDI |
(900) 0x853e3 JE 857d0 |
(900) 0x853e9 CMPQ $-0x3,(%R14,%R8,1) |
(900) 0x853ee JE 85392 |
(900) 0x853f0 CMPQ $0x1,0x140(%RSP) |
(900) 0x853f9 JNE 85370 |
(900) 0x853ff VADDSD (%RDX),%XMM0,%XMM0 |
(900) 0x85403 JMP 85392 |
0x85405 NOPL (%RAX) |
(897) 0x85408 MOV 0xa0(%RSP),%R10 |
(897) 0x85410 MOV 0x98(%RSP),%R13 |
(897) 0x85418 MOV %RAX,%R14 |
(897) 0x8541b MOV 0x90(%RSP),%R8 |
(897) 0x85423 MOV 0xc8(%RSP),%RDI |
(897) 0x8542b VMULSD (%RDI,%R8,8),%XMM1,%XMM9 |
(897) 0x85431 VCOMISD %XMM3,%XMM9 |
(897) 0x85435 JE 85440 |
(897) 0x85437 VXORPD %XMM4,%XMM0,%XMM10 |
(897) 0x8543b VDIVSD %XMM9,%XMM10,%XMM12 |
(897) 0x85440 MOV 0xb8(%RSP),%R8 |
(897) 0x85448 MOV 0xc0(%RSP),%RAX |
(897) 0x85450 MOV (%R8),%RSI |
(897) 0x85453 MOV (%RAX),%RCX |
(897) 0x85456 CMP %RCX,%RSI |
(897) 0x85459 JGE 855d6 |
(897) 0x8545f SUB %RSI,%RCX |
(897) 0x85462 MOV %RSI,%RDI |
(897) 0x85465 LEA -0x1(%RCX),%RDX |
(897) 0x85469 CMP $0x2,%RDX |
(897) 0x8546d JBE 85ac9 |
(897) 0x85473 MOV %RCX,%RDX |
(897) 0x85476 LEA (%R12,%RSI,8),%RAX |
(897) 0x8547a VBROADCASTSD %XMM12,%YMM5 |
(897) 0x8547f SHR $0x2,%RDX |
(897) 0x85483 SAL $0x5,%RDX |
(897) 0x85487 LEA (%RDX,%RAX,1),%R8 |
(897) 0x8548b SUB $0x20,%RDX |
(897) 0x8548f SHR $0x5,%RDX |
(897) 0x85493 INC %RDX |
(897) 0x85496 AND $0x7,%EDX |
(897) 0x85499 JE 85523 |
(897) 0x8549f CMP $0x1,%RDX |
(897) 0x854a3 JE 85511 |
(897) 0x854a5 CMP $0x2,%RDX |
(897) 0x854a9 JE 85504 |
(897) 0x854ab CMP $0x3,%RDX |
(897) 0x854af JE 854f7 |
(897) 0x854b1 CMP $0x4,%RDX |
(897) 0x854b5 JE 854ea |
(897) 0x854b7 CMP $0x5,%RDX |
(897) 0x854bb JE 854dd |
(897) 0x854bd CMP $0x6,%RDX |
(897) 0x854c1 JE 854d0 |
(897) 0x854c3 VMULPD (%RAX),%YMM5,%YMM11 |
(897) 0x854c7 ADD $0x20,%RAX |
(897) 0x854cb VMOVUPD %YMM11,-0x20(%RAX) |
(897) 0x854d0 VMULPD (%RAX),%YMM5,%YMM13 |
(897) 0x854d4 ADD $0x20,%RAX |
(897) 0x854d8 VMOVUPD %YMM13,-0x20(%RAX) |
(897) 0x854dd VMULPD (%RAX),%YMM5,%YMM14 |
(897) 0x854e1 ADD $0x20,%RAX |
(897) 0x854e5 VMOVUPD %YMM14,-0x20(%RAX) |
(897) 0x854ea VMULPD (%RAX),%YMM5,%YMM15 |
(897) 0x854ee ADD $0x20,%RAX |
(897) 0x854f2 VMOVUPD %YMM15,-0x20(%RAX) |
(897) 0x854f7 VMULPD (%RAX),%YMM5,%YMM2 |
(897) 0x854fb ADD $0x20,%RAX |
(897) 0x854ff VMOVUPD %YMM2,-0x20(%RAX) |
(897) 0x85504 VMULPD (%RAX),%YMM5,%YMM6 |
(897) 0x85508 ADD $0x20,%RAX |
(897) 0x8550c VMOVUPD %YMM6,-0x20(%RAX) |
(897) 0x85511 VMULPD (%RAX),%YMM5,%YMM7 |
(897) 0x85515 ADD $0x20,%RAX |
(897) 0x85519 VMOVUPD %YMM7,-0x20(%RAX) |
(897) 0x8551e CMP %R8,%RAX |
(897) 0x85521 JE 85592 |
(899) 0x85523 VMULPD (%RAX),%YMM5,%YMM1 |
(899) 0x85527 ADD $0x100,%RAX |
(899) 0x8552d VMULPD -0xe0(%RAX),%YMM5,%YMM0 |
(899) 0x85535 VMULPD -0xc0(%RAX),%YMM5,%YMM8 |
(899) 0x8553d VMULPD -0xa0(%RAX),%YMM5,%YMM9 |
(899) 0x85545 VMULPD -0x80(%RAX),%YMM5,%YMM10 |
(899) 0x8554a VMULPD -0x60(%RAX),%YMM5,%YMM11 |
(899) 0x8554f VMOVUPD %YMM1,-0x100(%RAX) |
(899) 0x85557 VMULPD -0x40(%RAX),%YMM5,%YMM13 |
(899) 0x8555c VMOVUPD %YMM0,-0xe0(%RAX) |
(899) 0x85564 VMULPD -0x20(%RAX),%YMM5,%YMM14 |
(899) 0x85569 VMOVUPD %YMM8,-0xc0(%RAX) |
(899) 0x85571 VMOVUPD %YMM9,-0xa0(%RAX) |
(899) 0x85579 VMOVUPD %YMM10,-0x80(%RAX) |
(899) 0x8557e VMOVUPD %YMM11,-0x60(%RAX) |
(899) 0x85583 VMOVUPD %YMM13,-0x40(%RAX) |
(899) 0x85588 VMOVUPD %YMM14,-0x20(%RAX) |
(899) 0x8558d CMP %R8,%RAX |
(899) 0x85590 JNE 85523 |
(897) 0x85592 MOV %RCX,%R8 |
(897) 0x85595 AND $-0x4,%R8 |
(897) 0x85599 ADD %R8,%RSI |
(897) 0x8559c TEST $0x3,%CL |
(897) 0x8559f JE 855d6 |
(897) 0x855a1 SUB %R8,%RCX |
(897) 0x855a4 CMP $0x1,%RCX |
(897) 0x855a8 JE 855ca |
(897) 0x855aa ADD %RDI,%R8 |
(897) 0x855ad VMOVDDUP %XMM12,%XMM5 |
(897) 0x855b2 LEA (%R12,%R8,8),%RDI |
(897) 0x855b6 VMULPD (%RDI),%XMM5,%XMM15 |
(897) 0x855ba VMOVUPD %XMM15,(%RDI) |
(897) 0x855be TEST $0x1,%CL |
(897) 0x855c1 JE 855d6 |
(897) 0x855c3 AND $-0x2,%RCX |
(897) 0x855c7 ADD %RCX,%RSI |
(897) 0x855ca LEA (%R12,%RSI,8),%RSI |
(897) 0x855ce VMULSD (%RSI),%XMM12,%XMM2 |
(897) 0x855d2 VMOVSD %XMM2,(%RSI) |
(897) 0x855d6 MOV 0xa8(%RSP),%RCX |
(897) 0x855de MOV 0xb0(%RSP),%RAX |
(897) 0x855e6 MOV (%RCX),%RSI |
(897) 0x855e9 MOV (%RAX),%RCX |
(897) 0x855ec CMP %RSI,%RCX |
(897) 0x855ef JLE 8576c |
(897) 0x855f5 SUB %RSI,%RCX |
(897) 0x855f8 MOV %RSI,%RDI |
(897) 0x855fb LEA -0x1(%RCX),%RDX |
(897) 0x855ff CMP $0x2,%RDX |
(897) 0x85603 JBE 85ad1 |
(897) 0x85609 MOV %RCX,%RDX |
(897) 0x8560c LEA (%R11,%RSI,8),%RAX |
(897) 0x85610 VBROADCASTSD %XMM12,%YMM6 |
(897) 0x85615 SHR $0x2,%RDX |
(897) 0x85619 SAL $0x5,%RDX |
(897) 0x8561d LEA (%RDX,%RAX,1),%R8 |
(897) 0x85621 SUB $0x20,%RDX |
(897) 0x85625 SHR $0x5,%RDX |
(897) 0x85629 INC %RDX |
(897) 0x8562c AND $0x7,%EDX |
(897) 0x8562f JE 856b9 |
(897) 0x85635 CMP $0x1,%RDX |
(897) 0x85639 JE 856a7 |
(897) 0x8563b CMP $0x2,%RDX |
(897) 0x8563f JE 8569a |
(897) 0x85641 CMP $0x3,%RDX |
(897) 0x85645 JE 8568d |
(897) 0x85647 CMP $0x4,%RDX |
(897) 0x8564b JE 85680 |
(897) 0x8564d CMP $0x5,%RDX |
(897) 0x85651 JE 85673 |
(897) 0x85653 CMP $0x6,%RDX |
(897) 0x85657 JE 85666 |
(897) 0x85659 VMULPD (%RAX),%YMM6,%YMM7 |
(897) 0x8565d ADD $0x20,%RAX |
(897) 0x85661 VMOVUPD %YMM7,-0x20(%RAX) |
(897) 0x85666 VMULPD (%RAX),%YMM6,%YMM1 |
(897) 0x8566a ADD $0x20,%RAX |
(897) 0x8566e VMOVUPD %YMM1,-0x20(%RAX) |
(897) 0x85673 VMULPD (%RAX),%YMM6,%YMM0 |
(897) 0x85677 ADD $0x20,%RAX |
(897) 0x8567b VMOVUPD %YMM0,-0x20(%RAX) |
(897) 0x85680 VMULPD (%RAX),%YMM6,%YMM8 |
(897) 0x85684 ADD $0x20,%RAX |
(897) 0x85688 VMOVUPD %YMM8,-0x20(%RAX) |
(897) 0x8568d VMULPD (%RAX),%YMM6,%YMM9 |
(897) 0x85691 ADD $0x20,%RAX |
(897) 0x85695 VMOVUPD %YMM9,-0x20(%RAX) |
(897) 0x8569a VMULPD (%RAX),%YMM6,%YMM10 |
(897) 0x8569e ADD $0x20,%RAX |
(897) 0x856a2 VMOVUPD %YMM10,-0x20(%RAX) |
(897) 0x856a7 VMULPD (%RAX),%YMM6,%YMM11 |
(897) 0x856ab ADD $0x20,%RAX |
(897) 0x856af VMOVUPD %YMM11,-0x20(%RAX) |
(897) 0x856b4 CMP %R8,%RAX |
(897) 0x856b7 JE 85728 |
(898) 0x856b9 VMULPD (%RAX),%YMM6,%YMM13 |
(898) 0x856bd ADD $0x100,%RAX |
(898) 0x856c3 VMULPD -0xe0(%RAX),%YMM6,%YMM14 |
(898) 0x856cb VMULPD -0xc0(%RAX),%YMM6,%YMM5 |
(898) 0x856d3 VMULPD -0xa0(%RAX),%YMM6,%YMM15 |
(898) 0x856db VMULPD -0x80(%RAX),%YMM6,%YMM2 |
(898) 0x856e0 VMULPD -0x60(%RAX),%YMM6,%YMM7 |
(898) 0x856e5 VMOVUPD %YMM13,-0x100(%RAX) |
(898) 0x856ed VMULPD -0x40(%RAX),%YMM6,%YMM1 |
(898) 0x856f2 VMOVUPD %YMM14,-0xe0(%RAX) |
(898) 0x856fa VMULPD -0x20(%RAX),%YMM6,%YMM0 |
(898) 0x856ff VMOVUPD %YMM5,-0xc0(%RAX) |
(898) 0x85707 VMOVUPD %YMM15,-0xa0(%RAX) |
(898) 0x8570f VMOVUPD %YMM2,-0x80(%RAX) |
(898) 0x85714 VMOVUPD %YMM7,-0x60(%RAX) |
(898) 0x85719 VMOVUPD %YMM1,-0x40(%RAX) |
(898) 0x8571e VMOVUPD %YMM0,-0x20(%RAX) |
(898) 0x85723 CMP %R8,%RAX |
(898) 0x85726 JNE 856b9 |
(897) 0x85728 MOV %RCX,%R8 |
(897) 0x8572b AND $-0x4,%R8 |
(897) 0x8572f ADD %R8,%RSI |
(897) 0x85732 TEST $0x3,%CL |
(897) 0x85735 JE 8576c |
(897) 0x85737 SUB %R8,%RCX |
(897) 0x8573a CMP $0x1,%RCX |
(897) 0x8573e JE 85760 |
(897) 0x85740 ADD %RDI,%R8 |
(897) 0x85743 VMOVDDUP %XMM12,%XMM6 |
(897) 0x85748 LEA (%R11,%R8,8),%RDI |
(897) 0x8574c VMULPD (%RDI),%XMM6,%XMM8 |
(897) 0x85750 VMOVUPD %XMM8,(%RDI) |
(897) 0x85754 TEST $0x1,%CL |
(897) 0x85757 JE 8576c |
(897) 0x85759 AND $-0x2,%RCX |
(897) 0x8575d ADD %RCX,%RSI |
(897) 0x85760 LEA (%R11,%RSI,8),%RSI |
(897) 0x85764 VMULSD (%RSI),%XMM12,%XMM9 |
(897) 0x85768 VMOVSD %XMM9,(%RSI) |
(897) 0x8576c ADDQ $0x8,0xf8(%RSP) |
(897) 0x85775 MOV 0xf8(%RSP),%RCX |
(897) 0x8577d CMP %RCX,0x50(%RSP) |
(897) 0x85782 JNE 84988 |
0x85788 MOV %R9,%R15 |
0x8578b VZEROUPPER |
0x8578e MOV 0x150(%RSP),%RDI |
0x85796 CALL c850 <hypre_Free@plt> |
0x8579b MOV 0x118(%RSP),%RDI |
0x857a3 CALL c850 <hypre_Free@plt> |
0x857a8 MOV %R15,%RDI |
0x857ab CALL c850 <hypre_Free@plt> |
0x857b0 LEA -0x28(%RBP),%RSP |
0x857b4 MOV %RBX,%RDI |
0x857b7 POP %RBX |
0x857b8 POP %R12 |
0x857ba POP %R13 |
0x857bc POP %R14 |
0x857be POP %R15 |
0x857c0 POP %RBP |
0x857c1 JMP c850 |
0x857c6 NOPW %CS:(%RAX,%RAX,1) |
(900) 0x857d0 MOV 0x10(%RSP),%RCX |
(900) 0x857d5 MOV 0x18(%RSP),%R13 |
(900) 0x857da MOV (%RCX,%R8,1),%RCX |
(900) 0x857de MOV 0x8(%R13,%R8,1),%R10 |
(900) 0x857e3 ADD %RCX,%R10 |
(900) 0x857e6 MOV %R10,0xe8(%RSP) |
(900) 0x857ee CMP %R10,%RCX |
(900) 0x857f1 JGE 85392 |
(900) 0x857f7 MOV 0x8(%RSP),%R8 |
(900) 0x857fc MOV 0xe0(%RSP),%R13 |
(900) 0x85804 SUB %RCX,%R10 |
(900) 0x85807 MOV (%R8,%R13,1),%R8 |
(900) 0x8580b AND $0x3,%R10D |
(900) 0x8580f JE 858f4 |
(900) 0x85815 CMP $0x1,%R10 |
(900) 0x85819 JE 858a5 |
(900) 0x8581f CMP $0x2,%R10 |
(900) 0x85823 JE 85864 |
(900) 0x85825 MOV 0x88(%RSP),%R13 |
(900) 0x8582d MOV (%R8,%RCX,8),%R10 |
(900) 0x85831 VMOVSD (%RDX),%XMM2 |
(900) 0x85835 VMULSD (%R13,%RCX,8),%XMM2,%XMM6 |
(900) 0x8583c TEST %R10,%R10 |
(900) 0x8583f JS 85ad9 |
(900) 0x85845 MOV (%RBX,%R10,8),%R10 |
(900) 0x85849 LEA (%R11,%R10,8),%R13 |
(900) 0x8584d VADDSD (%R13),%XMM6,%XMM7 |
(900) 0x85853 VMOVSD %XMM7,(%R13) |
(900) 0x85859 VADDSD %XMM6,%XMM1,%XMM1 |
(900) 0x8585d VADDSD %XMM6,%XMM0,%XMM0 |
(900) 0x85861 INC %RCX |
(900) 0x85864 MOV 0x88(%RSP),%R13 |
(900) 0x8586c MOV (%R8,%RCX,8),%R10 |
(900) 0x85870 VMOVSD (%RDX),%XMM9 |
(900) 0x85874 VMULSD (%R13,%RCX,8),%XMM9,%XMM10 |
(900) 0x8587b TEST %R10,%R10 |
(900) 0x8587e JS 85aa0 |
(900) 0x85884 MOV (%RBX,%R10,8),%R10 |
(900) 0x85888 LEA (%R11,%R10,8),%R13 |
(900) 0x8588c VADDSD (%R13),%XMM10,%XMM5 |
(900) 0x85892 VMOVSD %XMM5,(%R13) |
(900) 0x85898 VADDSD %XMM10,%XMM1,%XMM1 |
(900) 0x8589d VADDSD %XMM10,%XMM0,%XMM0 |
(900) 0x858a2 INC %RCX |
(900) 0x858a5 MOV 0x88(%RSP),%R13 |
(900) 0x858ad MOV (%R8,%RCX,8),%R10 |
(900) 0x858b1 VMOVSD (%RDX),%XMM13 |
(900) 0x858b5 VMULSD (%R13,%RCX,8),%XMM13,%XMM12 |
(900) 0x858bc TEST %R10,%R10 |
(900) 0x858bf JS 85a70 |
(900) 0x858c5 MOV (%RBX,%R10,8),%R10 |
(900) 0x858c9 LEA (%R11,%R10,8),%R13 |
(900) 0x858cd VADDSD (%R13),%XMM12,%XMM14 |
(900) 0x858d3 VMOVSD %XMM14,(%R13) |
(900) 0x858d9 VADDSD %XMM12,%XMM1,%XMM1 |
(900) 0x858de VADDSD %XMM12,%XMM0,%XMM0 |
(900) 0x858e3 INC %RCX |
(900) 0x858e6 CMP %RCX,0xe8(%RSP) |
(900) 0x858ee JE 85392 |
(900) 0x858f4 MOV %R14,(%RSP) |
(900) 0x858f8 MOV 0x88(%RSP),%R13 |
(900) 0x85900 JMP 859a6 |
0x85905 NOPL (%RAX) |
(901) 0x85908 MOV (%RBX,%R10,8),%R14 |
(901) 0x8590c LEA (%R11,%R14,8),%R10 |
(901) 0x85910 VADDSD (%R10),%XMM9,%XMM10 |
(901) 0x85915 VMOVSD %XMM10,(%R10) |
(901) 0x8591a LEA 0x1(%RCX),%R14 |
(901) 0x8591e VMOVSD (%RDX),%XMM14 |
(901) 0x85922 VADDSD %XMM9,%XMM1,%XMM11 |
(901) 0x85927 MOV (%R8,%R14,8),%R10 |
(901) 0x8592b VMULSD (%R13,%R14,8),%XMM14,%XMM15 |
(901) 0x85932 VADDSD %XMM9,%XMM0,%XMM13 |
(901) 0x85937 TEST %R10,%R10 |
(901) 0x8593a JS 85a50 |
(901) 0x85940 MOV (%RBX,%R10,8),%R14 |
(901) 0x85944 LEA (%R11,%R14,8),%R10 |
(901) 0x85948 VADDSD (%R10),%XMM15,%XMM12 |
(901) 0x8594d VMOVSD %XMM12,(%R10) |
(901) 0x85952 LEA 0x2(%RCX),%R14 |
(901) 0x85956 VMOVSD (%RDX),%XMM1 |
(901) 0x8595a VADDSD %XMM15,%XMM11,%XMM6 |
(901) 0x8595f MOV (%R8,%R14,8),%R10 |
(901) 0x85963 VMULSD (%R13,%R14,8),%XMM1,%XMM12 |
(901) 0x8596a VADDSD %XMM15,%XMM13,%XMM7 |
(901) 0x8596f TEST %R10,%R10 |
(901) 0x85972 JS 85a30 |
(901) 0x85978 MOV (%RBX,%R10,8),%R14 |
(901) 0x8597c LEA (%R11,%R14,8),%R10 |
(901) 0x85980 VADDSD (%R10),%XMM12,%XMM0 |
(901) 0x85985 VMOVSD %XMM0,(%R10) |
(901) 0x8598a VADDSD %XMM12,%XMM6,%XMM1 |
(901) 0x8598f VADDSD %XMM12,%XMM7,%XMM0 |
(901) 0x85994 ADD $0x3,%RCX |
(901) 0x85998 CMP %RCX,0xe8(%RSP) |
(901) 0x859a0 JE 85a90 |
(901) 0x859a6 MOV (%R8,%RCX,8),%R14 |
(901) 0x859aa VMOVSD (%RDX),%XMM12 |
(901) 0x859ae VMULSD (%R13,%RCX,8),%XMM12,%XMM2 |
(901) 0x859b5 TEST %R14,%R14 |
(901) 0x859b8 JS 85a10 |
(901) 0x859ba MOV (%RBX,%R14,8),%R10 |
(901) 0x859be LEA (%R11,%R10,8),%R14 |
(901) 0x859c2 VADDSD (%R14),%XMM2,%XMM6 |
(901) 0x859c7 VMOVSD %XMM6,(%R14) |
(901) 0x859cc INC %RCX |
(901) 0x859cf VMOVSD (%RDX),%XMM8 |
(901) 0x859d3 VADDSD %XMM2,%XMM1,%XMM1 |
(901) 0x859d7 VADDSD %XMM2,%XMM0,%XMM0 |
(901) 0x859db MOV (%R8,%RCX,8),%R10 |
(901) 0x859df VMULSD (%R13,%RCX,8),%XMM8,%XMM9 |
(901) 0x859e6 TEST %R10,%R10 |
(901) 0x859e9 JNS 85908 |
(901) 0x859ef NOT %R10 |
(901) 0x859f2 MOV (%R9,%R10,8),%R14 |
(901) 0x859f6 LEA (%R12,%R14,8),%R10 |
(901) 0x859fa VADDSD (%R10),%XMM9,%XMM5 |
(901) 0x859ff VMOVSD %XMM5,(%R10) |
(901) 0x85a04 JMP 8591a |
0x85a09 NOPL (%RAX) |
(901) 0x85a10 NOT %R14 |
(901) 0x85a13 MOV (%R9,%R14,8),%R10 |
(901) 0x85a17 LEA (%R12,%R10,8),%R14 |
(901) 0x85a1b VADDSD (%R14),%XMM2,%XMM7 |
(901) 0x85a20 VMOVSD %XMM7,(%R14) |
(901) 0x85a25 JMP 859cc |
0x85a27 NOPW (%RAX,%RAX,1) |
(901) 0x85a30 NOT %R10 |
(901) 0x85a33 MOV (%R9,%R10,8),%R14 |
(901) 0x85a37 LEA (%R12,%R14,8),%R10 |
(901) 0x85a3b VADDSD (%R10),%XMM12,%XMM8 |
(901) 0x85a40 VMOVSD %XMM8,(%R10) |
(901) 0x85a45 JMP 8598a |
0x85a4a NOPW (%RAX,%RAX,1) |
(901) 0x85a50 NOT %R10 |
(901) 0x85a53 MOV (%R9,%R10,8),%R14 |
(901) 0x85a57 LEA (%R12,%R14,8),%R10 |
(901) 0x85a5b VADDSD (%R10),%XMM15,%XMM2 |
(901) 0x85a60 VMOVSD %XMM2,(%R10) |
(901) 0x85a65 JMP 85952 |
0x85a6a NOPW (%RAX,%RAX,1) |
(900) 0x85a70 NOT %R10 |
(900) 0x85a73 MOV (%R9,%R10,8),%R10 |
(900) 0x85a77 LEA (%R12,%R10,8),%R13 |
(900) 0x85a7b VADDSD (%R13),%XMM12,%XMM15 |
(900) 0x85a81 VMOVSD %XMM15,(%R13) |
(900) 0x85a87 JMP 858d9 |
0x85a8c NOPL (%RAX) |
(900) 0x85a90 MOV (%RSP),%R14 |
(900) 0x85a94 JMP 85392 |
0x85a99 NOPL (%RAX) |
(900) 0x85aa0 NOT %R10 |
(900) 0x85aa3 MOV (%R9,%R10,8),%R10 |
(900) 0x85aa7 LEA (%R12,%R10,8),%R13 |
(900) 0x85aab VADDSD (%R13),%XMM10,%XMM11 |
(900) 0x85ab1 VMOVSD %XMM11,(%R13) |
(900) 0x85ab7 JMP 85898 |
(897) 0x85abc VXORPD %XMM0,%XMM0,%XMM0 |
(897) 0x85ac0 VMOVSD %XMM0,%XMM0,%XMM1 |
(897) 0x85ac4 JMP 85308 |
(897) 0x85ac9 XOR %R8D,%R8D |
(897) 0x85acc JMP 855a1 |
(897) 0x85ad1 XOR %R8D,%R8D |
(897) 0x85ad4 JMP 85737 |
(900) 0x85ad9 NOT %R10 |
(900) 0x85adc MOV (%R9,%R10,8),%R10 |
(900) 0x85ae0 LEA (%R12,%R10,8),%R13 |
(900) 0x85ae4 VADDSD (%R13),%XMM6,%XMM8 |
(900) 0x85aea VMOVSD %XMM8,(%R13) |
(900) 0x85af0 JMP 85859 |
0x85af5 MOV %R11,0xb8(%RSP) |
0x85afd MOV $0x8,%ESI |
0x85b02 MOV %RDX,%RDI |
0x85b05 MOV %R10,0xc0(%RSP) |
0x85b0d VMOVSD %XMM2,0xe0(%RSP) |
0x85b16 JMP 847d3 |
0x85b1b MOV $0x8,%ESI |
0x85b20 MOV %RCX,%RDI |
0x85b23 MOV %R11,0x98(%RSP) |
0x85b2b MOV %R10,0xa0(%RSP) |
0x85b33 MOV %RDX,0xb8(%RSP) |
0x85b3b MOV %R8,0xc0(%RSP) |
0x85b43 VMOVSD %XMM2,0xe0(%RSP) |
0x85b4c CALL ce60 <hypre_CAlloc@plt> |
0x85b51 MOV 0xc0(%RSP),%R8 |
0x85b59 VMOVSD 0xe0(%RSP),%XMM2 |
0x85b62 MOV 0xb8(%RSP),%RDX |
0x85b6a MOV 0xa0(%RSP),%R10 |
0x85b72 MOV %RAX,%R15 |
0x85b75 MOV 0x98(%RSP),%R11 |
0x85b7d JMP 847a9 |
0x85b82 MOV $0x8,%ESI |
0x85b87 MOV %R14,%RDI |
0x85b8a MOV %R11,0x90(%RSP) |
0x85b92 MOV %R10,0x98(%RSP) |
0x85b9a MOV %RCX,0xa0(%RSP) |
0x85ba2 MOV %RDX,0xb8(%RSP) |
0x85baa MOV %R8,0xc0(%RSP) |
0x85bb2 VMOVSD %XMM2,0xe0(%RSP) |
0x85bbb CALL ce60 <hypre_CAlloc@plt> |
0x85bc0 MOV 0xc0(%RSP),%R8 |
0x85bc8 VMOVSD 0xe0(%RSP),%XMM2 |
0x85bd1 MOV %RAX,0x118(%RSP) |
0x85bd9 MOV 0xb8(%RSP),%RDX |
0x85be1 MOV 0xa0(%RSP),%RCX |
0x85be9 MOV 0x98(%RSP),%R10 |
0x85bf1 MOV 0x90(%RSP),%R11 |
0x85bf9 JMP 8479d |
0x85bfe MOV %RSI,%RDI |
0x85c01 MOV $0x8,%ESI |
0x85c06 MOV %R11,0x98(%RSP) |
0x85c0e MOV %R10,0xa0(%RSP) |
0x85c16 MOV %RCX,0xb8(%RSP) |
0x85c1e MOV %RDX,0xc0(%RSP) |
0x85c26 MOV %R8,0xe0(%RSP) |
0x85c2e VMOVSD %XMM2,0x118(%RSP) |
0x85c37 CALL ce60 <hypre_CAlloc@plt> |
0x85c3c MOV 0xe0(%RSP),%R8 |
0x85c44 VMOVSD 0x118(%RSP),%XMM2 |
0x85c4d MOV %RAX,0x150(%RSP) |
0x85c55 MOV 0xc0(%RSP),%RDX |
0x85c5d MOV 0xb8(%RSP),%RCX |
0x85c65 MOV 0xa0(%RSP),%R10 |
0x85c6d MOV 0x98(%RSP),%R11 |
0x85c75 JMP 84788 |
0x85c7a NOPW (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○95.97 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○4.03 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | libparcsr_ls.so |
nb instructions | 260 |
nb uops | 256 |
loop length | 1576 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 44 |
micro-operation queue | 42.67 cycles |
front end | 42.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 12.50 | 10.50 | 10.25 | 10.25 | 12.50 | 56.67 | 56.67 | 56.67 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
cycles | 12.50 | 10.50 | 10.25 | 10.25 | 12.50 | 56.67 | 56.67 | 56.67 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
Cycles executing div or sqrt instructions | 7.00-12.00 |
Front-end | 42.67 |
Dispatch | 56.67 |
DIV/SQRT | 7.00-12.00 |
Overall L1 | 56.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 6% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 11% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
AND $-0x20,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB $0x160,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x148(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x138(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x130(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x128(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x108(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x100(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf8(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xf0(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RDX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xe8(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xe0(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x110(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RBX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x140(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R10,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R11,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R12,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R14,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RSI,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xd8(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xd0(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc8(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xc0(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R15,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x68(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xb8(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb0(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xa8(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RBX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x98(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x80(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R9,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x60(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x58(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R15,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x50(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x48(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R11,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x90(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R12,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa0(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R13,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x78(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R14,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x88(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x70(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RBX,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x38(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x30(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x28(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RBX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x20(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x18(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R9,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x10(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x8(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RBX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDI,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %RSI,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 85bfe <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x167e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVQ $0,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 85b82 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1602> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVQ $0,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 85b1b <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x159b> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
CMP %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 85af5 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1575> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0,0x158(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
VMOVSD 0xe0(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JLE 8484f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x2cf> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
SAL $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL c100 <memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xe0(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 848a0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x320> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x118(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (,%R14,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSD %XMM2,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL c100 <memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xe0(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0x158(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL c9a0 <hypre_GetThreadNum@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL cb00 <hypre_NumActiveThreads@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xe8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xf8(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV 0x148(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x148(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV (%RDX,%R8,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (,%R8,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSD 0x158(%RSP),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
CQTO | scal (12.5%) | |||||||||||||||||
MOV %RDI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
IDIV %R9 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 | scal (12.5%) |
ADD %RCX,%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
DEC %R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV %R11,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
IMUL %RAX,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
ADD %R10,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RCX,%R10,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R9,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
CMOVNE %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RSI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 8578e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x120e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0xb0(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVQ 0x97c0b(%RIP),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
LEA (%R14,%R8,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R14,%RSI,8),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0xe8(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RDI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
DEC %R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0xa8(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL c850 <hypre_Free@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x118(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL c850 <hypre_Free@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL c850 <hypre_Free@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JMP c850 <hypre_Free@plt> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
JMP 847d3 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x253> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xe0(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
JMP 847a9 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x229> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xe0(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xa0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x98(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x90(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
JMP 8479d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x21d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R11,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xe0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0x118(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
JMP 84788 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x208> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
Source file and lines | par_multi_interp.c:1737-1881 |
Module | libparcsr_ls.so |
nb instructions | 260 |
nb uops | 256 |
loop length | 1576 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 44 |
micro-operation queue | 42.67 cycles |
front end | 42.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 12.50 | 10.50 | 10.25 | 10.25 | 12.50 | 56.67 | 56.67 | 56.67 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
cycles | 12.50 | 10.50 | 10.25 | 10.25 | 12.50 | 56.67 | 56.67 | 56.67 | 0.00 | 0.00 | 0.00 | 0.00 | 4.00 | 4.00 |
Cycles executing div or sqrt instructions | 7.00-12.00 |
Front-end | 42.67 |
Dispatch | 56.67 |
DIV/SQRT | 7.00-12.00 |
Overall L1 | 56.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 5% |
all | 6% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 11% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
AND $-0x20,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB $0x160,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x148(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x138(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x130(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x128(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x108(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x100(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf8(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xf0(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RDX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xe8(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xe0(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x110(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RBX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x140(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R10,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x120(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R11,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x118(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R12,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R14,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RSI,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xd8(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xd0(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc8(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xc0(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R15,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x68(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xb8(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb0(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xa8(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RBX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x98(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x80(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R9,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x60(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x58(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R15,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x50(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x48(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R11,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x90(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R12,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa0(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R13,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x78(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R14,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x88(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x70(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RBX,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x38(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x30(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x28(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RBX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x20(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x18(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R9,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x10(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x8(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RBX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDI,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %RSI,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 85bfe <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x167e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVQ $0,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 85b82 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1602> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOVQ $0,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 85b1b <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x159b> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
CMP %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 85af5 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x1575> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R8,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0,0x158(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
VMOVSD 0xe0(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JLE 8484f <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x2cf> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x158(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
SAL $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL c100 <memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xe0(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 848a0 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x320> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x118(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (,%R14,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSD %XMM2,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL c100 <memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xe0(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0x158(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV %RAX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL c9a0 <hypre_GetThreadNum@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL cb00 <hypre_NumActiveThreads@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xe8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xf8(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV 0x148(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x148(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV (%RDX,%R8,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (,%R8,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VMOVSD 0x158(%RSP),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
CQTO | scal (12.5%) | |||||||||||||||||
MOV %RDI,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
IDIV %R9 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 | scal (12.5%) |
ADD %RCX,%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
DEC %R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV %R11,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xb8(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
IMUL %RAX,%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
ADD %R10,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RCX,%R10,1),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R9,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
CMOVNE %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RSI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 8578e <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x120e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0xb0(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVQ 0x97c0b(%RIP),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VXORPD %XMM3,%XMM3,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
LEA (%R14,%R8,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R14,%RSI,8),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0xe8(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RDI,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
DEC %R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0xa8(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
MOV 0x150(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL c850 <hypre_Free@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x118(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL c850 <hypre_Free@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %R15,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL c850 <hypre_Free@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JMP c850 <hypre_Free@plt> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R11,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R10,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
JMP 847d3 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x253> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xe0(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
JMP 847a9 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x229> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xe0(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RAX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb8(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xa0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x98(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x90(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
JMP 8479d <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x21d> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %RSI,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R11,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM2,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xe0(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0x118(%RSP),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xa0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
JMP 84788 <hypre_BoomerAMGBuildMultipass._omp_fn.10+0x208> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass._omp_fn.10– | 1.51 | 1.12 |
▼Loop 897 - par_multi_interp.c:1774-1876 - libparcsr_ls.so– | 0.18 | 0.12 |
▼Loop 902 - par_multi_interp.c:1811-1837 - libparcsr_ls.so– | 0.91 | 0.62 |
○Loop 904 - par_multi_interp.c:1816-1822 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 903 - par_multi_interp.c:1824-1830 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 906 - par_multi_interp.c:1799-1803 - libparcsr_ls.so | 0.41 | 0.28 |
▼Loop 900 - par_multi_interp.c:1840-1867 - libparcsr_ls.so– | 0.00 | 0.00 |
○Loop 901 - par_multi_interp.c:1851-1860 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 905 - par_multi_interp.c:1805-1809 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 908 - par_multi_interp.c:1782-1787 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 898 - par_multi_interp.c:1875-1876 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 907 - par_multi_interp.c:1792-1797 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 899 - par_multi_interp.c:1873-1874 - libparcsr_ls.so | 0.00 | 0.00 |