Loop Id: 1214 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1747-1876 [...] | Coverage: 0.78% |
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Loop Id: 1214 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1747-1876 [...] | Coverage: 0.78% |
---|
0x6359c MOV -0xc0(%RBP),%RDX |
0x635a3 INC %RDX |
0x635a6 CMP -0xe0(%RBP),%RDX |
0x635ad JGE 64205 |
0x635b3 MOV -0x150(%RBP),%RAX |
0x635ba MOV %RDX,-0xc0(%RBP) |
0x635c1 MOV (%RAX,%RDX,8),%RCX |
0x635c5 MOV -0x158(%RBP),%RAX |
0x635cc MOV (%RAX,%RCX,8),%RDX |
0x635d0 MOV -0xc8(%RBP),%RAX |
0x635d7 MOV (%RAX,%RCX,8),%R12 |
0x635db MOV %RCX,-0x30(%RBP) |
0x635df MOV 0x8(%RAX,%RCX,8),%R8 |
0x635e4 LEA (%R8,%RDX,1),%RAX |
0x635e8 SUB %R12,%RAX |
0x635eb MOV %RDX,-0x38(%RBP) |
0x635ef CMP %RAX,%RDX |
0x635f2 MOV -0xb8(%RBP),%RSI |
0x635f9 JGE 637ef |
0x635ff MOV -0x70(%RBP),%RAX |
0x63603 MOV -0x130(%RBP),%RCX |
0x6360a MOV (%RCX,%RAX,8),%RAX |
0x6360e MOV %R8,%RCX |
0x63611 SUB %R12,%RCX |
0x63614 CMP $0xc,%RCX |
0x63618 JBE 637c0 |
0x6361e MOV %R8,-0xb0(%RBP) |
0x63625 MOVAPD %XMM6,-0xa0(%RBP) |
0x6362d LEA (%R14,%R12,8),%RDI |
0x63631 LEA (,%RCX,8),%RDX |
0x63639 XOR %ESI,%ESI |
0x6363b MOV %RAX,-0x68(%RBP) |
0x6363f MOV %RCX,-0xa8(%RBP) |
0x63646 CALL 15dc0 <_intel_fast_memset@plt> |
0x6364b MOV -0xa8(%RBP),%RSI |
0x63652 MOV %RSI,%R11 |
0x63655 SHR $0x3,%RSI |
0x63659 MOV -0x38(%RBP),%RAX |
0x6365d MOV -0x68(%RBP),%RCX |
0x63661 LEA (%RCX,%RAX,8),%RCX |
0x63665 ADD $0x38,%RCX |
0x63669 MOV -0x120(%RBP),%RDX |
0x63670 LEA (%RDX,%R12,8),%RDX |
0x63674 MOV %RSI,-0xd8(%RBP) |
0x6367b XOR %EDI,%EDI |
0x6367d MOV -0x60(%RBP),%R10 |
0x63681 NOPW %CS:(%RAX,%RAX,1) |
(1230) 0x63690 MOV -0x38(%RCX,%RDI,8),%R8 |
(1230) 0x63695 LEA (%R12,%RDI,1),%R9 |
(1230) 0x63699 MOV %R9,(%R10,%R8,8) |
(1230) 0x6369d MOV %R8,-0x38(%RDX,%RDI,8) |
(1230) 0x636a2 MOV -0x30(%RCX,%RDI,8),%R8 |
(1230) 0x636a7 LEA 0x1(%R12,%RDI,1),%R9 |
(1230) 0x636ac MOV %R9,(%R10,%R8,8) |
(1230) 0x636b0 MOV %R8,-0x30(%RDX,%RDI,8) |
(1230) 0x636b5 MOV -0x28(%RCX,%RDI,8),%R8 |
(1230) 0x636ba LEA 0x2(%R12,%RDI,1),%R9 |
(1230) 0x636bf MOV %R9,(%R10,%R8,8) |
(1230) 0x636c3 MOV %R8,-0x28(%RDX,%RDI,8) |
(1230) 0x636c8 MOV -0x20(%RCX,%RDI,8),%R8 |
(1230) 0x636cd LEA 0x3(%R12,%RDI,1),%R9 |
(1230) 0x636d2 MOV %R9,(%R10,%R8,8) |
(1230) 0x636d6 MOV %R8,-0x20(%RDX,%RDI,8) |
(1230) 0x636db MOV -0x18(%RCX,%RDI,8),%R8 |
(1230) 0x636e0 LEA 0x4(%R12,%RDI,1),%R9 |
(1230) 0x636e5 MOV %R9,(%R10,%R8,8) |
(1230) 0x636e9 MOV %R8,-0x18(%RDX,%RDI,8) |
(1230) 0x636ee MOV -0x10(%RCX,%RDI,8),%R8 |
(1230) 0x636f3 LEA 0x5(%R12,%RDI,1),%R9 |
(1230) 0x636f8 MOV %R9,(%R10,%R8,8) |
(1230) 0x636fc MOV %R8,-0x10(%RDX,%RDI,8) |
(1230) 0x63701 MOV -0x8(%RCX,%RDI,8),%R8 |
(1230) 0x63706 LEA 0x6(%R12,%RDI,1),%R9 |
(1230) 0x6370b MOV %R9,(%R10,%R8,8) |
(1230) 0x6370f MOV %R8,-0x8(%RDX,%RDI,8) |
(1230) 0x63714 MOV (%RCX,%RDI,8),%R8 |
(1230) 0x63718 LEA (%R12,%RDI,1),%R9 |
(1230) 0x6371c ADD $0x7,%R9 |
(1230) 0x63720 MOV %R9,(%R10,%R8,8) |
(1230) 0x63724 MOV %R8,(%RDX,%RDI,8) |
(1230) 0x63728 ADD $0x8,%RDI |
(1230) 0x6372c DEC %RSI |
(1230) 0x6372f JNE 63690 |
0x63735 MOV %R11,%RCX |
0x63738 MOV %R11,%RAX |
0x6373b AND $-0x8,%RAX |
0x6373f CMP %R11,%RAX |
0x63742 MOV -0x50(%RBP),%R10 |
0x63746 MOV -0xb8(%RBP),%RSI |
0x6374d MOV -0x40(%RBP),%R9 |
0x63751 MOV -0x58(%RBP),%RDX |
0x63755 MOV -0x48(%RBP),%R11 |
0x63759 XORPD %XMM5,%XMM5 |
0x6375d MOVAPD -0xa0(%RBP),%XMM6 |
0x63765 MOV -0xb0(%RBP),%R8 |
0x6376c MOV -0x68(%RBP),%RCX |
0x63770 JAE 637ef |
0x63772 ADD %RAX,%R12 |
0x63775 SALQ $0x6,-0xd8(%RBP) |
0x6377d MOV -0x38(%RBP),%RAX |
0x63781 MOV -0xd8(%RBP),%RDI |
0x63788 LEA (%RDI,%RAX,8),%RAX |
0x6378c MOV -0x60(%RBP),%RDI |
0x63790 ADD %RAX,%RCX |
0x63793 NOPW %CS:(%RAX,%RAX,1) |
(1231) 0x637a0 MOV (%RCX),%RAX |
(1231) 0x637a3 MOV %R12,(%RDI,%RAX,8) |
(1231) 0x637a7 MOV %RAX,(%RDX,%R12,8) |
(1231) 0x637ab INC %R12 |
(1231) 0x637ae ADD $0x8,%RCX |
(1231) 0x637b2 CMP %R12,%R8 |
(1231) 0x637b5 JNE 637a0 |
0x637b7 JMP 637ef |
0x637c0 MOV -0x38(%RBP),%RCX |
0x637c4 LEA (%RAX,%RCX,8),%RAX |
0x637c8 MOV -0x58(%RBP),%RDX |
0x637cc MOV -0x60(%RBP),%RDI |
(1229) 0x637d0 MOV (%RAX),%RCX |
(1229) 0x637d3 MOV %R12,(%RDI,%RCX,8) |
(1229) 0x637d7 MOVQ $0,(%R14,%R12,8) |
(1229) 0x637df MOV %RCX,(%RDX,%R12,8) |
(1229) 0x637e3 INC %R12 |
(1229) 0x637e6 ADD $0x8,%RAX |
(1229) 0x637ea CMP %R12,%R8 |
(1229) 0x637ed JNE 637d0 |
0x637ef MOV -0x160(%RBP),%RAX |
0x637f6 MOV -0x30(%RBP),%RCX |
0x637fa MOV (%RAX,%RCX,8),%R8 |
0x637fe MOV -0xd0(%RBP),%RAX |
0x63805 MOV (%RAX,%RCX,8),%R12 |
0x63809 MOV 0x8(%RAX,%RCX,8),%RDX |
0x6380e LEA (%RDX,%R8,1),%RAX |
0x63812 SUB %R12,%RAX |
0x63815 CMP %RAX,%R8 |
0x63818 JGE 639f0 |
0x6381e MOV -0x70(%RBP),%RAX |
0x63822 MOV -0x138(%RBP),%RCX |
0x63829 MOV (%RCX,%RAX,8),%RAX |
0x6382d MOV %RDX,%RCX |
0x63830 SUB %R12,%RCX |
0x63833 CMP $0xc,%RCX |
0x63837 JBE 639c0 |
0x6383d MOV %RDX,-0xb0(%RBP) |
0x63844 MOVAPD %XMM6,-0xa0(%RBP) |
0x6384c MOV %RAX,-0x38(%RBP) |
0x63850 LEA (,%R12,8),%RDI |
0x63858 ADD %R13,%RDI |
0x6385b LEA (,%RCX,8),%RDX |
0x63863 XOR %ESI,%ESI |
0x63865 MOV %R8,-0x68(%RBP) |
0x63869 MOV %RCX,-0xa8(%RBP) |
0x63870 CALL 15dc0 <_intel_fast_memset@plt> |
0x63875 MOV -0xa8(%RBP),%RAX |
0x6387c MOV %RAX,%R10 |
0x6387f SHR $0x3,%RAX |
0x63883 MOV -0x38(%RBP),%RCX |
0x63887 MOV -0x68(%RBP),%RDX |
0x6388b LEA (%RCX,%RDX,8),%RCX |
0x6388f ADD $0x38,%RCX |
0x63893 MOV -0x118(%RBP),%RDX |
0x6389a LEA (%RDX,%R12,8),%RDX |
0x6389e MOV %RAX,%RSI |
0x638a1 XOR %EDI,%EDI |
0x638a3 NOPW %CS:(%RAX,%RAX,1) |
(1227) 0x638b0 MOV -0x38(%RCX,%RDI,8),%R8 |
(1227) 0x638b5 LEA (%R12,%RDI,1),%R9 |
(1227) 0x638b9 MOV %R9,(%R15,%R8,8) |
(1227) 0x638bd MOV %R8,-0x38(%RDX,%RDI,8) |
(1227) 0x638c2 MOV -0x30(%RCX,%RDI,8),%R8 |
(1227) 0x638c7 LEA 0x1(%R12,%RDI,1),%R9 |
(1227) 0x638cc MOV %R9,(%R15,%R8,8) |
(1227) 0x638d0 MOV %R8,-0x30(%RDX,%RDI,8) |
(1227) 0x638d5 MOV -0x28(%RCX,%RDI,8),%R8 |
(1227) 0x638da LEA 0x2(%R12,%RDI,1),%R9 |
(1227) 0x638df MOV %R9,(%R15,%R8,8) |
(1227) 0x638e3 MOV %R8,-0x28(%RDX,%RDI,8) |
(1227) 0x638e8 MOV -0x20(%RCX,%RDI,8),%R8 |
(1227) 0x638ed LEA 0x3(%R12,%RDI,1),%R9 |
(1227) 0x638f2 MOV %R9,(%R15,%R8,8) |
(1227) 0x638f6 MOV %R8,-0x20(%RDX,%RDI,8) |
(1227) 0x638fb MOV -0x18(%RCX,%RDI,8),%R8 |
(1227) 0x63900 LEA 0x4(%R12,%RDI,1),%R9 |
(1227) 0x63905 MOV %R9,(%R15,%R8,8) |
(1227) 0x63909 MOV %R8,-0x18(%RDX,%RDI,8) |
(1227) 0x6390e MOV -0x10(%RCX,%RDI,8),%R8 |
(1227) 0x63913 LEA 0x5(%R12,%RDI,1),%R9 |
(1227) 0x63918 MOV %R9,(%R15,%R8,8) |
(1227) 0x6391c MOV %R8,-0x10(%RDX,%RDI,8) |
(1227) 0x63921 MOV -0x8(%RCX,%RDI,8),%R8 |
(1227) 0x63926 LEA 0x6(%R12,%RDI,1),%R9 |
(1227) 0x6392b MOV %R9,(%R15,%R8,8) |
(1227) 0x6392f MOV %R8,-0x8(%RDX,%RDI,8) |
(1227) 0x63934 MOV (%RCX,%RDI,8),%R8 |
(1227) 0x63938 LEA (%R12,%RDI,1),%R9 |
(1227) 0x6393c ADD $0x7,%R9 |
(1227) 0x63940 MOV %R9,(%R15,%R8,8) |
(1227) 0x63944 MOV %R8,(%RDX,%RDI,8) |
(1227) 0x63948 ADD $0x8,%RDI |
(1227) 0x6394c DEC %RSI |
(1227) 0x6394f JNE 638b0 |
0x63955 MOV %R10,%RDX |
0x63958 MOV %R10,%RCX |
0x6395b AND $-0x8,%RCX |
0x6395f CMP %R10,%RCX |
0x63962 MOV -0x50(%RBP),%R10 |
0x63966 MOV -0xb8(%RBP),%RSI |
0x6396d MOV -0x40(%RBP),%R9 |
0x63971 MOV -0x48(%RBP),%R11 |
0x63975 XORPD %XMM5,%XMM5 |
0x63979 MOVAPD -0xa0(%RBP),%XMM6 |
0x63981 MOV -0xb0(%RBP),%RDX |
0x63988 MOV -0x38(%RBP),%RDI |
0x6398c MOV -0x68(%RBP),%R8 |
0x63990 JAE 639f0 |
0x63992 ADD %RCX,%R12 |
0x63995 SAL $0x6,%RAX |
0x63999 LEA (%RAX,%R8,8),%RAX |
0x6399d ADD %RAX,%RDI |
(1228) 0x639a0 MOV (%RDI),%RAX |
(1228) 0x639a3 MOV %R12,(%R15,%RAX,8) |
(1228) 0x639a7 MOV %RAX,(%R9,%R12,8) |
(1228) 0x639ab INC %R12 |
(1228) 0x639ae ADD $0x8,%RDI |
(1228) 0x639b2 CMP %R12,%RDX |
(1228) 0x639b5 JNE 639a0 |
0x639b7 JMP 639f0 |
0x639c0 LEA (%RAX,%R8,8),%RAX |
0x639c4 NOPW %CS:(%RAX,%RAX,1) |
(1226) 0x639d0 MOV (%RAX),%RCX |
(1226) 0x639d3 MOV %R12,(%R15,%RCX,8) |
(1226) 0x639d7 MOVQ $0,(%R13,%R12,8) |
(1226) 0x639e0 MOV %RCX,(%R9,%R12,8) |
(1226) 0x639e4 INC %R12 |
(1226) 0x639e7 ADD $0x8,%RAX |
(1226) 0x639eb CMP %R12,%RDX |
(1226) 0x639ee JNE 639d0 |
0x639f0 MOV -0xf0(%RBP),%RCX |
0x639f7 MOV -0x30(%RBP),%RDX |
0x639fb MOV (%RCX,%RDX,8),%RAX |
0x639ff MOV 0x8(%RCX,%RDX,8),%RCX |
0x63a04 JMP 63a13 |
(1225) 0x63a10 INC %RAX |
(1225) 0x63a13 CMP %RCX,%RAX |
(1225) 0x63a16 JGE 63a60 |
(1225) 0x63a18 MOV -0x1a8(%RBP),%RDX |
(1225) 0x63a1f MOV (%RDX,%RAX,8),%RDX |
(1225) 0x63a23 MOV -0x1b8(%RBP),%RDI |
(1225) 0x63a2a MOV -0x88(%RBP),%R8 |
(1225) 0x63a31 CMP %R8,(%RDI,%RDX,8) |
(1225) 0x63a35 JNE 63a10 |
(1225) 0x63a37 MOV -0x80(%RBP),%RCX |
(1225) 0x63a3b MOV -0x30(%RBP),%RDI |
(1225) 0x63a3f MOV %RDI,(%RCX,%RDX,8) |
(1225) 0x63a43 MOV -0xf0(%RBP),%RCX |
(1225) 0x63a4a MOV 0x8(%RCX,%RDI,8),%RCX |
(1225) 0x63a4f JMP 63a10 |
0x63a60 MOV -0xf8(%RBP),%RCX |
0x63a67 MOV -0x30(%RBP),%RDX |
0x63a6b MOV (%RCX,%RDX,8),%RAX |
0x63a6f MOV 0x8(%RCX,%RDX,8),%RCX |
0x63a74 JMP 63a83 |
(1224) 0x63a80 INC %RAX |
(1224) 0x63a83 CMP %RCX,%RAX |
(1224) 0x63a86 JGE 63ac0 |
(1224) 0x63a88 MOV -0x1b0(%RBP),%RDX |
(1224) 0x63a8f MOV (%RDX,%RAX,8),%RDX |
(1224) 0x63a93 MOV -0x88(%RBP),%RDI |
(1224) 0x63a9a CMP %RDI,(%RSI,%RDX,8) |
(1224) 0x63a9e JNE 63a80 |
(1224) 0x63aa0 MOV -0x78(%RBP),%RCX |
(1224) 0x63aa4 MOV -0x30(%RBP),%RDI |
(1224) 0x63aa8 MOV %RDI,(%RCX,%RDX,8) |
(1224) 0x63aac MOV -0xf8(%RBP),%RCX |
(1224) 0x63ab3 MOV 0x8(%RCX,%RDI,8),%RCX |
(1224) 0x63ab8 JMP 63a80 |
0x63ac0 MOV -0x140(%RBP),%RAX |
0x63ac7 MOV -0x30(%RBP),%RCX |
0x63acb MOV (%RAX,%RCX,8),%RSI |
0x63acf MOV 0x8(%RAX,%RCX,8),%R12 |
0x63ad4 LEA 0x1(%RSI),%RDX |
0x63ad8 XORPD %XMM0,%XMM0 |
0x63adc CMP %R12,%RDX |
0x63adf MOV %RSI,-0xa0(%RBP) |
0x63ae6 JGE 63e60 |
0x63aec MOV -0x58(%RBP),%RAX |
0x63af0 MOV %R12,-0x38(%RBP) |
0x63af4 JMP 63b14 |
(1219) 0x63b00 MOV -0x40(%RBP),%R9 |
(1219) 0x63b04 MOV -0x58(%RBP),%RAX |
(1219) 0x63b08 INC %RDX |
(1219) 0x63b0b CMP %R12,%RDX |
(1219) 0x63b0e JE 63e60 |
(1219) 0x63b14 MOV -0x1a0(%RBP),%RSI |
(1219) 0x63b1b MOV (%RSI,%RDX,8),%RSI |
(1219) 0x63b1f MOV -0x80(%RBP),%RDI |
(1219) 0x63b23 MOV -0x30(%RBP),%RCX |
(1219) 0x63b27 CMP %RCX,(%RDI,%RSI,8) |
(1219) 0x63b2b JNE 63b60 |
(1219) 0x63b2d MOV -0xc8(%RBP),%R8 |
(1219) 0x63b34 MOV (%R8,%RSI,8),%RDI |
(1219) 0x63b38 MOV 0x8(%R8,%RSI,8),%R8 |
(1219) 0x63b3d MOV %R8,%R9 |
(1219) 0x63b40 SUB %RDI,%R9 |
(1219) 0x63b43 JLE 63ce5 |
(1219) 0x63b49 CMP $0x4,%R9 |
(1219) 0x63b4d JAE 63ba7 |
(1219) 0x63b4f JMP 63c73 |
(1219) 0x63b60 MOV -0x188(%RBP),%RDI |
(1219) 0x63b67 CMPQ $-0x3,(%RDI,%RSI,8) |
(1219) 0x63b6c JE 63b08 |
(1219) 0x63b6e CMPQ $0x1,-0x100(%RBP) |
(1219) 0x63b76 JE 63b91 |
(1219) 0x63b78 MOV -0xe8(%RBP),%R8 |
(1219) 0x63b7f MOV -0x30(%RBP),%RCX |
(1219) 0x63b83 MOV (%R8,%RCX,8),%RDI |
(1219) 0x63b87 CMP (%R8,%RSI,8),%RDI |
(1219) 0x63b8b JNE 63b08 |
(1219) 0x63b91 MOVAPD %XMM0,%XMM1 |
(1219) 0x63b95 UNPCKHPD %XMM0,%XMM1 |
(1219) 0x63b99 ADDSD (%RBX,%RDX,8),%XMM1 |
(1219) 0x63b9e UNPCKLPD %XMM1,%XMM0 |
(1219) 0x63ba2 JMP 63b08 |
(1219) 0x63ba7 MOV %R9,%R10 |
(1219) 0x63baa SHR $0x2,%R10 |
(1219) 0x63bae LEA 0x18(,%RDI,8),%R11 |
(1219) 0x63bb6 MOV -0x60(%RBP),%RCX |
(1219) 0x63bba NOPW (%RAX,%RAX,1) |
(1222) 0x63bc0 MOVSD -0x18(%R14,%R11,1),%XMM1 |
(1222) 0x63bc7 MULSD (%RBX,%RDX,8),%XMM1 |
(1222) 0x63bcc MOV -0x18(%RAX,%R11,1),%R12 |
(1222) 0x63bd1 MOV (%RCX,%R12,8),%R12 |
(1222) 0x63bd5 MOVSD (%R14,%R12,8),%XMM2 |
(1222) 0x63bdb ADDSD %XMM1,%XMM2 |
(1222) 0x63bdf MOVSD %XMM2,(%R14,%R12,8) |
(1222) 0x63be5 MOVSD -0x10(%R14,%R11,1),%XMM2 |
(1222) 0x63bec MULSD (%RBX,%RDX,8),%XMM2 |
(1222) 0x63bf1 MOV -0x10(%RAX,%R11,1),%R12 |
(1222) 0x63bf6 MOV (%RCX,%R12,8),%R12 |
(1222) 0x63bfa MOVSD (%R14,%R12,8),%XMM3 |
(1222) 0x63c00 ADDSD %XMM2,%XMM3 |
(1222) 0x63c04 MOVSD %XMM3,(%R14,%R12,8) |
(1222) 0x63c0a MOVSD -0x8(%R14,%R11,1),%XMM3 |
(1222) 0x63c11 MULSD (%RBX,%RDX,8),%XMM3 |
(1222) 0x63c16 MOV -0x8(%RAX,%R11,1),%R12 |
(1222) 0x63c1b MOV (%RCX,%R12,8),%R12 |
(1222) 0x63c1f MOVSD (%R14,%R12,8),%XMM4 |
(1222) 0x63c25 ADDSD %XMM3,%XMM4 |
(1222) 0x63c29 MOVSD %XMM4,(%R14,%R12,8) |
(1222) 0x63c2f MOVSD (%R14,%R11,1),%XMM6 |
(1222) 0x63c35 MULSD (%RBX,%RDX,8),%XMM6 |
(1222) 0x63c3a MOV (%RAX,%R11,1),%R12 |
(1222) 0x63c3e MOV (%RCX,%R12,8),%R12 |
(1222) 0x63c42 MOVSD (%R14,%R12,8),%XMM4 |
(1222) 0x63c48 ADDSD %XMM6,%XMM4 |
(1222) 0x63c4c MOVSD %XMM4,(%R14,%R12,8) |
(1222) 0x63c52 ADDSD %XMM6,%XMM3 |
(1222) 0x63c56 ADDSD %XMM1,%XMM2 |
(1222) 0x63c5a ADDSD %XMM3,%XMM2 |
(1222) 0x63c5e UNPCKLPD %XMM2,%XMM2 |
(1222) 0x63c62 ADDPD %XMM2,%XMM0 |
(1222) 0x63c66 ADD $0x20,%R11 |
(1222) 0x63c6a DEC %R10 |
(1222) 0x63c6d JNE 63bc0 |
(1219) 0x63c73 MOV %R9,%R10 |
(1219) 0x63c76 AND $-0x4,%R10 |
(1219) 0x63c7a CMP %R9,%R10 |
(1219) 0x63c7d JAE 63cd9 |
(1219) 0x63c7f ADD %R10,%RDI |
(1219) 0x63c82 MOV -0x50(%RBP),%R10 |
(1219) 0x63c86 MOV -0x48(%RBP),%R11 |
(1219) 0x63c8a MOV -0x60(%RBP),%RCX |
(1219) 0x63c8e MOV -0x38(%RBP),%R12 |
(1219) 0x63c92 NOPW %CS:(%RAX,%RAX,1) |
(1223) 0x63ca0 MOV (%RAX,%RDI,8),%R9 |
(1223) 0x63ca4 MOVSD (%R14,%RDI,8),%XMM6 |
(1223) 0x63caa MULSD (%RBX,%RDX,8),%XMM6 |
(1223) 0x63caf MOV (%RCX,%R9,8),%R9 |
(1223) 0x63cb3 MOVSD (%R14,%R9,8),%XMM1 |
(1223) 0x63cb9 ADDSD %XMM6,%XMM1 |
(1223) 0x63cbd MOVSD %XMM1,(%R14,%R9,8) |
(1223) 0x63cc3 MOVAPD %XMM6,%XMM1 |
(1223) 0x63cc7 UNPCKLPD %XMM6,%XMM1 |
(1223) 0x63ccb ADDPD %XMM1,%XMM0 |
(1223) 0x63ccf INC %RDI |
(1223) 0x63cd2 CMP %RDI,%R8 |
(1223) 0x63cd5 JNE 63ca0 |
(1219) 0x63cd7 JMP 63ce5 |
(1219) 0x63cd9 MOV -0x50(%RBP),%R10 |
(1219) 0x63cdd MOV -0x48(%RBP),%R11 |
(1219) 0x63ce1 MOV -0x38(%RBP),%R12 |
(1219) 0x63ce5 MOV -0xd0(%RBP),%RAX |
(1219) 0x63cec MOV (%RAX,%RSI,8),%RDI |
(1219) 0x63cf0 MOV 0x8(%RAX,%RSI,8),%RSI |
(1219) 0x63cf5 MOV %RSI,%R8 |
(1219) 0x63cf8 SUB %RDI,%R8 |
(1219) 0x63cfb JLE 63b00 |
(1219) 0x63d01 CMP $0x4,%R8 |
(1219) 0x63d05 JAE 63d0c |
(1219) 0x63d07 JMP 63ddc |
(1219) 0x63d0c MOV %R8,%R9 |
(1219) 0x63d0f SHR $0x2,%R9 |
(1219) 0x63d13 LEA 0x18(,%RDI,8),%R10 |
(1219) 0x63d1b MOV -0x40(%RBP),%RAX |
(1219) 0x63d1f NOP |
(1220) 0x63d20 MOVSD -0x18(%R13,%R10,1),%XMM1 |
(1220) 0x63d27 MULSD (%RBX,%RDX,8),%XMM1 |
(1220) 0x63d2c MOV -0x18(%RAX,%R10,1),%R11 |
(1220) 0x63d31 MOV (%R15,%R11,8),%R11 |
(1220) 0x63d35 MOVSD (%R13,%R11,8),%XMM2 |
(1220) 0x63d3c ADDSD %XMM1,%XMM2 |
(1220) 0x63d40 MOVSD %XMM2,(%R13,%R11,8) |
(1220) 0x63d47 MOVSD -0x10(%R13,%R10,1),%XMM2 |
(1220) 0x63d4e MULSD (%RBX,%RDX,8),%XMM2 |
(1220) 0x63d53 MOV -0x10(%RAX,%R10,1),%R11 |
(1220) 0x63d58 MOV (%R15,%R11,8),%R11 |
(1220) 0x63d5c MOVSD (%R13,%R11,8),%XMM3 |
(1220) 0x63d63 ADDSD %XMM2,%XMM3 |
(1220) 0x63d67 MOVSD %XMM3,(%R13,%R11,8) |
(1220) 0x63d6e MOVSD -0x8(%R13,%R10,1),%XMM3 |
(1220) 0x63d75 MULSD (%RBX,%RDX,8),%XMM3 |
(1220) 0x63d7a MOV -0x8(%RAX,%R10,1),%R11 |
(1220) 0x63d7f MOV (%R15,%R11,8),%R11 |
(1220) 0x63d83 MOVSD (%R13,%R11,8),%XMM4 |
(1220) 0x63d8a ADDSD %XMM3,%XMM4 |
(1220) 0x63d8e MOVSD %XMM4,(%R13,%R11,8) |
(1220) 0x63d95 MOVSD (%R13,%R10,1),%XMM6 |
(1220) 0x63d9c MULSD (%RBX,%RDX,8),%XMM6 |
(1220) 0x63da1 MOV (%RAX,%R10,1),%R11 |
(1220) 0x63da5 MOV (%R15,%R11,8),%R11 |
(1220) 0x63da9 MOVSD (%R13,%R11,8),%XMM4 |
(1220) 0x63db0 ADDSD %XMM6,%XMM4 |
(1220) 0x63db4 MOVSD %XMM4,(%R13,%R11,8) |
(1220) 0x63dbb ADDSD %XMM6,%XMM3 |
(1220) 0x63dbf ADDSD %XMM1,%XMM2 |
(1220) 0x63dc3 ADDSD %XMM3,%XMM2 |
(1220) 0x63dc7 UNPCKLPD %XMM2,%XMM2 |
(1220) 0x63dcb ADDPD %XMM2,%XMM0 |
(1220) 0x63dcf ADD $0x20,%R10 |
(1220) 0x63dd3 DEC %R9 |
(1220) 0x63dd6 JNE 63d20 |
(1219) 0x63ddc MOV %R8,%R9 |
(1219) 0x63ddf AND $-0x4,%R9 |
(1219) 0x63de3 CMP %R8,%R9 |
(1219) 0x63de6 JAE 63e3f |
(1219) 0x63de8 ADD %R9,%RDI |
(1219) 0x63deb MOV -0x50(%RBP),%R10 |
(1219) 0x63def MOV -0x40(%RBP),%R9 |
(1219) 0x63df3 MOV -0x58(%RBP),%RAX |
(1219) 0x63df7 MOV -0x48(%RBP),%R11 |
(1219) 0x63dfb NOPL (%RAX,%RAX,1) |
(1221) 0x63e00 MOV (%R9,%RDI,8),%R8 |
(1221) 0x63e04 MOVSD (%R13,%RDI,8),%XMM6 |
(1221) 0x63e0b MULSD (%RBX,%RDX,8),%XMM6 |
(1221) 0x63e10 MOV (%R15,%R8,8),%R8 |
(1221) 0x63e14 MOVSD (%R13,%R8,8),%XMM1 |
(1221) 0x63e1b ADDSD %XMM6,%XMM1 |
(1221) 0x63e1f MOVSD %XMM1,(%R13,%R8,8) |
(1221) 0x63e26 MOVAPD %XMM6,%XMM1 |
(1221) 0x63e2a UNPCKLPD %XMM6,%XMM1 |
(1221) 0x63e2e ADDPD %XMM1,%XMM0 |
(1221) 0x63e32 INC %RDI |
(1221) 0x63e35 CMP %RDI,%RSI |
(1221) 0x63e38 JNE 63e00 |
(1219) 0x63e3a JMP 63b08 |
(1219) 0x63e3f MOV -0x50(%RBP),%R10 |
(1219) 0x63e43 MOV -0x40(%RBP),%R9 |
(1219) 0x63e47 MOV -0x58(%RBP),%RAX |
(1219) 0x63e4b MOV -0x48(%RBP),%R11 |
(1219) 0x63e4f JMP 63b08 |
0x63e60 MOV -0x148(%RBP),%RAX |
0x63e67 MOV -0x30(%RBP),%RDX |
0x63e6b MOV (%RAX,%RDX,8),%RCX |
0x63e6f MOV 0x8(%RAX,%RDX,8),%RDX |
0x63e74 MOVAPD %XMM0,%XMM1 |
0x63e78 UNPCKHPD %XMM0,%XMM1 |
0x63e7c CMP %RDX,%RCX |
0x63e7f JGE 63fc0 |
0x63e85 MOV -0x128(%RBP),%RAX |
0x63e8c JMP 63ea6 |
(1217) 0x63e90 ADDSD (%R11,%RCX,8),%XMM1 |
(1217) 0x63e96 INC %RCX |
(1217) 0x63e99 CMP %RDX,%RCX |
(1217) 0x63e9c MOV -0x40(%RBP),%R9 |
(1217) 0x63ea0 JE 63fc0 |
(1217) 0x63ea6 LEA (%RAX,%RCX,8),%RSI |
(1217) 0x63eaa CMPQ $0,-0x1c0(%RBP) |
(1217) 0x63eb2 JE 63ec2 |
(1217) 0x63eb4 MOV (%RSI),%RSI |
(1217) 0x63eb7 MOV -0x190(%RBP),%RDI |
(1217) 0x63ebe LEA (%RDI,%RSI,8),%RSI |
(1217) 0x63ec2 MOV (%RSI),%RDI |
(1217) 0x63ec5 TEST %RDI,%RDI |
(1217) 0x63ec8 JS 63f70 |
(1217) 0x63ece MOV -0x78(%RBP),%RSI |
(1217) 0x63ed2 MOV -0x30(%RBP),%R8 |
(1217) 0x63ed6 CMP %R8,(%RSI,%RDI,8) |
(1217) 0x63eda JNE 63f70 |
(1217) 0x63ee0 MOV -0x180(%RBP),%RSI |
(1217) 0x63ee7 MOV 0x8(%RSI,%RDI,8),%RSI |
(1217) 0x63eec TEST %RSI,%RSI |
(1217) 0x63eef JLE 63e96 |
(1217) 0x63ef1 MOV -0x170(%RBP),%R8 |
(1217) 0x63ef8 MOV (%R8,%RDI,8),%RDI |
(1217) 0x63efc ADD %RDI,%RSI |
(1217) 0x63eff MOV -0x70(%RBP),%R8 |
(1217) 0x63f03 MOV -0x178(%RBP),%R9 |
(1217) 0x63f0a MOV (%R9,%R8,8),%R8 |
(1217) 0x63f0e JMP 63f3a |
(1218) 0x63f10 MOV (%R15,%R9,8),%R9 |
(1218) 0x63f14 MOVSD (%R13,%R9,8),%XMM2 |
(1218) 0x63f1b ADDSD %XMM6,%XMM2 |
(1218) 0x63f1f MOVSD %XMM2,(%R13,%R9,8) |
(1218) 0x63f26 ADDSD %XMM6,%XMM0 |
(1218) 0x63f2a ADDSD %XMM6,%XMM1 |
(1218) 0x63f2e INC %RDI |
(1218) 0x63f31 CMP %RSI,%RDI |
(1218) 0x63f34 JGE 63e96 |
(1218) 0x63f3a MOV (%R8,%RDI,8),%R9 |
(1218) 0x63f3e MOVSD (%R10,%RDI,8),%XMM6 |
(1218) 0x63f44 MULSD (%R11,%RCX,8),%XMM6 |
(1218) 0x63f4a TEST %R9,%R9 |
(1218) 0x63f4d JNS 63f10 |
(1218) 0x63f4f NOT %R9 |
(1218) 0x63f52 MOV -0x60(%RBP),%R12 |
(1218) 0x63f56 MOV (%R12,%R9,8),%R9 |
(1218) 0x63f5a MOVSD (%R14,%R9,8),%XMM2 |
(1218) 0x63f60 ADDSD %XMM6,%XMM2 |
(1218) 0x63f64 MOVSD %XMM2,(%R14,%R9,8) |
(1218) 0x63f6a JMP 63f26 |
(1217) 0x63f70 MOV -0x198(%RBP),%RSI |
(1217) 0x63f77 CMPQ $-0x3,(%RSI,%RDI,8) |
(1217) 0x63f7c JE 63e96 |
(1217) 0x63f82 CMPQ $0x1,-0x100(%RBP) |
(1217) 0x63f8a JE 63e90 |
(1217) 0x63f90 MOV -0x168(%RBP),%RSI |
(1217) 0x63f97 MOV (%RSI,%RDI,8),%RSI |
(1217) 0x63f9b MOV -0xe8(%RBP),%RDI |
(1217) 0x63fa2 MOV -0x30(%RBP),%R8 |
(1217) 0x63fa6 CMP (%RDI,%R8,8),%RSI |
(1217) 0x63faa JE 63e90 |
(1217) 0x63fb0 JMP 63e96 |
0x63fc0 MOV -0xa0(%RBP),%RAX |
0x63fc7 MULSD (%RBX,%RAX,8),%XMM0 |
0x63fcc UCOMISD %XMM5,%XMM0 |
0x63fd0 JE 63fe2 |
0x63fd2 XORPD 0xd1126(%RIP),%XMM1 |
0x63fda DIVSD %XMM0,%XMM1 |
0x63fde MOVAPD %XMM1,%XMM6 |
0x63fe2 MOV -0xc8(%RBP),%RCX |
0x63fe9 MOV -0x30(%RBP),%RDX |
0x63fed MOV (%RCX,%RDX,8),%RAX |
0x63ff1 MOV 0x8(%RCX,%RDX,8),%RCX |
0x63ff6 SUB %RAX,%RCX |
0x63ff9 JLE 64125 |
0x63fff CMP $0x8,%RCX |
0x64003 JB 6405f |
0x64005 MOV %RCX,%RDX |
0x64008 SHR $0x3,%RDX |
0x6400c MOVAPD %XMM6,%XMM0 |
0x64010 UNPCKLPD %XMM6,%XMM0 |
0x64014 MOV -0x110(%RBP),%RSI |
0x6401b LEA (%RSI,%RAX,8),%RSI |
0x6401f NOP |
(1216) 0x64020 MOVUPD -0x30(%RSI),%XMM1 |
(1216) 0x64025 MOVUPD -0x20(%RSI),%XMM2 |
(1216) 0x6402a MOVUPD -0x10(%RSI),%XMM3 |
(1216) 0x6402f MOVUPD (%RSI),%XMM4 |
(1216) 0x64033 MULPD %XMM0,%XMM1 |
(1216) 0x64037 MOVUPD %XMM1,-0x30(%RSI) |
(1216) 0x6403c MULPD %XMM0,%XMM2 |
(1216) 0x64040 MOVUPD %XMM2,-0x20(%RSI) |
(1216) 0x64045 MULPD %XMM0,%XMM3 |
(1216) 0x64049 MOVUPD %XMM3,-0x10(%RSI) |
(1216) 0x6404e MULPD %XMM0,%XMM4 |
(1216) 0x64052 MOVUPD %XMM4,(%RSI) |
(1216) 0x64056 ADD $0x40,%RSI |
(1216) 0x6405a DEC %RDX |
(1216) 0x6405d JNE 64020 |
0x6405f MOV %ECX,%EDX |
0x64061 AND $0x7,%EDX |
0x64064 DEC %RDX |
0x64067 CMP $0x6,%RDX |
0x6406b JA 64125 |
0x64125 MOV -0xd0(%RBP),%RCX |
0x6412c MOV -0x30(%RBP),%RDX |
0x64130 MOV (%RCX,%RDX,8),%RAX |
0x64134 MOV 0x8(%RCX,%RDX,8),%RCX |
0x64139 SUB %RAX,%RCX |
0x6413c JLE 6359c |
0x64142 CMP $0x8,%RCX |
0x64146 JB 641af |
0x64148 MOV %RCX,%RDX |
0x6414b SHR $0x3,%RDX |
0x6414f MOVAPD %XMM6,%XMM0 |
0x64153 UNPCKLPD %XMM6,%XMM0 |
0x64157 MOV -0x108(%RBP),%RSI |
0x6415e LEA (%RSI,%RAX,8),%RSI |
0x64162 NOPW %CS:(%RAX,%RAX,1) |
(1215) 0x64170 MOVUPD -0x30(%RSI),%XMM1 |
(1215) 0x64175 MOVUPD -0x20(%RSI),%XMM2 |
(1215) 0x6417a MOVUPD -0x10(%RSI),%XMM3 |
(1215) 0x6417f MOVUPD (%RSI),%XMM4 |
(1215) 0x64183 MULPD %XMM0,%XMM1 |
(1215) 0x64187 MOVUPD %XMM1,-0x30(%RSI) |
(1215) 0x6418c MULPD %XMM0,%XMM2 |
(1215) 0x64190 MOVUPD %XMM2,-0x20(%RSI) |
(1215) 0x64195 MULPD %XMM0,%XMM3 |
(1215) 0x64199 MOVUPD %XMM3,-0x10(%RSI) |
(1215) 0x6419e MULPD %XMM0,%XMM4 |
(1215) 0x641a2 MOVUPD %XMM4,(%RSI) |
(1215) 0x641a6 ADD $0x40,%RSI |
(1215) 0x641aa DEC %RDX |
(1215) 0x641ad JNE 64170 |
0x641af MOV %ECX,%EDX |
0x641b1 AND $0x7,%EDX |
0x641b4 DEC %RDX |
0x641b7 CMP $0x6,%RDX |
0x641bb JA 6359c |
/home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1747 - 1876 |
-------------------------------------------------------------------------------- |
1747: if (n_fine) |
[...] |
1774: for (i=thread_start; i < thread_stop; i++) |
1775: { |
1776: i1 = pass_array[i]; |
1777: sum_C = 0; |
1778: sum_N = 0; |
1779: j_start = P_diag_start[i1]; |
1780: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1781: cnt = P_diag_i[i1]; |
1782: for (j=j_start; j < j_end; j++) |
1783: { |
1784: k1 = P_diag_pass[pass][j]; |
1785: tmp_array[k1] = cnt; |
1786: P_diag_data[cnt] = 0; |
1787: P_diag_j[cnt++] = k1; |
1788: } |
1789: j_start = P_offd_start[i1]; |
1790: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1791: cnt_offd = P_offd_i[i1]; |
1792: for (j=j_start; j < j_end; j++) |
1793: { |
1794: k1 = P_offd_pass[pass][j]; |
1795: tmp_array_offd[k1] = cnt_offd; |
1796: P_offd_data[cnt_offd] = 0; |
1797: P_offd_j[cnt_offd++] = k1; |
1798: } |
1799: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1800: { |
1801: j1 = S_diag_j[j]; |
1802: if (assigned[j1] == pass-1) |
1803: tmp_marker[j1] = i1; |
1804: } |
1805: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1806: { |
1807: j1 = S_offd_j[j]; |
1808: if (assigned_offd[j1] == pass-1) |
1809: tmp_marker_offd[j1] = i1; |
1810: } |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
1838: } |
1839: } |
1840: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1841: { |
1842: if (col_offd_S_to_A) |
1843: j1 = map_A_to_S[A_offd_j[j]]; |
1844: else |
1845: j1 = A_offd_j[j]; |
1846: |
1847: if (j1 > -1 && tmp_marker_offd[j1] == i1) |
1848: { |
1849: j_start = Pext_start[j1]; |
1850: j_end = j_start+Pext_i[j1+1]; |
1851: for (k=j_start; k < j_end; k++) |
1852: { |
1853: k1 = Pext_pass[pass][k]; |
1854: alfa = A_offd_data[j]*Pext_data[k]; |
1855: if (k1 < 0) |
1856: P_diag_data[tmp_array[-k1-1]] += alfa; |
1857: else |
1858: P_offd_data[tmp_array_offd[k1]] += alfa; |
1859: sum_C += alfa; |
1860: sum_N += alfa; |
1861: } |
1862: } |
1863: else |
1864: { |
1865: if (CF_marker_offd[j1] != -3 && |
1866: (num_functions == 1 || dof_func_offd[j1] == dof_func[i1])) |
1867: sum_N += A_offd_data[j]; |
1868: } |
1869: } |
1870: diagonal = A_diag_data[A_diag_i[i1]]; |
1871: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1872: |
1873: for (j=P_diag_i[i1]; j < P_diag_i[i1+1]; j++) |
1874: P_diag_data[j] *= alfa; |
1875: for (j=P_offd_i[i1]; j < P_offd_i[i1+1]; j++) |
1876: P_offd_data[j] *= alfa; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_fork_call | libiomp5.so | |
○ | __kmpc_fork_call | libiomp5.so | |
○ | hypre_BoomerAMGBuildMultipass.[...] | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup.A | ams.c:3855 | libparcsr_ls.so |
○ | hypre_BoomerAMGSetup | ams.c:3550 | libparcsr_ls.so |
○ | hypre_PCGSetup | gmres.c:1245 | libkrylov.so |
○ | main.A | amg.c:398 | exec |
○ | __libc_start_call_main | libc.so.6 |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.33 |
CQA speedup if FP arith vectorized | 2.27 |
CQA speedup if fully vectorized | 4.33 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.03 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1786,par_multi_interp.c:1789-1796,par_multi_interp.c:1799-1799,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1865-1865,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 35.00 |
CQA cycles if no scalar integer | 10.50 |
CQA cycles if FP arith vectorized | 15.42 |
CQA cycles if fully vectorized | 8.08 |
Front-end cycles | 35.00 |
DIV/SQRT cycles | 16.75 |
P0 cycles | 16.75 |
P1 cycles | 16.75 |
P2 cycles | 16.75 |
P3 cycles | 12.00 |
P4 cycles | 34.00 |
P5 cycles | 34.00 |
P6 cycles | 34.00 |
P7 cycles | 1.75 |
P8 cycles | 1.67 |
P9 cycles | 1.83 |
P10 cycles | 1.75 |
P11 cycles | 1.50 |
P12 cycles | 1.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 213.00 |
Nb uops | 210.00 |
Nb loads | 85.00 |
Nb stores | 16.00 |
Nb stack references | 32.00 |
FLOP/cycle | 0.06 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.23 |
Bytes prefetched | 0.00 |
Bytes loaded | 704.00 |
Bytes stored | 144.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 22.64 |
Vectorization ratio load | 23.08 |
Vectorization ratio store | 12.50 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 30.77 |
Vector-efficiency ratio all | 15.33 |
Vector-efficiency ratio load | 15.38 |
Vector-efficiency ratio store | 14.06 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 16.35 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 3.33 |
CQA speedup if FP arith vectorized | 2.27 |
CQA speedup if fully vectorized | 4.33 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.03 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source | par_multi_interp.c:1747-1747,par_multi_interp.c:1774-1776,par_multi_interp.c:1779-1786,par_multi_interp.c:1789-1796,par_multi_interp.c:1799-1799,par_multi_interp.c:1805-1805,par_multi_interp.c:1811-1811,par_multi_interp.c:1824-1824,par_multi_interp.c:1840-1840,par_multi_interp.c:1865-1865,par_multi_interp.c:1871-1876 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 35.00 |
CQA cycles if no scalar integer | 10.50 |
CQA cycles if FP arith vectorized | 15.42 |
CQA cycles if fully vectorized | 8.08 |
Front-end cycles | 35.00 |
DIV/SQRT cycles | 16.75 |
P0 cycles | 16.75 |
P1 cycles | 16.75 |
P2 cycles | 16.75 |
P3 cycles | 12.00 |
P4 cycles | 34.00 |
P5 cycles | 34.00 |
P6 cycles | 34.00 |
P7 cycles | 1.75 |
P8 cycles | 1.67 |
P9 cycles | 1.83 |
P10 cycles | 1.75 |
P11 cycles | 1.50 |
P12 cycles | 1.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 213.00 |
Nb uops | 210.00 |
Nb loads | 85.00 |
Nb stores | 16.00 |
Nb stack references | 32.00 |
FLOP/cycle | 0.06 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.23 |
Bytes prefetched | 0.00 |
Bytes loaded | 704.00 |
Bytes stored | 144.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 22.64 |
Vectorization ratio load | 23.08 |
Vectorization ratio store | 12.50 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 30.77 |
Vector-efficiency ratio all | 15.33 |
Vector-efficiency ratio load | 15.38 |
Vector-efficiency ratio store | 14.06 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 16.35 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1876 |
Module | libparcsr_ls.so |
nb instructions | 213 |
nb uops | 210 |
loop length | 1006 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 32 |
micro-operation queue | 35.00 cycles |
front end | 35.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.75 | 16.75 | 16.75 | 16.75 | 12.00 | 34.00 | 34.00 | 34.00 | 1.75 | 1.67 | 1.83 | 1.75 | 1.50 | 1.50 |
cycles | 16.75 | 16.75 | 16.75 | 16.75 | 12.00 | 34.00 | 34.00 | 34.00 | 1.75 | 1.67 | 1.83 | 1.75 | 1.50 | 1.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 35.00 |
Dispatch | 34.00 |
DIV/SQRT | 5.00 |
Overall L1 | 35.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 66% |
load | 75% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 66% |
all | 22% |
load | 23% |
store | 12% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 30% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 20% |
load | 21% |
store | 25% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
all | 15% |
load | 15% |
store | 14% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 16% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0xc0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
INC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP -0xe0(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JGE 64205 <hypre_BoomerAMGBuildMultipass.extracted.28+0x1045> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RDX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x158(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x8(%RAX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%R8,%RDX,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMP %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JGE 637ef <hypre_BoomerAMGBuildMultipass.extracted.28+0x62f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0xc,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JBE 637c0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x600> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R8,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOVAPD %XMM6,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
LEA (%R14,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL 15dc0 <_intel_fast_memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV -0xa8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%RSI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RCX,%RAX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD $0x38,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x120(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDX,%R12,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RSI,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R11,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R11,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
XORPD %XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOVAPD -0xa0(%RBP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
MOV -0xb0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JAE 637ef <hypre_BoomerAMGBuildMultipass.extracted.28+0x62f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
ADD %RAX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SALQ $0x6,-0xd8(%RBP) | 2 | 0 | 0.50 | 0.50 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0xd8(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDI,%RAX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 637ef <hypre_BoomerAMGBuildMultipass.extracted.28+0x62f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RAX,%RCX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDX,%R8,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 639f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x138(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0xc,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JBE 639c0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x800> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOVAPD %XMM6,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
LEA (,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD %R13,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %R8,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL 15dc0 <_intel_fast_memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RCX,%RDX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD $0x38,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDX,%R12,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
XORPD %XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOVAPD -0xa0(%RBP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x68(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JAE 639f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
ADD %RCX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SAL $0x6,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
LEA (%RAX,%R8,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD %RAX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JMP 639f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
LEA (%RAX,%R8,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 63a13 <hypre_BoomerAMGBuildMultipass.extracted.28+0x853> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0xf8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 63a83 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8c3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%RCX,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA 0x1(%RSI),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XORPD %XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
CMP %R12,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV %RSI,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JGE 63e60 <hypre_BoomerAMGBuildMultipass.extracted.28+0xca0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R12,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JMP 63b14 <hypre_BoomerAMGBuildMultipass.extracted.28+0x954> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVAPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
UNPCKHPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 | scal (12.5%) |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 63fc0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe00> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 63ea6 <hypre_BoomerAMGBuildMultipass.extracted.28+0xce6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MULSD (%RBX,%RAX,8),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
UCOMISD %XMM5,%XMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JE 63fe2 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe22> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XORPD 0xd1126(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
DIVSD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 | scal (12.5%) |
MOVAPD %XMM1,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 64125 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf65> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 6405f <hypre_BoomerAMGBuildMultipass.extracted.28+0xe9f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOVAPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
UNPCKLPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 | scal (12.5%) |
MOV -0x110(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RSI,%RAX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JA 64125 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf65> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 6359c <hypre_BoomerAMGBuildMultipass.extracted.28+0x3dc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 641af <hypre_BoomerAMGBuildMultipass.extracted.28+0xfef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOVAPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
UNPCKLPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 | scal (12.5%) |
MOV -0x108(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RSI,%RAX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JA 6359c <hypre_BoomerAMGBuildMultipass.extracted.28+0x3dc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
Source file and lines | par_multi_interp.c:1747-1876 |
Module | libparcsr_ls.so |
nb instructions | 213 |
nb uops | 210 |
loop length | 1006 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 32 |
micro-operation queue | 35.00 cycles |
front end | 35.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 16.75 | 16.75 | 16.75 | 16.75 | 12.00 | 34.00 | 34.00 | 34.00 | 1.75 | 1.67 | 1.83 | 1.75 | 1.50 | 1.50 |
cycles | 16.75 | 16.75 | 16.75 | 16.75 | 12.00 | 34.00 | 34.00 | 34.00 | 1.75 | 1.67 | 1.83 | 1.75 | 1.50 | 1.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 35.00 |
Dispatch | 34.00 |
DIV/SQRT | 5.00 |
Overall L1 | 35.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 66% |
load | 75% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 66% |
all | 22% |
load | 23% |
store | 12% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 30% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 20% |
load | 21% |
store | 25% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
all | 15% |
load | 15% |
store | 14% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 16% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0xc0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
INC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP -0xe0(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JGE 64205 <hypre_BoomerAMGBuildMultipass.extracted.28+0x1045> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x150(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RDX,-0xc0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x158(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0xc8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x8(%RAX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%R8,%RDX,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMP %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JGE 637ef <hypre_BoomerAMGBuildMultipass.extracted.28+0x62f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R8,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0xc,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JBE 637c0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x600> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R8,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOVAPD %XMM6,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
LEA (%R14,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL 15dc0 <_intel_fast_memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV -0xa8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%RSI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RCX,%RAX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD $0x38,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x120(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDX,%R12,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RSI,-0xd8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R11,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R11,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
XORPD %XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOVAPD -0xa0(%RBP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
MOV -0xb0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JAE 637ef <hypre_BoomerAMGBuildMultipass.extracted.28+0x62f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
ADD %RAX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SALQ $0x6,-0xd8(%RBP) | 2 | 0 | 0.50 | 0.50 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0xd8(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDI,%RAX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 637ef <hypre_BoomerAMGBuildMultipass.extracted.28+0x62f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RAX,%RCX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x160(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0xd0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDX,%R8,1),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RAX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 639f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x138(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RAX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0xc,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JBE 639c0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x800> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RDX,-0xb0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOVAPD %XMM6,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | vect (25.0%) |
MOV %RAX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
LEA (,%R12,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD %R13,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %R8,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL 15dc0 <_intel_fast_memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV -0xa8(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RCX,%RDX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD $0x38,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x118(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDX,%R12,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R10,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV -0xb8(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x40(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV -0x48(%RBP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
XORPD %XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOVAPD -0xa0(%RBP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 | vect (25.0%) |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x68(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JAE 639f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
ADD %RCX,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SAL $0x6,%RAX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
LEA (%RAX,%R8,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD %RAX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JMP 639f0 <hypre_BoomerAMGBuildMultipass.extracted.28+0x830> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
LEA (%RAX,%R8,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0xf0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 63a13 <hypre_BoomerAMGBuildMultipass.extracted.28+0x853> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0xf8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 63a83 <hypre_BoomerAMGBuildMultipass.extracted.28+0x8c3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x140(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%RCX,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA 0x1(%RSI),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XORPD %XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
CMP %R12,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV %RSI,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JGE 63e60 <hypre_BoomerAMGBuildMultipass.extracted.28+0xca0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R12,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JMP 63b14 <hypre_BoomerAMGBuildMultipass.extracted.28+0x954> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%RDX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVAPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
UNPCKHPD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 | scal (12.5%) |
CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 63fc0 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe00> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x128(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 63ea6 <hypre_BoomerAMGBuildMultipass.extracted.28+0xce6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MULSD (%RBX,%RAX,8),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
UCOMISD %XMM5,%XMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JE 63fe2 <hypre_BoomerAMGBuildMultipass.extracted.28+0xe22> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XORPD 0xd1126(%RIP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (25.0%) |
DIVSD %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 | scal (12.5%) |
MOVAPD %XMM1,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 64125 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf65> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 6405f <hypre_BoomerAMGBuildMultipass.extracted.28+0xe9f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOVAPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
UNPCKLPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 | scal (12.5%) |
MOV -0x110(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RSI,%RAX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JA 64125 <hypre_BoomerAMGBuildMultipass.extracted.28+0xf65> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x30(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RDX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RCX,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 6359c <hypre_BoomerAMGBuildMultipass.extracted.28+0x3dc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x8,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 641af <hypre_BoomerAMGBuildMultipass.extracted.28+0xfef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RCX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOVAPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
UNPCKLPD %XMM6,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 | scal (12.5%) |
MOV -0x108(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RSI,%RAX,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x6,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JA 6359c <hypre_BoomerAMGBuildMultipass.extracted.28+0x3dc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
Run 8x1 | Number processes: 8Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes>Dataset: Run Directory: /home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/run/oneview_runs/multicore/icx_9/oneview_run_1720211326OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_NUM_THREADS: 1 |
---|---|
Run 8x2 | Number processes: 8OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
Run 8x4 | Number processes: 8OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
Run 8x8 | Number processes: 8OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
Run 8x16 | Number processes: 8OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
Run 8x24 | Number processes: 8OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
(8x1) Efficiency | (8x1) Potential Speed-Up (%) | (8x2) Efficiency | (8x2) Potential Speed-Up (%) | (8x4) Efficiency | (8x4) Potential Speed-Up (%) | (8x8) Efficiency | (8x8) Potential Speed-Up (%) | (8x16) Efficiency | (8x16) Potential Speed-Up (%) | (8x24) Efficiency | (8x24) Potential Speed-Up (%) |
---|---|---|---|---|---|---|---|---|---|---|---|
1 | 0 | 1.99 | 0 | 3.8 | 0 | 7.26 | 0 | 13.46 | 0 | 18.63 | 0 |
Run | Number of threads | Efficiency (ideal is 1) | Speedup | Ideal Speedup | Time (s) | Coverage (%) |
---|---|---|---|---|---|---|
8x1 | 8 | 1 | 1 | 1 | 2.815000295639 | 0.77833145856857 |
8x2 | 16 | 1.99 | 1.99 | 2 | 1.4099998474121 | 0.76921737194061 |
8x4 | 32 | 3.8 | 3.8 | 4 | 0.75999993085861 | 0.56838649511337 |
8x8 | 64 | 7.26 | 7.26 | 8 | 0.45499995350838 | 0.40847745537758 |
8x16 | 128 | 13.46 | 13.46 | 16 | 0.25499999523163 | 0.23904849588871 |
8x24 | 192 | 18.63 | 18.63 | 24 | 0.20499999821186 | 0.18930865824223 |