Function: hypre_BoomerAMGBuildMultipass._omp_fn.9 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1575-1663 [...] | Coverage: 0.44% |
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Function: hypre_BoomerAMGBuildMultipass._omp_fn.9 | Module: libparcsr_ls.so | Source: par_multi_interp.c:1575-1663 [...] | Coverage: 0.44% |
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/home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1575 - 1663 |
-------------------------------------------------------------------------------- |
1575: #pragma omp parallel private(thread_start,thread_stop,my_thread_num,num_threads,k,k1,i,i1,j,j1,sum_C,sum_N,j_start,j_end,cnt,tmp_marker,tmp_marker_offd,cnt_offd,diagonal,alfa) |
[...] |
1584: tmp_marker = NULL; |
1585: if (n_fine) |
1586: { tmp_marker = hypre_CTAlloc(HYPRE_Int,n_fine); } |
1587: tmp_marker_offd = NULL; |
1588: if (num_cols_offd) |
1589: { tmp_marker_offd = hypre_CTAlloc(HYPRE_Int,num_cols_offd); } |
1590: for (i=0; i < n_fine; i++) |
1591: { tmp_marker[i] = -1; } |
1592: for (i=0; i < num_cols_offd; i++) |
1593: { tmp_marker_offd[i] = -1; } |
1594: |
1595: /* Compute this thread's range of pass_length */ |
1596: my_thread_num = hypre_GetThreadNum(); |
1597: num_threads = hypre_NumActiveThreads(); |
1598: thread_start = pass_pointer[1] + (pass_length/num_threads)*my_thread_num; |
1599: if (my_thread_num == num_threads-1) |
1600: { thread_stop = pass_pointer[1] + pass_length; } |
1601: else |
1602: { thread_stop = pass_pointer[1] + (pass_length/num_threads)*(my_thread_num+1); } |
1603: |
1604: /* determine P for points of pass 1, i.e. neighbors of coarse points */ |
1605: for (i=thread_start; i < thread_stop; i++) |
1606: { |
1607: i1 = pass_array[i]; |
1608: sum_C = 0; |
1609: sum_N = 0; |
1610: j_start = P_diag_start[i1]; |
1611: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1612: for (j=j_start; j < j_end; j++) |
1613: { |
1614: k1 = P_diag_pass[1][j]; |
1615: tmp_marker[C_array[k1]] = i1; |
1616: } |
1617: cnt = P_diag_i[i1]; |
1618: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1619: { |
1620: j1 = A_diag_j[j]; |
1621: if (CF_marker[j1] != -3 && |
1622: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1623: sum_N += A_diag_data[j]; |
1624: if (j1 != -1 && tmp_marker[j1] == i1) |
1625: { |
1626: P_diag_data[cnt] = A_diag_data[j]; |
1627: P_diag_j[cnt++] = fine_to_coarse[j1]; |
1628: sum_C += A_diag_data[j]; |
1629: } |
1630: } |
1631: j_start = P_offd_start[i1]; |
1632: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1633: for (j=j_start; j < j_end; j++) |
1634: { |
1635: k1 = P_offd_pass[1][j]; |
1636: tmp_marker_offd[C_array_offd[k1]] = i1; |
1637: } |
1638: cnt_offd = P_offd_i[i1]; |
1639: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1640: { |
1641: if (col_offd_S_to_A) |
1642: j1 = map_A_to_S[A_offd_j[j]]; |
1643: else |
1644: j1 = A_offd_j[j]; |
1645: if (CF_marker_offd[j1] != -3 && |
1646: (num_functions == 1 || dof_func[i1] == dof_func_offd[j1])) |
1647: sum_N += A_offd_data[j]; |
1648: if (j1 != -1 && tmp_marker_offd[j1] == i1) |
1649: { |
1650: P_offd_data[cnt_offd] = A_offd_data[j]; |
1651: P_offd_j[cnt_offd++] = map_S_to_new[j1]; |
1652: sum_C += A_offd_data[j]; |
1653: } |
1654: } |
1655: diagonal = A_diag_data[A_diag_i[i1]]; |
1656: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1657: for (j=P_diag_i[i1]; j < cnt; j++) |
1658: P_diag_data[j] *= alfa; |
1659: for (j=P_offd_i[i1]; j < cnt_offd; j++) |
1660: P_offd_data[j] *= alfa; |
1661: } |
1662: hypre_TFree(tmp_marker); |
1663: hypre_TFree(tmp_marker_offd); |
0x83650 PUSH %RBP |
0x83651 MOV %RSP,%RBP |
0x83654 PUSH %R15 |
0x83656 PUSH %R14 |
0x83658 PUSH %R13 |
0x8365a PUSH %R12 |
0x8365c PUSH %RBX |
0x8365d AND $-0x20,%RSP |
0x83661 SUB $0x100,%RSP |
0x83668 MOV 0xf8(%RDI),%RAX |
0x8366f MOV 0xe0(%RDI),%RCX |
0x83676 MOV 0xd8(%RDI),%RSI |
0x8367d MOV 0xd0(%RDI),%R8 |
0x83684 MOV 0xc8(%RDI),%R9 |
0x8368b MOV 0xc0(%RDI),%R10 |
0x83692 MOV %RAX,0xe0(%RSP) |
0x8369a MOV 0xb8(%RDI),%R11 |
0x836a1 MOV 0xb0(%RDI),%R12 |
0x836a8 MOV %RCX,0x8(%RSP) |
0x836ad MOV 0xa8(%RDI),%R13 |
0x836b4 MOV 0x90(%RDI),%RAX |
0x836bb MOV %RSI,0xa0(%RSP) |
0x836c3 MOV 0xf0(%RDI),%RDX |
0x836ca MOV %R8,0x38(%RSP) |
0x836cf MOV %R9,0x30(%RSP) |
0x836d4 MOV 0xe8(%RDI),%RBX |
0x836db MOV %R10,0x70(%RSP) |
0x836e0 MOV 0xa0(%RDI),%R14 |
0x836e7 MOV %R11,0x68(%RSP) |
0x836ec MOV 0x98(%RDI),%R15 |
0x836f3 MOV %R12,0xd8(%RSP) |
0x836fb MOV %R13,0x80(%RSP) |
0x83703 MOV %RAX,0xc8(%RSP) |
0x8370b MOV %RDX,0xa8(%RSP) |
0x83713 MOV 0x88(%RDI),%RDX |
0x8371a MOV 0x80(%RDI),%RCX |
0x83721 MOV 0x78(%RDI),%RSI |
0x83725 MOV 0x68(%RDI),%R8 |
0x83729 MOV 0x60(%RDI),%R9 |
0x8372d MOV %RDX,0x28(%RSP) |
0x83732 MOV 0x40(%RDI),%RAX |
0x83736 MOV 0x38(%RDI),%RDX |
0x8373a MOV %RSI,0x60(%RSP) |
0x8373f MOV 0x70(%RDI),%R10 |
0x83743 MOV 0x28(%RDI),%RSI |
0x83747 MOV %R9,0x58(%RSP) |
0x8374c MOV %RCX,0x98(%RSP) |
0x83754 MOV 0x18(%RDI),%R9 |
0x83758 MOV 0x30(%RDI),%RCX |
0x8375c MOV %R8,0x90(%RSP) |
0x83764 MOV 0x58(%RDI),%R11 |
0x83768 MOV 0x20(%RDI),%R8 |
0x8376c MOV %RAX,0x50(%RSP) |
0x83771 MOV 0x50(%RDI),%R12 |
0x83775 MOV 0x10(%RDI),%RAX |
0x83779 MOV %RCX,0x20(%RSP) |
0x8377e MOV %RDX,0xe8(%RSP) |
0x83786 MOV 0x48(%RDI),%R13 |
0x8378a MOV 0x8(%RDI),%RDX |
0x8378e MOV (%RDI),%RDI |
0x83791 MOV %RSI,0x48(%RSP) |
0x83796 MOV %R8,0xf8(%RSP) |
0x8379e MOV %R9,0x18(%RSP) |
0x837a3 MOV %RAX,0xd0(%RSP) |
0x837ab MOV %RDX,0xf0(%RSP) |
0x837b3 MOV %RDI,0x10(%RSP) |
0x837b8 TEST %RBX,%RBX |
0x837bb JNE 8439e |
0x837c1 TEST %R12,%R12 |
0x837c4 JNE 84520 |
0x837ca XOR %EBX,%EBX |
0x837cc XOR %R12D,%R12D |
0x837cf MOV %R11,0x88(%RSP) |
0x837d7 MOV %R10,0xb0(%RSP) |
0x837df VMOVSD %XMM1,0xb8(%RSP) |
0x837e8 CALL c9a0 <hypre_GetThreadNum@plt> |
0x837ed MOV %RAX,0xc0(%RSP) |
0x837f5 CALL cb00 <hypre_NumActiveThreads@plt> |
0x837fa MOV 0xc0(%RSP),%R10 |
0x83802 MOV 0xd8(%RSP),%R8 |
0x8380a MOV %RAX,%R9 |
0x8380d MOV 0xe0(%RSP),%RAX |
0x83815 MOV 0xe0(%RSP),%RSI |
0x8381d VMOVSD 0xb8(%RSP),%XMM11 |
0x83826 MOV %R10,%R11 |
0x83829 MOV 0x8(%R8),%RCX |
0x8382d CQTO |
0x8382f IDIV %R9 |
0x83832 ADD %RCX,%RSI |
0x83835 DEC %R9 |
0x83838 MOV %RSI,%R8 |
0x8383b IMUL %RAX,%R11 |
0x8383f ADD %R11,%RAX |
0x83842 LEA (%RCX,%R11,1),%RDI |
0x83846 MOV 0x88(%RSP),%R11 |
0x8384e ADD %RCX,%RAX |
0x83851 CMP %R9,%R10 |
0x83854 MOV 0xb0(%RSP),%R10 |
0x8385c CMOVNE %RAX,%R8 |
0x83860 CMP %RDI,%R8 |
0x83863 JLE 8414e |
0x83869 MOV 0x80(%RSP),%R9 |
0x83871 VMOVQ 0x98ce7(%RIP),%XMM5 |
0x83879 VXORPD %XMM4,%XMM4,%XMM4 |
0x8387d LEA (%R9,%RDI,8),%RCX |
0x83881 LEA (%R9,%R8,8),%RAX |
0x83885 MOV %RCX,0xd8(%RSP) |
0x8388d MOV %RAX,0x40(%RSP) |
0x83892 NOPW (%RAX,%RAX,1) |
(887) 0x83898 MOV 0xd8(%RSP),%RDX |
(887) 0x838a0 MOV 0x58(%RSP),%RCX |
(887) 0x838a5 MOV 0x68(%RSP),%RDI |
(887) 0x838aa MOV (%RDX),%RDX |
(887) 0x838ad LEA (,%RDX,8),%R8 |
(887) 0x838b5 MOV (%RDI,%RDX,8),%R9 |
(887) 0x838b9 LEA (%RCX,%R8,1),%RAX |
(887) 0x838bd LEA 0x8(%R8),%RSI |
(887) 0x838c1 MOV (%RAX),%RDI |
(887) 0x838c4 MOV %RAX,0xc0(%RSP) |
(887) 0x838cc MOV 0x8(%RCX,%R8,1),%RAX |
(887) 0x838d1 MOV %RSI,0xe0(%RSP) |
(887) 0x838d9 ADD %R9,%RAX |
(887) 0x838dc SUB %RDI,%RAX |
(887) 0x838df CMP %RAX,%R9 |
(887) 0x838e2 JGE 83a29 |
(887) 0x838e8 MOV 0x30(%RSP),%RDI |
(887) 0x838ed MOV 0x8(%RDI),%RSI |
(887) 0x838f1 LEA (%RSI,%RAX,8),%RDI |
(887) 0x838f5 LEA (%RSI,%R9,8),%RCX |
(887) 0x838f9 MOV %RDI,%R9 |
(887) 0x838fc SUB %RCX,%R9 |
(887) 0x838ff SUB $0x8,%R9 |
(887) 0x83903 SHR $0x3,%R9 |
(887) 0x83907 INC %R9 |
(887) 0x8390a AND $0x7,%R9D |
(887) 0x8390e JE 839a6 |
(887) 0x83914 CMP $0x1,%R9 |
(887) 0x83918 JE 83992 |
(887) 0x8391a CMP $0x2,%R9 |
(887) 0x8391e JE 83983 |
(887) 0x83920 CMP $0x3,%R9 |
(887) 0x83924 JE 83974 |
(887) 0x83926 CMP $0x4,%R9 |
(887) 0x8392a JE 83965 |
(887) 0x8392c CMP $0x5,%R9 |
(887) 0x83930 JE 83956 |
(887) 0x83932 CMP $0x6,%R9 |
(887) 0x83936 JE 83947 |
(887) 0x83938 MOV (%RCX),%RAX |
(887) 0x8393b ADD $0x8,%RCX |
(887) 0x8393f MOV (%R15,%RAX,8),%RSI |
(887) 0x83943 MOV %RDX,(%R12,%RSI,8) |
(887) 0x83947 MOV (%RCX),%R9 |
(887) 0x8394a ADD $0x8,%RCX |
(887) 0x8394e MOV (%R15,%R9,8),%RAX |
(887) 0x83952 MOV %RDX,(%R12,%RAX,8) |
(887) 0x83956 MOV (%RCX),%RSI |
(887) 0x83959 ADD $0x8,%RCX |
(887) 0x8395d MOV (%R15,%RSI,8),%R9 |
(887) 0x83961 MOV %RDX,(%R12,%R9,8) |
(887) 0x83965 MOV (%RCX),%RAX |
(887) 0x83968 ADD $0x8,%RCX |
(887) 0x8396c MOV (%R15,%RAX,8),%RSI |
(887) 0x83970 MOV %RDX,(%R12,%RSI,8) |
(887) 0x83974 MOV (%RCX),%R9 |
(887) 0x83977 ADD $0x8,%RCX |
(887) 0x8397b MOV (%R15,%R9,8),%RAX |
(887) 0x8397f MOV %RDX,(%R12,%RAX,8) |
(887) 0x83983 MOV (%RCX),%RSI |
(887) 0x83986 ADD $0x8,%RCX |
(887) 0x8398a MOV (%R15,%RSI,8),%R9 |
(887) 0x8398e MOV %RDX,(%R12,%R9,8) |
(887) 0x83992 MOV (%RCX),%RAX |
(887) 0x83995 ADD $0x8,%RCX |
(887) 0x83999 MOV (%R15,%RAX,8),%RSI |
(887) 0x8399d MOV %RDX,(%R12,%RSI,8) |
(887) 0x839a1 CMP %RCX,%RDI |
(887) 0x839a4 JE 83a1e |
(887) 0x839a6 MOV 0xe0(%RSP),%R9 |
(896) 0x839ae MOV (%RCX),%RAX |
(896) 0x839b1 ADD $0x40,%RCX |
(896) 0x839b5 MOV (%R15,%RAX,8),%RSI |
(896) 0x839b9 MOV %RDX,(%R12,%RSI,8) |
(896) 0x839bd MOV -0x38(%RCX),%RAX |
(896) 0x839c1 MOV (%R15,%RAX,8),%RSI |
(896) 0x839c5 MOV %RDX,(%R12,%RSI,8) |
(896) 0x839c9 MOV -0x30(%RCX),%RAX |
(896) 0x839cd MOV (%R15,%RAX,8),%RSI |
(896) 0x839d1 MOV %RDX,(%R12,%RSI,8) |
(896) 0x839d5 MOV -0x28(%RCX),%RAX |
(896) 0x839d9 MOV (%R15,%RAX,8),%RSI |
(896) 0x839dd MOV %RDX,(%R12,%RSI,8) |
(896) 0x839e1 MOV -0x20(%RCX),%RAX |
(896) 0x839e5 MOV (%R15,%RAX,8),%RSI |
(896) 0x839e9 MOV %RDX,(%R12,%RSI,8) |
(896) 0x839ed MOV -0x18(%RCX),%RAX |
(896) 0x839f1 MOV (%R15,%RAX,8),%RSI |
(896) 0x839f5 MOV %RDX,(%R12,%RSI,8) |
(896) 0x839f9 MOV -0x10(%RCX),%RAX |
(896) 0x839fd MOV (%R15,%RAX,8),%RSI |
(896) 0x83a01 MOV %RDX,(%R12,%RSI,8) |
(896) 0x83a05 MOV -0x8(%RCX),%RAX |
(896) 0x83a09 MOV (%R15,%RAX,8),%RSI |
(896) 0x83a0d MOV %RDX,(%R12,%RSI,8) |
(896) 0x83a11 CMP %RCX,%RDI |
(896) 0x83a14 JNE 839ae |
(887) 0x83a16 MOV %R9,0xe0(%RSP) |
(887) 0x83a1e MOV 0xc0(%RSP),%RCX |
(887) 0x83a26 MOV (%RCX),%RDI |
(887) 0x83a29 MOV 0x48(%RSP),%RSI |
(887) 0x83a2e MOV 0xe0(%RSP),%RCX |
(887) 0x83a36 VXORPD %XMM0,%XMM0,%XMM0 |
(887) 0x83a3a VMOVSD %XMM0,%XMM0,%XMM2 |
(887) 0x83a3e LEA (%RSI,%R8,1),%R9 |
(887) 0x83a42 ADD %RCX,%RSI |
(887) 0x83a45 MOV (%R9),%RAX |
(887) 0x83a48 MOV %R9,0xb0(%RSP) |
(887) 0x83a50 MOV %RAX,0xb8(%RSP) |
(887) 0x83a58 INC %RAX |
(887) 0x83a5b CMP (%RSI),%RAX |
(887) 0x83a5e JGE 83b37 |
(887) 0x83a64 CMPQ $0x1,0xf0(%RSP) |
(887) 0x83a6d MOV %RBX,0xb8(%RSP) |
(887) 0x83a75 JE 84170 |
(887) 0x83a7b MOV %R14,0x88(%RSP) |
(887) 0x83a83 MOV 0x20(%RSP),%R9 |
(887) 0x83a88 MOV %R10,0x80(%RSP) |
(887) 0x83a90 MOV 0xd0(%RSP),%R10 |
(887) 0x83a98 MOV %R13,0x78(%RSP) |
(887) 0x83a9d MOV 0x10(%RSP),%R13 |
(887) 0x83aa2 NOPW (%RAX,%RAX,1) |
(895) 0x83aa8 MOV (%R9,%RAX,8),%RCX |
(895) 0x83aac CMPQ $-0x3,(%R13,%RCX,8) |
(895) 0x83ab2 JE 83acb |
(895) 0x83ab4 MOV (%R10,%RCX,8),%R14 |
(895) 0x83ab8 CMP %R14,(%R10,%R8,1) |
(895) 0x83abc JNE 83acb |
(895) 0x83abe MOV 0xf8(%RSP),%RBX |
(895) 0x83ac6 VADDSD (%RBX,%RAX,8),%XMM0,%XMM0 |
(895) 0x83acb CMP $-0x1,%RCX |
(895) 0x83acf JE 83b12 |
(895) 0x83ad1 CMP (%R12,%RCX,8),%RDX |
(895) 0x83ad5 JNE 83b12 |
(895) 0x83ad7 MOV 0xf8(%RSP),%R14 |
(895) 0x83adf LEA (,%RDI,8),%RBX |
(895) 0x83ae7 VMOVSD (%R14,%RAX,8),%XMM6 |
(895) 0x83aed MOV 0xa8(%RSP),%R14 |
(895) 0x83af5 MOV (%R14,%RCX,8),%RCX |
(895) 0x83af9 MOV 0x90(%RSP),%R14 |
(895) 0x83b01 VMOVSD %XMM6,(%R11,%RDI,8) |
(895) 0x83b07 VADDSD %XMM6,%XMM2,%XMM2 |
(895) 0x83b0b INC %RDI |
(895) 0x83b0e MOV %RCX,(%R14,%RBX,1) |
(895) 0x83b12 INC %RAX |
(895) 0x83b15 CMP (%RSI),%RAX |
(895) 0x83b18 JL 83aa8 |
(887) 0x83b1a MOV 0xb8(%RSP),%RBX |
(887) 0x83b22 MOV 0x88(%RSP),%R14 |
(887) 0x83b2a MOV 0x80(%RSP),%R10 |
(887) 0x83b32 MOV 0x78(%RSP),%R13 |
(887) 0x83b37 MOV 0x60(%RSP),%R9 |
(887) 0x83b3c MOV 0x70(%RSP),%RSI |
(887) 0x83b41 MOV %R9,%RAX |
(887) 0x83b44 MOV (%RSI,%RDX,8),%RCX |
(887) 0x83b48 ADD %R8,%RAX |
(887) 0x83b4b MOV (%RAX),%RSI |
(887) 0x83b4e MOV %RAX,0xb8(%RSP) |
(887) 0x83b56 MOV 0x8(%R9,%R8,1),%RAX |
(887) 0x83b5b ADD %RCX,%RAX |
(887) 0x83b5e SUB %RSI,%RAX |
(887) 0x83b61 CMP %RAX,%RCX |
(887) 0x83b64 JGE 83caa |
(887) 0x83b6a MOV 0x38(%RSP),%RSI |
(887) 0x83b6f MOV 0x8(%RSI),%R9 |
(887) 0x83b73 LEA (%R9,%RAX,8),%RSI |
(887) 0x83b77 LEA (%R9,%RCX,8),%RCX |
(887) 0x83b7b MOV %RSI,%RAX |
(887) 0x83b7e SUB %RCX,%RAX |
(887) 0x83b81 SUB $0x8,%RAX |
(887) 0x83b85 SHR $0x3,%RAX |
(887) 0x83b89 INC %RAX |
(887) 0x83b8c AND $0x7,%EAX |
(887) 0x83b8f JE 83c27 |
(887) 0x83b95 CMP $0x1,%RAX |
(887) 0x83b99 JE 83c13 |
(887) 0x83b9b CMP $0x2,%RAX |
(887) 0x83b9f JE 83c04 |
(887) 0x83ba1 CMP $0x3,%RAX |
(887) 0x83ba5 JE 83bf5 |
(887) 0x83ba7 CMP $0x4,%RAX |
(887) 0x83bab JE 83be6 |
(887) 0x83bad CMP $0x5,%RAX |
(887) 0x83bb1 JE 83bd7 |
(887) 0x83bb3 CMP $0x6,%RAX |
(887) 0x83bb7 JE 83bc8 |
(887) 0x83bb9 MOV (%RCX),%R9 |
(887) 0x83bbc ADD $0x8,%RCX |
(887) 0x83bc0 MOV (%R14,%R9,8),%RAX |
(887) 0x83bc4 MOV %RDX,(%RBX,%RAX,8) |
(887) 0x83bc8 MOV (%RCX),%R9 |
(887) 0x83bcb ADD $0x8,%RCX |
(887) 0x83bcf MOV (%R14,%R9,8),%RAX |
(887) 0x83bd3 MOV %RDX,(%RBX,%RAX,8) |
(887) 0x83bd7 MOV (%RCX),%R9 |
(887) 0x83bda ADD $0x8,%RCX |
(887) 0x83bde MOV (%R14,%R9,8),%RAX |
(887) 0x83be2 MOV %RDX,(%RBX,%RAX,8) |
(887) 0x83be6 MOV (%RCX),%R9 |
(887) 0x83be9 ADD $0x8,%RCX |
(887) 0x83bed MOV (%R14,%R9,8),%RAX |
(887) 0x83bf1 MOV %RDX,(%RBX,%RAX,8) |
(887) 0x83bf5 MOV (%RCX),%R9 |
(887) 0x83bf8 ADD $0x8,%RCX |
(887) 0x83bfc MOV (%R14,%R9,8),%RAX |
(887) 0x83c00 MOV %RDX,(%RBX,%RAX,8) |
(887) 0x83c04 MOV (%RCX),%R9 |
(887) 0x83c07 ADD $0x8,%RCX |
(887) 0x83c0b MOV (%R14,%R9,8),%RAX |
(887) 0x83c0f MOV %RDX,(%RBX,%RAX,8) |
(887) 0x83c13 MOV (%RCX),%R9 |
(887) 0x83c16 ADD $0x8,%RCX |
(887) 0x83c1a MOV (%R14,%R9,8),%RAX |
(887) 0x83c1e MOV %RDX,(%RBX,%RAX,8) |
(887) 0x83c22 CMP %RCX,%RSI |
(887) 0x83c25 JE 83c9f |
(887) 0x83c27 MOV 0xe0(%RSP),%R9 |
(893) 0x83c2f MOV (%RCX),%RAX |
(893) 0x83c32 ADD $0x40,%RCX |
(893) 0x83c36 MOV (%R14,%RAX,8),%RAX |
(893) 0x83c3a MOV %RDX,(%RBX,%RAX,8) |
(893) 0x83c3e MOV -0x38(%RCX),%RAX |
(893) 0x83c42 MOV (%R14,%RAX,8),%RAX |
(893) 0x83c46 MOV %RDX,(%RBX,%RAX,8) |
(893) 0x83c4a MOV -0x30(%RCX),%RAX |
(893) 0x83c4e MOV (%R14,%RAX,8),%RAX |
(893) 0x83c52 MOV %RDX,(%RBX,%RAX,8) |
(893) 0x83c56 MOV -0x28(%RCX),%RAX |
(893) 0x83c5a MOV (%R14,%RAX,8),%RAX |
(893) 0x83c5e MOV %RDX,(%RBX,%RAX,8) |
(893) 0x83c62 MOV -0x20(%RCX),%RAX |
(893) 0x83c66 MOV (%R14,%RAX,8),%RAX |
(893) 0x83c6a MOV %RDX,(%RBX,%RAX,8) |
(893) 0x83c6e MOV -0x18(%RCX),%RAX |
(893) 0x83c72 MOV (%R14,%RAX,8),%RAX |
(893) 0x83c76 MOV %RDX,(%RBX,%RAX,8) |
(893) 0x83c7a MOV -0x10(%RCX),%RAX |
(893) 0x83c7e MOV (%R14,%RAX,8),%RAX |
(893) 0x83c82 MOV %RDX,(%RBX,%RAX,8) |
(893) 0x83c86 MOV -0x8(%RCX),%RAX |
(893) 0x83c8a MOV (%R14,%RAX,8),%RAX |
(893) 0x83c8e MOV %RDX,(%RBX,%RAX,8) |
(893) 0x83c92 CMP %RCX,%RSI |
(893) 0x83c95 JNE 83c2f |
(887) 0x83c97 MOV %R9,0xe0(%RSP) |
(887) 0x83c9f MOV 0xb8(%RSP),%RCX |
(887) 0x83ca7 MOV (%RCX),%RSI |
(887) 0x83caa MOV 0x50(%RSP),%RCX |
(887) 0x83caf MOV 0xe0(%RSP),%R9 |
(887) 0x83cb7 ADD %RCX,%R9 |
(887) 0x83cba MOV (%RCX,%RDX,8),%RAX |
(887) 0x83cbe CMP %RAX,(%R9) |
(887) 0x83cc1 JLE 842f0 |
(887) 0x83cc7 CMPQ $0,0x18(%RSP) |
(887) 0x83ccd JE 84218 |
(887) 0x83cd3 MOV %R11,0x88(%RSP) |
(887) 0x83cdb MOV 0x28(%RSP),%R11 |
(887) 0x83ce0 MOV %RDI,0x78(%RSP) |
(887) 0x83ce5 MOV 0x8(%RSP),%RDI |
(887) 0x83cea MOV %R14,0xe0(%RSP) |
(887) 0x83cf2 MOV %R12,0x80(%RSP) |
(887) 0x83cfa JMP 83d69 |
0x83cfc NOPL (%RAX) |
(892) 0x83d00 MOV 0xc8(%RSP),%R12 |
(892) 0x83d08 MOV 0xd0(%RSP),%R14 |
(892) 0x83d10 MOV (%R12,%RCX,8),%R12 |
(892) 0x83d14 CMP %R12,(%R14,%R8,1) |
(892) 0x83d18 JE 83d88 |
(892) 0x83d1a CMP $-0x1,%RCX |
(892) 0x83d1e JE 83d61 |
(892) 0x83d20 CMP (%RBX,%RCX,8),%RDX |
(892) 0x83d24 JNE 83d61 |
(892) 0x83d26 MOV 0xe8(%RSP),%R12 |
(892) 0x83d2e LEA (,%RSI,8),%R14 |
(892) 0x83d36 VMOVSD (%R12,%RAX,8),%XMM7 |
(892) 0x83d3c MOV 0xa0(%RSP),%R12 |
(892) 0x83d44 MOV (%R12,%RCX,8),%RCX |
(892) 0x83d48 MOV 0x98(%RSP),%R12 |
(892) 0x83d50 VMOVSD %XMM7,(%R10,%RSI,8) |
(892) 0x83d56 VADDSD %XMM7,%XMM2,%XMM2 |
(892) 0x83d5a INC %RSI |
(892) 0x83d5d MOV %RCX,(%R12,%R14,1) |
(892) 0x83d61 INC %RAX |
(892) 0x83d64 CMP (%R9),%RAX |
(892) 0x83d67 JGE 83da0 |
(892) 0x83d69 MOV (%R13,%RAX,8),%R12 |
(892) 0x83d6e MOV (%RDI,%R12,8),%RCX |
(892) 0x83d72 CMPQ $-0x3,(%R11,%RCX,8) |
(892) 0x83d77 JE 83d1a |
(892) 0x83d79 CMPQ $0x1,0xf0(%RSP) |
(892) 0x83d82 JNE 83d00 |
(892) 0x83d88 MOV 0xe8(%RSP),%R14 |
(892) 0x83d90 VADDSD (%R14,%RAX,8),%XMM0,%XMM0 |
(892) 0x83d96 JMP 83d1a |
0x83d98 NOPL (%RAX,%RAX,1) |
(887) 0x83da0 MOV 0xe0(%RSP),%R14 |
(887) 0x83da8 MOV 0x88(%RSP),%R11 |
(887) 0x83db0 MOV 0x80(%RSP),%R12 |
(887) 0x83db8 MOV 0x78(%RSP),%RDI |
(887) 0x83dbd MOV 0xb8(%RSP),%RDX |
(887) 0x83dc5 MOV (%RDX),%R8 |
(887) 0x83dc8 MOV 0xb0(%RSP),%RAX |
(887) 0x83dd0 MOV 0xf8(%RSP),%RCX |
(887) 0x83dd8 MOV (%RAX),%R9 |
(887) 0x83ddb VMULSD (%RCX,%R9,8),%XMM2,%XMM10 |
(887) 0x83de1 VCOMISD %XMM4,%XMM10 |
(887) 0x83de5 JE 83df0 |
(887) 0x83de7 VXORPD %XMM5,%XMM0,%XMM1 |
(887) 0x83deb VDIVSD %XMM10,%XMM1,%XMM11 |
(887) 0x83df0 MOV 0xc0(%RSP),%RDX |
(887) 0x83df8 MOV (%RDX),%RCX |
(887) 0x83dfb CMP %RDI,%RCX |
(887) 0x83dfe JGE 83f8a |
(887) 0x83e04 SUB %RCX,%RDI |
(887) 0x83e07 MOV %RCX,0xe0(%RSP) |
(887) 0x83e0f LEA -0x1(%RDI),%RAX |
(887) 0x83e13 CMP $0x2,%RAX |
(887) 0x83e17 JBE 8438f |
(887) 0x83e1d MOV %RDI,%RDX |
(887) 0x83e20 LEA (%R11,%RCX,8),%RAX |
(887) 0x83e24 VBROADCASTSD %XMM11,%YMM12 |
(887) 0x83e29 SHR $0x2,%RDX |
(887) 0x83e2d SAL $0x5,%RDX |
(887) 0x83e31 LEA (%RDX,%RAX,1),%R9 |
(887) 0x83e35 SUB $0x20,%RDX |
(887) 0x83e39 SHR $0x5,%RDX |
(887) 0x83e3d INC %RDX |
(887) 0x83e40 AND $0x7,%EDX |
(887) 0x83e43 JE 83ecd |
(887) 0x83e49 CMP $0x1,%RDX |
(887) 0x83e4d JE 83ebb |
(887) 0x83e4f CMP $0x2,%RDX |
(887) 0x83e53 JE 83eae |
(887) 0x83e55 CMP $0x3,%RDX |
(887) 0x83e59 JE 83ea1 |
(887) 0x83e5b CMP $0x4,%RDX |
(887) 0x83e5f JE 83e94 |
(887) 0x83e61 CMP $0x5,%RDX |
(887) 0x83e65 JE 83e87 |
(887) 0x83e67 CMP $0x6,%RDX |
(887) 0x83e6b JE 83e7a |
(887) 0x83e6d VMULPD (%RAX),%YMM12,%YMM13 |
(887) 0x83e71 ADD $0x20,%RAX |
(887) 0x83e75 VMOVUPD %YMM13,-0x20(%RAX) |
(887) 0x83e7a VMULPD (%RAX),%YMM12,%YMM14 |
(887) 0x83e7e ADD $0x20,%RAX |
(887) 0x83e82 VMOVUPD %YMM14,-0x20(%RAX) |
(887) 0x83e87 VMULPD (%RAX),%YMM12,%YMM15 |
(887) 0x83e8b ADD $0x20,%RAX |
(887) 0x83e8f VMOVUPD %YMM15,-0x20(%RAX) |
(887) 0x83e94 VMULPD (%RAX),%YMM12,%YMM0 |
(887) 0x83e98 ADD $0x20,%RAX |
(887) 0x83e9c VMOVUPD %YMM0,-0x20(%RAX) |
(887) 0x83ea1 VMULPD (%RAX),%YMM12,%YMM3 |
(887) 0x83ea5 ADD $0x20,%RAX |
(887) 0x83ea9 VMOVUPD %YMM3,-0x20(%RAX) |
(887) 0x83eae VMULPD (%RAX),%YMM12,%YMM2 |
(887) 0x83eb2 ADD $0x20,%RAX |
(887) 0x83eb6 VMOVUPD %YMM2,-0x20(%RAX) |
(887) 0x83ebb VMULPD (%RAX),%YMM12,%YMM6 |
(887) 0x83ebf ADD $0x20,%RAX |
(887) 0x83ec3 VMOVUPD %YMM6,-0x20(%RAX) |
(887) 0x83ec8 CMP %RAX,%R9 |
(887) 0x83ecb JE 83f3c |
(889) 0x83ecd VMULPD (%RAX),%YMM12,%YMM7 |
(889) 0x83ed1 ADD $0x100,%RAX |
(889) 0x83ed7 VMULPD -0xe0(%RAX),%YMM12,%YMM8 |
(889) 0x83edf VMULPD -0xc0(%RAX),%YMM12,%YMM9 |
(889) 0x83ee7 VMULPD -0xa0(%RAX),%YMM12,%YMM10 |
(889) 0x83eef VMULPD -0x80(%RAX),%YMM12,%YMM1 |
(889) 0x83ef4 VMULPD -0x60(%RAX),%YMM12,%YMM13 |
(889) 0x83ef9 VMOVUPD %YMM7,-0x100(%RAX) |
(889) 0x83f01 VMULPD -0x40(%RAX),%YMM12,%YMM14 |
(889) 0x83f06 VMOVUPD %YMM8,-0xe0(%RAX) |
(889) 0x83f0e VMULPD -0x20(%RAX),%YMM12,%YMM15 |
(889) 0x83f13 VMOVUPD %YMM9,-0xc0(%RAX) |
(889) 0x83f1b VMOVUPD %YMM10,-0xa0(%RAX) |
(889) 0x83f23 VMOVUPD %YMM1,-0x80(%RAX) |
(889) 0x83f28 VMOVUPD %YMM13,-0x60(%RAX) |
(889) 0x83f2d VMOVUPD %YMM14,-0x40(%RAX) |
(889) 0x83f32 VMOVUPD %YMM15,-0x20(%RAX) |
(889) 0x83f37 CMP %RAX,%R9 |
(889) 0x83f3a JNE 83ecd |
(887) 0x83f3c TEST $0x3,%DIL |
(887) 0x83f40 JE 83f8a |
(887) 0x83f42 MOV %RDI,%R9 |
(887) 0x83f45 AND $-0x4,%R9 |
(887) 0x83f49 ADD %R9,%RCX |
(887) 0x83f4c SUB %R9,%RDI |
(887) 0x83f4f CMP $0x1,%RDI |
(887) 0x83f53 JE 83f7e |
(887) 0x83f55 MOV 0xe0(%RSP),%RAX |
(887) 0x83f5d VMOVDDUP %XMM11,%XMM12 |
(887) 0x83f62 ADD %R9,%RAX |
(887) 0x83f65 LEA (%R11,%RAX,8),%RDX |
(887) 0x83f69 VMULPD (%RDX),%XMM12,%XMM0 |
(887) 0x83f6d VMOVUPD %XMM0,(%RDX) |
(887) 0x83f71 TEST $0x1,%DIL |
(887) 0x83f75 JE 83f8a |
(887) 0x83f77 AND $-0x2,%RDI |
(887) 0x83f7b ADD %RDI,%RCX |
(887) 0x83f7e LEA (%R11,%RCX,8),%RDI |
(887) 0x83f82 VMULSD (%RDI),%XMM11,%XMM3 |
(887) 0x83f86 VMOVSD %XMM3,(%RDI) |
(887) 0x83f8a CMP %R8,%RSI |
(887) 0x83f8d JLE 8412f |
(887) 0x83f93 SUB %R8,%RSI |
(887) 0x83f96 MOV %R8,%RCX |
(887) 0x83f99 LEA -0x1(%RSI),%R9 |
(887) 0x83f9d CMP $0x2,%R9 |
(887) 0x83fa1 JBE 84397 |
(887) 0x83fa7 MOV %RSI,%RDX |
(887) 0x83faa LEA (%R10,%R8,8),%R9 |
(887) 0x83fae VBROADCASTSD %XMM11,%YMM6 |
(887) 0x83fb3 SHR $0x2,%RDX |
(887) 0x83fb7 SAL $0x5,%RDX |
(887) 0x83fbb LEA (%RDX,%R9,1),%RDI |
(887) 0x83fbf SUB $0x20,%RDX |
(887) 0x83fc3 SHR $0x5,%RDX |
(887) 0x83fc7 INC %RDX |
(887) 0x83fca AND $0x7,%EDX |
(887) 0x83fcd JE 84069 |
(887) 0x83fd3 CMP $0x1,%RDX |
(887) 0x83fd7 JE 84051 |
(887) 0x83fd9 CMP $0x2,%RDX |
(887) 0x83fdd JE 84042 |
(887) 0x83fdf CMP $0x3,%RDX |
(887) 0x83fe3 JE 84033 |
(887) 0x83fe5 CMP $0x4,%RDX |
(887) 0x83fe9 JE 84024 |
(887) 0x83feb CMP $0x5,%RDX |
(887) 0x83fef JE 84015 |
(887) 0x83ff1 CMP $0x6,%RDX |
(887) 0x83ff5 JE 84006 |
(887) 0x83ff7 VMULPD (%R9),%YMM6,%YMM2 |
(887) 0x83ffc ADD $0x20,%R9 |
(887) 0x84000 VMOVUPD %YMM2,-0x20(%R9) |
(887) 0x84006 VMULPD (%R9),%YMM6,%YMM7 |
(887) 0x8400b ADD $0x20,%R9 |
(887) 0x8400f VMOVUPD %YMM7,-0x20(%R9) |
(887) 0x84015 VMULPD (%R9),%YMM6,%YMM8 |
(887) 0x8401a ADD $0x20,%R9 |
(887) 0x8401e VMOVUPD %YMM8,-0x20(%R9) |
(887) 0x84024 VMULPD (%R9),%YMM6,%YMM9 |
(887) 0x84029 ADD $0x20,%R9 |
(887) 0x8402d VMOVUPD %YMM9,-0x20(%R9) |
(887) 0x84033 VMULPD (%R9),%YMM6,%YMM10 |
(887) 0x84038 ADD $0x20,%R9 |
(887) 0x8403c VMOVUPD %YMM10,-0x20(%R9) |
(887) 0x84042 VMULPD (%R9),%YMM6,%YMM1 |
(887) 0x84047 ADD $0x20,%R9 |
(887) 0x8404b VMOVUPD %YMM1,-0x20(%R9) |
(887) 0x84051 VMULPD (%R9),%YMM6,%YMM13 |
(887) 0x84056 ADD $0x20,%R9 |
(887) 0x8405a VMOVUPD %YMM13,-0x20(%R9) |
(887) 0x84060 CMP %R9,%RDI |
(887) 0x84063 JE 840e9 |
(888) 0x84069 VMULPD (%R9),%YMM6,%YMM14 |
(888) 0x8406e ADD $0x100,%R9 |
(888) 0x84075 VMULPD -0xe0(%R9),%YMM6,%YMM15 |
(888) 0x8407e VMULPD -0xc0(%R9),%YMM6,%YMM12 |
(888) 0x84087 VMULPD -0xa0(%R9),%YMM6,%YMM0 |
(888) 0x84090 VMULPD -0x80(%R9),%YMM6,%YMM3 |
(888) 0x84096 VMOVUPD %YMM14,-0x100(%R9) |
(888) 0x8409f VMULPD -0x60(%R9),%YMM6,%YMM2 |
(888) 0x840a5 VMOVUPD %YMM15,-0xe0(%R9) |
(888) 0x840ae VMULPD -0x40(%R9),%YMM6,%YMM7 |
(888) 0x840b4 VMOVUPD %YMM12,-0xc0(%R9) |
(888) 0x840bd VMULPD -0x20(%R9),%YMM6,%YMM8 |
(888) 0x840c3 VMOVUPD %YMM0,-0xa0(%R9) |
(888) 0x840cc VMOVUPD %YMM3,-0x80(%R9) |
(888) 0x840d2 VMOVUPD %YMM2,-0x60(%R9) |
(888) 0x840d8 VMOVUPD %YMM7,-0x40(%R9) |
(888) 0x840de VMOVUPD %YMM8,-0x20(%R9) |
(888) 0x840e4 CMP %R9,%RDI |
(888) 0x840e7 JNE 84069 |
(887) 0x840e9 TEST $0x3,%SIL |
(887) 0x840ed JE 8412f |
(887) 0x840ef MOV %RSI,%RAX |
(887) 0x840f2 AND $-0x4,%RAX |
(887) 0x840f6 ADD %RAX,%R8 |
(887) 0x840f9 SUB %RAX,%RSI |
(887) 0x840fc CMP $0x1,%RSI |
(887) 0x84100 JE 84123 |
(887) 0x84102 ADD %RCX,%RAX |
(887) 0x84105 VMOVDDUP %XMM11,%XMM6 |
(887) 0x8410a LEA (%R10,%RAX,8),%RCX |
(887) 0x8410e VMULPD (%RCX),%XMM6,%XMM9 |
(887) 0x84112 VMOVUPD %XMM9,(%RCX) |
(887) 0x84116 TEST $0x1,%SIL |
(887) 0x8411a JE 8412f |
(887) 0x8411c AND $-0x2,%RSI |
(887) 0x84120 ADD %RSI,%R8 |
(887) 0x84123 LEA (%R10,%R8,8),%RSI |
(887) 0x84127 VMULSD (%RSI),%XMM11,%XMM10 |
(887) 0x8412b VMOVSD %XMM10,(%RSI) |
(887) 0x8412f ADDQ $0x8,0xd8(%RSP) |
(887) 0x84138 MOV 0xd8(%RSP),%R8 |
(887) 0x84140 CMP %R8,0x40(%RSP) |
(887) 0x84145 JNE 83898 |
0x8414b VZEROUPPER |
0x8414e MOV %R12,%RDI |
0x84151 CALL c850 <hypre_Free@plt> |
0x84156 LEA -0x28(%RBP),%RSP |
0x8415a MOV %RBX,%RDI |
0x8415d POP %RBX |
0x8415e POP %R12 |
0x84160 POP %R13 |
0x84162 POP %R14 |
0x84164 POP %R15 |
0x84166 POP %RBP |
0x84167 JMP c850 |
0x8416c NOPL (%RAX) |
(887) 0x84170 MOV %R10,0x88(%RSP) |
(887) 0x84178 MOV 0x10(%RSP),%R9 |
(887) 0x8417d MOV %R8,0x80(%RSP) |
(887) 0x84185 MOV 0x20(%RSP),%R8 |
(887) 0x8418a NOPW (%RAX,%RAX,1) |
(894) 0x84190 MOV (%R8,%RAX,8),%RCX |
(894) 0x84194 CMPQ $-0x3,(%R9,%RCX,8) |
(894) 0x84199 JE 841a8 |
(894) 0x8419b MOV 0xf8(%RSP),%RBX |
(894) 0x841a3 VADDSD (%RBX,%RAX,8),%XMM0,%XMM0 |
(894) 0x841a8 CMP $-0x1,%RCX |
(894) 0x841ac JE 841ef |
(894) 0x841ae CMP (%R12,%RCX,8),%RDX |
(894) 0x841b2 JNE 841ef |
(894) 0x841b4 MOV 0xf8(%RSP),%R10 |
(894) 0x841bc LEA (,%RDI,8),%RBX |
(894) 0x841c4 VMOVSD (%R10,%RAX,8),%XMM3 |
(894) 0x841ca MOV 0xa8(%RSP),%R10 |
(894) 0x841d2 MOV (%R10,%RCX,8),%RCX |
(894) 0x841d6 MOV 0x90(%RSP),%R10 |
(894) 0x841de VMOVSD %XMM3,(%R11,%RDI,8) |
(894) 0x841e4 VADDSD %XMM3,%XMM2,%XMM2 |
(894) 0x841e8 INC %RDI |
(894) 0x841eb MOV %RCX,(%R10,%RBX,1) |
(894) 0x841ef INC %RAX |
(894) 0x841f2 CMP (%RSI),%RAX |
(894) 0x841f5 JL 84190 |
(887) 0x841f7 MOV 0xb8(%RSP),%RBX |
(887) 0x841ff MOV 0x88(%RSP),%R10 |
(887) 0x84207 MOV 0x80(%RSP),%R8 |
(887) 0x8420f JMP 83b37 |
0x84214 NOPL (%RAX) |
(887) 0x84218 CMPQ $0x1,0xf0(%RSP) |
(887) 0x84221 JE 842f8 |
(887) 0x84227 MOV %R14,0xe0(%RSP) |
(887) 0x8422f MOV %R11,0x88(%RSP) |
(887) 0x84237 MOV %RDI,0x80(%RSP) |
(887) 0x8423f MOV 0x28(%RSP),%RDI |
(887) 0x84244 NOPL (%RAX) |
(891) 0x84248 MOV (%R13,%RAX,8),%RCX |
(891) 0x8424d CMPQ $-0x3,(%RDI,%RCX,8) |
(891) 0x84252 JE 8427c |
(891) 0x84254 MOV 0xd0(%RSP),%R11 |
(891) 0x8425c MOV 0xc8(%RSP),%R14 |
(891) 0x84264 MOV (%R11,%R8,1),%R11 |
(891) 0x84268 CMP %R11,(%R14,%RCX,8) |
(891) 0x8426c JNE 8427c |
(891) 0x8426e MOV 0xe8(%RSP),%R14 |
(891) 0x84276 VADDSD (%R14,%RAX,8),%XMM0,%XMM0 |
(891) 0x8427c CMP $-0x1,%RCX |
(891) 0x84280 JE 842c4 |
(891) 0x84282 CMP (%RBX,%RCX,8),%RDX |
(891) 0x84286 JNE 842c4 |
(891) 0x84288 MOV 0xe8(%RSP),%R11 |
(891) 0x84290 LEA (,%RSI,8),%R14 |
(891) 0x84298 VMOVSD (%R11,%RAX,8),%XMM9 |
(891) 0x8429e MOV 0xa0(%RSP),%R11 |
(891) 0x842a6 MOV (%R11,%RCX,8),%RCX |
(891) 0x842aa MOV 0x98(%RSP),%R11 |
(891) 0x842b2 VMOVSD %XMM9,(%R10,%RSI,8) |
(891) 0x842b8 VADDSD %XMM9,%XMM2,%XMM2 |
(891) 0x842bd INC %RSI |
(891) 0x842c0 MOV %RCX,(%R11,%R14,1) |
(891) 0x842c4 INC %RAX |
(891) 0x842c7 CMP %RAX,(%R9) |
(891) 0x842ca JG 84248 |
(887) 0x842d0 MOV 0xe0(%RSP),%R14 |
(887) 0x842d8 MOV 0x88(%RSP),%R11 |
(887) 0x842e0 MOV 0x80(%RSP),%RDI |
(887) 0x842e8 JMP 83dbd |
0x842ed NOPL (%RAX) |
(887) 0x842f0 MOV %RSI,%R8 |
(887) 0x842f3 JMP 83dc8 |
(887) 0x842f8 MOV %R11,0xe0(%RSP) |
(887) 0x84300 MOV %RDI,0x88(%RSP) |
(887) 0x84308 MOV 0x28(%RSP),%RDI |
(887) 0x8430d NOPL (%RAX) |
(890) 0x84310 MOV (%R13,%RAX,8),%RCX |
(890) 0x84315 CMPQ $-0x3,(%RDI,%RCX,8) |
(890) 0x8431a JE 8432a |
(890) 0x8431c MOV 0xe8(%RSP),%R8 |
(890) 0x84324 VADDSD (%R8,%RAX,8),%XMM0,%XMM0 |
(890) 0x8432a CMP $-0x1,%RCX |
(890) 0x8432e JE 84372 |
(890) 0x84330 CMP (%RBX,%RCX,8),%RDX |
(890) 0x84334 JNE 84372 |
(890) 0x84336 MOV 0xe8(%RSP),%R11 |
(890) 0x8433e LEA (,%RSI,8),%R8 |
(890) 0x84346 VMOVSD (%R11,%RAX,8),%XMM8 |
(890) 0x8434c MOV 0xa0(%RSP),%R11 |
(890) 0x84354 MOV (%R11,%RCX,8),%RCX |
(890) 0x84358 MOV 0x98(%RSP),%R11 |
(890) 0x84360 VMOVSD %XMM8,(%R10,%RSI,8) |
(890) 0x84366 VADDSD %XMM8,%XMM2,%XMM2 |
(890) 0x8436b INC %RSI |
(890) 0x8436e MOV %RCX,(%R11,%R8,1) |
(890) 0x84372 INC %RAX |
(890) 0x84375 CMP %RAX,(%R9) |
(890) 0x84378 JG 84310 |
(887) 0x8437a MOV 0xe0(%RSP),%R11 |
(887) 0x84382 MOV 0x88(%RSP),%RDI |
(887) 0x8438a JMP 83dbd |
(887) 0x8438f XOR %R9D,%R9D |
(887) 0x84392 JMP 83f4c |
(887) 0x84397 XOR %EAX,%EAX |
(887) 0x84399 JMP 840f9 |
0x8439e MOV $0x8,%ESI |
0x843a3 MOV %RBX,%RDI |
0x843a6 MOV %R12,0x78(%RSP) |
0x843ab MOV %R11,0x88(%RSP) |
0x843b3 MOV %R10,0xb0(%RSP) |
0x843bb VMOVSD %XMM1,0xb8(%RSP) |
0x843c4 MOV %RBX,0xc0(%RSP) |
0x843cc CALL ce60 <hypre_CAlloc@plt> |
0x843d1 MOV 0x78(%RSP),%RCX |
0x843d6 MOV 0xc0(%RSP),%RDX |
0x843de VMOVSD 0xb8(%RSP),%XMM1 |
0x843e7 MOV 0xb0(%RSP),%R10 |
0x843ef MOV %RAX,%R12 |
0x843f2 TEST %RCX,%RCX |
0x843f5 MOV 0x88(%RSP),%R11 |
0x843fd JNE 844b6 |
0x84403 XOR %EBX,%EBX |
0x84405 TEST %RDX,%RDX |
0x84408 JLE 837cf |
0x8440e SAL $0x3,%RDX |
0x84412 MOV $0xff,%ESI |
0x84417 MOV %R12,%RDI |
0x8441a MOV %RCX,0x88(%RSP) |
0x84422 MOV %R11,0xb0(%RSP) |
0x8442a MOV %R10,0xb8(%RSP) |
0x84432 VMOVSD %XMM1,0xc0(%RSP) |
0x8443b CALL c100 <memset@plt> |
0x84440 MOV 0xb8(%RSP),%R10 |
0x84448 VMOVSD 0xc0(%RSP),%XMM1 |
0x84451 MOV 0xb0(%RSP),%R11 |
0x84459 MOV 0x88(%RSP),%RCX |
0x84461 TEST %RCX,%RCX |
0x84464 JLE 837cf |
0x8446a LEA (,%RCX,8),%RDX |
0x84472 MOV $0xff,%ESI |
0x84477 MOV %RBX,%RDI |
0x8447a MOV %R11,0xb0(%RSP) |
0x84482 MOV %R10,0xb8(%RSP) |
0x8448a VMOVSD %XMM1,0xc0(%RSP) |
0x84493 CALL c100 <memset@plt> |
0x84498 MOV 0xb8(%RSP),%R10 |
0x844a0 VMOVSD 0xc0(%RSP),%XMM1 |
0x844a9 MOV 0xb0(%RSP),%R11 |
0x844b1 JMP 837cf |
0x844b6 MOV %RCX,%RDI |
0x844b9 MOV $0x8,%ESI |
0x844be MOV %R11,0x78(%RSP) |
0x844c3 MOV %R10,0x88(%RSP) |
0x844cb MOV %RDX,0xb0(%RSP) |
0x844d3 MOV %RCX,0xc0(%RSP) |
0x844db VMOVSD %XMM1,0xb8(%RSP) |
0x844e4 CALL ce60 <hypre_CAlloc@plt> |
0x844e9 MOV 0xb0(%RSP),%RDX |
0x844f1 MOV 0x78(%RSP),%R11 |
0x844f6 MOV 0xc0(%RSP),%RCX |
0x844fe MOV 0x88(%RSP),%R10 |
0x84506 MOV %RAX,%RBX |
0x84509 VMOVSD 0xb8(%RSP),%XMM1 |
0x84512 TEST %RDX,%RDX |
0x84515 JG 8440e |
0x8451b JMP 84461 |
0x84520 MOV %R12,%RDI |
0x84523 MOV $0x8,%ESI |
0x84528 MOV %R11,0x88(%RSP) |
0x84530 MOV %R10,0xb0(%RSP) |
0x84538 MOV %R12,0xc0(%RSP) |
0x84540 XOR %R12D,%R12D |
0x84543 VMOVSD %XMM1,0xb8(%RSP) |
0x8454c CALL ce60 <hypre_CAlloc@plt> |
0x84551 MOV 0xc0(%RSP),%RCX |
0x84559 VMOVSD 0xb8(%RSP),%XMM1 |
0x84562 MOV 0xb0(%RSP),%R10 |
0x8456a MOV 0x88(%RSP),%R11 |
0x84572 MOV %RAX,%RBX |
0x84575 JMP 84461 |
0x8457a NOPW (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○96.00 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
○4.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
Path / |
Source file and lines | par_multi_interp.c:1575-1663 |
Module | libparcsr_ls.so |
nb instructions | 202 |
nb uops | 203 |
loop length | 1122 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 32 |
micro-operation queue | 33.83 cycles |
front end | 33.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 10.50 | 9.00 | 9.00 | 9.00 | 10.50 | 41.00 | 41.00 | 41.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 |
cycles | 10.50 | 9.00 | 9.00 | 9.00 | 10.50 | 41.00 | 41.00 | 41.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 |
Cycles executing div or sqrt instructions | 7.00-12.00 |
Front-end | 33.83 |
Dispatch | 41.00 |
DIV/SQRT | 7.00-12.00 |
Overall L1 | 41.00 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 9% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 11% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
AND $-0x20,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB $0x100,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0xf8(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xe0(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd8(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xd0(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc8(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb8(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb0(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RCX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa8(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x90(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf0(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R8,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xe8(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R10,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa0(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R11,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x98(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R12,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R13,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x88(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x80(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x78(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x68(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x60(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x38(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x70(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x28(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R9,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x18(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x30(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R8,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x58(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x20(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x50(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x10(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x48(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x8(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %RBX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 8439e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xd4e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 84520 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xed0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL c9a0 <hypre_GetThreadNum@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL cb00 <hypre_NumActiveThreads@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xe0(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
VMOVSD 0xb8(%RSP),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0x8(%R8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CQTO | scal (12.5%) | |||||||||||||||||
IDIV %R9 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 | scal (12.5%) |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
DEC %R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IMUL %RAX,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
ADD %R11,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RCX,%R11,1),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R9,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
CMOVNE %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RDI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 8414e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xafe> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x80(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVQ 0x98ce7(%RIP),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
LEA (%R9,%RDI,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R9,%R8,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL c850 <hypre_Free@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JMP c850 <hypre_Free@plt> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R12,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV %RBX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JNE 844b6 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe66> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 837cf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
SAL $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R11,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL c100 <memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb8(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
VMOVSD 0xc0(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x88(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 837cf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL c100 <memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb8(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
VMOVSD 0xc0(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 837cf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x78(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x88(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JG 8440e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xdbe> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 84461 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe11> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R12,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
JMP 84461 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe11> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
Source file and lines | par_multi_interp.c:1575-1663 |
Module | libparcsr_ls.so |
nb instructions | 202 |
nb uops | 203 |
loop length | 1122 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 4 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 32 |
micro-operation queue | 33.83 cycles |
front end | 33.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 10.50 | 9.00 | 9.00 | 9.00 | 10.50 | 41.00 | 41.00 | 41.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 |
cycles | 10.50 | 9.00 | 9.00 | 9.00 | 10.50 | 41.00 | 41.00 | 41.00 | 0.00 | 0.00 | 0.00 | 0.00 | 3.00 | 3.00 |
Cycles executing div or sqrt instructions | 7.00-12.00 |
Front-end | 33.83 |
Dispatch | 41.00 |
DIV/SQRT | 7.00-12.00 |
Overall L1 | 41.00 |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 7% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 1% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 9% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 13% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 11% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
AND $-0x20,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB $0x100,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0xf8(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xe0(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd8(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xd0(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc8(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb8(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb0(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RCX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa8(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x90(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf0(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R8,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xe8(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R10,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa0(%RDI),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R11,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x98(%RDI),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R12,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R13,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x88(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x80(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x78(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x68(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x60(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x40(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x38(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x70(%RDI),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x28(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %R9,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x18(%RDI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x30(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R8,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x58(%RDI),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x20(%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x50(%RDI),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x10(%RDI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x48(%RDI),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x8(%RDI),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RSI,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDI,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %RBX,%RBX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 8439e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xd4e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 84520 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xed0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL c9a0 <hypre_GetThreadNum@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL cb00 <hypre_NumActiveThreads@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xd8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xe0(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
VMOVSD 0xb8(%RSP),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0x8(%R8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CQTO | scal (12.5%) | |||||||||||||||||
IDIV %R9 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 | scal (12.5%) |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
DEC %R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RSI,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IMUL %RAX,%R11 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
ADD %R11,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RCX,%R11,1),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD %RCX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R9,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
CMOVNE %RAX,%R8 | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RDI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 8414e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xafe> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x80(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVQ 0x98ce7(%RIP),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VXORPD %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
LEA (%R9,%RDI,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R9,%R8,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL c850 <hypre_Free@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JMP c850 <hypre_Free@plt> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R12,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV %RBX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x78(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JNE 844b6 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe66> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 837cf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
SAL $0x3,%RDX | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RCX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R11,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL c100 <memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb8(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
VMOVSD 0xc0(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x88(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 837cf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R11,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL c100 <memset@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb8(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
VMOVSD 0xc0(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb0(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 837cf <hypre_BoomerAMGBuildMultipass._omp_fn.9+0x17f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x78(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xc0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x88(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
TEST %RDX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JG 8440e <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xdbe> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 84461 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe11> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (6.3%) |
MOV %R11,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R12,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %R12D,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | scal (6.3%) |
VMOVSD %XMM1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
CALL ce60 <hypre_CAlloc@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xc0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD 0xb8(%RSP),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0xb0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0x88(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
JMP 84461 <hypre_BoomerAMGBuildMultipass._omp_fn.9+0xe11> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildMultipass._omp_fn.9– | 0.44 | 0.32 |
▼Loop 887 - par_multi_interp.c:1605-1660 - libparcsr_ls.so– | 0.13 | 0.09 |
○Loop 894 - par_multi_interp.c:1618-1628 - libparcsr_ls.so | 0.31 | 0.21 |
○Loop 890 - par_multi_interp.c:1639-1652 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 888 - par_multi_interp.c:1659-1660 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 891 - par_multi_interp.c:1639-1652 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 895 - par_multi_interp.c:1618-1628 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 896 - par_multi_interp.c:1612-1615 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 892 - par_multi_interp.c:1639-1652 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 893 - par_multi_interp.c:1633-1636 - libparcsr_ls.so | 0.00 | 0.00 |
○Loop 889 - par_multi_interp.c:1657-1658 - libparcsr_ls.so | 0.00 | 0.00 |