Function: hypre_BoomerAMGBuildExtPIInterp.extracted | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage: 0.22% |
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Function: hypre_BoomerAMGBuildExtPIInterp.extracted | Module: exec | Source: par_lr_interp.c:1196-1757 [...] | Coverage: 0.22% |
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/home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/build/AMG/AMG/parcsr_ls/par_lr_interp.c: 1196 - 1757 |
-------------------------------------------------------------------------------- |
1196: #pragma omp parallel private(i,my_thread_num,num_threads,start,stop,coarse_counter,jj_counter,jj_counter_offd, P_marker, P_marker_offd,jj,kk,i1,k1,loc_col,jj_begin_row,jj_begin_row_offd,jj_end_row,jj_end_row_offd,diagonal,sum,sgn,jj1,i2,distribute,strong_f_marker) |
[...] |
1221: if (n_fine) |
1222: { |
1223: P_marker = hypre_CTAlloc(HYPRE_Int, n_fine); |
1224: for (i = 0; i < n_fine; i++) |
1225: { P_marker[i] = -1; } |
1226: } |
1227: if (full_off_procNodes) |
1228: { |
1229: P_marker_offd = hypre_CTAlloc(HYPRE_Int, full_off_procNodes); |
1230: for (i = 0; i < full_off_procNodes; i++) |
1231: { P_marker_offd[i] = -1;} |
1232: } |
1233: |
1234: /* this thread's row range */ |
1235: my_thread_num = hypre_GetThreadNum(); |
1236: num_threads = hypre_NumActiveThreads(); |
1237: start = (n_fine/num_threads)*my_thread_num; |
1238: if (my_thread_num == num_threads-1) |
[...] |
1244: for (i = start; i < stop; i++) |
1245: { |
1246: P_diag_i[i] = jj_counter; |
1247: if (num_procs > 1) |
1248: P_offd_i[i] = jj_counter_offd; |
1249: |
1250: if (CF_marker[i] >= 0) |
1251: { |
1252: jj_counter++; |
1253: fine_to_coarse[i] = coarse_counter; |
1254: coarse_counter++; |
[...] |
1262: else if (CF_marker[i] != -3) |
1263: { |
1264: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1265: { |
1266: i1 = S_diag_j[jj]; |
1267: if (CF_marker[i1] >= 0) |
1268: { /* i1 is a C point */ |
1269: if (P_marker[i1] < P_diag_i[i]) |
1270: { |
1271: P_marker[i1] = jj_counter; |
1272: jj_counter++; |
1273: } |
1274: } |
1275: else if (CF_marker[i1] != -3) |
1276: { /* i1 is a F point, loop through it's strong neighbors */ |
1277: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1278: { |
1279: k1 = S_diag_j[kk]; |
1280: if (CF_marker[k1] >= 0) |
1281: { |
1282: if(P_marker[k1] < P_diag_i[i]) |
1283: { |
1284: P_marker[k1] = jj_counter; |
1285: jj_counter++; |
1286: } |
1287: } |
1288: } |
1289: if(num_procs > 1) |
1290: { |
1291: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1292: { |
1293: if(col_offd_S_to_A) |
1294: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1295: else |
1296: k1 = S_offd_j[kk]; |
1297: if (CF_marker_offd[k1] >= 0) |
1298: { |
1299: if(P_marker_offd[k1] < P_offd_i[i]) |
1300: { |
1301: tmp_CF_marker_offd[k1] = 1; |
1302: P_marker_offd[k1] = jj_counter_offd; |
1303: jj_counter_offd++; |
[...] |
1311: if (num_procs > 1) |
1312: { |
1313: for (jj = S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1314: { |
1315: i1 = S_offd_j[jj]; |
1316: if(col_offd_S_to_A) |
1317: i1 = col_offd_S_to_A[i1]; |
1318: if (CF_marker_offd[i1] >= 0) |
1319: { |
1320: if(P_marker_offd[i1] < P_offd_i[i]) |
1321: { |
1322: tmp_CF_marker_offd[i1] = 1; |
1323: P_marker_offd[i1] = jj_counter_offd; |
1324: jj_counter_offd++; |
1325: } |
1326: } |
1327: else if (CF_marker_offd[i1] != -3) |
1328: { /* F point; look at neighbors of i1. Sop contains global col |
1329: * numbers and entries that could be in S_diag or S_offd or |
1330: * neither. */ |
1331: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1332: { |
1333: k1 = Sop_j[kk]; |
1334: if(k1 >= col_1 && k1 < col_n) |
1335: { /* In S_diag */ |
1336: loc_col = k1-col_1; |
1337: if(P_marker[loc_col] < P_diag_i[i]) |
1338: { |
1339: P_marker[loc_col] = jj_counter; |
1340: jj_counter++; |
1341: } |
1342: } |
1343: else |
1344: { |
1345: loc_col = -k1 - 1; |
1346: if(P_marker_offd[loc_col] < P_offd_i[i]) |
1347: { |
1348: P_marker_offd[loc_col] = jj_counter_offd; |
1349: tmp_CF_marker_offd[loc_col] = 1; |
1350: jj_counter_offd++; |
[...] |
1365: P_diag_i[stop] = jj_counter; |
1366: P_offd_i[stop] = jj_counter_offd; |
1367: fine_to_coarse_offset[my_thread_num] = coarse_counter; |
1368: diag_offset[my_thread_num] = jj_counter; |
1369: offd_offset[my_thread_num] = jj_counter_offd; |
[...] |
1375: if(my_thread_num == 0) |
1376: { |
1377: /* Calculate the offset for P_diag_i and P_offd_i for each thread */ |
1378: for (i = 1; i < num_threads; i++) |
1379: { |
1380: diag_offset[i] = diag_offset[i-1] + diag_offset[i]; |
1381: fine_to_coarse_offset[i] = fine_to_coarse_offset[i-1] + fine_to_coarse_offset[i]; |
1382: offd_offset[i] = offd_offset[i-1] + offd_offset[i]; |
[...] |
1389: if(my_thread_num > 0) |
1390: { |
1391: /* update row pointer array with offset, |
1392: * making sure to update the row stop index */ |
1393: for (i = start+1; i <= stop; i++) |
1394: { |
1395: P_diag_i[i] += diag_offset[my_thread_num-1]; |
1396: P_offd_i[i] += offd_offset[my_thread_num-1]; |
1397: } |
1398: /* update fine_to_coarse by offsetting with the offset |
1399: * from the preceding thread */ |
1400: for (i = start; i < stop; i++) |
1401: { |
1402: if(fine_to_coarse[i] >= 0) |
1403: { fine_to_coarse[i] += fine_to_coarse_offset[my_thread_num-1]; } |
[...] |
1410: if(my_thread_num == 0) |
1411: { |
1412: if (debug_flag==4) |
1413: { |
1414: wall_time = time_getWallclockSeconds() - wall_time; |
1415: hypre_printf("Proc = %d determine structure %f\n", |
1416: my_id, wall_time); |
1417: fflush(NULL); |
[...] |
1423: if (debug_flag== 4) wall_time = time_getWallclockSeconds(); |
1424: |
1425: P_diag_size = P_diag_i[n_fine]; |
1426: P_offd_size = P_offd_i[n_fine]; |
1427: |
1428: if (P_diag_size) |
1429: { |
1430: P_diag_j = hypre_CTAlloc(HYPRE_Int, P_diag_size); |
1431: P_diag_data = hypre_CTAlloc(HYPRE_Real, P_diag_size); |
1432: } |
1433: |
1434: if (P_offd_size) |
1435: { |
1436: P_offd_j = hypre_CTAlloc(HYPRE_Int, P_offd_size); |
1437: P_offd_data = hypre_CTAlloc(HYPRE_Real, P_offd_size); |
1438: } |
1439: } |
1440: |
1441: /* Fine to coarse mapping */ |
1442: if(num_procs > 1 && my_thread_num == 0) |
1443: { |
1444: for (i = 0; i < n_fine; i++) |
1445: fine_to_coarse[i] += my_first_cpt; |
1446: |
1447: hypre_alt_insert_new_nodes(comm_pkg, extend_comm_pkg, fine_to_coarse, |
1448: full_off_procNodes, |
1449: fine_to_coarse_offd); |
1450: |
1451: for (i = 0; i < n_fine; i++) |
1452: fine_to_coarse[i] -= my_first_cpt; |
1453: } |
1454: |
1455: for (i = 0; i < n_fine; i++) |
1456: P_marker[i] = -1; |
1457: |
1458: for (i = 0; i < full_off_procNodes; i++) |
1459: P_marker_offd[i] = -1; |
[...] |
1469: for (i = start; i < stop; i++) |
1470: { |
1471: jj_begin_row = P_diag_i[i]; |
1472: jj_begin_row_offd = P_offd_i[i]; |
[...] |
1480: if (CF_marker[i] >= 0) |
1481: { |
1482: P_diag_j[jj_counter] = fine_to_coarse[i]; |
1483: P_diag_data[jj_counter] = one; |
[...] |
1491: else if (CF_marker[i] != -3) |
1492: { |
1493: strong_f_marker--; |
1494: for (jj = S_diag_i[i]; jj < S_diag_i[i+1]; jj++) |
1495: { |
1496: i1 = S_diag_j[jj]; |
[...] |
1503: if (CF_marker[i1] >= 0) |
1504: { |
1505: if (P_marker[i1] < jj_begin_row) |
1506: { |
1507: P_marker[i1] = jj_counter; |
1508: P_diag_j[jj_counter] = fine_to_coarse[i1]; |
1509: P_diag_data[jj_counter] = zero; |
1510: jj_counter++; |
1511: } |
1512: } |
1513: else if (CF_marker[i1] != -3) |
1514: { |
1515: P_marker[i1] = strong_f_marker; |
1516: for (kk = S_diag_i[i1]; kk < S_diag_i[i1+1]; kk++) |
1517: { |
1518: k1 = S_diag_j[kk]; |
1519: if (CF_marker[k1] >= 0) |
1520: { |
1521: if(P_marker[k1] < jj_begin_row) |
1522: { |
1523: P_marker[k1] = jj_counter; |
1524: P_diag_j[jj_counter] = fine_to_coarse[k1]; |
1525: P_diag_data[jj_counter] = zero; |
1526: jj_counter++; |
1527: } |
1528: } |
1529: } |
1530: if(num_procs > 1) |
1531: { |
1532: for (kk = S_offd_i[i1]; kk < S_offd_i[i1+1]; kk++) |
1533: { |
1534: if(col_offd_S_to_A) |
1535: k1 = col_offd_S_to_A[S_offd_j[kk]]; |
1536: else |
1537: k1 = S_offd_j[kk]; |
1538: if(CF_marker_offd[k1] >= 0) |
1539: { |
1540: if(P_marker_offd[k1] < jj_begin_row_offd) |
1541: { |
1542: P_marker_offd[k1] = jj_counter_offd; |
1543: P_offd_j[jj_counter_offd] = k1; |
1544: P_offd_data[jj_counter_offd] = zero; |
1545: jj_counter_offd++; |
[...] |
1553: if ( num_procs > 1) |
1554: { |
1555: for (jj=S_offd_i[i]; jj < S_offd_i[i+1]; jj++) |
1556: { |
1557: i1 = S_offd_j[jj]; |
1558: if(col_offd_S_to_A) |
1559: i1 = col_offd_S_to_A[i1]; |
1560: if ( CF_marker_offd[i1] >= 0) |
1561: { |
1562: if(P_marker_offd[i1] < jj_begin_row_offd) |
1563: { |
1564: P_marker_offd[i1] = jj_counter_offd; |
1565: P_offd_j[jj_counter_offd] = i1; |
1566: P_offd_data[jj_counter_offd] = zero; |
1567: jj_counter_offd++; |
1568: } |
1569: } |
1570: else if (CF_marker_offd[i1] != -3) |
1571: { |
1572: P_marker_offd[i1] = strong_f_marker; |
1573: for(kk = Sop_i[i1]; kk < Sop_i[i1+1]; kk++) |
1574: { |
1575: k1 = Sop_j[kk]; |
1576: /* Find local col number */ |
1577: if(k1 >= col_1 && k1 < col_n) |
1578: { |
1579: loc_col = k1-col_1; |
1580: if(P_marker[loc_col] < jj_begin_row) |
1581: { |
1582: P_marker[loc_col] = jj_counter; |
1583: P_diag_j[jj_counter] = fine_to_coarse[loc_col]; |
1584: P_diag_data[jj_counter] = zero; |
1585: jj_counter++; |
1586: } |
1587: } |
1588: else |
1589: { |
1590: loc_col = -k1 - 1; |
1591: if(P_marker_offd[loc_col] < jj_begin_row_offd) |
1592: { |
1593: P_marker_offd[loc_col] = jj_counter_offd; |
1594: P_offd_j[jj_counter_offd]=loc_col; |
1595: P_offd_data[jj_counter_offd] = zero; |
1596: jj_counter_offd++; |
[...] |
1607: diagonal = A_diag_data[A_diag_i[i]]; |
1608: |
1609: for (jj = A_diag_i[i]+1; jj < A_diag_i[i+1]; jj++) |
1610: { /* i1 is a c-point and strongly influences i, accumulate |
1611: * a_(i,i1) into interpolation weight */ |
1612: i1 = A_diag_j[jj]; |
1613: if (P_marker[i1] >= jj_begin_row) |
1614: { |
1615: P_diag_data[P_marker[i1]] += A_diag_data[jj]; |
1616: } |
1617: else if(P_marker[i1] == strong_f_marker) |
1618: { |
1619: sum = zero; |
1620: sgn = 1; |
1621: if(A_diag_data[A_diag_i[i1]] < 0) sgn = -1; |
1622: /* Loop over row of A for point i1 and calculate the sum |
1623: * of the connections to c-points that strongly influence i. */ |
1624: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1625: { |
1626: i2 = A_diag_j[jj1]; |
1627: if((P_marker[i2] >= jj_begin_row || i2 == i) && (sgn*A_diag_data[jj1]) < 0) |
1628: sum += A_diag_data[jj1]; |
1629: } |
1630: if(num_procs > 1) |
1631: { |
1632: for(jj1 = A_offd_i[i1]; jj1< A_offd_i[i1+1]; jj1++) |
1633: { |
1634: i2 = A_offd_j[jj1]; |
1635: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1636: (sgn*A_offd_data[jj1]) < 0) |
1637: sum += A_offd_data[jj1]; |
1638: } |
1639: } |
1640: if(sum != 0) |
1641: { |
1642: distribute = A_diag_data[jj]/sum; |
1643: /* Loop over row of A for point i1 and do the distribution */ |
1644: for(jj1 = A_diag_i[i1]+1; jj1 < A_diag_i[i1+1]; jj1++) |
1645: { |
1646: i2 = A_diag_j[jj1]; |
1647: if(P_marker[i2] >= jj_begin_row && (sgn*A_diag_data[jj1]) < 0) |
1648: P_diag_data[P_marker[i2]] += |
1649: distribute*A_diag_data[jj1]; |
1650: if(i2 == i && (sgn*A_diag_data[jj1]) < 0) |
1651: diagonal += distribute*A_diag_data[jj1]; |
1652: } |
1653: if(num_procs > 1) |
1654: { |
1655: for(jj1 = A_offd_i[i1]; jj1 < A_offd_i[i1+1]; jj1++) |
1656: { |
1657: i2 = A_offd_j[jj1]; |
1658: if(P_marker_offd[i2] >= jj_begin_row_offd && |
1659: (sgn*A_offd_data[jj1]) < 0) |
1660: P_offd_data[P_marker_offd[i2]] += |
[...] |
1667: diagonal += A_diag_data[jj]; |
1668: } |
1669: } |
1670: /* neighbor i1 weakly influences i, accumulate a_(i,i1) into |
1671: * diagonal */ |
1672: else if (CF_marker[i1] != -3) |
1673: { |
1674: if(num_functions == 1 || dof_func[i] == dof_func[i1]) |
1675: diagonal += A_diag_data[jj]; |
1676: } |
1677: } |
1678: if(num_procs > 1) |
1679: { |
1680: for(jj = A_offd_i[i]; jj < A_offd_i[i+1]; jj++) |
1681: { |
1682: i1 = A_offd_j[jj]; |
1683: if(P_marker_offd[i1] >= jj_begin_row_offd) |
1684: P_offd_data[P_marker_offd[i1]] += A_offd_data[jj]; |
1685: else if(P_marker_offd[i1] == strong_f_marker) |
1686: { |
1687: sum = zero; |
1688: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1689: { |
1690: k1 = A_ext_j[jj1]; |
1691: if(k1 >= col_1 && k1 < col_n) |
1692: { /* diag */ |
1693: loc_col = k1 - col_1; |
1694: if(P_marker[loc_col] >= jj_begin_row || loc_col == i) |
1695: sum += A_ext_data[jj1]; |
1696: } |
1697: else |
1698: { |
1699: loc_col = -k1 - 1; |
1700: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1701: sum += A_ext_data[jj1]; |
1702: } |
1703: } |
1704: if(sum != 0) |
1705: { |
1706: distribute = A_offd_data[jj] / sum; |
1707: for(jj1 = A_ext_i[i1]; jj1 < A_ext_i[i1+1]; jj1++) |
1708: { |
1709: k1 = A_ext_j[jj1]; |
1710: if(k1 >= col_1 && k1 < col_n) |
1711: { /* diag */ |
1712: loc_col = k1 - col_1; |
1713: if(P_marker[loc_col] >= jj_begin_row) |
1714: P_diag_data[P_marker[loc_col]] += distribute* |
1715: A_ext_data[jj1]; |
1716: if(loc_col == i) |
1717: diagonal += distribute*A_ext_data[jj1]; |
1718: } |
1719: else |
1720: { |
1721: loc_col = -k1 - 1; |
1722: if(P_marker_offd[loc_col] >= jj_begin_row_offd) |
1723: P_offd_data[P_marker_offd[loc_col]] += distribute* |
1724: A_ext_data[jj1]; |
[...] |
1730: diagonal += A_offd_data[jj]; |
1731: } |
1732: } |
1733: else if (CF_marker_offd[i1] != -3) |
1734: { |
1735: if(num_functions == 1 || dof_func[i] == dof_func_offd[i1]) |
1736: diagonal += A_offd_data[jj]; |
1737: } |
1738: } |
1739: } |
1740: if (diagonal) |
1741: { |
1742: for(jj = jj_begin_row; jj < jj_end_row; jj++) |
1743: P_diag_data[jj] /= -diagonal; |
1744: for(jj = jj_begin_row_offd; jj < jj_end_row_offd; jj++) |
1745: P_offd_data[jj] /= -diagonal; |
1746: } |
1747: } |
1748: strong_f_marker--; |
[...] |
1754: if (n_fine) |
1755: { hypre_TFree(P_marker); } |
1756: if (full_off_procNodes) |
1757: { hypre_TFree(P_marker_offd); } |
0x46ed50 PUSH %RBP |
0x46ed51 MOV %RSP,%RBP |
0x46ed54 PUSH %R15 |
0x46ed56 PUSH %R14 |
0x46ed58 PUSH %R13 |
0x46ed5a PUSH %R12 |
0x46ed5c PUSH %RBX |
0x46ed5d AND $-0x40,%RSP |
0x46ed61 SUB $0x280,%RSP |
0x46ed68 MOV %R8,0x200(%RSP) |
0x46ed70 MOV %RCX,0x208(%RSP) |
0x46ed78 MOV %RDX,0xa8(%RSP) |
0x46ed80 MOV %RDI,0x120(%RSP) |
0x46ed88 MOV 0x170(%RBP),%RAX |
0x46ed8f MOV %RAX,0x150(%RSP) |
0x46ed97 MOV 0x150(%RBP),%RAX |
0x46ed9e MOV 0x168(%RBP),%RSI |
0x46eda5 MOV %RAX,0x140(%RSP) |
0x46edad MOV 0x148(%RBP),%RAX |
0x46edb4 MOV %RAX,0xd0(%RSP) |
0x46edbc MOV 0x140(%RBP),%RAX |
0x46edc3 MOV %RAX,0xf8(%RSP) |
0x46edcb MOV 0x130(%RBP),%RAX |
0x46edd2 MOV %RAX,0x148(%RSP) |
0x46edda MOV 0x128(%RBP),%RAX |
0x46ede1 MOV %RAX,0x100(%RSP) |
0x46ede9 MOV 0x108(%RBP),%RCX |
0x46edf0 MOV 0x120(%RBP),%RAX |
0x46edf7 MOV 0x118(%RBP),%RDX |
0x46edfe MOV 0x110(%RBP),%R13 |
0x46ee05 MOV %RCX,0x98(%RSP) |
0x46ee0d MOV 0x100(%RBP),%RCX |
0x46ee14 MOV %RCX,0x240(%RSP) |
0x46ee1c MOV 0xf8(%RBP),%RCX |
0x46ee23 MOV %RCX,0xa0(%RSP) |
0x46ee2b MOV 0xf0(%RBP),%RCX |
0x46ee32 MOV %RCX,0x238(%RSP) |
0x46ee3a MOV 0xe8(%RBP),%RCX |
0x46ee41 MOV %RCX,0x180(%RSP) |
0x46ee49 MOV 0xe0(%RBP),%RCX |
0x46ee50 MOV %RCX,0xe8(%RSP) |
0x46ee58 MOV 0xc8(%RBP),%RCX |
0x46ee5f MOV 0xd8(%RBP),%RDI |
0x46ee66 MOV 0xd0(%RBP),%R8 |
0x46ee6d MOV %RCX,0x130(%RSP) |
0x46ee75 MOV 0xc0(%RBP),%RCX |
0x46ee7c MOV %RCX,0x48(%RSP) |
0x46ee81 MOV 0xb8(%RBP),%RCX |
0x46ee88 MOV %RCX,0x58(%RSP) |
0x46ee8d MOV 0xb0(%RBP),%RCX |
0x46ee94 MOV %RCX,0x138(%RSP) |
0x46ee9c MOV 0xa8(%RBP),%RCX |
0x46eea3 MOV %RCX,0x28(%RSP) |
0x46eea8 MOV 0xa0(%RBP),%RCX |
0x46eeaf MOV %RCX,0x38(%RSP) |
0x46eeb4 MOV 0x98(%RBP),%RCX |
0x46eebb MOV %RCX,0xc0(%RSP) |
0x46eec3 MOV 0x90(%RBP),%RCX |
0x46eeca MOV %RCX,0x60(%RSP) |
0x46eecf MOV 0x88(%RBP),%RCX |
0x46eed6 MOV %RCX,0x110(%RSP) |
0x46eede MOV 0x80(%RBP),%RCX |
0x46eee5 MOV %RCX,0x78(%RSP) |
0x46eeea MOV 0x78(%RBP),%RCX |
0x46eeee MOV %RCX,0x158(%RSP) |
0x46eef6 MOV 0x68(%RBP),%RCX |
0x46eefa MOV 0x70(%RBP),%R15 |
0x46eefe MOV %RCX,0x50(%RSP) |
0x46ef03 MOV 0x58(%RBP),%RCX |
0x46ef07 MOV 0x60(%RBP),%R12 |
0x46ef0b MOV %RCX,0x108(%RSP) |
0x46ef13 MOV 0x50(%RBP),%RCX |
0x46ef17 MOV %RCX,0x178(%RSP) |
0x46ef1f MOV 0x48(%RBP),%RCX |
0x46ef23 MOV %RCX,0xd8(%RSP) |
0x46ef2b MOV 0x40(%RBP),%RCX |
0x46ef2f MOV %RCX,0xc8(%RSP) |
0x46ef37 MOV 0x38(%RBP),%RCX |
0x46ef3b MOV %RCX,0x210(%RSP) |
0x46ef43 MOV 0x30(%RBP),%RCX |
0x46ef47 MOV %RCX,0x40(%RSP) |
0x46ef4c MOV 0x28(%RBP),%RCX |
0x46ef50 MOV %RCX,0x90(%RSP) |
0x46ef58 MOV 0x20(%RBP),%R10 |
0x46ef5c MOV 0x18(%RBP),%RCX |
0x46ef60 MOV 0x10(%RBP),%R14 |
0x46ef64 MOV %RAX,0xb0(%RSP) |
0x46ef6c MOV %RDX,0x1f8(%RSP) |
0x46ef74 MOV %RCX,0x1f0(%RSP) |
0x46ef7c MOV %RSI,0x228(%RSP) |
0x46ef84 MOV %RDI,0x168(%RSP) |
0x46ef8c MOV %R8,0x160(%RSP) |
0x46ef94 MOV %R9,0x230(%RSP) |
0x46ef9c MOV %R10,0x220(%RSP) |
0x46efa4 TEST %R12,%R12 |
0x46efa7 JE 46f022 |
0x46efa9 MOV $0x8,%ESI |
0x46efae MOV %R12,%RDI |
0x46efb1 CALL 583040 <hypre_CAlloc> |
0x46efb6 MOV %RAX,%RBX |
0x46efb9 TEST %R12,%R12 |
0x46efbc JLE 46efd3 |
0x46efbe LEA (,%R12,8),%RDX |
0x46efc6 MOV $0xff,%ESI |
0x46efcb MOV %RBX,%RDI |
0x46efce CALL 58e1b0 <_intel_fast_memset> |
0x46efd3 MOV 0xb0(%RSP),%RAX |
0x46efdb MOV (%RAX),%RDI |
0x46efde MOV %R14,0x88(%RSP) |
0x46efe6 TEST %RDI,%RDI |
0x46efe9 JE 46f032 |
0x46efeb MOV $0x8,%ESI |
0x46eff0 CALL 583040 <hypre_CAlloc> |
0x46eff5 MOV 0xb0(%RSP),%RCX |
0x46effd MOV %RAX,0x20(%RSP) |
0x46f002 CMPQ $0,(%RCX) |
0x46f006 JLE 46f032 |
0x46f008 XOR %EDX,%EDX |
0x46f00a NOPW (%RAX,%RAX,1) |
(1837) 0x46f010 MOVQ $-0x1,(%RAX,%RDX,8) |
(1837) 0x46f018 INC %RDX |
(1837) 0x46f01b CMP (%RCX),%RDX |
(1837) 0x46f01e JL 46f010 |
0x46f020 JMP 46f032 |
0x46f022 MOV (%RAX),%RDI |
0x46f025 MOV %R14,0x88(%RSP) |
0x46f02d TEST %RDI,%RDI |
0x46f030 JNE 46efeb |
0x46f032 CALL 586110 <hypre_GetThreadNum> |
0x46f037 MOV %RAX,%R14 |
0x46f03a CALL 586100 <hypre_NumActiveThreads> |
0x46f03f MOV %RAX,%RSI |
0x46f042 MOV %RAX,0xe0(%RSP) |
0x46f04a MOV %R12,%RAX |
0x46f04d CQTO |
0x46f04f MOV %R12,%RCX |
0x46f052 IDIV %RSI |
0x46f055 LEA 0x1(%R14),%RDX |
0x46f059 DEC %RSI |
0x46f05c MOV %RCX,0x118(%RSP) |
0x46f064 MOV %R13,0x80(%RSP) |
0x46f06c MOV %R15,0x30(%RSP) |
0x46f071 IMUL %RAX,%RDX |
0x46f075 MOV %RAX,%R12 |
0x46f078 IMUL %R14,%R12 |
0x46f07c CMP %RSI,%R14 |
0x46f07f MOV %RCX,%RAX |
0x46f082 CMOVE %RCX,%RDX |
0x46f086 MOV %RDX,%RCX |
0x46f089 SUB %R12,%RCX |
0x46f08c MOV %RDX,0xb8(%RSP) |
0x46f094 MOV %R14,0x128(%RSP) |
0x46f09c MOV %RSI,0x170(%RSP) |
0x46f0a4 JLE 46f12d |
0x46f0aa LEA 0x1(%R12),%RAX |
0x46f0af MOV %RCX,0x218(%RSP) |
0x46f0b7 CMP %RAX,%RDX |
0x46f0ba JNE 46f266 |
0x46f0c0 XOR %ECX,%ECX |
0x46f0c2 XOR %R13D,%R13D |
0x46f0c5 MOV %R12,%RAX |
0x46f0c8 XOR %R14D,%R14D |
0x46f0cb MOV %RCX,0x68(%RSP) |
0x46f0d0 TESTB $0x1,0x218(%RSP) |
0x46f0d8 JE 46f13a |
0x46f0da MOV 0x28(%RSP),%R10 |
0x46f0df MOV 0x90(%RSP),%RCX |
0x46f0e7 MOV %R14,(%R10,%RAX,8) |
0x46f0eb CMPQ $0x2,(%RCX) |
0x46f0ef JL 46f0fa |
0x46f0f1 MOV 0x48(%RSP),%RCX |
0x46f0f6 MOV %R13,(%RCX,%RAX,8) |
0x46f0fa MOV 0xa8(%RSP),%RCX |
0x46f102 MOV (%RCX,%RAX,8),%RCX |
0x46f106 TEST %RCX,%RCX |
0x46f109 JS 46feb9 |
0x46f10f MOV 0x80(%RSP),%RCX |
0x46f117 MOV 0x68(%RSP),%RDX |
0x46f11c INC %R14 |
0x46f11f MOV %RDX,(%RCX,%RAX,8) |
0x46f123 INC %RDX |
0x46f126 MOV %RDX,0x68(%RSP) |
0x46f12b JMP 46f13a |
0x46f12d XOR %EAX,%EAX |
0x46f12f MOV %RAX,0x68(%RSP) |
0x46f134 XOR %R14D,%R14D |
0x46f137 XOR %R13D,%R13D |
0x46f13a MOV 0x120(%RSP),%RAX |
0x46f142 MOV $0x5d5f50,%EDI |
0x46f147 MOV (%RAX),%ESI |
0x46f149 CALL 410560 <__kmpc_barrier@plt> |
0x46f14e MOV 0x28(%RSP),%RAX |
0x46f153 MOV 0xb8(%RSP),%RCX |
0x46f15b MOV 0x48(%RSP),%RDX |
0x46f160 MOV 0x68(%RSP),%RDI |
0x46f165 MOV %R14,(%RAX,%RCX,8) |
0x46f169 MOV %R13,(%RDX,%RCX,8) |
0x46f16d MOV 0x128(%RSP),%RAX |
0x46f175 MOV 0xd0(%RSP),%RDX |
0x46f17d MOV %R13,%RCX |
0x46f180 MOV %RDI,(%RDX,%RAX,8) |
0x46f184 MOV 0xf8(%RSP),%RDI |
0x46f18c MOV %RAX,%R13 |
0x46f18f MOV %R14,(%RDI,%RAX,8) |
0x46f193 MOV 0x140(%RSP),%R14 |
0x46f19b MOV $0x5d5f70,%EDI |
0x46f1a0 MOV %RCX,(%R14,%RAX,8) |
0x46f1a4 MOV 0x120(%RSP),%RCX |
0x46f1ac MOV (%RCX),%ESI |
0x46f1ae CALL 410560 <__kmpc_barrier@plt> |
0x46f1b3 MOV %R14,%R11 |
0x46f1b6 MOV 0xf8(%RSP),%R14 |
0x46f1be MOV 0xd0(%RSP),%R10 |
0x46f1c6 MOV 0xe0(%RSP),%RAX |
0x46f1ce TEST %R13,%R13 |
0x46f1d1 JNE 46fcf3 |
0x46f1d7 CMP $0x1,%RAX |
0x46f1db JLE 46fcf3 |
0x46f1e1 MOV 0x170(%RSP),%RDX |
0x46f1e9 LEA (%R14,%RDX,8),%RAX |
0x46f1ed LEA (%R10,%RDX,8),%RCX |
0x46f1f1 MOV %RDX,%R9 |
0x46f1f4 LEA (%R11,%RDX,8),%RDX |
0x46f1f8 CMP %R10,%RAX |
0x46f1fb SETAE %DIL |
0x46f1ff CMP %R14,%RCX |
0x46f202 SETAE %R8B |
0x46f206 CMP %R11,%RAX |
0x46f209 SETB %AL |
0x46f20c CMP %R14,%RDX |
0x46f20f SETB %SIL |
0x46f213 CMP %R11,%RCX |
0x46f216 SETB %CL |
0x46f219 CMP %R10,%RDX |
0x46f21c SETB %DL |
0x46f21f TEST %R8B,%DIL |
0x46f222 JNE 46fad6 |
0x46f228 OR %SIL,%AL |
0x46f22b JE 46fad6 |
0x46f231 OR %DL,%CL |
0x46f233 JE 46fad6 |
0x46f239 MOV 0xe0(%RSP),%RDI |
0x46f241 MOV (%R14),%RAX |
0x46f244 MOV (%R10),%RCX |
0x46f247 MOV (%R11),%RDX |
0x46f24a MOV %R9D,%ESI |
0x46f24d AND $0x7,%ESI |
0x46f250 ADD $-0x2,%RDI |
0x46f254 CMP $0x7,%RDI |
0x46f258 JAE 46fb75 |
0x46f25e XOR %R8D,%R8D |
0x46f261 JMP 46fc80 |
0x46f266 AND $-0x2,%RCX |
0x46f26a XOR %R13D,%R13D |
0x46f26d MOV %R12,%RAX |
0x46f270 XOR %R14D,%R14D |
0x46f273 MOV %RCX,0xf0(%RSP) |
0x46f27b XOR %ECX,%ECX |
0x46f27d MOV %RCX,0x68(%RSP) |
0x46f282 XOR %ECX,%ECX |
0x46f284 MOV 0x28(%RSP),%R10 |
0x46f289 MOV 0x88(%RSP),%RDX |
0x46f291 JMP 46f2ee |
0x46f293 NOPW %CS:(%RAX,%RAX,1) |
(1824) 0x46f2a0 MOV 0xa8(%RSP),%RCX |
(1824) 0x46f2a8 MOV 0x8(%RCX,%RAX,8),%RDI |
(1824) 0x46f2ad TEST %RDI,%RDI |
(1824) 0x46f2b0 JS 46f350 |
(1824) 0x46f2b6 MOV 0x80(%RSP),%RDI |
(1824) 0x46f2be MOV 0x68(%RSP),%RCX |
(1824) 0x46f2c3 INC %R14 |
(1824) 0x46f2c6 MOV %RCX,0x8(%RDI,%RAX,8) |
(1824) 0x46f2cb INC %RCX |
(1824) 0x46f2ce MOV %RCX,0x68(%RSP) |
(1824) 0x46f2d3 MOV 0x70(%RSP),%RCX |
(1824) 0x46f2d8 ADD $0x2,%RAX |
(1824) 0x46f2dc ADD $0x2,%RCX |
(1824) 0x46f2e0 CMP 0xf0(%RSP),%RCX |
(1824) 0x46f2e8 JE 46f0d0 |
(1824) 0x46f2ee MOV %RCX,0x70(%RSP) |
(1824) 0x46f2f3 MOV %R14,(%R10,%RAX,8) |
(1824) 0x46f2f7 MOV 0x90(%RSP),%RCX |
(1824) 0x46f2ff CMPQ $0x2,(%RCX) |
(1824) 0x46f303 JL 46f30e |
(1824) 0x46f305 MOV 0x48(%RSP),%RDI |
(1824) 0x46f30a MOV %R13,(%RDI,%RAX,8) |
(1824) 0x46f30e MOV 0xa8(%RSP),%RCX |
(1824) 0x46f316 MOV (%RCX,%RAX,8),%RDI |
(1824) 0x46f31a TEST %RDI,%RDI |
(1824) 0x46f31d JS 46f5a0 |
(1824) 0x46f323 MOV 0x80(%RSP),%RDI |
(1824) 0x46f32b MOV 0x68(%RSP),%RCX |
(1824) 0x46f330 INC %R14 |
(1824) 0x46f333 MOV %RCX,(%RDI,%RAX,8) |
(1824) 0x46f337 INC %RCX |
(1824) 0x46f33a MOV %RCX,0x68(%RSP) |
(1824) 0x46f33f JMP 46fab0 |
0x46f344 NOPW %CS:(%RAX,%RAX,1) |
(1824) 0x46f350 CMP $-0x3,%RDI |
(1824) 0x46f354 JE 46f2d3 |
(1824) 0x46f35a MOV 0x78(%RSP),%RCX |
(1824) 0x46f35f MOV 0x8(%RCX,%RAX,8),%RDI |
(1824) 0x46f364 JMP 46f378 |
(1827) 0x46f366 MOV 0x28(%RSP),%R10 |
(1827) 0x46f36b NOPL (%RAX,%RAX,1) |
(1827) 0x46f370 MOV 0x78(%RSP),%RCX |
(1827) 0x46f375 INC %RDI |
(1827) 0x46f378 CMP 0x10(%RCX,%RAX,8),%RDI |
(1827) 0x46f37d JGE 46f7d1 |
(1827) 0x46f383 MOV 0x110(%RSP),%RCX |
(1827) 0x46f38b MOV 0xa8(%RSP),%RSI |
(1827) 0x46f393 MOV (%RCX,%RDI,8),%R8 |
(1827) 0x46f397 MOV (%RSI,%R8,8),%R9 |
(1827) 0x46f39b TEST %R9,%R9 |
(1827) 0x46f39e JS 46f3c0 |
(1827) 0x46f3a0 MOV (%RBX,%R8,8),%R9 |
(1827) 0x46f3a4 CMP 0x8(%R10,%RAX,8),%R9 |
(1827) 0x46f3a9 JGE 46f370 |
(1827) 0x46f3ab MOV %R14,(%RBX,%R8,8) |
(1827) 0x46f3af INC %R14 |
(1827) 0x46f3b2 JMP 46f370 |
0x46f3b4 NOPW %CS:(%RAX,%RAX,1) |
(1827) 0x46f3c0 CMP $-0x3,%R9 |
(1827) 0x46f3c4 JE 46f370 |
(1827) 0x46f3c6 MOV 0x78(%RSP),%RCX |
(1827) 0x46f3cb MOV (%RCX,%R8,8),%R9 |
(1827) 0x46f3cf MOV 0x8(%RCX,%R8,8),%R10 |
(1827) 0x46f3d4 JMP 46f3e8 |
0x46f3d6 NOPW %CS:(%RAX,%RAX,1) |
(1830) 0x46f3e0 MOV 0x30(%RSP),%R15 |
(1830) 0x46f3e5 INC %R9 |
(1830) 0x46f3e8 CMP %R10,%R9 |
(1830) 0x46f3eb JGE 46f42b |
(1830) 0x46f3ed MOV 0x110(%RSP),%RCX |
(1830) 0x46f3f5 MOV 0xa8(%RSP),%RSI |
(1830) 0x46f3fd MOV (%RCX,%R9,8),%R11 |
(1830) 0x46f401 CMPQ $0,(%RSI,%R11,8) |
(1830) 0x46f406 JS 46f3e5 |
(1830) 0x46f408 MOV 0x28(%RSP),%RCX |
(1830) 0x46f40d MOV (%RBX,%R11,8),%R15 |
(1830) 0x46f411 CMP 0x8(%RCX,%RAX,8),%R15 |
(1830) 0x46f416 JGE 46f3e0 |
(1830) 0x46f418 MOV 0x78(%RSP),%RCX |
(1830) 0x46f41d MOV %R14,(%RBX,%R11,8) |
(1830) 0x46f421 INC %R14 |
(1830) 0x46f424 MOV 0x8(%RCX,%R8,8),%R10 |
(1830) 0x46f429 JMP 46f3e0 |
(1827) 0x46f42b MOV 0x90(%RSP),%RCX |
(1827) 0x46f433 CMPQ $0x2,(%RCX) |
(1827) 0x46f437 JL 46f366 |
(1827) 0x46f43d MOV 0x60(%RSP),%RCX |
(1827) 0x46f442 MOV (%RCX,%R8,8),%R9 |
(1827) 0x46f446 MOV 0x8(%RCX,%R8,8),%R11 |
(1827) 0x46f44b CMP %R11,%R9 |
(1827) 0x46f44e JGE 46f366 |
(1827) 0x46f454 MOV 0xe8(%RSP),%R10 |
(1827) 0x46f45c MOV (%R10),%R10 |
(1827) 0x46f45f TEST %RDX,%RDX |
(1827) 0x46f462 JNE 46f481 |
(1827) 0x46f464 JMP 46f521 |
0x46f469 NOPL (%RAX) |
(1828) 0x46f470 MOV 0x30(%RSP),%R15 |
(1828) 0x46f475 INC %R9 |
(1828) 0x46f478 CMP %R11,%R9 |
(1828) 0x46f47b JGE 46f366 |
(1828) 0x46f481 MOV 0xc0(%RSP),%RCX |
(1828) 0x46f489 MOV (%RCX,%R9,8),%R15 |
(1828) 0x46f48d MOV (%RDX,%R15,8),%R15 |
(1828) 0x46f491 CMPQ $0,(%R10,%R15,8) |
(1828) 0x46f496 JS 46f470 |
(1828) 0x46f498 MOV 0x20(%RSP),%RDX |
(1828) 0x46f49d MOV 0x48(%RSP),%RCX |
(1828) 0x46f4a2 MOV %R13,%RSI |
(1828) 0x46f4a5 MOV (%RDX,%R15,8),%R13 |
(1828) 0x46f4a9 CMP 0x8(%RCX,%RAX,8),%R13 |
(1828) 0x46f4ae JGE 46f4f0 |
(1828) 0x46f4b0 MOV 0x180(%RSP),%RCX |
(1828) 0x46f4b8 MOV %RSI,%R13 |
(1828) 0x46f4bb INC %R13 |
(1828) 0x46f4be MOVQ $0x1,(%RCX,%R15,8) |
(1828) 0x46f4c6 MOV %RSI,(%RDX,%R15,8) |
(1828) 0x46f4ca MOV 0x60(%RSP),%RDX |
(1828) 0x46f4cf MOV 0x30(%RSP),%R15 |
(1828) 0x46f4d4 MOV 0x8(%RDX,%R8,8),%R11 |
(1828) 0x46f4d9 MOV 0x88(%RSP),%RDX |
(1828) 0x46f4e1 JMP 46f475 |
0x46f4e3 NOPW %CS:(%RAX,%RAX,1) |
(1828) 0x46f4f0 MOV 0x30(%RSP),%R15 |
(1828) 0x46f4f5 MOV 0x88(%RSP),%RDX |
(1828) 0x46f4fd MOV %RSI,%R13 |
(1828) 0x46f500 JMP 46f475 |
0x46f505 NOPW %CS:(%RAX,%RAX,1) |
(1829) 0x46f510 MOV 0x30(%RSP),%R15 |
(1829) 0x46f515 INC %R9 |
(1829) 0x46f518 CMP %R11,%R9 |
(1829) 0x46f51b JGE 46f366 |
(1829) 0x46f521 MOV 0xc0(%RSP),%RCX |
(1829) 0x46f529 MOV (%RCX,%R9,8),%R15 |
(1829) 0x46f52d CMPQ $0,(%R10,%R15,8) |
(1829) 0x46f532 JS 46f510 |
(1829) 0x46f534 MOV 0x20(%RSP),%RDX |
(1829) 0x46f539 MOV 0x48(%RSP),%RCX |
(1829) 0x46f53e MOV %R13,%RSI |
(1829) 0x46f541 MOV (%RDX,%R15,8),%R13 |
(1829) 0x46f545 CMP 0x8(%RCX,%RAX,8),%R13 |
(1829) 0x46f54a JGE 46f580 |
(1829) 0x46f54c MOV 0x180(%RSP),%RCX |
(1829) 0x46f554 MOV %RSI,%R13 |
(1829) 0x46f557 INC %R13 |
(1829) 0x46f55a MOVQ $0x1,(%RCX,%R15,8) |
(1829) 0x46f562 MOV %RSI,(%RDX,%R15,8) |
(1829) 0x46f566 MOV 0x60(%RSP),%RDX |
(1829) 0x46f56b MOV 0x30(%RSP),%R15 |
(1829) 0x46f570 MOV 0x8(%RDX,%R8,8),%R11 |
(1829) 0x46f575 MOV 0x88(%RSP),%RDX |
(1829) 0x46f57d JMP 46f515 |
0x46f57f NOP |
(1829) 0x46f580 MOV 0x30(%RSP),%R15 |
(1829) 0x46f585 MOV 0x88(%RSP),%RDX |
(1829) 0x46f58d MOV %RSI,%R13 |
(1829) 0x46f590 JMP 46f515 |
0x46f592 NOPW %CS:(%RAX,%RAX,1) |
(1824) 0x46f5a0 CMP $-0x3,%RDI |
(1824) 0x46f5a4 JE 46fab0 |
(1824) 0x46f5aa MOV 0x78(%RSP),%RCX |
(1824) 0x46f5af MOV (%RCX,%RAX,8),%RDI |
(1824) 0x46f5b3 JMP 46f5c8 |
(1833) 0x46f5b5 MOV 0x28(%RSP),%R10 |
(1833) 0x46f5ba NOPW (%RAX,%RAX,1) |
(1833) 0x46f5c0 MOV 0x78(%RSP),%RCX |
(1833) 0x46f5c5 INC %RDI |
(1833) 0x46f5c8 CMP 0x8(%RCX,%RAX,8),%RDI |
(1833) 0x46f5cd JGE 46f937 |
(1833) 0x46f5d3 MOV 0x110(%RSP),%RCX |
(1833) 0x46f5db MOV 0xa8(%RSP),%RSI |
(1833) 0x46f5e3 MOV (%RCX,%RDI,8),%R8 |
(1833) 0x46f5e7 MOV (%RSI,%R8,8),%R9 |
(1833) 0x46f5eb TEST %R9,%R9 |
(1833) 0x46f5ee JS 46f610 |
(1833) 0x46f5f0 MOV (%RBX,%R8,8),%R9 |
(1833) 0x46f5f4 CMP (%R10,%RAX,8),%R9 |
(1833) 0x46f5f8 JGE 46f5c0 |
(1833) 0x46f5fa MOV %R14,(%RBX,%R8,8) |
(1833) 0x46f5fe INC %R14 |
(1833) 0x46f601 JMP 46f5c0 |
0x46f603 NOPW %CS:(%RAX,%RAX,1) |
(1833) 0x46f610 CMP $-0x3,%R9 |
(1833) 0x46f614 JE 46f5c0 |
(1833) 0x46f616 MOV 0x78(%RSP),%RCX |
(1833) 0x46f61b MOV (%RCX,%R8,8),%R9 |
(1833) 0x46f61f MOV 0x8(%RCX,%R8,8),%R10 |
(1833) 0x46f624 JMP 46f638 |
0x46f626 NOPW %CS:(%RAX,%RAX,1) |
(1836) 0x46f630 MOV 0x30(%RSP),%R15 |
(1836) 0x46f635 INC %R9 |
(1836) 0x46f638 CMP %R10,%R9 |
(1836) 0x46f63b JGE 46f67a |
(1836) 0x46f63d MOV 0x110(%RSP),%RCX |
(1836) 0x46f645 MOV 0xa8(%RSP),%RSI |
(1836) 0x46f64d MOV (%RCX,%R9,8),%R11 |
(1836) 0x46f651 CMPQ $0,(%RSI,%R11,8) |
(1836) 0x46f656 JS 46f635 |
(1836) 0x46f658 MOV 0x28(%RSP),%RCX |
(1836) 0x46f65d MOV (%RBX,%R11,8),%R15 |
(1836) 0x46f661 CMP (%RCX,%RAX,8),%R15 |
(1836) 0x46f665 JGE 46f630 |
(1836) 0x46f667 MOV 0x78(%RSP),%RCX |
(1836) 0x46f66c MOV %R14,(%RBX,%R11,8) |
(1836) 0x46f670 INC %R14 |
(1836) 0x46f673 MOV 0x8(%RCX,%R8,8),%R10 |
(1836) 0x46f678 JMP 46f630 |
(1833) 0x46f67a MOV 0x90(%RSP),%RCX |
(1833) 0x46f682 CMPQ $0x2,(%RCX) |
(1833) 0x46f686 JL 46f5b5 |
(1833) 0x46f68c MOV 0x60(%RSP),%RCX |
(1833) 0x46f691 MOV (%RCX,%R8,8),%R9 |
(1833) 0x46f695 MOV 0x8(%RCX,%R8,8),%R11 |
(1833) 0x46f69a CMP %R11,%R9 |
(1833) 0x46f69d JGE 46f5b5 |
(1833) 0x46f6a3 MOV 0xe8(%RSP),%R10 |
(1833) 0x46f6ab MOV (%R10),%R10 |
(1833) 0x46f6ae TEST %RDX,%RDX |
(1833) 0x46f6b1 JNE 46f6f8 |
(1833) 0x46f6b3 JMP 46f751 |
0x46f6b8 NOPL (%RAX,%RAX,1) |
(1834) 0x46f6c0 MOV 0x180(%RSP),%RCX |
(1834) 0x46f6c8 MOV %RSI,%R13 |
(1834) 0x46f6cb INC %R13 |
(1834) 0x46f6ce MOVQ $0x1,(%RCX,%R15,8) |
(1834) 0x46f6d6 MOV %RSI,(%RDX,%R15,8) |
(1834) 0x46f6da MOV 0x60(%RSP),%RDX |
(1834) 0x46f6df MOV 0x8(%RDX,%R8,8),%R11 |
(1834) 0x46f6e4 MOV 0x88(%RSP),%RDX |
(1834) 0x46f6ec INC %R9 |
(1834) 0x46f6ef CMP %R11,%R9 |
(1834) 0x46f6f2 JGE 46f7c2 |
(1834) 0x46f6f8 MOV 0xc0(%RSP),%RCX |
(1834) 0x46f700 MOV (%RCX,%R9,8),%R15 |
(1834) 0x46f704 MOV (%RDX,%R15,8),%R15 |
(1834) 0x46f708 CMPQ $0,(%R10,%R15,8) |
(1834) 0x46f70d JS 46f6ec |
(1834) 0x46f70f MOV 0x20(%RSP),%RDX |
(1834) 0x46f714 MOV 0x48(%RSP),%RCX |
(1834) 0x46f719 MOV %R13,%RSI |
(1834) 0x46f71c MOV (%RDX,%R15,8),%R13 |
(1834) 0x46f720 CMP (%RCX,%RAX,8),%R13 |
(1834) 0x46f724 JL 46f6c0 |
(1834) 0x46f726 MOV 0x88(%RSP),%RDX |
(1834) 0x46f72e MOV %RSI,%R13 |
(1834) 0x46f731 JMP 46f6ec |
0x46f733 NOPW %CS:(%RAX,%RAX,1) |
(1835) 0x46f740 MOV 0x30(%RSP),%R15 |
(1835) 0x46f745 INC %R9 |
(1835) 0x46f748 CMP %R11,%R9 |
(1835) 0x46f74b JGE 46f5b5 |
(1835) 0x46f751 MOV 0xc0(%RSP),%RCX |
(1835) 0x46f759 MOV (%RCX,%R9,8),%R15 |
(1835) 0x46f75d CMPQ $0,(%R10,%R15,8) |
(1835) 0x46f762 JS 46f740 |
(1835) 0x46f764 MOV 0x20(%RSP),%RDX |
(1835) 0x46f769 MOV 0x48(%RSP),%RCX |
(1835) 0x46f76e MOV %R13,%RSI |
(1835) 0x46f771 MOV (%RDX,%R15,8),%R13 |
(1835) 0x46f775 CMP (%RCX,%RAX,8),%R13 |
(1835) 0x46f779 JGE 46f7b0 |
(1835) 0x46f77b MOV 0x180(%RSP),%RCX |
(1835) 0x46f783 MOV %RSI,%R13 |
(1835) 0x46f786 INC %R13 |
(1835) 0x46f789 MOVQ $0x1,(%RCX,%R15,8) |
(1835) 0x46f791 MOV %RSI,(%RDX,%R15,8) |
(1835) 0x46f795 MOV 0x60(%RSP),%RDX |
(1835) 0x46f79a MOV 0x30(%RSP),%R15 |
(1835) 0x46f79f MOV 0x8(%RDX,%R8,8),%R11 |
(1835) 0x46f7a4 MOV 0x88(%RSP),%RDX |
(1835) 0x46f7ac JMP 46f745 |
0x46f7ae XCHG %AX,%AX |
(1835) 0x46f7b0 MOV 0x30(%RSP),%R15 |
(1835) 0x46f7b5 MOV 0x88(%RSP),%RDX |
(1835) 0x46f7bd MOV %RSI,%R13 |
(1835) 0x46f7c0 JMP 46f745 |
(1833) 0x46f7c2 MOV 0x28(%RSP),%R10 |
(1833) 0x46f7c7 MOV 0x30(%RSP),%R15 |
(1833) 0x46f7cc JMP 46f5c0 |
(1824) 0x46f7d1 MOV 0x90(%RSP),%RCX |
(1824) 0x46f7d9 CMPQ $0x2,(%RCX) |
(1824) 0x46f7dd JL 46f2d3 |
(1824) 0x46f7e3 MOV 0x60(%RSP),%RCX |
(1824) 0x46f7e8 MOV 0x8(%RCX,%RAX,8),%RDI |
(1824) 0x46f7ed CMP 0x10(%RCX,%RAX,8),%RDI |
(1824) 0x46f7f2 JGE 46f2d3 |
(1824) 0x46f7f8 MOV 0xe8(%RSP),%R8 |
(1824) 0x46f800 MOV (%R8),%R8 |
(1824) 0x46f803 JMP 46f828 |
0x46f805 NOPW %CS:(%RAX,%RAX,1) |
(1825) 0x46f810 MOV 0x60(%RSP),%RCX |
(1825) 0x46f815 MOV 0x28(%RSP),%R10 |
(1825) 0x46f81a INC %RDI |
(1825) 0x46f81d CMP 0x10(%RCX,%RAX,8),%RDI |
(1825) 0x46f822 JGE 46f2d3 |
(1825) 0x46f828 MOV 0xc0(%RSP),%RCX |
(1825) 0x46f830 MOV (%RCX,%RDI,8),%R9 |
(1825) 0x46f834 TEST %RDX,%RDX |
(1825) 0x46f837 JE 46f83d |
(1825) 0x46f839 MOV (%RDX,%R9,8),%R9 |
(1825) 0x46f83d MOV 0x20(%RSP),%R11 |
(1825) 0x46f842 MOV (%R8,%R9,8),%R10 |
(1825) 0x46f846 TEST %R10,%R10 |
(1825) 0x46f849 JS 46f880 |
(1825) 0x46f84b MOV 0x48(%RSP),%RCX |
(1825) 0x46f850 MOV (%R11,%R9,8),%R10 |
(1825) 0x46f854 CMP 0x8(%RCX,%RAX,8),%R10 |
(1825) 0x46f859 JGE 46f810 |
(1825) 0x46f85b MOV 0x180(%RSP),%RCX |
(1825) 0x46f863 MOVQ $0x1,(%RCX,%R9,8) |
(1825) 0x46f86b MOV %R13,(%R11,%R9,8) |
(1825) 0x46f86f INC %R13 |
(1825) 0x46f872 JMP 46f810 |
0x46f874 NOPW %CS:(%RAX,%RAX,1) |
(1825) 0x46f880 CMP $-0x3,%R10 |
(1825) 0x46f884 JE 46f810 |
(1825) 0x46f886 MOV 0x100(%RSP),%R11 |
(1825) 0x46f88e MOV (%R11,%R9,8),%R10 |
(1825) 0x46f892 JMP 46f8b3 |
0x46f894 NOPW %CS:(%RAX,%RAX,1) |
(1826) 0x46f8a0 MOV 0x30(%RSP),%R15 |
(1826) 0x46f8a5 MOV %RSI,%RDX |
(1826) 0x46f8a8 MOV 0x100(%RSP),%R11 |
(1826) 0x46f8b0 INC %R10 |
(1826) 0x46f8b3 CMP 0x8(%R11,%R9,8),%R10 |
(1826) 0x46f8b8 JGE 46f810 |
(1826) 0x46f8be MOV 0x148(%RSP),%R11 |
(1826) 0x46f8c6 MOV (%R11,%R10,8),%R11 |
(1826) 0x46f8ca MOV %R11,%R15 |
(1826) 0x46f8cd SUB 0x50(%RSP),%R15 |
(1826) 0x46f8d2 JL 46f900 |
(1826) 0x46f8d4 CMP 0x30(%RSP),%R11 |
(1826) 0x46f8d9 JGE 46f900 |
(1826) 0x46f8db MOV 0x28(%RSP),%RCX |
(1826) 0x46f8e0 MOV (%RBX,%R15,8),%R11 |
(1826) 0x46f8e4 CMP 0x8(%RCX,%RAX,8),%R11 |
(1826) 0x46f8e9 JGE 46f8f2 |
(1826) 0x46f8eb MOV %R14,(%RBX,%R15,8) |
(1826) 0x46f8ef INC %R14 |
(1826) 0x46f8f2 MOV 0x30(%RSP),%R15 |
(1826) 0x46f8f7 JMP 46f8a8 |
0x46f8f9 NOPL (%RAX) |
(1826) 0x46f900 MOV %RDX,%RSI |
(1826) 0x46f903 MOV 0x20(%RSP),%RDX |
(1826) 0x46f908 MOV 0x48(%RSP),%RCX |
(1826) 0x46f90d NOT %R11 |
(1826) 0x46f910 MOV (%RDX,%R11,8),%R15 |
(1826) 0x46f914 CMP 0x8(%RCX,%RAX,8),%R15 |
(1826) 0x46f919 JGE 46f8a0 |
(1826) 0x46f91b MOV 0x180(%RSP),%RCX |
(1826) 0x46f923 MOV %R13,(%RDX,%R11,8) |
(1826) 0x46f927 INC %R13 |
(1826) 0x46f92a MOVQ $0x1,(%RCX,%R11,8) |
(1826) 0x46f932 JMP 46f8a0 |
(1824) 0x46f937 MOV 0x90(%RSP),%RCX |
(1824) 0x46f93f CMPQ $0x2,(%RCX) |
(1824) 0x46f943 JL 46fab0 |
(1824) 0x46f949 MOV 0x60(%RSP),%RCX |
(1824) 0x46f94e MOV (%RCX,%RAX,8),%RDI |
(1824) 0x46f952 CMP 0x8(%RCX,%RAX,8),%RDI |
(1824) 0x46f957 JGE 46fab0 |
(1824) 0x46f95d MOV 0xe8(%RSP),%R8 |
(1824) 0x46f965 MOV (%R8),%R8 |
(1824) 0x46f968 JMP 46f988 |
0x46f96a NOPW (%RAX,%RAX,1) |
(1831) 0x46f970 MOV 0x60(%RSP),%RCX |
(1831) 0x46f975 MOV 0x28(%RSP),%R10 |
(1831) 0x46f97a INC %RDI |
(1831) 0x46f97d CMP 0x8(%RCX,%RAX,8),%RDI |
(1831) 0x46f982 JGE 46fab0 |
(1831) 0x46f988 MOV 0xc0(%RSP),%RCX |
(1831) 0x46f990 MOV (%RCX,%RDI,8),%R9 |
(1831) 0x46f994 TEST %RDX,%RDX |
(1831) 0x46f997 JE 46f99d |
(1831) 0x46f999 MOV (%RDX,%R9,8),%R9 |
(1831) 0x46f99d MOV 0x20(%RSP),%R11 |
(1831) 0x46f9a2 MOV (%R8,%R9,8),%R10 |
(1831) 0x46f9a6 TEST %R10,%R10 |
(1831) 0x46f9a9 JS 46f9e0 |
(1831) 0x46f9ab MOV 0x48(%RSP),%RCX |
(1831) 0x46f9b0 MOV (%R11,%R9,8),%R10 |
(1831) 0x46f9b4 CMP (%RCX,%RAX,8),%R10 |
(1831) 0x46f9b8 JGE 46f970 |
(1831) 0x46f9ba MOV 0x180(%RSP),%RCX |
(1831) 0x46f9c2 MOVQ $0x1,(%RCX,%R9,8) |
(1831) 0x46f9ca MOV %R13,(%R11,%R9,8) |
(1831) 0x46f9ce INC %R13 |
(1831) 0x46f9d1 JMP 46f970 |
0x46f9d3 NOPW %CS:(%RAX,%RAX,1) |
(1831) 0x46f9e0 CMP $-0x3,%R10 |
(1831) 0x46f9e4 JE 46f970 |
(1831) 0x46f9e6 MOV 0x100(%RSP),%R11 |
(1831) 0x46f9ee MOV (%R11,%R9,8),%R10 |
(1831) 0x46f9f2 JMP 46fa13 |
0x46f9f4 NOPW %CS:(%RAX,%RAX,1) |
(1832) 0x46fa00 MOV 0x30(%RSP),%R15 |
(1832) 0x46fa05 MOV %RSI,%RDX |
(1832) 0x46fa08 MOV 0x100(%RSP),%R11 |
(1832) 0x46fa10 INC %R10 |
(1832) 0x46fa13 CMP 0x8(%R11,%R9,8),%R10 |
(1832) 0x46fa18 JGE 46f970 |
(1832) 0x46fa1e MOV 0x148(%RSP),%R11 |
(1832) 0x46fa26 MOV (%R11,%R10,8),%R11 |
(1832) 0x46fa2a MOV %R11,%R15 |
(1832) 0x46fa2d SUB 0x50(%RSP),%R15 |
(1832) 0x46fa32 JL 46fa60 |
(1832) 0x46fa34 CMP 0x30(%RSP),%R11 |
(1832) 0x46fa39 JGE 46fa60 |
(1832) 0x46fa3b MOV 0x28(%RSP),%RCX |
(1832) 0x46fa40 MOV (%RBX,%R15,8),%R11 |
(1832) 0x46fa44 CMP (%RCX,%RAX,8),%R11 |
(1832) 0x46fa48 JGE 46faa0 |
(1832) 0x46fa4a MOV %R14,(%RBX,%R15,8) |
(1832) 0x46fa4e MOV 0x30(%RSP),%R15 |
(1832) 0x46fa53 INC %R14 |
(1832) 0x46fa56 JMP 46fa08 |
0x46fa58 NOPL (%RAX,%RAX,1) |
(1832) 0x46fa60 MOV %RDX,%RSI |
(1832) 0x46fa63 MOV 0x20(%RSP),%RDX |
(1832) 0x46fa68 MOV 0x48(%RSP),%RCX |
(1832) 0x46fa6d NOT %R11 |
(1832) 0x46fa70 MOV (%RDX,%R11,8),%R15 |
(1832) 0x46fa74 CMP (%RCX,%RAX,8),%R15 |
(1832) 0x46fa78 JGE 46fa00 |
(1832) 0x46fa7a MOV 0x180(%RSP),%RCX |
(1832) 0x46fa82 MOV %R13,(%RDX,%R11,8) |
(1832) 0x46fa86 INC %R13 |
(1832) 0x46fa89 MOVQ $0x1,(%RCX,%R11,8) |
(1832) 0x46fa91 JMP 46fa00 |
0x46fa96 NOPW %CS:(%RAX,%RAX,1) |
(1832) 0x46faa0 MOV 0x30(%RSP),%R15 |
(1832) 0x46faa5 JMP 46fa08 |
0x46faaa NOPW (%RAX,%RAX,1) |
(1824) 0x46fab0 MOV 0x90(%RSP),%RCX |
(1824) 0x46fab8 MOV %R14,0x8(%R10,%RAX,8) |
(1824) 0x46fabd CMPQ $0x2,(%RCX) |
(1824) 0x46fac1 JL 46f2a0 |
(1824) 0x46fac7 MOV 0x48(%RSP),%RCX |
(1824) 0x46facc MOV %R13,0x8(%RCX,%RAX,8) |
(1824) 0x46fad1 JMP 46f2a0 |
0x46fad6 MOV 0xe0(%RSP),%RCX |
0x46fade LEA (%R10,%RCX,8),%RDX |
0x46fae2 LEA (%R14,%RCX,8),%RAX |
0x46fae6 LEA (%R11,%RCX,8),%RDI |
0x46faea CMP %R14,%RDX |
0x46faed SETA %R8B |
0x46faf1 CMP %R10,%RAX |
0x46faf4 SETA %R9B |
0x46faf8 CMP %R14,%RDI |
0x46fafb SETA %CL |
0x46fafe CMP %R11,%RAX |
0x46fb01 SETA %SIL |
0x46fb05 CMP %R10,%RDI |
0x46fb08 SETA %AL |
0x46fb0b CMP %R11,%RDX |
0x46fb0e SETA %DL |
0x46fb11 TEST %R9B,%R8B |
0x46fb14 JNE 46fcc2 |
0x46fb1a AND %SIL,%CL |
0x46fb1d JNE 46fcc2 |
0x46fb23 AND %DL,%AL |
0x46fb25 JNE 46fcc2 |
0x46fb2b MOV (%R14),%RAX |
0x46fb2e MOV (%R11),%RCX |
0x46fb31 MOV (%R10),%RDX |
0x46fb34 MOV 0xe0(%RSP),%RDI |
0x46fb3c MOV $0x1,%ESI |
0x46fb41 NOPW %CS:(%RAX,%RAX,1) |
(1815) 0x46fb50 ADD (%R14,%RSI,8),%RAX |
(1815) 0x46fb54 MOV %RAX,(%R14,%RSI,8) |
(1815) 0x46fb58 ADD (%R10,%RSI,8),%RDX |
(1815) 0x46fb5c MOV %RDX,(%R10,%RSI,8) |
(1815) 0x46fb60 ADD (%R11,%RSI,8),%RCX |
(1815) 0x46fb64 MOV %RCX,(%R11,%RSI,8) |
(1815) 0x46fb68 INC %RSI |
(1815) 0x46fb6b CMP %RSI,%RDI |
(1815) 0x46fb6e JNE 46fb50 |
0x46fb70 JMP 46fcf3 |
0x46fb75 AND $-0x8,%R9 |
0x46fb79 XOR %EDI,%EDI |
0x46fb7b NOPL (%RAX,%RAX,1) |
(1816) 0x46fb80 ADD 0x8(%R14,%RDI,8),%RAX |
(1816) 0x46fb85 LEA 0x8(%RDI),%R8 |
(1816) 0x46fb89 MOV %RAX,0x8(%R14,%RDI,8) |
(1816) 0x46fb8e ADD 0x8(%R10,%RDI,8),%RCX |
(1816) 0x46fb93 MOV %RCX,0x8(%R10,%RDI,8) |
(1816) 0x46fb98 ADD 0x8(%R11,%RDI,8),%RDX |
(1816) 0x46fb9d MOV %RDX,0x8(%R11,%RDI,8) |
(1816) 0x46fba2 ADD 0x10(%R14,%RDI,8),%RAX |
(1816) 0x46fba7 MOV %RAX,0x10(%R14,%RDI,8) |
(1816) 0x46fbac ADD 0x10(%R10,%RDI,8),%RCX |
(1816) 0x46fbb1 MOV %RCX,0x10(%R10,%RDI,8) |
(1816) 0x46fbb6 ADD 0x10(%R11,%RDI,8),%RDX |
(1816) 0x46fbbb MOV %RDX,0x10(%R11,%RDI,8) |
(1816) 0x46fbc0 ADD 0x18(%R14,%RDI,8),%RAX |
(1816) 0x46fbc5 MOV %RAX,0x18(%R14,%RDI,8) |
(1816) 0x46fbca ADD 0x18(%R10,%RDI,8),%RCX |
(1816) 0x46fbcf MOV %RCX,0x18(%R10,%RDI,8) |
(1816) 0x46fbd4 ADD 0x18(%R11,%RDI,8),%RDX |
(1816) 0x46fbd9 MOV %RDX,0x18(%R11,%RDI,8) |
(1816) 0x46fbde ADD 0x20(%R14,%RDI,8),%RAX |
(1816) 0x46fbe3 MOV %RAX,0x20(%R14,%RDI,8) |
(1816) 0x46fbe8 ADD 0x20(%R10,%RDI,8),%RCX |
(1816) 0x46fbed MOV %RCX,0x20(%R10,%RDI,8) |
(1816) 0x46fbf2 ADD 0x20(%R11,%RDI,8),%RDX |
(1816) 0x46fbf7 MOV %RDX,0x20(%R11,%RDI,8) |
(1816) 0x46fbfc ADD 0x28(%R14,%RDI,8),%RAX |
(1816) 0x46fc01 MOV %RAX,0x28(%R14,%RDI,8) |
(1816) 0x46fc06 ADD 0x28(%R10,%RDI,8),%RCX |
(1816) 0x46fc0b MOV %RCX,0x28(%R10,%RDI,8) |
(1816) 0x46fc10 ADD 0x28(%R11,%RDI,8),%RDX |
(1816) 0x46fc15 MOV %RDX,0x28(%R11,%RDI,8) |
(1816) 0x46fc1a ADD 0x30(%R14,%RDI,8),%RAX |
(1816) 0x46fc1f MOV %RAX,0x30(%R14,%RDI,8) |
(1816) 0x46fc24 ADD 0x30(%R10,%RDI,8),%RCX |
(1816) 0x46fc29 MOV %RCX,0x30(%R10,%RDI,8) |
(1816) 0x46fc2e ADD 0x30(%R11,%RDI,8),%RDX |
(1816) 0x46fc33 MOV %RDX,0x30(%R11,%RDI,8) |
(1816) 0x46fc38 ADD 0x38(%R14,%RDI,8),%RAX |
(1816) 0x46fc3d MOV %RAX,0x38(%R14,%RDI,8) |
(1816) 0x46fc42 ADD 0x38(%R10,%RDI,8),%RCX |
(1816) 0x46fc47 MOV %RCX,0x38(%R10,%RDI,8) |
(1816) 0x46fc4c ADD 0x38(%R11,%RDI,8),%RDX |
(1816) 0x46fc51 MOV %RDX,0x38(%R11,%RDI,8) |
(1816) 0x46fc56 ADD 0x40(%R14,%RDI,8),%RAX |
(1816) 0x46fc5b MOV %RAX,0x40(%R14,%RDI,8) |
(1816) 0x46fc60 ADD 0x40(%R10,%RDI,8),%RCX |
(1816) 0x46fc65 MOV %RCX,0x40(%R10,%RDI,8) |
(1816) 0x46fc6a ADD 0x40(%R11,%RDI,8),%RDX |
(1816) 0x46fc6f MOV %RDX,0x40(%R11,%RDI,8) |
(1816) 0x46fc74 MOV %R8,%RDI |
(1816) 0x46fc77 CMP %R8,%R9 |
(1816) 0x46fc7a JNE 46fb80 |
0x46fc80 TEST %RSI,%RSI |
0x46fc83 JE 46fcf3 |
0x46fc85 LEA 0x8(%R10,%R8,8),%R9 |
0x46fc8a LEA 0x8(%R11,%R8,8),%RDI |
0x46fc8f LEA 0x8(%R14,%R8,8),%R8 |
0x46fc94 XOR %R10D,%R10D |
0x46fc97 NOPW (%RAX,%RAX,1) |
(1817) 0x46fca0 ADD (%R8,%R10,8),%RAX |
(1817) 0x46fca4 MOV %RAX,(%R8,%R10,8) |
(1817) 0x46fca8 ADD (%R9,%R10,8),%RCX |
(1817) 0x46fcac MOV %RCX,(%R9,%R10,8) |
(1817) 0x46fcb0 ADD (%RDI,%R10,8),%RDX |
(1817) 0x46fcb4 MOV %RDX,(%RDI,%R10,8) |
(1817) 0x46fcb8 INC %R10 |
(1817) 0x46fcbb CMP %R10,%RSI |
(1817) 0x46fcbe JNE 46fca0 |
0x46fcc0 JMP 46fcf3 |
0x46fcc2 MOV 0xe0(%RSP),%RDX |
0x46fcca MOV $0x1,%EAX |
0x46fccf NOP |
(1814) 0x46fcd0 MOV -0x8(%R14,%RAX,8),%RCX |
(1814) 0x46fcd5 ADD %RCX,(%R14,%RAX,8) |
(1814) 0x46fcd9 MOV -0x8(%R10,%RAX,8),%RCX |
(1814) 0x46fcde ADD %RCX,(%R10,%RAX,8) |
(1814) 0x46fce2 MOV -0x8(%R11,%RAX,8),%RCX |
(1814) 0x46fce7 ADD %RCX,(%R11,%RAX,8) |
(1814) 0x46fceb INC %RAX |
(1814) 0x46fcee CMP %RAX,%RDX |
(1814) 0x46fcf1 JNE 46fcd0 |
0x46fcf3 MOV 0x120(%RSP),%RAX |
0x46fcfb MOV $0x5d5f90,%EDI |
0x46fd00 MOV (%RAX),%ESI |
0x46fd02 CALL 410560 <__kmpc_barrier@plt> |
0x46fd07 MOV 0x48(%RSP),%RDX |
0x46fd0c MOV 0x28(%RSP),%RCX |
0x46fd11 MOV 0xb8(%RSP),%RSI |
0x46fd19 TEST %R13,%R13 |
0x46fd1c JLE 4702a1 |
0x46fd22 MOV %RSI,%RAX |
0x46fd25 SUB %R12,%RAX |
0x46fd28 JLE 4702a1 |
0x46fd2e LEA (%RCX,%RSI,8),%R8 |
0x46fd32 LEA (%RDX,%RSI,8),%R15 |
0x46fd36 LEA -0x8(%R14,%R13,8),%RSI |
0x46fd3b LEA 0x8(%RCX,%R12,8),%RCX |
0x46fd40 MOV 0x140(%RSP),%RDI |
0x46fd48 LEA 0x8(%RDX,%R12,8),%RDX |
0x46fd4d CMP %RCX,%RSI |
0x46fd50 SETAEB 0x180(%RSP) |
0x46fd58 CMP %RSI,%R8 |
0x46fd5b SETAE %R11B |
0x46fd5f CMP %RDX,%RSI |
0x46fd62 SETB %R14B |
0x46fd66 CMP %RSI,%R15 |
0x46fd69 LEA -0x8(%RDI,%R13,8),%RDI |
0x46fd6e SETB %R13B |
0x46fd72 CMP %RDX,%R8 |
0x46fd75 SETB %R10B |
0x46fd79 CMP %RCX,%R15 |
0x46fd7c SETBB 0x68(%RSP) |
0x46fd81 CMP %RDI,%R8 |
0x46fd84 SETB %R9B |
0x46fd88 CMP %RCX,%RDI |
0x46fd8b SETBB 0x70(%RSP) |
0x46fd90 CMP %RDX,%RDI |
0x46fd93 SETB %R8B |
0x46fd97 CMP %RDI,%R15 |
0x46fd9a SETB %R15B |
0x46fd9e TEST %R11B,0x180(%RSP) |
0x46fda6 JNE 46fe5c |
0x46fdac OR %R13B,%R14B |
0x46fdaf JE 46fe5c |
0x46fdb5 OR 0x68(%RSP),%R10B |
0x46fdba JE 46fe5c |
0x46fdc0 OR 0x70(%RSP),%R9B |
0x46fdc5 JE 46fe5c |
0x46fdcb OR %R15B,%R8B |
0x46fdce JE 46fe5c |
0x46fdd4 MOV (%RSI),%R9 |
0x46fdd7 MOV (%RDI),%R8 |
0x46fdda MOV %RAX,%RSI |
0x46fddd AND $-0x8,%RSI |
0x46fde1 JE 4700b1 |
0x46fde7 VPBROADCASTQ %R8,%ZMM0 |
0x46fded VPBROADCASTQ %R9,%ZMM1 |
0x46fdf3 LEA -0x1(%RSI),%RDI |
0x46fdf7 XOR %R8D,%R8D |
0x46fdfa NOPW (%RAX,%RAX,1) |
(1813) 0x46fe00 VPADDQ (%RCX,%R8,8),%ZMM1,%ZMM2 |
(1813) 0x46fe07 VMOVDQU64 %ZMM2,(%RCX,%R8,8) |
(1813) 0x46fe0e VPADDQ (%RDX,%R8,8),%ZMM0,%ZMM2 |
(1813) 0x46fe15 VMOVDQU64 %ZMM2,(%RDX,%R8,8) |
(1813) 0x46fe1c ADD $0x8,%R8 |
(1813) 0x46fe20 CMP %RDI,%R8 |
(1813) 0x46fe23 JBE 46fe00 |
0x46fe25 MOV 0x80(%RSP),%R11 |
0x46fe2d MOV 0x48(%RSP),%RCX |
0x46fe32 MOV 0x28(%RSP),%RDX |
0x46fe37 MOV 0x30(%RSP),%R15 |
0x46fe3c MOV 0xb8(%RSP),%R9 |
0x46fe44 MOV 0x128(%RSP),%R13 |
0x46fe4c CMP %RSI,%RAX |
0x46fe4f JE 46fea8 |
0x46fe51 VPBROADCASTQ %RAX,%ZMM2 |
0x46fe57 JMP 4700ec |
0x46fe5c MOV 0x80(%RSP),%R11 |
0x46fe64 MOV 0x48(%RSP),%RDX |
0x46fe69 MOV 0x28(%RSP),%R8 |
0x46fe6e MOV 0x30(%RSP),%R15 |
0x46fe73 MOV 0xb8(%RSP),%R9 |
0x46fe7b MOV 0x128(%RSP),%R13 |
0x46fe83 MOV %R12,%RAX |
0x46fe86 NOPW %CS:(%RAX,%RAX,1) |
(1810) 0x46fe90 MOV (%RSI),%RCX |
(1810) 0x46fe93 ADD %RCX,0x8(%R8,%RAX,8) |
(1810) 0x46fe98 MOV (%RDI),%RCX |
(1810) 0x46fe9b ADD %RCX,0x8(%RDX,%RAX,8) |
(1810) 0x46fea0 INC %RAX |
(1810) 0x46fea3 CMP %RAX,%R9 |
(1810) 0x46fea6 JNE 46fe90 |
0x46fea8 MOV %R9,%RDX |
0x46feab SUB %R12,%RDX |
0x46feae JG 47013f |
0x46feb4 JMP 4702a1 |
0x46feb9 CMP $-0x3,%RCX |
0x46febd JE 46f13a |
0x46fec3 MOV 0x78(%RSP),%RDX |
0x46fec8 MOV (%RDX,%RAX,8),%RCX |
0x46fecc CMP 0x8(%RDX,%RAX,8),%RCX |
0x46fed1 JGE 472388 |
0x46fed7 MOV 0x20(%RSP),%R11 |
0x46fedc JMP 46fef3 |
0x46fede XCHG %AX,%AX |
(1820) 0x46fee0 MOV 0x78(%RSP),%RDX |
(1820) 0x46fee5 INC %RCX |
(1820) 0x46fee8 CMP 0x8(%RDX,%RAX,8),%RCX |
(1820) 0x46feed JGE 47238d |
(1820) 0x46fef3 MOV 0x110(%RSP),%RDX |
(1820) 0x46fefb MOV 0xa8(%RSP),%RSI |
(1820) 0x46ff03 MOV (%RDX,%RCX,8),%RDX |
(1820) 0x46ff07 MOV (%RSI,%RDX,8),%RSI |
(1820) 0x46ff0b TEST %RSI,%RSI |
(1820) 0x46ff0e JS 46ff30 |
(1820) 0x46ff10 MOV (%RBX,%RDX,8),%RSI |
(1820) 0x46ff14 CMP (%R10,%RAX,8),%RSI |
(1820) 0x46ff18 JGE 46fee0 |
(1820) 0x46ff1a MOV %R14,(%RBX,%RDX,8) |
(1820) 0x46ff1e INC %R14 |
(1820) 0x46ff21 JMP 46fee0 |
0x46ff23 NOPW %CS:(%RAX,%RAX,1) |
(1820) 0x46ff30 CMP $-0x3,%RSI |
(1820) 0x46ff34 JE 46fee0 |
(1820) 0x46ff36 MOV 0x78(%RSP),%RDI |
(1820) 0x46ff3b MOV (%RDI,%RDX,8),%RSI |
(1820) 0x46ff3f MOV 0x8(%RDI,%RDX,8),%RDI |
(1820) 0x46ff44 JMP 46ff53 |
0x46ff46 NOPW %CS:(%RAX,%RAX,1) |
(1823) 0x46ff50 INC %RSI |
(1823) 0x46ff53 CMP %RDI,%RSI |
(1823) 0x46ff56 JGE 46ff90 |
(1823) 0x46ff58 MOV 0x110(%RSP),%R8 |
(1823) 0x46ff60 MOV 0xa8(%RSP),%R9 |
(1823) 0x46ff68 MOV (%R8,%RSI,8),%R8 |
(1823) 0x46ff6c CMPQ $0,(%R9,%R8,8) |
(1823) 0x46ff71 JS 46ff50 |
(1823) 0x46ff73 MOV (%RBX,%R8,8),%R9 |
(1823) 0x46ff77 CMP (%R10,%RAX,8),%R9 |
(1823) 0x46ff7b JGE 46ff50 |
(1823) 0x46ff7d MOV 0x78(%RSP),%RDI |
(1823) 0x46ff82 MOV %R14,(%RBX,%R8,8) |
(1823) 0x46ff86 INC %R14 |
(1823) 0x46ff89 MOV 0x8(%RDI,%RDX,8),%RDI |
(1823) 0x46ff8e JMP 46ff50 |
(1820) 0x46ff90 MOV 0x90(%RSP),%RSI |
(1820) 0x46ff98 CMPQ $0x2,(%RSI) |
(1820) 0x46ff9c JL 46fee0 |
(1820) 0x46ffa2 MOV 0x60(%RSP),%RDI |
(1820) 0x46ffa7 MOV (%RDI,%RDX,8),%RSI |
(1820) 0x46ffab MOV 0x8(%RDI,%RDX,8),%R8 |
(1820) 0x46ffb0 CMP %R8,%RSI |
(1820) 0x46ffb3 JGE 46fee0 |
(1820) 0x46ffb9 MOV 0xe8(%RSP),%RDI |
(1820) 0x46ffc1 MOV (%RDI),%RDI |
(1820) 0x46ffc4 MOV %RDI,0x70(%RSP) |
(1820) 0x46ffc9 CMPQ $0,0x88(%RSP) |
(1820) 0x46ffd2 JNE 46fff4 |
(1820) 0x46ffd4 JMP 470064 |
0x46ffd9 NOPL (%RAX) |
(1821) 0x46ffe0 MOV 0x28(%RSP),%R10 |
(1821) 0x46ffe5 MOV %RDI,%R11 |
(1821) 0x46ffe8 INC %RSI |
(1821) 0x46ffeb CMP %R8,%RSI |
(1821) 0x46ffee JGE 46fee0 |
(1821) 0x46fff4 MOV 0xc0(%RSP),%R9 |
(1821) 0x46fffc MOV 0x88(%RSP),%RDI |
(1821) 0x470004 MOV (%R9,%RSI,8),%R9 |
(1821) 0x470008 MOV (%RDI,%R9,8),%R9 |
(1821) 0x47000c MOV 0x70(%RSP),%RDI |
(1821) 0x470011 CMPQ $0,(%RDI,%R9,8) |
(1821) 0x470016 JS 46ffe8 |
(1821) 0x470018 MOV (%R11,%R9,8),%R10 |
(1821) 0x47001c MOV %R11,%RDI |
(1821) 0x47001f MOV 0x48(%RSP),%R11 |
(1821) 0x470024 CMP (%R11,%RAX,8),%R10 |
(1821) 0x470028 JGE 46ffe0 |
(1821) 0x47002a MOV 0x180(%RSP),%R8 |
(1821) 0x470032 MOVQ $0x1,(%R8,%R9,8) |
(1821) 0x47003a MOV %R13,(%RDI,%R9,8) |
(1821) 0x47003e MOV 0x60(%RSP),%R9 |
(1821) 0x470043 INC %R13 |
(1821) 0x470046 MOV 0x8(%R9,%RDX,8),%R8 |
(1821) 0x47004b JMP 46ffe0 |
0x47004d NOPL (%RAX) |
(1822) 0x470050 MOV 0x28(%RSP),%R10 |
(1822) 0x470055 MOV %RDI,%R11 |
(1822) 0x470058 INC %RSI |
(1822) 0x47005b CMP %R8,%RSI |
(1822) 0x47005e JGE 46fee0 |
(1822) 0x470064 MOV 0xc0(%RSP),%R9 |
(1822) 0x47006c MOV 0x70(%RSP),%RDI |
(1822) 0x470071 MOV (%R9,%RSI,8),%R9 |
(1822) 0x470075 CMPQ $0,(%RDI,%R9,8) |
(1822) 0x47007a JS 470058 |
(1822) 0x47007c MOV (%R11,%R9,8),%R10 |
(1822) 0x470080 MOV %R11,%RDI |
(1822) 0x470083 MOV 0x48(%RSP),%R11 |
(1822) 0x470088 CMP (%R11,%RAX,8),%R10 |
(1822) 0x47008c JGE 470050 |
(1822) 0x47008e MOV 0x180(%RSP),%R8 |
(1822) 0x470096 MOVQ $0x1,(%R8,%R9,8) |
(1822) 0x47009e MOV %R13,(%RDI,%R9,8) |
(1822) 0x4700a2 MOV 0x60(%RSP),%R9 |
(1822) 0x4700a7 INC %R13 |
(1822) 0x4700aa MOV 0x8(%R9,%RDX,8),%R8 |
(1822) 0x4700af JMP 470050 |
0x4700b1 VPBROADCASTQ %R9,%ZMM1 |
0x4700b7 MOV 0x80(%RSP),%R11 |
0x4700bf MOV 0x48(%RSP),%RCX |
0x4700c4 MOV 0x28(%RSP),%RDX |
0x4700c9 MOV 0x30(%RSP),%R15 |
0x4700ce MOV 0xb8(%RSP),%R9 |
0x4700d6 MOV 0x128(%RSP),%R13 |
0x4700de VPBROADCASTQ %RAX,%ZMM2 |
0x4700e4 VPBROADCASTQ %R8,%ZMM0 |
0x4700ea XOR %ESI,%ESI |
0x4700ec VPBROADCASTQ %RSI,%ZMM3 |
0x4700f2 LEA 0x1(%R12),%RAX |
0x4700f7 ADD %RSI,%RAX |
0x4700fa VPSUBQ %ZMM3,%ZMM2,%ZMM2 |
0x470100 VPCMPNLEUQ 0x134475(%RIP),%ZMM2,%K1 |
0x47010b VMOVDQU64 (%RDX,%RAX,8),%ZMM2{%K1}{z} |
0x470112 VPADDQ %ZMM2,%ZMM1,%ZMM1 |
0x470118 VMOVDQU64 %ZMM1,(%RDX,%RAX,8){%K1} |
0x47011f VMOVDQU64 (%RCX,%RAX,8),%ZMM1{%K1}{z} |
0x470126 VPADDQ %ZMM1,%ZMM0,%ZMM0 |
0x47012c VMOVDQU64 %ZMM0,(%RCX,%RAX,8){%K1} |
0x470133 MOV %R9,%RDX |
0x470136 SUB %R12,%RDX |
0x470139 JLE 4702a1 |
0x47013f MOV 0xd0(%RSP),%RCX |
0x470147 LEA -0x1(%R13),%RAX |
0x47014b LEA -0x8(%R11,%R9,8),%RDI |
0x470150 LEA (%R11,%R12,8),%RSI |
0x470154 LEA (%RCX,%RAX,8),%RAX |
0x470158 CMP %RAX,%RDI |
0x47015b JB 47018e |
0x47015d CMP %RSI,%RAX |
0x470160 JB 47018e |
0x470162 MOV %R12,%RCX |
0x470165 JMP 47017c |
0x470167 NOPW (%RAX,%RAX,1) |
(1812) 0x470170 INC %RCX |
(1812) 0x470173 CMP %RCX,%R9 |
(1812) 0x470176 JE 4702a1 |
(1812) 0x47017c MOV (%R11,%RCX,8),%RDX |
(1812) 0x470180 TEST %RDX,%RDX |
(1812) 0x470183 JS 470170 |
(1812) 0x470185 ADD (%RAX),%RDX |
(1812) 0x470188 MOV %RDX,(%R11,%RCX,8) |
(1812) 0x47018c JMP 470170 |
0x47018e MOV %RDX,%RCX |
0x470191 AND $-0x10,%RCX |
0x470195 JE 47020c |
0x470197 VPBROADCASTQ %RDX,%ZMM0 |
0x47019d LEA -0x1(%RCX),%RDI |
0x4701a1 VPTERNLOGD $-0x1,%ZMM1,%ZMM1,%ZMM1 |
0x4701a8 XOR %R8D,%R8D |
0x4701ab JMP 4701dc |
0x4701ad NOPL (%RAX) |
(1811) 0x4701b0 VPBROADCASTQ %R9,%ZMM4 |
(1811) 0x4701b6 LEA (%RSI,%R8,8),%R10 |
(1811) 0x4701ba ADD $0x10,%R8 |
(1811) 0x4701be VPADDQ %ZMM4,%ZMM3,%ZMM3 |
(1811) 0x4701c4 VPADDQ %ZMM4,%ZMM2,%ZMM2 |
(1811) 0x4701ca VMOVDQU64 %ZMM3,0x40(%R10){%K1} |
(1811) 0x4701d1 VMOVDQU64 %ZMM2,(%R10){%K2} |
(1811) 0x4701d7 CMP %RDI,%R8 |
(1811) 0x4701da JA 470202 |
(1811) 0x4701dc VMOVDQU64 (%RSI,%R8,8),%ZMM2 |
(1811) 0x4701e3 VMOVDQU64 0x40(%RSI,%R8,8),%ZMM3 |
(1811) 0x4701eb VPCMPGTQ %ZMM1,%ZMM3,%K1 |
(1811) 0x4701f1 VPCMPGTQ %ZMM1,%ZMM2,%K2 |
(1811) 0x4701f7 KORTESTB %K1,%K2 |
(1811) 0x4701fb JE 4701b0 |
(1811) 0x4701fd MOV (%RAX),%R9 |
(1811) 0x470200 JMP 4701b0 |
0x470202 CMP %RCX,%RDX |
0x470205 JNE 470214 |
0x470207 JMP 4702a1 |
0x47020c VPBROADCASTQ %RDX,%ZMM0 |
0x470212 XOR %ECX,%ECX |
0x470214 VPBROADCASTQ %RCX,%ZMM1 |
0x47021a ADD %R12,%RCX |
0x47021d LEA (%R11,%RCX,8),%RDX |
0x470221 VPSUBQ %ZMM1,%ZMM0,%ZMM2 |
0x470227 VPSUBQ %ZMM1,%ZMM0,%ZMM0 |
0x47022d VPCMPNLEUQ 0x134348(%RIP),%ZMM0,%K1 |
0x470238 VPCMPNLEUQ 0x13437d(%RIP),%ZMM2,%K2 |
0x470243 VPTERNLOGD $-0x1,%ZMM2,%ZMM2,%ZMM2 |
0x47024a VMOVDQU64 0x40(%R11,%RCX,8),%ZMM0{%K2}{z} |
0x470252 VMOVDQU64 (%R11,%RCX,8),%ZMM1{%K1}{z} |
0x470259 KUNPCKBW %K1,%K2,%K0 |
0x47025d VPCMPGTQ %ZMM2,%ZMM1,%K1 |
0x470263 VPCMPGTQ %ZMM2,%ZMM0,%K2 |
0x470269 KUNPCKBW %K1,%K2,%K1 |
0x47026d KANDW %K1,%K0,%K1 |
0x470271 KORTESTW %K1,%K1 |
0x470275 JE 47027c |
0x470277 MOV (%RAX),%RAX |
0x47027a JMP 47027c |
0x47027c VPBROADCASTQ %RAX,%ZMM2 |
0x470282 KSHIFTRW $0x8,%K1,%K2 |
0x470288 VPADDQ %ZMM2,%ZMM0,%ZMM0 |
0x47028e VPADDQ %ZMM2,%ZMM1,%ZMM1 |
0x470294 VMOVDQU64 %ZMM0,0x40(%RDX){%K2} |
0x47029b VMOVDQU64 %ZMM1,(%RDX){%K1} |
0x4702a1 MOV 0x120(%RSP),%RAX |
0x4702a9 MOV $0x5d5fb0,%EDI |
0x4702ae MOV (%RAX),%ESI |
0x4702b0 VZEROUPPER |
0x4702b3 CALL 410560 <__kmpc_barrier@plt> |
0x4702b8 MOV 0xb0(%RSP),%RDI |
0x4702c0 TEST %R13,%R13 |
0x4702c3 JNE 4705ac |
0x4702c9 CMPQ $0x4,0x230(%RSP) |
0x4702d2 JNE 470316 |
0x4702d4 CALL 586180 <time_getWallclockSeconds> |
0x4702d9 MOV 0x228(%RSP),%R14 |
0x4702e1 MOV 0x220(%RSP),%RAX |
0x4702e9 MOV $0x5a4ad8,%EDI |
0x4702ee VSUBSD (%R14),%XMM0,%XMM0 |
0x4702f3 MOV (%RAX),%RSI |
0x4702f6 MOV $0x1,%AL |
0x4702f8 CALL 5831f0 <hypre_printf> |
0x4702fd XOR %EDI,%EDI |
0x4702ff CALL 4106e0 <fflush@plt> |
0x470304 CALL 586180 <time_getWallclockSeconds> |
0x470309 MOV 0xb0(%RSP),%RDI |
0x470311 VMOVSD %XMM0,(%R14) |
0x470316 MOV 0x28(%RSP),%RAX |
0x47031b MOV 0x118(%RSP),%RCX |
0x470323 MOV 0x160(%RSP),%RSI |
0x47032b MOV 0x48(%RSP),%RDX |
0x470330 MOV (%RAX,%RCX,8),%R13 |
0x470334 MOV %R13,(%RSI) |
0x470337 MOV (%RDX,%RCX,8),%R14 |
0x47033b MOV 0x168(%RSP),%RCX |
0x470343 MOV %R14,(%RCX) |
0x470346 TEST %R13,%R13 |
0x470349 JE 470380 |
0x47034b MOV $0x8,%ESI |
0x470350 MOV %R13,%RDI |
0x470353 CALL 583040 <hypre_CAlloc> |
0x470358 MOV 0x138(%RSP),%RCX |
0x470360 MOV $0x8,%ESI |
0x470365 MOV %R13,%RDI |
0x470368 MOV %RAX,(%RCX) |
0x47036b CALL 583040 <hypre_CAlloc> |
0x470370 MOV 0xb0(%RSP),%RDI |
0x470378 MOV 0x38(%RSP),%RCX |
0x47037d MOV %RAX,(%RCX) |
0x470380 TEST %R14,%R14 |
0x470383 JE 4703ba |
0x470385 MOV $0x8,%ESI |
0x47038a MOV %R14,%RDI |
0x47038d CALL 583040 <hypre_CAlloc> |
0x470392 MOV 0x130(%RSP),%RCX |
0x47039a MOV $0x8,%ESI |
0x47039f MOV %R14,%RDI |
0x4703a2 MOV %RAX,(%RCX) |
0x4703a5 CALL 583040 <hypre_CAlloc> |
0x4703aa MOV 0xb0(%RSP),%RDI |
0x4703b2 MOV 0x58(%RSP),%RCX |
0x4703b7 MOV %RAX,(%RCX) |
0x4703ba MOV 0x90(%RSP),%RAX |
0x4703c2 CMPQ $0x2,(%RAX) |
0x4703c6 JL 4705ac |
0x4703cc MOV 0x118(%RSP),%RAX |
0x4703d4 TEST %RAX,%RAX |
0x4703d7 JLE 470453 |
0x4703d9 MOV 0x158(%RSP),%RCX |
0x4703e1 MOV %RAX,%R14 |
0x4703e4 AND $-0x8,%R14 |
0x4703e8 VPBROADCASTQ %RAX,%ZMM1 |
0x4703ee VPBROADCASTQ %R14,%ZMM3 |
0x4703f4 VMOVDQU64 %ZMM3,0x180(%RSP) |
0x4703fc VPBROADCASTQ %RCX,%ZMM0 |
0x470402 JE 470483 |
0x470404 MOV 0x80(%RSP),%RDX |
0x47040c LEA -0x1(%R14),%RAX |
0x470410 XOR %ECX,%ECX |
0x470412 NOPW %CS:(%RAX,%RAX,1) |
(1809) 0x470420 VPADDQ (%RDX,%RCX,8),%ZMM0,%ZMM2 |
(1809) 0x470427 VMOVDQU64 %ZMM2,(%RDX,%RCX,8) |
(1809) 0x47042e ADD $0x8,%RCX |
(1809) 0x470432 CMP %RAX,%RCX |
(1809) 0x470435 JLE 470420 |
0x470437 VPCMPEQQ %ZMM3,%ZMM1,%K0 |
0x47043d MOV %R14,%RAX |
0x470440 KMOVD %K0,%ECX |
0x470444 TEST $0x1,%CL |
0x470447 MOV 0x150(%RSP),%RCX |
0x47044f JE 470495 |
0x470451 JMP 4704c0 |
0x470453 MOV 0x150(%RSP),%RAX |
0x47045b MOV (%RDI),%RCX |
0x47045e MOV 0x1f0(%RSP),%RDI |
0x470466 MOV 0x80(%RSP),%RDX |
0x47046e MOV 0x1f8(%RSP),%R8 |
0x470476 MOV (%RAX),%RSI |
0x470479 CALL 520c70 <hypre_alt_insert_new_nodes> |
0x47047e JMP 4705d7 |
0x470483 MOV 0x80(%RSP),%RDX |
0x47048b MOV 0x150(%RSP),%RCX |
0x470493 XOR %EAX,%EAX |
0x470495 VPBROADCASTQ %RAX,%ZMM2 |
0x47049b VPSUBQ %ZMM2,%ZMM1,%ZMM1 |
0x4704a1 VPCMPNLEUQ 0x1340d4(%RIP),%ZMM1,%K1 |
0x4704ac VMOVDQU64 (%RDX,%RAX,8),%ZMM1{%K1}{z} |
0x4704b3 VPADDQ %ZMM1,%ZMM0,%ZMM0 |
0x4704b9 VMOVDQU64 %ZMM0,(%RDX,%RAX,8){%K1} |
0x4704c0 MOV (%RCX),%RSI |
0x4704c3 MOV (%RDI),%RCX |
0x4704c6 MOV 0x1f0(%RSP),%RDI |
0x4704ce MOV 0x1f8(%RSP),%R8 |
0x4704d6 VZEROUPPER |
0x4704d9 CALL 520c70 <hypre_alt_insert_new_nodes> |
0x4704de TEST %R14,%R14 |
0x4704e1 JE 47054f |
0x4704e3 MOV 0x158(%RSP),%RCX |
0x4704eb MOV 0x80(%RSP),%RDX |
0x4704f3 LEA -0x1(%R14),%RAX |
0x4704f7 NEG %RCX |
0x4704fa VPBROADCASTQ %RCX,%ZMM0 |
0x470500 XOR %ECX,%ECX |
0x470502 NOPW %CS:(%RAX,%RAX,1) |
(1808) 0x470510 VPADDQ (%RDX,%RCX,8),%ZMM0,%ZMM1 |
(1808) 0x470517 VMOVDQU64 %ZMM1,(%RDX,%RCX,8) |
(1808) 0x47051e ADD $0x8,%RCX |
(1808) 0x470522 CMP %RAX,%RCX |
(1808) 0x470525 JLE 470510 |
0x470527 MOV 0x118(%RSP),%RAX |
0x47052f MOV 0xb0(%RSP),%RDI |
0x470537 VPBROADCASTQ %RAX,%ZMM1 |
0x47053d VPCMPEQQ 0x180(%RSP),%ZMM1,%K0 |
0x470545 KMOVD %K0,%EAX |
0x470549 TEST $0x1,%AL |
0x47054b JE 470579 |
0x47054d JMP 4705ac |
0x47054f MOV 0x158(%RSP),%RCX |
0x470557 MOV 0x118(%RSP),%RAX |
0x47055f MOV 0xb0(%RSP),%RDI |
0x470567 XOR %R14D,%R14D |
0x47056a NEG %RCX |
0x47056d VPBROADCASTQ %RAX,%ZMM1 |
0x470573 VPBROADCASTQ %RCX,%ZMM0 |
0x470579 VPBROADCASTQ %R14,%ZMM2 |
0x47057f MOV 0x80(%RSP),%RAX |
0x470587 VPSUBQ %ZMM2,%ZMM1,%ZMM1 |
0x47058d VPCMPNLEUQ 0x133fe8(%RIP),%ZMM1,%K1 |
0x470598 VMOVDQU64 (%RAX,%R14,8),%ZMM1{%K1}{z} |
0x47059f VPADDQ %ZMM1,%ZMM0,%ZMM0 |
0x4705a5 VMOVDQU64 %ZMM0,(%RAX,%R14,8){%K1} |
0x4705ac CMPQ $0,0x118(%RSP) |
0x4705b5 JLE 4705df |
0x4705b7 MOV 0x118(%RSP),%RAX |
0x4705bf MOV $0xff,%ESI |
0x4705c4 MOV %RBX,%RDI |
0x4705c7 LEA (,%RAX,8),%RDX |
0x4705cf VZEROUPPER |
0x4705d2 CALL 58e1b0 <_intel_fast_memset> |
0x4705d7 MOV 0xb0(%RSP),%RDI |
0x4705df CMPQ $0,(%RDI) |
0x4705e3 MOV 0x20(%RSP),%RCX |
0x4705e8 JLE 470600 |
0x4705ea XOR %EAX,%EAX |
0x4705ec NOPL (%RAX) |
(1807) 0x4705f0 MOVQ $-0x1,(%RCX,%RAX,8) |
(1807) 0x4705f8 INC %RAX |
(1807) 0x4705fb CMP (%RDI),%RAX |
(1807) 0x4705fe JL 4705f0 |
0x470600 MOV 0x120(%RSP),%RAX |
0x470608 MOV $0x5d5fd0,%EDI |
0x47060d MOV (%RAX),%ESI |
0x47060f VZEROUPPER |
0x470612 CALL 410560 <__kmpc_barrier@plt> |
0x470617 MOV 0x98(%RSP),%R11 |
0x47061f MOV 0x28(%RSP),%RDX |
0x470624 CMP %R12,0xb8(%RSP) |
0x47062c JLE 472337 |
0x470632 MOV 0x20(%RSP),%RAX |
0x470637 MOV 0x40(%RSP),%RCX |
0x47063c VBROADCASTSD 0x12d9ba(%RIP),%ZMM2 |
0x470646 VBROADCASTSD 0x12d9b0(%RIP),%ZMM8 |
0x470650 VMOVDQU64 0x133f26(%RIP),%ZMM3 |
0x47065a VMOVSD 0x12d99e(%RIP),%XMM6 |
0x470662 VMOVSD 0x12c9a6(%RIP),%XMM7 |
0x47066a VPBROADCASTQ %RBX,%ZMM0 |
0x470670 MOV $0x3ff0000000000000,%RDI |
0x47067a VPXOR %XMM4,%XMM4,%XMM4 |
0x47067e VXORPD %XMM5,%XMM5,%XMM5 |
0x470682 VPBROADCASTQ %RAX,%ZMM1 |
0x470688 LEA 0x8(%RCX),%RAX |
0x47068c MOV %RAX,0x128(%RSP) |
0x470694 MOV 0xc8(%RSP),%RAX |
0x47069c ADD $0x8,%RAX |
0x4706a0 MOV %RAX,0x170(%RSP) |
0x4706a8 MOV 0xa0(%RSP),%RAX |
0x4706b0 MOVQ $-0x2,0x70(%RSP) |
0x4706b9 LEA 0x38(%RAX),%R14 |
0x4706bd MOV %R14,0x160(%RSP) |
0x4706c5 JMP 470715 |
0x4706c7 NOPW (%RAX,%RAX,1) |
(1786) 0x4706d0 MOV 0x80(%RSP),%RAX |
(1786) 0x4706d8 MOV 0x138(%RSP),%RCX |
(1786) 0x4706e0 MOV (%RAX,%R12,8),%RAX |
(1786) 0x4706e4 MOV (%RCX),%RCX |
(1786) 0x4706e7 MOV %RAX,(%RCX,%R10,8) |
(1786) 0x4706eb MOV 0x38(%RSP),%RCX |
(1786) 0x4706f0 MOV (%RCX),%RAX |
(1786) 0x4706f3 MOV %RDI,(%RAX,%R10,8) |
(1786) 0x4706f7 MOV 0x28(%RSP),%RDX |
(1786) 0x4706fc MOV 0xb8(%RSP),%RSI |
(1786) 0x470704 DECQ 0x70(%RSP) |
(1786) 0x470709 INC %R12 |
(1786) 0x47070c CMP %RSI,%R12 |
(1786) 0x47070f JE 472337 |
(1786) 0x470715 MOV 0xa8(%RSP),%RAX |
(1786) 0x47071d MOV (%RDX,%R12,8),%R10 |
(1786) 0x470721 MOV (%RAX,%R12,8),%RAX |
(1786) 0x470725 TEST %RAX,%RAX |
(1786) 0x470728 JNS 4706d0 |
(1786) 0x47072a CMP $-0x3,%RAX |
(1786) 0x47072e JE 4706f7 |
(1786) 0x470730 MOV 0x48(%RSP),%RAX |
(1786) 0x470735 DECQ 0x70(%RSP) |
(1786) 0x47073a MOV 0x78(%RSP),%RCX |
(1786) 0x47073f MOV %R10,0x180(%RSP) |
(1786) 0x470747 MOV (%RAX,%R12,8),%R8 |
(1786) 0x47074b MOV (%RCX,%R12,8),%RAX |
(1786) 0x47074f MOV %R8,%R14 |
(1786) 0x470752 CMP 0x8(%RCX,%R12,8),%RAX |
(1786) 0x470757 JGE 4709b9 |
(1786) 0x47075d MOV %R8,%R14 |
(1786) 0x470760 MOV %R10,0x180(%RSP) |
(1786) 0x470768 JMP 470783 |
(1803) 0x47076a MOV 0x30(%RSP),%R15 |
(1803) 0x47076f NOP |
(1803) 0x470770 MOV 0x78(%RSP),%RCX |
(1803) 0x470775 INC %RAX |
(1803) 0x470778 CMP 0x8(%RCX,%R12,8),%RAX |
(1803) 0x47077d JGE 4709b9 |
(1803) 0x470783 MOV 0x110(%RSP),%RCX |
(1803) 0x47078b MOV 0xa8(%RSP),%RDX |
(1803) 0x470793 MOV (%RCX,%RAX,8),%RCX |
(1803) 0x470797 MOV (%RDX,%RCX,8),%RDX |
(1803) 0x47079b TEST %RDX,%RDX |
(1803) 0x47079e JS 4707f0 |
(1803) 0x4707a0 CMP %R10,(%RBX,%RCX,8) |
(1803) 0x4707a4 JGE 470770 |
(1803) 0x4707a6 MOV 0x180(%RSP),%RSI |
(1803) 0x4707ae MOV 0x80(%RSP),%RDX |
(1803) 0x4707b6 MOV 0x138(%RSP),%RDI |
(1803) 0x4707be MOV %RSI,(%RBX,%RCX,8) |
(1803) 0x4707c2 MOV (%RDX,%RCX,8),%RCX |
(1803) 0x4707c6 MOV (%RDI),%RDX |
(1803) 0x4707c9 MOV %RCX,(%RDX,%RSI,8) |
(1803) 0x4707cd MOV 0x38(%RSP),%RDX |
(1803) 0x4707d2 MOV (%RDX),%RCX |
(1803) 0x4707d5 MOVQ $0,(%RCX,%RSI,8) |
(1803) 0x4707dd INC %RSI |
(1803) 0x4707e0 MOV %RSI,0x180(%RSP) |
(1803) 0x4707e8 JMP 470770 |
0x4707ea NOPW (%RAX,%RAX,1) |
(1803) 0x4707f0 CMP $-0x3,%RDX |
(1803) 0x4707f4 JE 470770 |
(1803) 0x4707fa MOV 0x70(%RSP),%RDX |
(1803) 0x4707ff MOV 0x78(%RSP),%RSI |
(1803) 0x470804 MOV %RDX,(%RBX,%RCX,8) |
(1803) 0x470808 MOV (%RSI,%RCX,8),%RDX |
(1803) 0x47080c MOV 0x8(%RSI,%RCX,8),%RSI |
(1803) 0x470811 JMP 470823 |
0x470813 NOPW %CS:(%RAX,%RAX,1) |
(1806) 0x470820 INC %RDX |
(1806) 0x470823 CMP %RSI,%RDX |
(1806) 0x470826 JGE 470898 |
(1806) 0x470828 MOV 0x110(%RSP),%RDI |
(1806) 0x470830 MOV 0xa8(%RSP),%R9 |
(1806) 0x470838 MOV (%RDI,%RDX,8),%RDI |
(1806) 0x47083c CMPQ $0,(%R9,%RDI,8) |
(1806) 0x470841 JS 470820 |
(1806) 0x470843 CMP %R10,(%RBX,%RDI,8) |
(1806) 0x470847 JGE 470820 |
(1806) 0x470849 MOV 0x180(%RSP),%R9 |
(1806) 0x470851 MOV 0x80(%RSP),%RSI |
(1806) 0x470859 MOV 0x138(%RSP),%R13 |
(1806) 0x470861 MOV %R9,(%RBX,%RDI,8) |
(1806) 0x470865 MOV (%RSI,%RDI,8),%RSI |
(1806) 0x470869 MOV (%R13),%RDI |
(1806) 0x47086d MOV %RSI,(%RDI,%R9,8) |
(1806) 0x470871 MOV 0x38(%RSP),%RDI |
(1806) 0x470876 MOV (%RDI),%RSI |
(1806) 0x470879 MOVQ $0,(%RSI,%R9,8) |
(1806) 0x470881 INC %R9 |
(1806) 0x470884 MOV %R9,0x180(%RSP) |
(1806) 0x47088c MOV 0x78(%RSP),%RSI |
(1806) 0x470891 MOV 0x8(%RSI,%RCX,8),%RSI |
(1806) 0x470896 JMP 470820 |
(1803) 0x470898 MOV 0x90(%RSP),%RDX |
(1803) 0x4708a0 CMPQ $0x2,(%RDX) |
(1803) 0x4708a4 JL 470770 |
(1803) 0x4708aa MOV 0x60(%RSP),%RDX |
(1803) 0x4708af MOV (%RDX,%RCX,8),%RSI |
(1803) 0x4708b3 MOV 0x8(%RDX,%RCX,8),%RDI |
(1803) 0x4708b8 CMP %RDI,%RSI |
(1803) 0x4708bb JGE 470770 |
(1803) 0x4708c1 MOV 0xe8(%RSP),%RDX |
(1803) 0x4708c9 CMPQ $0,0x88(%RSP) |
(1803) 0x4708d2 MOV (%RDX),%RDX |
(1803) 0x4708d5 JNE 4708fc |
(1803) 0x4708d7 MOV 0x20(%RSP),%R13 |
(1803) 0x4708dc JMP 47096c |
0x4708e1 NOPW %CS:(%RAX,%RAX,1) |
(1804) 0x4708f0 INC %RSI |
(1804) 0x4708f3 CMP %RDI,%RSI |
(1804) 0x4708f6 JGE 47076a |
(1804) 0x4708fc MOV 0xc0(%RSP),%R9 |
(1804) 0x470904 MOV 0x88(%RSP),%R13 |
(1804) 0x47090c MOV (%R9,%RSI,8),%R9 |
(1804) 0x470910 MOV (%R13,%R9,8),%R9 |
(1804) 0x470915 CMPQ $0,(%RDX,%R9,8) |
(1804) 0x47091a JS 4708f0 |
(1804) 0x47091c MOV 0x20(%RSP),%R13 |
(1804) 0x470921 CMP %R8,(%R13,%R9,8) |
(1804) 0x470926 JGE 4708f0 |
(1804) 0x470928 MOV 0x130(%RSP),%RDI |
(1804) 0x470930 MOV %R14,(%R13,%R9,8) |
(1804) 0x470935 MOV 0x58(%RSP),%R15 |
(1804) 0x47093a MOV (%RDI),%RDI |
(1804) 0x47093d MOV %R9,(%RDI,%R14,8) |
(1804) 0x470941 MOV 0x60(%RSP),%R9 |
(1804) 0x470946 MOV (%R15),%RDI |
(1804) 0x470949 MOVQ $0,(%RDI,%R14,8) |
(1804) 0x470951 INC %R14 |
(1804) 0x470954 MOV 0x8(%R9,%RCX,8),%RDI |
(1804) 0x470959 JMP 4708f0 |
0x47095b NOPL (%RAX,%RAX,1) |
(1805) 0x470960 INC %RSI |
(1805) 0x470963 CMP %RDI,%RSI |
(1805) 0x470966 JGE 470770 |
(1805) 0x47096c MOV 0xc0(%RSP),%R9 |
(1805) 0x470974 MOV (%R9,%RSI,8),%R9 |
(1805) 0x470978 CMPQ $0,(%RDX,%R9,8) |
(1805) 0x47097d JS 470960 |
(1805) 0x47097f CMP %R8,(%R13,%R9,8) |
(1805) 0x470984 JGE 470960 |
(1805) 0x470986 MOV 0x130(%RSP),%RDI |
(1805) 0x47098e MOV %R14,(%R13,%R9,8) |
(1805) 0x470993 MOV (%RDI),%RDI |
(1805) 0x470996 MOV %R9,(%RDI,%R14,8) |
(1805) 0x47099a MOV 0x58(%RSP),%RDI |
(1805) 0x47099f MOV 0x60(%RSP),%R9 |
(1805) 0x4709a4 MOV (%RDI),%RDI |
(1805) 0x4709a7 MOVQ $0,(%RDI,%R14,8) |
(1805) 0x4709af INC %R14 |
(1805) 0x4709b2 MOV 0x8(%R9,%RCX,8),%RDI |
(1805) 0x4709b7 JMP 470960 |
(1786) 0x4709b9 MOV 0x90(%RSP),%RAX |
(1786) 0x4709c1 CMPQ $0x2,(%RAX) |
(1786) 0x4709c5 JL 470b4e |
(1786) 0x4709cb MOV 0x60(%RSP),%RCX |
(1786) 0x4709d0 MOV (%RCX,%R12,8),%RAX |
(1786) 0x4709d4 CMP 0x8(%RCX,%R12,8),%RAX |
(1786) 0x4709d9 JGE 470b4e |
(1786) 0x4709df MOV 0xe8(%RSP),%RCX |
(1786) 0x4709e7 MOV (%RCX),%RCX |
(1786) 0x4709ea JMP 470a03 |
0x4709ec NOPL (%RAX) |
(1801) 0x4709f0 MOV 0x60(%RSP),%RDX |
(1801) 0x4709f5 INC %RAX |
(1801) 0x4709f8 CMP 0x8(%RDX,%R12,8),%RAX |
(1801) 0x4709fd JGE 470b4e |
(1801) 0x470a03 MOV 0xc0(%RSP),%RDX |
(1801) 0x470a0b MOV (%RDX,%RAX,8),%RSI |
(1801) 0x470a0f MOV 0x88(%RSP),%RDX |
(1801) 0x470a17 TEST %RDX,%RDX |
(1801) 0x470a1a JE 470a20 |
(1801) 0x470a1c MOV (%RDX,%RSI,8),%RSI |
(1801) 0x470a20 MOV (%RCX,%RSI,8),%RDX |
(1801) 0x470a24 TEST %RDX,%RDX |
(1801) 0x470a27 JS 470a60 |
(1801) 0x470a29 MOV 0x20(%RSP),%RDX |
(1801) 0x470a2e CMP %R8,(%RDX,%RSI,8) |
(1801) 0x470a32 JGE 4709f0 |
(1801) 0x470a34 MOV 0x130(%RSP),%RDI |
(1801) 0x470a3c MOV %R14,(%RDX,%RSI,8) |
(1801) 0x470a40 MOV (%RDI),%RDX |
(1801) 0x470a43 MOV %RSI,(%RDX,%R14,8) |
(1801) 0x470a47 MOV 0x58(%RSP),%RSI |
(1801) 0x470a4c MOV (%RSI),%RDX |
(1801) 0x470a4f MOVQ $0,(%RDX,%R14,8) |
(1801) 0x470a57 INC %R14 |
(1801) 0x470a5a JMP 4709f0 |
0x470a5c NOPL (%RAX) |
(1801) 0x470a60 CMP $-0x3,%RDX |
(1801) 0x470a64 JE 4709f0 |
(1801) 0x470a66 MOV 0x20(%RSP),%RDX |
(1801) 0x470a6b MOV 0x70(%RSP),%RDI |
(1801) 0x470a70 MOV %RDI,(%RDX,%RSI,8) |
(1801) 0x470a74 MOV 0x100(%RSP),%RDI |
(1801) 0x470a7c MOV (%RDI,%RSI,8),%RDX |
(1801) 0x470a80 JMP 470a9b |
0x470a82 NOPW %CS:(%RAX,%RAX,1) |
(1802) 0x470a90 MOV 0x100(%RSP),%RDI |
(1802) 0x470a98 INC %RDX |
(1802) 0x470a9b CMP 0x8(%RDI,%RSI,8),%RDX |
(1802) 0x470aa0 JGE 4709f0 |
(1802) 0x470aa6 MOV 0x148(%RSP),%RDI |
(1802) 0x470aae MOV (%RDI,%RDX,8),%RDI |
(1802) 0x470ab2 MOV %RDI,%R9 |
(1802) 0x470ab5 SUB 0x50(%RSP),%R9 |
(1802) 0x470aba JL 470b10 |
(1802) 0x470abc CMP %R15,%RDI |
(1802) 0x470abf JGE 470b10 |
(1802) 0x470ac1 CMP %R10,(%RBX,%R9,8) |
(1802) 0x470ac5 JGE 470a90 |
(1802) 0x470ac7 MOV 0x180(%RSP),%R13 |
(1802) 0x470acf MOV 0x80(%RSP),%RDI |
(1802) 0x470ad7 MOV %R13,(%RBX,%R9,8) |
(1802) 0x470adb MOV (%RDI,%R9,8),%RDI |
(1802) 0x470adf MOV 0x138(%RSP),%R9 |
(1802) 0x470ae7 MOV (%R9),%R9 |
(1802) 0x470aea MOV %RDI,(%R9,%R13,8) |
(1802) 0x470aee MOV 0x38(%RSP),%R9 |
(1802) 0x470af3 MOV (%R9),%RDI |
(1802) 0x470af6 MOVQ $0,(%RDI,%R13,8) |
(1802) 0x470afe INC %R13 |
(1802) 0x470b01 MOV %R13,0x180(%RSP) |
(1802) 0x470b09 JMP 470a90 |
0x470b0b NOPL (%RAX,%RAX,1) |
(1802) 0x470b10 MOV 0x20(%RSP),%R9 |
(1802) 0x470b15 NOT %RDI |
(1802) 0x470b18 CMP %R8,(%R9,%RDI,8) |
(1802) 0x470b1c JGE 470a90 |
(1802) 0x470b22 MOV 0x130(%RSP),%R13 |
(1802) 0x470b2a MOV %R14,(%R9,%RDI,8) |
(1802) 0x470b2e MOV (%R13),%R9 |
(1802) 0x470b32 MOV %RDI,(%R9,%R14,8) |
(1802) 0x470b36 MOV 0x58(%RSP),%R9 |
(1802) 0x470b3b MOV (%R9),%RDI |
(1802) 0x470b3e MOVQ $0,(%RDI,%R14,8) |
(1802) 0x470b46 INC %R14 |
(1802) 0x470b49 JMP 470a90 |
(1786) 0x470b4e MOV %R14,0x140(%RSP) |
(1786) 0x470b56 MOV 0x210(%RSP),%RAX |
(1786) 0x470b5e MOV 0x40(%RSP),%RCX |
(1786) 0x470b63 MOV (%RAX,%R12,8),%R14 |
(1786) 0x470b67 MOV 0x8(%RAX,%R12,8),%R13 |
(1786) 0x470b6c VMOVSD (%RCX,%R14,8),%XMM17 |
(1786) 0x470b73 INC %R14 |
(1786) 0x470b76 CMP %R13,%R14 |
(1786) 0x470b79 JGE 471876 |
(1786) 0x470b7f VPBROADCASTQ %R12,%ZMM18 |
(1786) 0x470b85 VPBROADCASTQ %R10,%ZMM19 |
(1786) 0x470b8b VPBROADCASTQ %R8,%ZMM20 |
(1786) 0x470b91 MOV %R13,0xf0(%RSP) |
(1786) 0x470b99 JMP 470bce |
0x470b9b NOPL (%RAX,%RAX,1) |
(1794) 0x470ba0 MOV 0x38(%RSP),%RCX |
(1794) 0x470ba5 MOV 0x40(%RSP),%RDX |
(1794) 0x470baa MOV (%RCX),%RCX |
(1794) 0x470bad VMOVSD (%RCX,%RAX,8),%XMM21 |
(1794) 0x470bb4 VADDSD (%RDX,%R14,8),%XMM21,%XMM21 |
(1794) 0x470bbb VMOVSD %XMM21,(%RCX,%RAX,8) |
(1794) 0x470bc2 INC %R14 |
(1794) 0x470bc5 CMP %R13,%R14 |
(1794) 0x470bc8 JE 471876 |
(1794) 0x470bce MOV 0xc8(%RSP),%RAX |
(1794) 0x470bd6 MOV (%RAX,%R14,8),%RCX |
(1794) 0x470bda MOV (%RBX,%RCX,8),%RAX |
(1794) 0x470bde CMP %R10,%RAX |
(1794) 0x470be1 JGE 470ba0 |
(1794) 0x470be3 CMP 0x70(%RSP),%RAX |
(1794) 0x470be8 JNE 470d30 |
(1794) 0x470bee MOV 0x210(%RSP),%RDX |
(1794) 0x470bf6 MOV 0x40(%RSP),%RSI |
(1794) 0x470bfb VXORPD %XMM21,%XMM21,%XMM21 |
(1794) 0x470c01 XOR %EAX,%EAX |
(1794) 0x470c03 MOV (%RDX,%RCX,8),%RDI |
(1794) 0x470c07 MOV 0x8(%RDX,%RCX,8),%RDX |
(1794) 0x470c0c VUCOMISD (%RSI,%RDI,8),%XMM21 |
(1794) 0x470c13 MOV %RDX,0x68(%RSP) |
(1794) 0x470c18 SETBE %AL |
(1794) 0x470c1b LEA -0x1(%RAX,%RAX,1),%R9 |
(1794) 0x470c20 LEA 0x1(%RDI),%RAX |
(1794) 0x470c24 CMP %RDX,%RAX |
(1794) 0x470c27 JGE 470e73 |
(1794) 0x470c2d MOV %RDI,%RSI |
(1794) 0x470c30 NOT %RSI |
(1794) 0x470c33 VCVTSI2SD %R9,%XMM26,%XMM21 |
(1794) 0x470c39 ADD %RDX,%RSI |
(1794) 0x470c3c MOV %RSI,%RDX |
(1794) 0x470c3f AND $-0x8,%RDX |
(1794) 0x470c43 JE 470d75 |
(1794) 0x470c49 MOV %R9,0xd0(%RSP) |
(1794) 0x470c51 MOV %RDI,%R15 |
(1794) 0x470c54 VBROADCASTSD %XMM21,%ZMM22 |
(1794) 0x470c5a LEA -0x1(%RDX),%RDI |
(1794) 0x470c5e VXORPD %XMM21,%XMM21,%XMM21 |
(1794) 0x470c64 MOV 0x128(%RSP),%R9 |
(1794) 0x470c6c LEA (%R9,%R15,8),%R11 |
(1794) 0x470c70 MOV 0x170(%RSP),%R9 |
(1794) 0x470c78 MOV %R15,0xf8(%RSP) |
(1794) 0x470c80 LEA (%R9,%R15,8),%R9 |
(1794) 0x470c84 XOR %R15D,%R15D |
(1794) 0x470c87 NOPW (%RAX,%RAX,1) |
(1800) 0x470c90 VMOVDQU64 (%R9,%R15,8),%ZMM23 |
(1800) 0x470c97 VPXORD %XMM24,%XMM24,%XMM24 |
(1800) 0x470c9d VPCMPEQQ %ZMM18,%ZMM23,%K0 |
(1800) 0x470ca3 KXNORW %K0,%K0,%K1 |
(1800) 0x470ca7 VPGATHERQQ (%RBX,%ZMM23,8),%ZMM24{%K1} |
(1800) 0x470cae VPCMPNLTQ %ZMM19,%ZMM24,%K1 |
(1800) 0x470cb5 KORB %K0,%K1,%K1 |
(1800) 0x470cb9 VMOVUPD (%R11,%R15,8),%ZMM23{%K1}{z} |
(1800) 0x470cc0 ADD $0x8,%R15 |
(1800) 0x470cc4 VMULPD %ZMM22,%ZMM23,%ZMM24 |
(1800) 0x470cca VCMPPD $0x1,%ZMM4,%ZMM24,%K1{%K1} |
(1800) 0x470cd1 VADDPD %ZMM23,%ZMM21,%ZMM21{%K1} |
(1800) 0x470cd7 CMP %RDI,%R15 |
(1800) 0x470cda JBE 470c90 |
(1794) 0x470cdc VEXTRACTF64X4 $0x1,%ZMM21,%YMM23 |
(1794) 0x470ce3 VADDPD %ZMM23,%ZMM21,%ZMM21 |
(1794) 0x470ce9 VEXTRACTF32X4 $0x1,%YMM21,%XMM23 |
(1794) 0x470cf0 VADDPD %XMM23,%XMM21,%XMM21 |
(1794) 0x470cf6 VPERMILPD $0x1,%XMM21,%XMM23 |
(1794) 0x470cfd VADDSD %XMM23,%XMM21,%XMM21 |
(1794) 0x470d03 CMP %RDX,%RSI |
(1794) 0x470d06 JNE 470d8b |
(1794) 0x470d0c MOV 0x98(%RSP),%R11 |
(1794) 0x470d14 MOV 0x30(%RSP),%R15 |
(1794) 0x470d19 MOV 0xd0(%RSP),%R9 |
(1794) 0x470d21 MOV 0xf8(%RSP),%RDI |
(1794) 0x470d29 JMP 470e73 |
0x470d2e XCHG %AX,%AX |
(1794) 0x470d30 MOV 0xa8(%RSP),%RAX |
(1794) 0x470d38 CMPQ $-0x3,(%RAX,%RCX,8) |
(1794) 0x470d3d JE 470bc2 |
(1794) 0x470d43 CMPQ $0x1,0x208(%RSP) |
(1794) 0x470d4c JE 470d64 |
(1794) 0x470d4e MOV 0x200(%RSP),%RDX |
(1794) 0x470d56 MOV (%RDX,%R12,8),%RAX |
(1794) 0x470d5a CMP (%RDX,%RCX,8),%RAX |
(1794) 0x470d5e JNE 470bc2 |
(1794) 0x470d64 MOV 0x40(%RSP),%RAX |
(1794) 0x470d69 VADDSD (%RAX,%R14,8),%XMM17,%XMM17 |
(1794) 0x470d70 JMP 470bc2 |
(1794) 0x470d75 VBROADCASTSD %XMM21,%ZMM22 |
(1794) 0x470d7b VPBROADCASTQ %RSI,%ZMM23 |
(1794) 0x470d81 VXORPD %XMM21,%XMM21,%XMM21 |
(1794) 0x470d87 XOR %EDX,%EDX |
(1794) 0x470d89 JMP 470dae |
(1794) 0x470d8b MOV 0x98(%RSP),%R11 |
(1794) 0x470d93 MOV 0x30(%RSP),%R15 |
(1794) 0x470d98 MOV 0xd0(%RSP),%R9 |
(1794) 0x470da0 MOV 0xf8(%RSP),%RDI |
(1794) 0x470da8 VPBROADCASTQ %RSI,%ZMM23 |
(1794) 0x470dae MOV 0xc8(%RSP),%RSI |
(1794) 0x470db6 VPBROADCASTQ %RDX,%ZMM24 |
(1794) 0x470dbc ADD %RAX,%RDX |
(1794) 0x470dbf VPSUBQ %ZMM24,%ZMM23,%ZMM23 |
(1794) 0x470dc5 VPXORD %XMM24,%XMM24,%XMM24 |
(1794) 0x470dcb VPCMPNLEUQ %ZMM3,%ZMM23,%K1 |
(1794) 0x470dd2 KMOVQ %K1,%K2 |
(1794) 0x470dd7 VMOVDQU64 (%RSI,%RDX,8),%ZMM23{%K1}{z} |
(1794) 0x470dde MOV 0x40(%RSP),%RSI |
(1794) 0x470de3 VMOVDQA64 %ZMM23,%ZMM12{%K1} |
(1794) 0x470de9 VPSLLQ $0x3,%ZMM12,%ZMM23 |
(1794) 0x470df0 VPADDQ %ZMM23,%ZMM0,%ZMM23 |
(1794) 0x470df6 VPGATHERQQ (,%ZMM23,1),%ZMM24{%K2} |
(1794) 0x470e01 VPCMPEQQ %ZMM18,%ZMM12,%K2{%K1} |
(1794) 0x470e07 VMOVDQA64 %ZMM24,%ZMM10{%K1} |
(1794) 0x470e0d VPCMPNLTQ %ZMM19,%ZMM10,%K0 |
(1794) 0x470e14 KANDNB %K2,%K0,%K2 |
(1794) 0x470e18 KANDB %K0,%K1,%K0 |
(1794) 0x470e1c KORB %K2,%K0,%K1 |
(1794) 0x470e20 VMOVUPD (%RSI,%RDX,8),%ZMM23{%K1}{z} |
(1794) 0x470e27 VMOVAPD %ZMM23,%ZMM9{%K1} |
(1794) 0x470e2d VMULPD %ZMM22,%ZMM9,%ZMM22 |
(1794) 0x470e33 VCMPPD $0x1,%ZMM4,%ZMM22,%K2 |
(1794) 0x470e3a VBLENDMPD %ZMM9,%ZMM2,%ZMM22{%K2} |
(1794) 0x470e40 VMOVAPD %ZMM22,%ZMM22{%K1}{z} |
(1794) 0x470e46 VEXTRACTF64X4 $0x1,%ZMM22,%YMM23 |
(1794) 0x470e4d VADDPD %ZMM23,%ZMM22,%ZMM22 |
(1794) 0x470e53 VEXTRACTF32X4 $0x1,%YMM22,%XMM23 |
(1794) 0x470e5a VADDPD %XMM23,%XMM22,%XMM22 |
(1794) 0x470e60 VPERMILPD $0x1,%XMM22,%XMM23 |
(1794) 0x470e67 VADDSD %XMM23,%XMM22,%XMM22 |
(1794) 0x470e6d VADDSD %XMM22,%XMM21,%XMM21 |
(1794) 0x470e73 MOV 0x90(%RSP),%RDX |
(1794) 0x470e7b MOV (%RDX),%RDX |
(1794) 0x470e7e MOV %RDX,0x120(%RSP) |
(1794) 0x470e86 CMP $0x2,%RDX |
(1794) 0x470e8a JL 470fe9 |
(1794) 0x470e90 MOV 0x178(%RSP),%RSI |
(1794) 0x470e98 MOV %R13,%R15 |
(1794) 0x470e9b MOV %R9,%R13 |
(1794) 0x470e9e MOV (%RSI,%RCX,8),%R9 |
(1794) 0x470ea2 MOV 0x8(%RSI,%RCX,8),%RDX |
(1794) 0x470ea7 SUB %R9,%RDX |
(1794) 0x470eaa JLE 470fde |
(1794) 0x470eb0 VCVTSI2SD %R13,%XMM26,%XMM22 |
(1794) 0x470eb6 MOV %RDX,%RSI |
(1794) 0x470eb9 AND $-0x8,%RSI |
(1794) 0x470ebd MOV %R9,0xe0(%RSP) |
(1794) 0x470ec5 MOV %R13,%R9 |
(1794) 0x470ec8 JE 4715ab |
(1794) 0x470ece MOV %RDI,0xf8(%RSP) |
(1794) 0x470ed6 MOV %R9,0xd0(%RSP) |
(1794) 0x470ede MOV %RSI,0x168(%RSP) |
(1794) 0x470ee6 LEA -0x1(%RSI),%R11 |
(1794) 0x470eea VBROADCASTSD %XMM22,%ZMM22 |
(1794) 0x470ef0 VXORPD %XMM23,%XMM23,%XMM23 |
(1794) 0x470ef6 XOR %R13D,%R13D |
(1794) 0x470ef9 MOV 0xd8(%RSP),%R9 |
(1794) 0x470f01 MOV 0xe0(%RSP),%RSI |
(1794) 0x470f09 MOV 0x108(%RSP),%R15 |
(1794) 0x470f11 MOV 0x20(%RSP),%RDI |
(1794) 0x470f16 LEA (%R9,%RSI,8),%R9 |
(1794) 0x470f1a LEA (%R15,%RSI,8),%R15 |
(1794) 0x470f1e XCHG %AX,%AX |
(1799) 0x470f20 VMOVDQU64 (%R15,%R13,8),%ZMM24 |
(1799) 0x470f27 KXNORW %K0,%K0,%K1 |
(1799) 0x470f2b VPXORD %XMM25,%XMM25,%XMM25 |
(1799) 0x470f31 VPGATHERQQ (%RDI,%ZMM24,8),%ZMM25{%K1} |
(1799) 0x470f38 VPCMPNLTQ %ZMM20,%ZMM25,%K1 |
(1799) 0x470f3f VMOVUPD (%R9,%R13,8),%ZMM24{%K1}{z} |
(1799) 0x470f46 ADD $0x8,%R13 |
(1799) 0x470f4a VMULPD %ZMM22,%ZMM24,%ZMM25 |
(1799) 0x470f50 VCMPPD $0x1,%ZMM4,%ZMM25,%K1{%K1} |
(1799) 0x470f57 VADDPD %ZMM24,%ZMM23,%ZMM23{%K1} |
(1799) 0x470f5d CMP %R11,%R13 |
(1799) 0x470f60 JBE 470f20 |
(1794) 0x470f62 VEXTRACTF64X4 $0x1,%ZMM23,%YMM24 |
(1794) 0x470f69 MOV 0x168(%RSP),%RSI |
(1794) 0x470f71 VADDPD %ZMM24,%ZMM23,%ZMM23 |
(1794) 0x470f77 VEXTRACTF32X4 $0x1,%YMM23,%XMM24 |
(1794) 0x470f7e VADDPD %XMM24,%XMM23,%XMM23 |
(1794) 0x470f84 VPERMILPD $0x1,%XMM23,%XMM24 |
(1794) 0x470f8b VADDSD %XMM24,%XMM23,%XMM23 |
(1794) 0x470f91 VADDSD %XMM23,%XMM21,%XMM21 |
(1794) 0x470f97 CMP %RSI,%RDX |
(1794) 0x470f9a JNE 4715cb |
(1794) 0x470fa0 MOV 0x98(%RSP),%R11 |
(1794) 0x470fa8 MOV 0x30(%RSP),%R15 |
(1794) 0x470fad MOV 0xf0(%RSP),%R13 |
(1794) 0x470fb5 MOV 0xd0(%RSP),%R9 |
(1794) 0x470fbd MOV 0xf8(%RSP),%RDI |
(1794) 0x470fc5 MOV 0x40(%RSP),%RDX |
(1794) 0x470fca VUCOMISD %XMM5,%XMM21 |
(1794) 0x470fd0 VMOVSD (%RDX,%R14,8),%XMM22 |
(1794) 0x470fd7 JNE 471001 |
(1794) 0x470fd9 JMP 4716d2 |
(1794) 0x470fde MOV %R13,%R9 |
(1794) 0x470fe1 MOV %R15,%R13 |
(1794) 0x470fe4 MOV 0x30(%RSP),%R15 |
(1794) 0x470fe9 MOV 0x40(%RSP),%RDX |
(1794) 0x470fee VUCOMISD %XMM5,%XMM21 |
(1794) 0x470ff4 VMOVSD (%RDX,%R14,8),%XMM22 |
(1794) 0x470ffb JE 4716d2 |
(1794) 0x471001 VDIVSD %XMM21,%XMM22,%XMM21 |
(1794) 0x471007 MOV 0x68(%RSP),%RDX |
(1794) 0x47100c CMP %RDX,%RAX |
(1794) 0x47100f JGE 471044 |
(1794) 0x471011 MOV %EDI,%ESI |
(1794) 0x471013 NOT %ESI |
(1794) 0x471015 VCVTSI2SD %R9,%XMM26,%XMM22 |
(1794) 0x47101b MOV %R9,0xd0(%RSP) |
(1794) 0x471023 ADD %EDX,%ESI |
(1794) 0x471025 SUB %RDI,%RDX |
(1794) 0x471028 ADD $-0x2,%RDX |
(1794) 0x47102c AND $0x7,%RSI |
(1794) 0x471030 JNE 4710a8 |
(1794) 0x471032 MOV 0xd0(%RSP),%R9 |
(1794) 0x47103a CMP $0x7,%RDX |
(1794) 0x47103e JAE 471152 |
(1794) 0x471044 CMPQ $0x2,0x120(%RSP) |
(1794) 0x47104d JL 470bc2 |
(1794) 0x471053 MOV 0x178(%RSP),%RDX |
(1794) 0x47105b MOV (%RDX,%RCX,8),%RAX |
(1794) 0x47105f MOV 0x8(%RDX,%RCX,8),%RCX |
(1794) 0x471064 MOV %RCX,%RSI |
(1794) 0x471067 SUB %RAX,%RSI |
(1794) 0x47106a JLE 470bc2 |
(1794) 0x471070 VCVTSI2SD %R9,%XMM26,%XMM22 |
(1794) 0x471076 CMP $0x4,%RSI |
(1794) 0x47107a JAE 4716dd |
(1794) 0x471080 MOV %RSI,%RDX |
(1794) 0x471083 AND $-0x4,%RDX |
(1794) 0x471087 CMP %RSI,%RDX |
(1794) 0x47108a JAE 471869 |
(1794) 0x471090 MOV 0xf0(%RSP),%R13 |
(1794) 0x471098 ADD %RDX,%RAX |
(1794) 0x47109b JMP 47155c |
(1798) 0x4710a0 INC %RAX |
(1798) 0x4710a3 DEC %RSI |
(1798) 0x4710a6 JE 471032 |
(1798) 0x4710a8 MOV 0xc8(%RSP),%RDI |
(1798) 0x4710b0 MOV (%RDI,%RAX,8),%RDI |
(1798) 0x4710b4 MOV (%RBX,%RDI,8),%R9 |
(1798) 0x4710b8 CMP %R10,%R9 |
(1798) 0x4710bb JL 4710fe |
(1798) 0x4710bd MOV 0x40(%RSP),%R13 |
(1798) 0x4710c2 VMOVSD (%R13,%RAX,8),%XMM23 |
(1798) 0x4710ca MOV 0xf0(%RSP),%R13 |
(1798) 0x4710d2 VMULSD %XMM22,%XMM23,%XMM24 |
(1798) 0x4710d8 VUCOMISD %XMM5,%XMM24 |
(1798) 0x4710de JAE 4710fe |
(1798) 0x4710e0 MOV 0x38(%RSP),%R11 |
(1798) 0x4710e5 MOV (%R11),%R11 |
(1798) 0x4710e8 VFMADD213SD (%R11,%R9,8),%XMM21,%XMM23 |
(1798) 0x4710ef VMOVSD %XMM23,(%R11,%R9,8) |
(1798) 0x4710f6 MOV 0x98(%RSP),%R11 |
(1798) 0x4710fe CMP %R12,%RDI |
(1798) 0x471101 JNE 4710a0 |
(1798) 0x471103 MOV 0x40(%RSP),%RDI |
(1798) 0x471108 VMOVSD (%RDI,%RAX,8),%XMM23 |
(1798) 0x47110f VMULSD %XMM22,%XMM23,%XMM24 |
(1798) 0x471115 VMULSD %XMM21,%XMM23,%XMM23 |
(1798) 0x47111b VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1798) 0x471122 VMOVAPD %XMM6,%XMM24 |
(1798) 0x471128 VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1798) 0x47112e VADDSD %XMM17,%XMM24,%XMM17 |
(1798) 0x471134 JMP 4710a0 |
0x471139 NOPL (%RAX) |
(1797) 0x471140 MOV 0x68(%RSP),%RDX |
(1797) 0x471145 ADD $0x8,%RAX |
(1797) 0x471149 CMP %RAX,%RDX |
(1797) 0x47114c JE 471044 |
(1797) 0x471152 MOV 0xc8(%RSP),%RDX |
(1797) 0x47115a MOV (%RDX,%RAX,8),%RDX |
(1797) 0x47115e MOV (%RBX,%RDX,8),%RSI |
(1797) 0x471162 CMP %R10,%RSI |
(1797) 0x471165 JL 471197 |
(1797) 0x471167 MOV 0x40(%RSP),%RDI |
(1797) 0x47116c VMOVSD (%RDI,%RAX,8),%XMM23 |
(1797) 0x471173 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x471179 VUCOMISD %XMM5,%XMM24 |
(1797) 0x47117f JAE 471197 |
(1797) 0x471181 MOV 0x38(%RSP),%RDI |
(1797) 0x471186 MOV (%RDI),%RDI |
(1797) 0x471189 VFMADD213SD (%RDI,%RSI,8),%XMM21,%XMM23 |
(1797) 0x471190 VMOVSD %XMM23,(%RDI,%RSI,8) |
(1797) 0x471197 CMP %R12,%RDX |
(1797) 0x47119a JNE 4711cd |
(1797) 0x47119c MOV 0x40(%RSP),%RDX |
(1797) 0x4711a1 VMOVSD (%RDX,%RAX,8),%XMM23 |
(1797) 0x4711a8 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x4711ae VMULSD %XMM21,%XMM23,%XMM23 |
(1797) 0x4711b4 VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1797) 0x4711bb VMOVAPD %XMM6,%XMM24 |
(1797) 0x4711c1 VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1797) 0x4711c7 VADDSD %XMM17,%XMM24,%XMM17 |
(1797) 0x4711cd MOV 0xc8(%RSP),%RDX |
(1797) 0x4711d5 MOV 0x8(%RDX,%RAX,8),%RDX |
(1797) 0x4711da MOV (%RBX,%RDX,8),%RSI |
(1797) 0x4711de CMP %R10,%RSI |
(1797) 0x4711e1 JL 471214 |
(1797) 0x4711e3 MOV 0x40(%RSP),%RDI |
(1797) 0x4711e8 VMOVSD 0x8(%RDI,%RAX,8),%XMM23 |
(1797) 0x4711f0 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x4711f6 VUCOMISD %XMM5,%XMM24 |
(1797) 0x4711fc JAE 471214 |
(1797) 0x4711fe MOV 0x38(%RSP),%RDI |
(1797) 0x471203 MOV (%RDI),%RDI |
(1797) 0x471206 VFMADD213SD (%RDI,%RSI,8),%XMM21,%XMM23 |
(1797) 0x47120d VMOVSD %XMM23,(%RDI,%RSI,8) |
(1797) 0x471214 CMP %R12,%RDX |
(1797) 0x471217 JNE 47124b |
(1797) 0x471219 MOV 0x40(%RSP),%RDX |
(1797) 0x47121e VMOVSD 0x8(%RDX,%RAX,8),%XMM23 |
(1797) 0x471226 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x47122c VMULSD %XMM21,%XMM23,%XMM23 |
(1797) 0x471232 VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1797) 0x471239 VMOVAPD %XMM6,%XMM24 |
(1797) 0x47123f VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1797) 0x471245 VADDSD %XMM17,%XMM24,%XMM17 |
(1797) 0x47124b MOV 0xc8(%RSP),%RDX |
(1797) 0x471253 MOV 0x10(%RDX,%RAX,8),%RDX |
(1797) 0x471258 MOV (%RBX,%RDX,8),%RSI |
(1797) 0x47125c CMP %R10,%RSI |
(1797) 0x47125f JL 471292 |
(1797) 0x471261 MOV 0x40(%RSP),%RDI |
(1797) 0x471266 VMOVSD 0x10(%RDI,%RAX,8),%XMM23 |
(1797) 0x47126e VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x471274 VUCOMISD %XMM5,%XMM24 |
(1797) 0x47127a JAE 471292 |
(1797) 0x47127c MOV 0x38(%RSP),%RDI |
(1797) 0x471281 MOV (%RDI),%RDI |
(1797) 0x471284 VFMADD213SD (%RDI,%RSI,8),%XMM21,%XMM23 |
(1797) 0x47128b VMOVSD %XMM23,(%RDI,%RSI,8) |
(1797) 0x471292 CMP %R12,%RDX |
(1797) 0x471295 JNE 4712c9 |
(1797) 0x471297 MOV 0x40(%RSP),%RDX |
(1797) 0x47129c VMOVSD 0x10(%RDX,%RAX,8),%XMM23 |
(1797) 0x4712a4 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x4712aa VMULSD %XMM21,%XMM23,%XMM23 |
(1797) 0x4712b0 VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1797) 0x4712b7 VMOVAPD %XMM6,%XMM24 |
(1797) 0x4712bd VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1797) 0x4712c3 VADDSD %XMM17,%XMM24,%XMM17 |
(1797) 0x4712c9 MOV 0xc8(%RSP),%RDX |
(1797) 0x4712d1 MOV 0x18(%RDX,%RAX,8),%RDX |
(1797) 0x4712d6 MOV (%RBX,%RDX,8),%RSI |
(1797) 0x4712da CMP %R10,%RSI |
(1797) 0x4712dd JL 471310 |
(1797) 0x4712df MOV 0x40(%RSP),%RDI |
(1797) 0x4712e4 VMOVSD 0x18(%RDI,%RAX,8),%XMM23 |
(1797) 0x4712ec VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x4712f2 VUCOMISD %XMM5,%XMM24 |
(1797) 0x4712f8 JAE 471310 |
(1797) 0x4712fa MOV 0x38(%RSP),%RDI |
(1797) 0x4712ff MOV (%RDI),%RDI |
(1797) 0x471302 VFMADD213SD (%RDI,%RSI,8),%XMM21,%XMM23 |
(1797) 0x471309 VMOVSD %XMM23,(%RDI,%RSI,8) |
(1797) 0x471310 CMP %R12,%RDX |
(1797) 0x471313 JNE 471347 |
(1797) 0x471315 MOV 0x40(%RSP),%RDX |
(1797) 0x47131a VMOVSD 0x18(%RDX,%RAX,8),%XMM23 |
(1797) 0x471322 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x471328 VMULSD %XMM21,%XMM23,%XMM23 |
(1797) 0x47132e VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1797) 0x471335 VMOVAPD %XMM6,%XMM24 |
(1797) 0x47133b VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1797) 0x471341 VADDSD %XMM17,%XMM24,%XMM17 |
(1797) 0x471347 MOV 0xc8(%RSP),%RDX |
(1797) 0x47134f MOV 0x20(%RDX,%RAX,8),%RDX |
(1797) 0x471354 MOV (%RBX,%RDX,8),%RSI |
(1797) 0x471358 CMP %R10,%RSI |
(1797) 0x47135b JL 47138e |
(1797) 0x47135d MOV 0x40(%RSP),%RDI |
(1797) 0x471362 VMOVSD 0x20(%RDI,%RAX,8),%XMM23 |
(1797) 0x47136a VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x471370 VUCOMISD %XMM5,%XMM24 |
(1797) 0x471376 JAE 47138e |
(1797) 0x471378 MOV 0x38(%RSP),%RDI |
(1797) 0x47137d MOV (%RDI),%RDI |
(1797) 0x471380 VFMADD213SD (%RDI,%RSI,8),%XMM21,%XMM23 |
(1797) 0x471387 VMOVSD %XMM23,(%RDI,%RSI,8) |
(1797) 0x47138e CMP %R12,%RDX |
(1797) 0x471391 JNE 4713c5 |
(1797) 0x471393 MOV 0x40(%RSP),%RDX |
(1797) 0x471398 VMOVSD 0x20(%RDX,%RAX,8),%XMM23 |
(1797) 0x4713a0 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x4713a6 VMULSD %XMM21,%XMM23,%XMM23 |
(1797) 0x4713ac VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1797) 0x4713b3 VMOVAPD %XMM6,%XMM24 |
(1797) 0x4713b9 VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1797) 0x4713bf VADDSD %XMM17,%XMM24,%XMM17 |
(1797) 0x4713c5 MOV 0xc8(%RSP),%RDX |
(1797) 0x4713cd MOV 0x28(%RDX,%RAX,8),%RDX |
(1797) 0x4713d2 MOV (%RBX,%RDX,8),%RSI |
(1797) 0x4713d6 CMP %R10,%RSI |
(1797) 0x4713d9 JL 47140c |
(1797) 0x4713db MOV 0x40(%RSP),%RDI |
(1797) 0x4713e0 VMOVSD 0x28(%RDI,%RAX,8),%XMM23 |
(1797) 0x4713e8 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x4713ee VUCOMISD %XMM5,%XMM24 |
(1797) 0x4713f4 JAE 47140c |
(1797) 0x4713f6 MOV 0x38(%RSP),%RDI |
(1797) 0x4713fb MOV (%RDI),%RDI |
(1797) 0x4713fe VFMADD213SD (%RDI,%RSI,8),%XMM21,%XMM23 |
(1797) 0x471405 VMOVSD %XMM23,(%RDI,%RSI,8) |
(1797) 0x47140c CMP %R12,%RDX |
(1797) 0x47140f JNE 471443 |
(1797) 0x471411 MOV 0x40(%RSP),%RDX |
(1797) 0x471416 VMOVSD 0x28(%RDX,%RAX,8),%XMM23 |
(1797) 0x47141e VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x471424 VMULSD %XMM21,%XMM23,%XMM23 |
(1797) 0x47142a VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1797) 0x471431 VMOVAPD %XMM6,%XMM24 |
(1797) 0x471437 VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1797) 0x47143d VADDSD %XMM17,%XMM24,%XMM17 |
(1797) 0x471443 MOV 0xc8(%RSP),%RDX |
(1797) 0x47144b MOV 0x30(%RDX,%RAX,8),%RDX |
(1797) 0x471450 MOV (%RBX,%RDX,8),%RSI |
(1797) 0x471454 CMP %R10,%RSI |
(1797) 0x471457 JL 47148a |
(1797) 0x471459 MOV 0x40(%RSP),%RDI |
(1797) 0x47145e VMOVSD 0x30(%RDI,%RAX,8),%XMM23 |
(1797) 0x471466 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x47146c VUCOMISD %XMM5,%XMM24 |
(1797) 0x471472 JAE 47148a |
(1797) 0x471474 MOV 0x38(%RSP),%RDI |
(1797) 0x471479 MOV (%RDI),%RDI |
(1797) 0x47147c VFMADD213SD (%RDI,%RSI,8),%XMM21,%XMM23 |
(1797) 0x471483 VMOVSD %XMM23,(%RDI,%RSI,8) |
(1797) 0x47148a CMP %R12,%RDX |
(1797) 0x47148d JNE 4714c1 |
(1797) 0x47148f MOV 0x40(%RSP),%RDX |
(1797) 0x471494 VMOVSD 0x30(%RDX,%RAX,8),%XMM23 |
(1797) 0x47149c VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x4714a2 VMULSD %XMM21,%XMM23,%XMM23 |
(1797) 0x4714a8 VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1797) 0x4714af VMOVAPD %XMM6,%XMM24 |
(1797) 0x4714b5 VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1797) 0x4714bb VADDSD %XMM17,%XMM24,%XMM17 |
(1797) 0x4714c1 MOV 0xc8(%RSP),%RDX |
(1797) 0x4714c9 MOV 0x38(%RDX,%RAX,8),%RDX |
(1797) 0x4714ce MOV (%RBX,%RDX,8),%RSI |
(1797) 0x4714d2 CMP %R10,%RSI |
(1797) 0x4714d5 JL 471508 |
(1797) 0x4714d7 MOV 0x40(%RSP),%RDI |
(1797) 0x4714dc VMOVSD 0x38(%RDI,%RAX,8),%XMM23 |
(1797) 0x4714e4 VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x4714ea VUCOMISD %XMM5,%XMM24 |
(1797) 0x4714f0 JAE 471508 |
(1797) 0x4714f2 MOV 0x38(%RSP),%RDI |
(1797) 0x4714f7 MOV (%RDI),%RDI |
(1797) 0x4714fa VFMADD213SD (%RDI,%RSI,8),%XMM21,%XMM23 |
(1797) 0x471501 VMOVSD %XMM23,(%RDI,%RSI,8) |
(1797) 0x471508 CMP %R12,%RDX |
(1797) 0x47150b JNE 471140 |
(1797) 0x471511 MOV 0x40(%RSP),%RDX |
(1797) 0x471516 VMOVSD 0x38(%RDX,%RAX,8),%XMM23 |
(1797) 0x47151e VMULSD %XMM22,%XMM23,%XMM24 |
(1797) 0x471524 VMULSD %XMM21,%XMM23,%XMM23 |
(1797) 0x47152a VCMPSD $0x1,%XMM5,%XMM24,%K1 |
(1797) 0x471531 VMOVAPD %XMM6,%XMM24 |
(1797) 0x471537 VMOVSD %XMM23,%XMM24,%XMM24{%K1} |
(1797) 0x47153d VADDSD %XMM17,%XMM24,%XMM17 |
(1797) 0x471543 JMP 471140 |
0x471548 NOPL (%RAX,%RAX,1) |
(1795) 0x471550 INC %RAX |
(1795) 0x471553 CMP %RAX,%RCX |
(1795) 0x471556 JE 470bc2 |
(1795) 0x47155c MOV 0x108(%RSP),%RDX |
(1795) 0x471564 MOV 0x20(%RSP),%RSI |
(1795) 0x471569 MOV (%RDX,%RAX,8),%RDX |
(1795) 0x47156d MOV (%RSI,%RDX,8),%RDX |
(1795) 0x471571 CMP %R8,%RDX |
(1795) 0x471574 JL 471550 |
(1795) 0x471576 MOV 0xd8(%RSP),%RSI |
(1795) 0x47157e VMOVSD (%RSI,%RAX,8),%XMM23 |
(1795) 0x471585 VMULSD %XMM22,%XMM23,%XMM24 |
(1795) 0x47158b VUCOMISD %XMM5,%XMM24 |
(1795) 0x471591 JAE 471550 |
(1795) 0x471593 MOV 0x58(%RSP),%RSI |
(1795) 0x471598 MOV (%RSI),%RSI |
(1795) 0x47159b VFMADD213SD (%RSI,%RDX,8),%XMM21,%XMM23 |
(1795) 0x4715a2 VMOVSD %XMM23,(%RSI,%RDX,8) |
(1795) 0x4715a9 JMP 471550 |
(1794) 0x4715ab MOV %R15,%R13 |
(1794) 0x4715ae MOV 0xe0(%RSP),%RSI |
(1794) 0x4715b6 MOV 0x30(%RSP),%R15 |
(1794) 0x4715bb VPBROADCASTQ %RDX,%ZMM23 |
(1794) 0x4715c1 VBROADCASTSD %XMM22,%ZMM22 |
(1794) 0x4715c7 XOR %EDX,%EDX |
(1794) 0x4715c9 JMP 471601 |
(1794) 0x4715cb VPBROADCASTQ %RDX,%ZMM23 |
(1794) 0x4715d1 MOV %RSI,%RDX |
(1794) 0x4715d4 MOV 0x98(%RSP),%R11 |
(1794) 0x4715dc MOV 0x30(%RSP),%R15 |
(1794) 0x4715e1 MOV 0xf0(%RSP),%R13 |
(1794) 0x4715e9 MOV 0xd0(%RSP),%R9 |
(1794) 0x4715f1 MOV 0xf8(%RSP),%RDI |
(1794) 0x4715f9 MOV 0xe0(%RSP),%RSI |
(1794) 0x471601 ADD %RDX,%RSI |
(1794) 0x471604 VPBROADCASTQ %RDX,%ZMM24 |
(1794) 0x47160a MOV %RSI,%RDX |
(1794) 0x47160d MOV 0x108(%RSP),%RSI |
(1794) 0x471615 VPSUBQ %ZMM24,%ZMM23,%ZMM23 |
(1794) 0x47161b VPXORD %XMM24,%XMM24,%XMM24 |
(1794) 0x471621 VPCMPNLEUQ %ZMM3,%ZMM23,%K1 |
(1794) 0x471628 KMOVQ %K1,%K2 |
(1794) 0x47162d VMOVDQU64 (%RSI,%RDX,8),%ZMM23{%K1}{z} |
(1794) 0x471634 MOV 0xd8(%RSP),%RSI |
(1794) 0x47163c VMOVDQA64 %ZMM23,%ZMM15{%K1} |
(1794) 0x471642 VPSLLQ $0x3,%ZMM15,%ZMM23 |
(1794) 0x471649 VPADDQ %ZMM23,%ZMM1,%ZMM23 |
(1794) 0x47164f VPGATHERQQ (,%ZMM23,1),%ZMM24{%K2} |
(1794) 0x47165a VMOVDQA64 %ZMM24,%ZMM14{%K1} |
(1794) 0x471660 VPCMPNLTQ %ZMM20,%ZMM14,%K1{%K1} |
(1794) 0x471667 VMOVUPD (%RSI,%RDX,8),%ZMM23{%K1}{z} |
(1794) 0x47166e VMOVAPD %ZMM23,%ZMM11{%K1} |
(1794) 0x471674 VMULPD %ZMM22,%ZMM11,%ZMM22 |
(1794) 0x47167a VCMPPD $0x1,%ZMM4,%ZMM22,%K2 |
(1794) 0x471681 VBLENDMPD %ZMM11,%ZMM2,%ZMM22{%K2} |
(1794) 0x471687 VMOVAPD %ZMM22,%ZMM22{%K1}{z} |
(1794) 0x47168d VEXTRACTF64X4 $0x1,%ZMM22,%YMM23 |
(1794) 0x471694 VADDPD %ZMM23,%ZMM22,%ZMM22 |
(1794) 0x47169a VEXTRACTF32X4 $0x1,%YMM22,%XMM23 |
(1794) 0x4716a1 VADDPD %XMM23,%XMM22,%XMM22 |
(1794) 0x4716a7 VPERMILPD $0x1,%XMM22,%XMM23 |
(1794) 0x4716ae VADDSD %XMM23,%XMM22,%XMM22 |
(1794) 0x4716b4 VADDSD %XMM22,%XMM21,%XMM21 |
(1794) 0x4716ba MOV 0x40(%RSP),%RDX |
(1794) 0x4716bf VUCOMISD %XMM5,%XMM21 |
(1794) 0x4716c5 VMOVSD (%RDX,%R14,8),%XMM22 |
(1794) 0x4716cc JNE 471001 |
(1794) 0x4716d2 VADDSD %XMM17,%XMM22,%XMM17 |
(1794) 0x4716d8 JMP 470bc2 |
(1794) 0x4716dd LEA 0x18(,%RAX,8),%RDI |
(1794) 0x4716e5 MOV %RSI,%RDX |
(1794) 0x4716e8 SHR $0x2,%RDX |
(1794) 0x4716ec JMP 4716fd |
0x4716ee XCHG %AX,%AX |
(1796) 0x4716f0 ADD $0x20,%RDI |
(1796) 0x4716f4 DEC %RDX |
(1796) 0x4716f7 JE 471080 |
(1796) 0x4716fd MOV 0x108(%RSP),%R9 |
(1796) 0x471705 MOV 0x20(%RSP),%R13 |
(1796) 0x47170a MOV -0x18(%R9,%RDI,1),%R9 |
(1796) 0x47170f MOV (%R13,%R9,8),%R9 |
(1796) 0x471714 CMP %R8,%R9 |
(1796) 0x471717 JL 471755 |
(1796) 0x471719 MOV 0xd8(%RSP),%R13 |
(1796) 0x471721 VMOVSD -0x18(%R13,%RDI,1),%XMM23 |
(1796) 0x471729 VMULSD %XMM22,%XMM23,%XMM24 |
(1796) 0x47172f VUCOMISD %XMM5,%XMM24 |
(1796) 0x471735 JAE 471755 |
(1796) 0x471737 MOV 0x58(%RSP),%R11 |
(1796) 0x47173c MOV (%R11),%R11 |
(1796) 0x47173f VFMADD213SD (%R11,%R9,8),%XMM21,%XMM23 |
(1796) 0x471746 VMOVSD %XMM23,(%R11,%R9,8) |
(1796) 0x47174d MOV 0x98(%RSP),%R11 |
(1796) 0x471755 MOV 0x108(%RSP),%R9 |
(1796) 0x47175d MOV 0x20(%RSP),%R13 |
(1796) 0x471762 MOV -0x10(%R9,%RDI,1),%R9 |
(1796) 0x471767 MOV (%R13,%R9,8),%R9 |
(1796) 0x47176c CMP %R8,%R9 |
(1796) 0x47176f JL 4717ad |
(1796) 0x471771 MOV 0xd8(%RSP),%R13 |
(1796) 0x471779 VMOVSD -0x10(%R13,%RDI,1),%XMM23 |
(1796) 0x471781 VMULSD %XMM22,%XMM23,%XMM24 |
(1796) 0x471787 VUCOMISD %XMM5,%XMM24 |
(1796) 0x47178d JAE 4717ad |
(1796) 0x47178f MOV 0x58(%RSP),%R11 |
(1796) 0x471794 MOV (%R11),%R11 |
(1796) 0x471797 VFMADD213SD (%R11,%R9,8),%XMM21,%XMM23 |
(1796) 0x47179e VMOVSD %XMM23,(%R11,%R9,8) |
(1796) 0x4717a5 MOV 0x98(%RSP),%R11 |
(1796) 0x4717ad MOV 0x108(%RSP),%R9 |
(1796) 0x4717b5 MOV 0x20(%RSP),%R13 |
(1796) 0x4717ba MOV -0x8(%R9,%RDI,1),%R9 |
(1796) 0x4717bf MOV (%R13,%R9,8),%R9 |
(1796) 0x4717c4 CMP %R8,%R9 |
(1796) 0x4717c7 JL 471805 |
(1796) 0x4717c9 MOV 0xd8(%RSP),%R13 |
(1796) 0x4717d1 VMOVSD -0x8(%R13,%RDI,1),%XMM23 |
(1796) 0x4717d9 VMULSD %XMM22,%XMM23,%XMM24 |
(1796) 0x4717df VUCOMISD %XMM5,%XMM24 |
(1796) 0x4717e5 JAE 471805 |
(1796) 0x4717e7 MOV 0x58(%RSP),%R11 |
(1796) 0x4717ec MOV (%R11),%R11 |
(1796) 0x4717ef VFMADD213SD (%R11,%R9,8),%XMM21,%XMM23 |
(1796) 0x4717f6 VMOVSD %XMM23,(%R11,%R9,8) |
(1796) 0x4717fd MOV 0x98(%RSP),%R11 |
(1796) 0x471805 MOV 0x108(%RSP),%R9 |
(1796) 0x47180d MOV 0x20(%RSP),%R13 |
(1796) 0x471812 MOV (%R9,%RDI,1),%R9 |
(1796) 0x471816 MOV (%R13,%R9,8),%R9 |
(1796) 0x47181b CMP %R8,%R9 |
(1796) 0x47181e JL 4716f0 |
(1796) 0x471824 MOV 0xd8(%RSP),%R13 |
(1796) 0x47182c VMOVSD (%R13,%RDI,1),%XMM23 |
(1796) 0x471834 VMULSD %XMM22,%XMM23,%XMM24 |
(1796) 0x47183a VUCOMISD %XMM5,%XMM24 |
(1796) 0x471840 JAE 4716f0 |
(1796) 0x471846 MOV 0x58(%RSP),%R11 |
(1796) 0x47184b MOV (%R11),%R11 |
(1796) 0x47184e VFMADD213SD (%R11,%R9,8),%XMM21,%XMM23 |
(1796) 0x471855 VMOVSD %XMM23,(%R11,%R9,8) |
(1796) 0x47185c MOV 0x98(%RSP),%R11 |
(1796) 0x471864 JMP 4716f0 |
(1794) 0x471869 MOV 0xf0(%RSP),%R13 |
(1794) 0x471871 JMP 470bc2 |
(1786) 0x471876 MOV 0x90(%RSP),%RAX |
(1786) 0x47187e CMPQ $0x2,(%RAX) |
(1786) 0x471882 JL 47189e |
(1786) 0x471884 MOV 0x178(%RSP),%RCX |
(1786) 0x47188c MOV (%RCX,%R12,8),%RAX |
(1786) 0x471890 MOV 0x8(%RCX,%R12,8),%R13 |
(1786) 0x471895 CMP %R13,%RAX |
(1786) 0x471898 JL 4719e1 |
(1786) 0x47189e VUCOMISD %XMM5,%XMM17 |
(1786) 0x4718a4 JE 4722c1 |
(1786) 0x4718aa MOV 0x180(%RSP),%RDX |
(1786) 0x4718b2 SUB %R10,%RDX |
(1786) 0x4718b5 JLE 471916 |
(1786) 0x4718b7 VDIVSD %XMM17,%XMM7,%XMM18 |
(1786) 0x4718bd MOV 0x38(%RSP),%RAX |
(1786) 0x4718c2 VPBROADCASTQ %RDX,%ZMM19 |
(1786) 0x4718c8 MOV %RDX,%RCX |
(1786) 0x4718cb AND $-0x8,%RCX |
(1786) 0x4718cf MOV (%RAX),%RAX |
(1786) 0x4718d2 JE 472272 |
(1786) 0x4718d8 VBROADCASTSD %XMM18,%ZMM18 |
(1786) 0x4718de LEA (%RAX,%R10,8),%RSI |
(1786) 0x4718e2 MOV %RDX,%R9 |
(1786) 0x4718e5 LEA -0x1(%RCX),%RDX |
(1786) 0x4718e9 XOR %EDI,%EDI |
(1786) 0x4718eb NOPL (%RAX,%RAX,1) |
(1788) 0x4718f0 VXORPD (%RSI,%RDI,8),%ZMM8,%ZMM20 |
(1788) 0x4718f7 VMULPD %ZMM20,%ZMM18,%ZMM20 |
(1788) 0x4718fd VMOVUPD %ZMM20,(%RSI,%RDI,8) |
(1788) 0x471904 ADD $0x8,%RDI |
(1788) 0x471908 CMP %RDX,%RDI |
(1788) 0x47190b JBE 4718f0 |
(1786) 0x47190d CMP %RCX,%R9 |
(1786) 0x471910 JNE 47227a |
(1786) 0x471916 MOV 0x140(%RSP),%RDX |
(1786) 0x47191e SUB %R8,%RDX |
(1786) 0x471921 JLE 4722c1 |
(1786) 0x471927 VDIVSD %XMM17,%XMM7,%XMM17 |
(1786) 0x47192d MOV 0x58(%RSP),%RAX |
(1786) 0x471932 VPBROADCASTQ %RDX,%ZMM18 |
(1786) 0x471938 MOV %RDX,%RCX |
(1786) 0x47193b AND $-0x8,%RCX |
(1786) 0x47193f MOV (%RAX),%RAX |
(1786) 0x471942 JE 4722dd |
(1786) 0x471948 VBROADCASTSD %XMM17,%ZMM17 |
(1786) 0x47194e LEA (%RAX,%R8,8),%RSI |
(1786) 0x471952 MOV %RDX,%R9 |
(1786) 0x471955 LEA -0x1(%RCX),%RDX |
(1786) 0x471959 XOR %EDI,%EDI |
(1786) 0x47195b NOPL (%RAX,%RAX,1) |
(1787) 0x471960 VXORPD (%RSI,%RDI,8),%ZMM8,%ZMM19 |
(1787) 0x471967 VMULPD %ZMM19,%ZMM17,%ZMM19 |
(1787) 0x47196d VMOVUPD %ZMM19,(%RSI,%RDI,8) |
(1787) 0x471974 ADD $0x8,%RDI |
(1787) 0x471978 CMP %RDX,%RDI |
(1787) 0x47197b JBE 471960 |
(1786) 0x47197d MOV 0x28(%RSP),%RDX |
(1786) 0x471982 MOV 0xb8(%RSP),%RSI |
(1786) 0x47198a CMP %RCX,%R9 |
(1786) 0x47198d JNE 4722f2 |
(1786) 0x471993 MOV $0x3ff0000000000000,%RDI |
(1786) 0x47199d JMP 470704 |
0x4719a2 NOPW %CS:(%RAX,%RAX,1) |
(1789) 0x4719b0 MOV 0x58(%RSP),%RCX |
(1789) 0x4719b5 MOV 0xd8(%RSP),%RSI |
(1789) 0x4719bd MOV (%RCX),%RCX |
(1789) 0x4719c0 VMOVSD (%RCX,%RDX,8),%XMM18 |
(1789) 0x4719c7 VADDSD (%RSI,%RAX,8),%XMM18,%XMM18 |
(1789) 0x4719ce VMOVSD %XMM18,(%RCX,%RDX,8) |
(1789) 0x4719d5 INC %RAX |
(1789) 0x4719d8 CMP %R13,%RAX |
(1789) 0x4719db JE 47189e |
(1789) 0x4719e1 MOV 0x108(%RSP),%RCX |
(1789) 0x4719e9 MOV 0x20(%RSP),%RDX |
(1789) 0x4719ee MOV (%RCX,%RAX,8),%RCX |
(1789) 0x4719f2 MOV (%RDX,%RCX,8),%RDX |
(1789) 0x4719f6 CMP %R8,%RDX |
(1789) 0x4719f9 JGE 4719b0 |
(1789) 0x4719fb CMP 0x70(%RSP),%RDX |
(1789) 0x471a00 JNE 471ac0 |
(1789) 0x471a06 MOV 0x240(%RSP),%RDX |
(1789) 0x471a0e MOV (%RDX,%RCX,8),%RSI |
(1789) 0x471a12 MOV 0x8(%RDX,%RCX,8),%RDI |
(1789) 0x471a17 MOV %RDI,%RDX |
(1789) 0x471a1a SUB %RSI,%RDX |
(1789) 0x471a1d JLE 471b16 |
(1789) 0x471a23 MOV %RSI,%RCX |
(1789) 0x471a26 NOT %RCX |
(1789) 0x471a29 MOV %RDX,%R14 |
(1789) 0x471a2c VPXORD %XMM18,%XMM18,%XMM18 |
(1789) 0x471a32 ADD %RDI,%RCX |
(1789) 0x471a35 AND $0x7,%R14 |
(1789) 0x471a39 MOV %RCX,0x68(%RSP) |
(1789) 0x471a3e MOV %RDX,0xf0(%RSP) |
(1789) 0x471a46 JE 471b2a |
(1789) 0x471a4c MOV %R14,%RDX |
(1789) 0x471a4f MOV %RSI,%RCX |
(1789) 0x471a52 JMP 471a83 |
0x471a54 NOPW %CS:(%RAX,%RAX,1) |
(1793) 0x471a60 MOV 0xa0(%RSP),%R9 |
(1793) 0x471a68 VADDSD (%R9,%RCX,8),%XMM18,%XMM18 |
(1793) 0x471a6f MOV 0x98(%RSP),%R11 |
(1793) 0x471a77 INC %RCX |
(1793) 0x471a7a DEC %RDX |
(1793) 0x471a7d JE 471b2d |
(1793) 0x471a83 MOV (%R11,%RCX,8),%R11 |
(1793) 0x471a87 MOV %R11,%R9 |
(1793) 0x471a8a SUB 0x50(%RSP),%R9 |
(1793) 0x471a8f JL 471ab0 |
(1793) 0x471a91 CMP %R15,%R11 |
(1793) 0x471a94 JGE 471ab0 |
(1793) 0x471a96 CMP %R10,(%RBX,%R9,8) |
(1793) 0x471a9a JGE 471a60 |
(1793) 0x471a9c CMP %R12,%R9 |
(1793) 0x471a9f JNE 471a6f |
(1793) 0x471aa1 JMP 471a60 |
0x471aa3 NOPW %CS:(%RAX,%RAX,1) |
(1793) 0x471ab0 MOV 0x20(%RSP),%R9 |
(1793) 0x471ab5 NOT %R11 |
(1793) 0x471ab8 CMP %R8,(%R9,%R11,8) |
(1793) 0x471abc JL 471a6f |
(1793) 0x471abe JMP 471a60 |
(1789) 0x471ac0 MOV 0xe8(%RSP),%RDX |
(1789) 0x471ac8 MOV (%RDX),%RDX |
(1789) 0x471acb CMPQ $-0x3,(%RDX,%RCX,8) |
(1789) 0x471ad0 JE 4719d5 |
(1789) 0x471ad6 CMPQ $0x1,0x208(%RSP) |
(1789) 0x471adf JE 471b02 |
(1789) 0x471ae1 MOV 0x238(%RSP),%RSI |
(1789) 0x471ae9 MOV 0x200(%RSP),%RDX |
(1789) 0x471af1 MOV (%RSI),%RSI |
(1789) 0x471af4 MOV (%RDX,%R12,8),%RDX |
(1789) 0x471af8 CMP (%RSI,%RCX,8),%RDX |
(1789) 0x471afc JNE 4719d5 |
(1789) 0x471b02 MOV 0xd8(%RSP),%RCX |
(1789) 0x471b0a VADDSD (%RCX,%RAX,8),%XMM17,%XMM17 |
(1789) 0x471b11 JMP 4719d5 |
(1789) 0x471b16 MOV 0xd8(%RSP),%RCX |
(1789) 0x471b1e VMOVSD (%RCX,%RAX,8),%XMM19 |
(1789) 0x471b25 JMP 472267 |
(1789) 0x471b2a MOV %RSI,%RCX |
(1789) 0x471b2d CMPQ $0x7,0x68(%RSP) |
(1789) 0x471b33 JAE 47205d |
(1789) 0x471b39 MOV 0xd8(%RSP),%RCX |
(1789) 0x471b41 VUCOMISD %XMM5,%XMM18 |
(1789) 0x471b47 VMOVSD (%RCX,%RAX,8),%XMM19 |
(1789) 0x471b4e MOV 0xf0(%RSP),%RCX |
(1789) 0x471b56 JE 472267 |
(1789) 0x471b5c VDIVSD %XMM18,%XMM19,%XMM18 |
(1789) 0x471b62 TEST $0x7,%CL |
(1789) 0x471b65 JNE 471b88 |
(1789) 0x471b67 CMPQ $0x7,0x68(%RSP) |
(1789) 0x471b6d MOV 0x160(%RSP),%R14 |
(1789) 0x471b75 JAE 471c2d |
(1789) 0x471b7b JMP 4719d5 |
(1791) 0x471b80 INC %RSI |
(1791) 0x471b83 DEC %R14 |
(1791) 0x471b86 JE 471b67 |
(1791) 0x471b88 MOV (%R11,%RSI,8),%RDX |
(1791) 0x471b8c MOV %RDX,%RCX |
(1791) 0x471b8f SUB 0x50(%RSP),%RCX |
(1791) 0x471b94 JL 471be0 |
(1791) 0x471b96 CMP %R15,%RDX |
(1791) 0x471b99 JGE 471be0 |
(1791) 0x471b9b MOV (%RBX,%RCX,8),%RDX |
(1791) 0x471b9f CMP %R10,%RDX |
(1791) 0x471ba2 JL 471bc9 |
(1791) 0x471ba4 MOV 0xa0(%RSP),%R9 |
(1791) 0x471bac VMOVSD (%R9,%RSI,8),%XMM19 |
(1791) 0x471bb3 MOV 0x38(%RSP),%R9 |
(1791) 0x471bb8 MOV (%R9),%R9 |
(1791) 0x471bbb VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1791) 0x471bc2 VMOVSD %XMM19,(%R9,%RDX,8) |
(1791) 0x471bc9 CMP %R12,%RCX |
(1791) 0x471bcc JNE 471b80 |
(1791) 0x471bce MOV 0xa0(%RSP),%RCX |
(1791) 0x471bd6 VFMADD231SD (%RCX,%RSI,8),%XMM18,%XMM17 |
(1791) 0x471bdd JMP 471b80 |
0x471bdf NOP |
(1791) 0x471be0 MOV 0x20(%RSP),%RCX |
(1791) 0x471be5 NOT %RDX |
(1791) 0x471be8 MOV (%RCX,%RDX,8),%RCX |
(1791) 0x471bec CMP %R8,%RCX |
(1791) 0x471bef JL 471b80 |
(1791) 0x471bf1 MOV 0xa0(%RSP),%RDX |
(1791) 0x471bf9 MOV 0x58(%RSP),%R9 |
(1791) 0x471bfe VMOVSD (%RDX,%RSI,8),%XMM19 |
(1791) 0x471c05 MOV (%R9),%RDX |
(1791) 0x471c08 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1791) 0x471c0f VMOVSD %XMM19,(%RDX,%RCX,8) |
(1791) 0x471c16 JMP 471b80 |
0x471c1b NOPL (%RAX,%RAX,1) |
(1790) 0x471c20 ADD $0x8,%RSI |
(1790) 0x471c24 CMP %RSI,%RDI |
(1790) 0x471c27 JE 4719d5 |
(1790) 0x471c2d MOV (%R11,%RSI,8),%RDX |
(1790) 0x471c31 MOV %RDX,%RCX |
(1790) 0x471c34 SUB 0x50(%RSP),%RCX |
(1790) 0x471c39 JL 471c80 |
(1790) 0x471c3b CMP %R15,%RDX |
(1790) 0x471c3e JGE 471c80 |
(1790) 0x471c40 MOV (%RBX,%RCX,8),%RDX |
(1790) 0x471c44 CMP %R10,%RDX |
(1790) 0x471c47 JL 471c67 |
(1790) 0x471c49 MOV 0x38(%RSP),%R9 |
(1790) 0x471c4e VMOVSD -0x38(%R14,%RSI,8),%XMM19 |
(1790) 0x471c56 MOV (%R9),%R9 |
(1790) 0x471c59 VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1790) 0x471c60 VMOVSD %XMM19,(%R9,%RDX,8) |
(1790) 0x471c67 CMP %R12,%RCX |
(1790) 0x471c6a JNE 471caf |
(1790) 0x471c6c VFMADD231SD -0x38(%R14,%RSI,8),%XMM18,%XMM17 |
(1790) 0x471c74 JMP 471caf |
0x471c76 NOPW %CS:(%RAX,%RAX,1) |
(1790) 0x471c80 MOV 0x20(%RSP),%RCX |
(1790) 0x471c85 NOT %RDX |
(1790) 0x471c88 MOV (%RCX,%RDX,8),%RCX |
(1790) 0x471c8c CMP %R8,%RCX |
(1790) 0x471c8f JL 471caf |
(1790) 0x471c91 MOV 0x58(%RSP),%RDX |
(1790) 0x471c96 VMOVSD -0x38(%R14,%RSI,8),%XMM19 |
(1790) 0x471c9e MOV (%RDX),%RDX |
(1790) 0x471ca1 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1790) 0x471ca8 VMOVSD %XMM19,(%RDX,%RCX,8) |
(1790) 0x471caf MOV 0x8(%R11,%RSI,8),%RDX |
(1790) 0x471cb4 MOV %RDX,%RCX |
(1790) 0x471cb7 SUB 0x50(%RSP),%RCX |
(1790) 0x471cbc JL 471d00 |
(1790) 0x471cbe CMP %R15,%RDX |
(1790) 0x471cc1 JGE 471d00 |
(1790) 0x471cc3 MOV (%RBX,%RCX,8),%RDX |
(1790) 0x471cc7 CMP %R10,%RDX |
(1790) 0x471cca JL 471cea |
(1790) 0x471ccc MOV 0x38(%RSP),%R9 |
(1790) 0x471cd1 VMOVSD -0x30(%R14,%RSI,8),%XMM19 |
(1790) 0x471cd9 MOV (%R9),%R9 |
(1790) 0x471cdc VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1790) 0x471ce3 VMOVSD %XMM19,(%R9,%RDX,8) |
(1790) 0x471cea CMP %R12,%RCX |
(1790) 0x471ced JNE 471d2f |
(1790) 0x471cef VFMADD231SD -0x30(%R14,%RSI,8),%XMM18,%XMM17 |
(1790) 0x471cf7 JMP 471d2f |
0x471cf9 NOPL (%RAX) |
(1790) 0x471d00 MOV 0x20(%RSP),%RCX |
(1790) 0x471d05 NOT %RDX |
(1790) 0x471d08 MOV (%RCX,%RDX,8),%RCX |
(1790) 0x471d0c CMP %R8,%RCX |
(1790) 0x471d0f JL 471d2f |
(1790) 0x471d11 MOV 0x58(%RSP),%RDX |
(1790) 0x471d16 VMOVSD -0x30(%R14,%RSI,8),%XMM19 |
(1790) 0x471d1e MOV (%RDX),%RDX |
(1790) 0x471d21 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1790) 0x471d28 VMOVSD %XMM19,(%RDX,%RCX,8) |
(1790) 0x471d2f MOV 0x10(%R11,%RSI,8),%RDX |
(1790) 0x471d34 MOV %RDX,%RCX |
(1790) 0x471d37 SUB 0x50(%RSP),%RCX |
(1790) 0x471d3c JL 471d80 |
(1790) 0x471d3e CMP %R15,%RDX |
(1790) 0x471d41 JGE 471d80 |
(1790) 0x471d43 MOV (%RBX,%RCX,8),%RDX |
(1790) 0x471d47 CMP %R10,%RDX |
(1790) 0x471d4a JL 471d6a |
(1790) 0x471d4c MOV 0x38(%RSP),%R9 |
(1790) 0x471d51 VMOVSD -0x28(%R14,%RSI,8),%XMM19 |
(1790) 0x471d59 MOV (%R9),%R9 |
(1790) 0x471d5c VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1790) 0x471d63 VMOVSD %XMM19,(%R9,%RDX,8) |
(1790) 0x471d6a CMP %R12,%RCX |
(1790) 0x471d6d JNE 471daf |
(1790) 0x471d6f VFMADD231SD -0x28(%R14,%RSI,8),%XMM18,%XMM17 |
(1790) 0x471d77 JMP 471daf |
0x471d79 NOPL (%RAX) |
(1790) 0x471d80 MOV 0x20(%RSP),%RCX |
(1790) 0x471d85 NOT %RDX |
(1790) 0x471d88 MOV (%RCX,%RDX,8),%RCX |
(1790) 0x471d8c CMP %R8,%RCX |
(1790) 0x471d8f JL 471daf |
(1790) 0x471d91 MOV 0x58(%RSP),%RDX |
(1790) 0x471d96 VMOVSD -0x28(%R14,%RSI,8),%XMM19 |
(1790) 0x471d9e MOV (%RDX),%RDX |
(1790) 0x471da1 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1790) 0x471da8 VMOVSD %XMM19,(%RDX,%RCX,8) |
(1790) 0x471daf MOV 0x18(%R11,%RSI,8),%RDX |
(1790) 0x471db4 MOV %RDX,%RCX |
(1790) 0x471db7 SUB 0x50(%RSP),%RCX |
(1790) 0x471dbc JL 471e00 |
(1790) 0x471dbe CMP %R15,%RDX |
(1790) 0x471dc1 JGE 471e00 |
(1790) 0x471dc3 MOV (%RBX,%RCX,8),%RDX |
(1790) 0x471dc7 CMP %R10,%RDX |
(1790) 0x471dca JL 471dea |
(1790) 0x471dcc MOV 0x38(%RSP),%R9 |
(1790) 0x471dd1 VMOVSD -0x20(%R14,%RSI,8),%XMM19 |
(1790) 0x471dd9 MOV (%R9),%R9 |
(1790) 0x471ddc VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1790) 0x471de3 VMOVSD %XMM19,(%R9,%RDX,8) |
(1790) 0x471dea CMP %R12,%RCX |
(1790) 0x471ded JNE 471e2f |
(1790) 0x471def VFMADD231SD -0x20(%R14,%RSI,8),%XMM18,%XMM17 |
(1790) 0x471df7 JMP 471e2f |
0x471df9 NOPL (%RAX) |
(1790) 0x471e00 MOV 0x20(%RSP),%RCX |
(1790) 0x471e05 NOT %RDX |
(1790) 0x471e08 MOV (%RCX,%RDX,8),%RCX |
(1790) 0x471e0c CMP %R8,%RCX |
(1790) 0x471e0f JL 471e2f |
(1790) 0x471e11 MOV 0x58(%RSP),%RDX |
(1790) 0x471e16 VMOVSD -0x20(%R14,%RSI,8),%XMM19 |
(1790) 0x471e1e MOV (%RDX),%RDX |
(1790) 0x471e21 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1790) 0x471e28 VMOVSD %XMM19,(%RDX,%RCX,8) |
(1790) 0x471e2f MOV 0x20(%R11,%RSI,8),%RDX |
(1790) 0x471e34 MOV %RDX,%RCX |
(1790) 0x471e37 SUB 0x50(%RSP),%RCX |
(1790) 0x471e3c JL 471e80 |
(1790) 0x471e3e CMP %R15,%RDX |
(1790) 0x471e41 JGE 471e80 |
(1790) 0x471e43 MOV (%RBX,%RCX,8),%RDX |
(1790) 0x471e47 CMP %R10,%RDX |
(1790) 0x471e4a JL 471e6a |
(1790) 0x471e4c MOV 0x38(%RSP),%R9 |
(1790) 0x471e51 VMOVSD -0x18(%R14,%RSI,8),%XMM19 |
(1790) 0x471e59 MOV (%R9),%R9 |
(1790) 0x471e5c VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1790) 0x471e63 VMOVSD %XMM19,(%R9,%RDX,8) |
(1790) 0x471e6a CMP %R12,%RCX |
(1790) 0x471e6d JNE 471eaf |
(1790) 0x471e6f VFMADD231SD -0x18(%R14,%RSI,8),%XMM18,%XMM17 |
(1790) 0x471e77 JMP 471eaf |
0x471e79 NOPL (%RAX) |
(1790) 0x471e80 MOV 0x20(%RSP),%RCX |
(1790) 0x471e85 NOT %RDX |
(1790) 0x471e88 MOV (%RCX,%RDX,8),%RCX |
(1790) 0x471e8c CMP %R8,%RCX |
(1790) 0x471e8f JL 471eaf |
(1790) 0x471e91 MOV 0x58(%RSP),%RDX |
(1790) 0x471e96 VMOVSD -0x18(%R14,%RSI,8),%XMM19 |
(1790) 0x471e9e MOV (%RDX),%RDX |
(1790) 0x471ea1 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1790) 0x471ea8 VMOVSD %XMM19,(%RDX,%RCX,8) |
(1790) 0x471eaf MOV 0x28(%R11,%RSI,8),%RDX |
(1790) 0x471eb4 MOV %RDX,%RCX |
(1790) 0x471eb7 SUB 0x50(%RSP),%RCX |
(1790) 0x471ebc JL 471f00 |
(1790) 0x471ebe CMP %R15,%RDX |
(1790) 0x471ec1 JGE 471f00 |
(1790) 0x471ec3 MOV (%RBX,%RCX,8),%RDX |
(1790) 0x471ec7 CMP %R10,%RDX |
(1790) 0x471eca JL 471eea |
(1790) 0x471ecc MOV 0x38(%RSP),%R9 |
(1790) 0x471ed1 VMOVSD -0x10(%R14,%RSI,8),%XMM19 |
(1790) 0x471ed9 MOV (%R9),%R9 |
(1790) 0x471edc VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1790) 0x471ee3 VMOVSD %XMM19,(%R9,%RDX,8) |
(1790) 0x471eea CMP %R12,%RCX |
(1790) 0x471eed JNE 471f2f |
(1790) 0x471eef VFMADD231SD -0x10(%R14,%RSI,8),%XMM18,%XMM17 |
(1790) 0x471ef7 JMP 471f2f |
0x471ef9 NOPL (%RAX) |
(1790) 0x471f00 MOV 0x20(%RSP),%RCX |
(1790) 0x471f05 NOT %RDX |
(1790) 0x471f08 MOV (%RCX,%RDX,8),%RCX |
(1790) 0x471f0c CMP %R8,%RCX |
(1790) 0x471f0f JL 471f2f |
(1790) 0x471f11 MOV 0x58(%RSP),%RDX |
(1790) 0x471f16 VMOVSD -0x10(%R14,%RSI,8),%XMM19 |
(1790) 0x471f1e MOV (%RDX),%RDX |
(1790) 0x471f21 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1790) 0x471f28 VMOVSD %XMM19,(%RDX,%RCX,8) |
(1790) 0x471f2f MOV 0x30(%R11,%RSI,8),%RDX |
(1790) 0x471f34 MOV %RDX,%RCX |
(1790) 0x471f37 SUB 0x50(%RSP),%RCX |
(1790) 0x471f3c JL 471f80 |
(1790) 0x471f3e CMP %R15,%RDX |
(1790) 0x471f41 JGE 471f80 |
(1790) 0x471f43 MOV (%RBX,%RCX,8),%RDX |
(1790) 0x471f47 CMP %R10,%RDX |
(1790) 0x471f4a JL 471f6a |
(1790) 0x471f4c MOV 0x38(%RSP),%R9 |
(1790) 0x471f51 VMOVSD -0x8(%R14,%RSI,8),%XMM19 |
(1790) 0x471f59 MOV (%R9),%R9 |
(1790) 0x471f5c VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1790) 0x471f63 VMOVSD %XMM19,(%R9,%RDX,8) |
(1790) 0x471f6a CMP %R12,%RCX |
(1790) 0x471f6d JNE 471faf |
(1790) 0x471f6f VFMADD231SD -0x8(%R14,%RSI,8),%XMM18,%XMM17 |
(1790) 0x471f77 JMP 471faf |
0x471f79 NOPL (%RAX) |
(1790) 0x471f80 MOV 0x20(%RSP),%RCX |
(1790) 0x471f85 NOT %RDX |
(1790) 0x471f88 MOV (%RCX,%RDX,8),%RCX |
(1790) 0x471f8c CMP %R8,%RCX |
(1790) 0x471f8f JL 471faf |
(1790) 0x471f91 MOV 0x58(%RSP),%RDX |
(1790) 0x471f96 VMOVSD -0x8(%R14,%RSI,8),%XMM19 |
(1790) 0x471f9e MOV (%RDX),%RDX |
(1790) 0x471fa1 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1790) 0x471fa8 VMOVSD %XMM19,(%RDX,%RCX,8) |
(1790) 0x471faf MOV 0x38(%R11,%RSI,8),%RDX |
(1790) 0x471fb4 MOV %RDX,%RCX |
(1790) 0x471fb7 SUB 0x50(%RSP),%RCX |
(1790) 0x471fbc JL 472000 |
(1790) 0x471fbe CMP %R15,%RDX |
(1790) 0x471fc1 JGE 472000 |
(1790) 0x471fc3 MOV (%RBX,%RCX,8),%RDX |
(1790) 0x471fc7 CMP %R10,%RDX |
(1790) 0x471fca JL 471fe9 |
(1790) 0x471fcc MOV 0x38(%RSP),%R9 |
(1790) 0x471fd1 VMOVSD (%R14,%RSI,8),%XMM19 |
(1790) 0x471fd8 MOV (%R9),%R9 |
(1790) 0x471fdb VFMADD213SD (%R9,%RDX,8),%XMM18,%XMM19 |
(1790) 0x471fe2 VMOVSD %XMM19,(%R9,%RDX,8) |
(1790) 0x471fe9 CMP %R12,%RCX |
(1790) 0x471fec JNE 471c20 |
(1790) 0x471ff2 VFMADD231SD (%R14,%RSI,8),%XMM18,%XMM17 |
(1790) 0x471ff9 JMP 471c20 |
0x471ffe XCHG %AX,%AX |
(1790) 0x472000 MOV 0x20(%RSP),%RCX |
(1790) 0x472005 NOT %RDX |
(1790) 0x472008 MOV (%RCX,%RDX,8),%RCX |
(1790) 0x47200c CMP %R8,%RCX |
(1790) 0x47200f JL 471c20 |
(1790) 0x472015 MOV 0x58(%RSP),%RDX |
(1790) 0x47201a VMOVSD (%R14,%RSI,8),%XMM19 |
(1790) 0x472021 MOV (%RDX),%RDX |
(1790) 0x472024 VFMADD213SD (%RDX,%RCX,8),%XMM18,%XMM19 |
(1790) 0x47202b VMOVSD %XMM19,(%RDX,%RCX,8) |
(1790) 0x472032 JMP 471c20 |
0x472037 NOPW (%RAX,%RAX,1) |
(1792) 0x472040 MOV 0xa0(%RSP),%RDX |
(1792) 0x472048 VADDSD 0x38(%RDX,%RCX,8),%XMM18,%XMM18 |
(1792) 0x472050 ADD $0x8,%RCX |
(1792) 0x472054 CMP %RCX,%RDI |
(1792) 0x472057 JE 471b39 |
(1792) 0x47205d MOV (%R11,%RCX,8),%R9 |
(1792) 0x472061 MOV %R9,%RDX |
(1792) 0x472064 SUB 0x50(%RSP),%RDX |
(1792) 0x472069 JL 472080 |
(1792) 0x47206b CMP %R15,%R9 |
(1792) 0x47206e JGE 472080 |
(1792) 0x472070 CMP %R10,(%RBX,%RDX,8) |
(1792) 0x472074 JGE 47208e |
(1792) 0x472076 CMP %R12,%RDX |
(1792) 0x472079 JNE 47209d |
(1792) 0x47207b JMP 47208e |
0x47207d NOPL (%RAX) |
(1792) 0x472080 MOV 0x20(%RSP),%RDX |
(1792) 0x472085 NOT %R9 |
(1792) 0x472088 CMP %R8,(%RDX,%R9,8) |
(1792) 0x47208c JL 47209d |
(1792) 0x47208e MOV 0xa0(%RSP),%RDX |
(1792) 0x472096 VADDSD (%RDX,%RCX,8),%XMM18,%XMM18 |
(1792) 0x47209d MOV 0x8(%R11,%RCX,8),%R9 |
(1792) 0x4720a2 MOV %R9,%RDX |
(1792) 0x4720a5 SUB 0x50(%RSP),%RDX |
(1792) 0x4720aa JL 4720c0 |
(1792) 0x4720ac CMP %R15,%R9 |
(1792) 0x4720af JGE 4720c0 |
(1792) 0x4720b1 CMP %R10,(%RBX,%RDX,8) |
(1792) 0x4720b5 JGE 4720ce |
(1792) 0x4720b7 CMP %R12,%RDX |
(1792) 0x4720ba JNE 4720de |
(1792) 0x4720bc JMP 4720ce |
0x4720be XCHG %AX,%AX |
(1792) 0x4720c0 MOV 0x20(%RSP),%RDX |
(1792) 0x4720c5 NOT %R9 |
(1792) 0x4720c8 CMP %R8,(%RDX,%R9,8) |
(1792) 0x4720cc JL 4720de |
(1792) 0x4720ce MOV 0xa0(%RSP),%RDX |
(1792) 0x4720d6 VADDSD 0x8(%RDX,%RCX,8),%XMM18,%XMM18 |
(1792) 0x4720de MOV 0x10(%R11,%RCX,8),%R9 |
(1792) 0x4720e3 MOV %R9,%RDX |
(1792) 0x4720e6 SUB 0x50(%RSP),%RDX |
(1792) 0x4720eb JL 472100 |
(1792) 0x4720ed CMP %R15,%R9 |
(1792) 0x4720f0 JGE 472100 |
(1792) 0x4720f2 CMP %R10,(%RBX,%RDX,8) |
(1792) 0x4720f6 JGE 47210e |
(1792) 0x4720f8 CMP %R12,%RDX |
(1792) 0x4720fb JNE 47211e |
(1792) 0x4720fd JMP 47210e |
0x4720ff NOP |
(1792) 0x472100 MOV 0x20(%RSP),%RDX |
(1792) 0x472105 NOT %R9 |
(1792) 0x472108 CMP %R8,(%RDX,%R9,8) |
(1792) 0x47210c JL 47211e |
(1792) 0x47210e MOV 0xa0(%RSP),%RDX |
(1792) 0x472116 VADDSD 0x10(%RDX,%RCX,8),%XMM18,%XMM18 |
(1792) 0x47211e MOV 0x18(%R11,%RCX,8),%R9 |
(1792) 0x472123 MOV %R9,%RDX |
(1792) 0x472126 SUB 0x50(%RSP),%RDX |
(1792) 0x47212b JL 472140 |
(1792) 0x47212d CMP %R15,%R9 |
(1792) 0x472130 JGE 472140 |
(1792) 0x472132 CMP %R10,(%RBX,%RDX,8) |
(1792) 0x472136 JGE 47214e |
(1792) 0x472138 CMP %R12,%RDX |
(1792) 0x47213b JNE 47215e |
(1792) 0x47213d JMP 47214e |
0x47213f NOP |
(1792) 0x472140 MOV 0x20(%RSP),%RDX |
(1792) 0x472145 NOT %R9 |
(1792) 0x472148 CMP %R8,(%RDX,%R9,8) |
(1792) 0x47214c JL 47215e |
(1792) 0x47214e MOV 0xa0(%RSP),%RDX |
(1792) 0x472156 VADDSD 0x18(%RDX,%RCX,8),%XMM18,%XMM18 |
(1792) 0x47215e MOV 0x20(%R11,%RCX,8),%R9 |
(1792) 0x472163 MOV %R9,%RDX |
(1792) 0x472166 SUB 0x50(%RSP),%RDX |
(1792) 0x47216b JL 472180 |
(1792) 0x47216d CMP %R15,%R9 |
(1792) 0x472170 JGE 472180 |
(1792) 0x472172 CMP %R10,(%RBX,%RDX,8) |
(1792) 0x472176 JGE 47218e |
(1792) 0x472178 CMP %R12,%RDX |
(1792) 0x47217b JNE 47219e |
(1792) 0x47217d JMP 47218e |
0x47217f NOP |
(1792) 0x472180 MOV 0x20(%RSP),%RDX |
(1792) 0x472185 NOT %R9 |
(1792) 0x472188 CMP %R8,(%RDX,%R9,8) |
(1792) 0x47218c JL 47219e |
(1792) 0x47218e MOV 0xa0(%RSP),%RDX |
(1792) 0x472196 VADDSD 0x20(%RDX,%RCX,8),%XMM18,%XMM18 |
(1792) 0x47219e MOV 0x28(%R11,%RCX,8),%R9 |
(1792) 0x4721a3 MOV %R9,%RDX |
(1792) 0x4721a6 SUB 0x50(%RSP),%RDX |
(1792) 0x4721ab JL 4721c0 |
(1792) 0x4721ad CMP %R15,%R9 |
(1792) 0x4721b0 JGE 4721c0 |
(1792) 0x4721b2 CMP %R10,(%RBX,%RDX,8) |
(1792) 0x4721b6 JGE 4721ce |
(1792) 0x4721b8 CMP %R12,%RDX |
(1792) 0x4721bb JNE 4721de |
(1792) 0x4721bd JMP 4721ce |
0x4721bf NOP |
(1792) 0x4721c0 MOV 0x20(%RSP),%RDX |
(1792) 0x4721c5 NOT %R9 |
(1792) 0x4721c8 CMP %R8,(%RDX,%R9,8) |
(1792) 0x4721cc JL 4721de |
(1792) 0x4721ce MOV 0xa0(%RSP),%RDX |
(1792) 0x4721d6 VADDSD 0x28(%RDX,%RCX,8),%XMM18,%XMM18 |
(1792) 0x4721de MOV 0x30(%R11,%RCX,8),%R9 |
(1792) 0x4721e3 MOV %R9,%RDX |
(1792) 0x4721e6 SUB 0x50(%RSP),%RDX |
(1792) 0x4721eb JL 472200 |
(1792) 0x4721ed CMP %R15,%R9 |
(1792) 0x4721f0 JGE 472200 |
(1792) 0x4721f2 CMP %R10,(%RBX,%RDX,8) |
(1792) 0x4721f6 JGE 47220e |
(1792) 0x4721f8 CMP %R12,%RDX |
(1792) 0x4721fb JNE 47221e |
(1792) 0x4721fd JMP 47220e |
0x4721ff NOP |
(1792) 0x472200 MOV 0x20(%RSP),%RDX |
(1792) 0x472205 NOT %R9 |
(1792) 0x472208 CMP %R8,(%RDX,%R9,8) |
(1792) 0x47220c JL 47221e |
(1792) 0x47220e MOV 0xa0(%RSP),%RDX |
(1792) 0x472216 VADDSD 0x30(%RDX,%RCX,8),%XMM18,%XMM18 |
(1792) 0x47221e MOV 0x38(%R11,%RCX,8),%R9 |
(1792) 0x472223 MOV %R9,%RDX |
(1792) 0x472226 SUB 0x50(%RSP),%RDX |
(1792) 0x47222b JL 472250 |
(1792) 0x47222d CMP %R15,%R9 |
(1792) 0x472230 JGE 472250 |
(1792) 0x472232 CMP %R10,(%RBX,%RDX,8) |
(1792) 0x472236 JGE 472040 |
(1792) 0x47223c CMP %R12,%RDX |
(1792) 0x47223f JNE 472050 |
(1792) 0x472245 JMP 472040 |
0x47224a NOPW (%RAX,%RAX,1) |
(1792) 0x472250 MOV 0x20(%RSP),%RDX |
(1792) 0x472255 NOT %R9 |
(1792) 0x472258 CMP %R8,(%RDX,%R9,8) |
(1792) 0x47225c JL 472050 |
(1792) 0x472262 JMP 472040 |
(1789) 0x472267 VADDSD %XMM17,%XMM19,%XMM17 |
(1789) 0x47226d JMP 4719d5 |
(1786) 0x472272 VBROADCASTSD %XMM18,%ZMM18 |
(1786) 0x472278 XOR %ECX,%ECX |
(1786) 0x47227a VPBROADCASTQ %RCX,%ZMM20 |
(1786) 0x472280 ADD %RCX,%R10 |
(1786) 0x472283 VPSUBQ %ZMM20,%ZMM19,%ZMM19 |
(1786) 0x472289 VPCMPNLEUQ %ZMM3,%ZMM19,%K1 |
(1786) 0x472290 VMOVUPD (%RAX,%R10,8),%ZMM19{%K1}{z} |
(1786) 0x472297 VMOVAPD %ZMM19,%ZMM13{%K1} |
(1786) 0x47229d VXORPD %ZMM8,%ZMM13,%ZMM19 |
(1786) 0x4722a3 VMULPD %ZMM19,%ZMM18,%ZMM18 |
(1786) 0x4722a9 VMOVUPD %ZMM18,(%RAX,%R10,8){%K1} |
(1786) 0x4722b0 MOV 0x140(%RSP),%RDX |
(1786) 0x4722b8 SUB %R8,%RDX |
(1786) 0x4722bb JG 471927 |
(1786) 0x4722c1 MOV 0x28(%RSP),%RDX |
(1786) 0x4722c6 MOV 0xb8(%RSP),%RSI |
(1786) 0x4722ce MOV $0x3ff0000000000000,%RDI |
(1786) 0x4722d8 JMP 470704 |
(1786) 0x4722dd MOV 0x28(%RSP),%RDX |
(1786) 0x4722e2 MOV 0xb8(%RSP),%RSI |
(1786) 0x4722ea VBROADCASTSD %XMM17,%ZMM17 |
(1786) 0x4722f0 XOR %ECX,%ECX |
(1786) 0x4722f2 VPBROADCASTQ %RCX,%ZMM19 |
(1786) 0x4722f8 ADD %RCX,%R8 |
(1786) 0x4722fb MOV $0x3ff0000000000000,%RDI |
(1786) 0x472305 VPSUBQ %ZMM19,%ZMM18,%ZMM18 |
(1786) 0x47230b VPCMPNLEUQ %ZMM3,%ZMM18,%K1 |
(1786) 0x472312 VMOVUPD (%RAX,%R8,8),%ZMM18{%K1}{z} |
(1786) 0x472319 VMOVAPD %ZMM18,%ZMM16{%K1} |
(1786) 0x47231f VXORPD %ZMM8,%ZMM16,%ZMM18 |
(1786) 0x472325 VMULPD %ZMM18,%ZMM17,%ZMM17 |
(1786) 0x47232b VMOVUPD %ZMM17,(%RAX,%R8,8){%K1} |
(1786) 0x472332 JMP 470704 |
0x472337 CMPQ $0,0x118(%RSP) |
0x472340 JE 47234d |
0x472342 MOV %RBX,%RDI |
0x472345 VZEROUPPER |
0x472348 CALL 583110 <hypre_Free> |
0x47234d MOV 0xb0(%RSP),%RAX |
0x472355 CMPQ $0,(%RAX) |
0x472359 JE 472376 |
0x47235b MOV 0x20(%RSP),%RDI |
0x472360 LEA -0x28(%RBP),%RSP |
0x472364 POP %RBX |
0x472365 POP %R12 |
0x472367 POP %R13 |
0x472369 POP %R14 |
0x47236b POP %R15 |
0x47236d POP %RBP |
0x47236e VZEROUPPER |
0x472371 JMP 583110 |
0x472376 LEA -0x28(%RBP),%RSP |
0x47237a POP %RBX |
0x47237b POP %R12 |
0x47237d POP %R13 |
0x47237f POP %R14 |
0x472381 POP %R15 |
0x472383 POP %RBP |
0x472384 VZEROUPPER |
0x472387 RET |
0x472388 MOV 0x20(%RSP),%R11 |
0x47238d MOV 0x90(%RSP),%RCX |
0x472395 CMPQ $0x2,(%RCX) |
0x472399 JL 46f13a |
0x47239f MOV 0x60(%RSP),%RDX |
0x4723a4 MOV (%RDX,%RAX,8),%RCX |
0x4723a8 CMP 0x8(%RDX,%RAX,8),%RCX |
0x4723ad JGE 46f13a |
0x4723b3 MOV 0xe8(%RSP),%RDX |
0x4723bb MOV (%RDX),%RDX |
0x4723be JMP 4723d3 |
(1818) 0x4723c0 MOV 0x60(%RSP),%RSI |
(1818) 0x4723c5 INC %RCX |
(1818) 0x4723c8 CMP 0x8(%RSI,%RAX,8),%RCX |
(1818) 0x4723cd JGE 46f13a |
(1818) 0x4723d3 MOV 0xc0(%RSP),%RSI |
(1818) 0x4723db MOV 0x88(%RSP),%RDI |
(1818) 0x4723e3 MOV (%RSI,%RCX,8),%RSI |
(1818) 0x4723e7 TEST %RDI,%RDI |
(1818) 0x4723ea JE 4723f0 |
(1818) 0x4723ec MOV (%RDI,%RSI,8),%RSI |
(1818) 0x4723f0 MOV (%RDX,%RSI,8),%RDI |
(1818) 0x4723f4 TEST %RDI,%RDI |
(1818) 0x4723f7 JS 472421 |
(1818) 0x4723f9 MOV 0x48(%RSP),%R8 |
(1818) 0x4723fe MOV (%R11,%RSI,8),%RDI |
(1818) 0x472402 CMP (%R8,%RAX,8),%RDI |
(1818) 0x472406 JGE 4723c0 |
(1818) 0x472408 MOV 0x180(%RSP),%RDI |
(1818) 0x472410 MOVQ $0x1,(%RDI,%RSI,8) |
(1818) 0x472418 MOV %R13,(%R11,%RSI,8) |
(1818) 0x47241c INC %R13 |
(1818) 0x47241f JMP 4723c0 |
(1818) 0x472421 CMP $-0x3,%RDI |
(1818) 0x472425 JE 4723c0 |
(1818) 0x472427 MOV 0x100(%RSP),%R8 |
(1818) 0x47242f MOV (%R8,%RSI,8),%RDI |
(1818) 0x472433 JMP 472467 |
0x472435 NOPW %CS:(%RAX,%RAX,1) |
(1819) 0x472440 MOV 0x180(%RSP),%R9 |
(1819) 0x472448 MOV 0x28(%RSP),%R10 |
(1819) 0x47244d MOV %R13,(%R11,%R8,8) |
(1819) 0x472451 INC %R13 |
(1819) 0x472454 MOVQ $0x1,(%R9,%R8,8) |
(1819) 0x47245c MOV 0x100(%RSP),%R8 |
(1819) 0x472464 INC %RDI |
(1819) 0x472467 CMP 0x8(%R8,%RSI,8),%RDI |
(1819) 0x47246c JGE 4723c0 |
(1819) 0x472472 MOV 0x148(%RSP),%R8 |
(1819) 0x47247a MOV (%R8,%RDI,8),%R8 |
(1819) 0x47247e MOV %R8,%R9 |
(1819) 0x472481 SUB 0x50(%RSP),%R9 |
(1819) 0x472486 JL 4724a0 |
(1819) 0x472488 CMP %R15,%R8 |
(1819) 0x47248b JGE 4724a0 |
(1819) 0x47248d MOV (%RBX,%R9,8),%R8 |
(1819) 0x472491 CMP (%R10,%RAX,8),%R8 |
(1819) 0x472495 JGE 47245c |
(1819) 0x472497 MOV %R14,(%RBX,%R9,8) |
(1819) 0x47249b INC %R14 |
(1819) 0x47249e JMP 47245c |
(1819) 0x4724a0 MOV 0x48(%RSP),%R10 |
(1819) 0x4724a5 NOT %R8 |
(1819) 0x4724a8 MOV (%R11,%R8,8),%R9 |
(1819) 0x4724ac CMP (%R10,%RAX,8),%R9 |
(1819) 0x4724b0 JL 472440 |
(1819) 0x4724b2 MOV 0x28(%RSP),%R10 |
(1819) 0x4724b7 JMP 47245c |
0x4724b9 NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | par_lr_interp.c:1196-1757 |
Module | exec |
nb instructions | 753 |
nb uops | 733 |
loop length | 3980 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 5 |
nb stack references | 99 |
micro-operation queue | 122.17 cycles |
front end | 122.17 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 53.75 | 53.75 | 53.75 | 53.75 | 51.00 | 107.67 | 107.67 | 107.67 | 11.50 | 23.00 | 23.00 | 11.50 | 9.00 | 9.00 |
cycles | 53.75 | 53.75 | 53.75 | 53.75 | 51.00 | 110.33 | 110.33 | 110.33 | 11.50 | 23.00 | 23.00 | 11.50 | 9.00 | 9.00 |
Cycles executing div or sqrt instructions | 7.00-12.00 |
Front-end | 122.17 |
Dispatch | 110.33 |
DIV/SQRT | 7.00-12.00 |
Overall L1 | 122.17 |
all | 21% |
load | 44% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 19% |
all | 14% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 33% |
all | 21% |
load | 38% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 91% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 19% |
all | 28% |
load | 51% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 23% |
all | 14% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 27% |
load | 45% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 92% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 22% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB $0x280,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R8,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDI,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x170(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x150(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x168(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x148(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x140(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x130(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x108(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x118(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x110(%RBP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x100(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x238(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xe8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xe0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xc8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd8(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xc0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x98(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x90(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x88(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x80(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x78(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x70(%RBP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x58(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x60(%RBP),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x48(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x40(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x38(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x28(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x20(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x10(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RSI,0x228(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x230(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46f022 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2d2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 46efd3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x283> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (,%R12,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 58e1b0 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46f032 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMPQ $0,(%RCX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JLE 46f032 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 46f032 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 46efeb <hypre_BoomerAMGBuildExtPIInterp.extracted+0x29b> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CALL 586110 <hypre_GetThreadNum> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 586100 <hypre_NumActiveThreads> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CQTO | scal (12.5%) | |||||||||||||||||
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 | scal (12.5%) |
LEA 0x1(%R14),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R13,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IMUL %R14,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
CMP %RSI,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CMOVE %RCX,%RDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R14,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RSI,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JLE 46f12d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3dd> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x1(%R12),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,0x218(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMP %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 46f266 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x516> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TESTB $0x1,0x218(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (1.6%) |
JE 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x28(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMPQ $0x2,(%RCX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JL 46f0fa <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3aa> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R13,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa8(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RAX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JS 46feb9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1169> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x80(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x68(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
INC %R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
INC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JMP 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5f50,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x68(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R13,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x128(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RDI,(%RDX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R14,(%RDI,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x140(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5f70,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,(%R14,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x120(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %R14,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xf8(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x1,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x170(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%R14,%RDX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R10,%RDX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
LEA (%R11,%RDX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R14,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R11,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %AL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R14,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %SIL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R11,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %CL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R10,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %DL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
TEST %R8B,%DIL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JNE 46fad6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd86> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR %SIL,%AL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 46fad6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd86> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR %DL,%CL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 46fad6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd86> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R14),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R10),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R11),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R9D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD $-0x2,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x7,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JAE 46fb75 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe25> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
JMP 46fc80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf30> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
AND $-0x2,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RCX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV 0x28(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x88(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 46f2ee <hypre_BoomerAMGBuildExtPIInterp.extracted+0x59e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0xe0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%R10,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R14,%RCX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R11,%RCX,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R14,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %R8B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %R9B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R14,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %CL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R11,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %SIL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R10,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %AL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R11,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %DL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
TEST %R9B,%R8B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JNE 46fcc2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf72> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
AND %SIL,%CL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JNE 46fcc2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf72> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
AND %DL,%AL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JNE 46fcc2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf72> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%R14),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R11),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x1,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
TEST %RSI,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x8(%R10,%R8,8),%R9 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
LEA 0x8(%R11,%R8,8),%RDI | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
LEA 0x8(%R14,%R8,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0xe0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x1,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5f90,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (%RCX,%RSI,8),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RDX,%RSI,8),%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA -0x8(%R14,%R13,8),%RSI | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
LEA 0x8(%RCX,%R12,8),%RCX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
MOV 0x140(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA 0x8(%RDX,%R12,8),%RDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
CMP %RCX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETAEB 0x180(%RSP) | 2 | 1 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
CMP %RSI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETAE %R11B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RDX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R14B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RSI,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
LEA -0x8(%RDI,%R13,8),%RDI | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
SETB %R13B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R10B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RCX,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETBB 0x68(%RSP) | 2 | 1 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
CMP %RDI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R9B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RCX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETBB 0x70(%RSP) | 2 | 1 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
CMP %RDX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RDI,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R15B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
TEST %R11B,0x180(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JNE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR %R13B,%R14B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR 0x68(%RSP),%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR 0x70(%RSP),%R9B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR %R15B,%R8B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%RSI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 4700b1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1361> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %R8,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %R9,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA -0x1(%RSI),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0x80(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x30(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x128(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46fea8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1158> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %RAX,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
JMP 4700ec <hypre_BoomerAMGBuildExtPIInterp.extracted+0x139c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0x80(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x30(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x128(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JG 47013f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
CMP $-0x3,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x78(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RAX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP 0x8(%RDX,%RAX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JGE 472388 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3638> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x20(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 46fef3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x11a3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VPBROADCASTQ %R9,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
MOV 0x80(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x30(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x128(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %RAX,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %R8,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
VPBROADCASTQ %RSI,%ZMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA 0x1(%R12),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPSUBQ %ZMM3,%ZMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ 0x134475(%RIP),%ZMM2,%K1 | vect (100.0%) | |||||||||||||||||
VMOVDQU64 (%RDX,%RAX,8),%ZMM2{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPADDQ %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM1,(%RDX,%RAX,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
VMOVDQU64 (%RCX,%RAX,8),%ZMM1{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPADDQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM0,(%RCX,%RAX,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0xd0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA -0x1(%R13),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA -0x8(%R11,%R9,8),%RDI | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
LEA (%R11,%R12,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RCX,%RAX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RAX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 47018e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x143e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 47018e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x143e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
JMP 47017c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x142c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 47020c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x14bc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %RDX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA -0x1(%RCX),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPTERNLOGD $-0x1,%ZMM1,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
JMP 4701dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x148c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
CMP %RCX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 470214 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x14c4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VPBROADCASTQ %RDX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
VPBROADCASTQ %RCX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
ADD %R12,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R11,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPSUBQ %ZMM1,%ZMM0,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPSUBQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ 0x134348(%RIP),%ZMM0,%K1 | vect (100.0%) | |||||||||||||||||
VPCMPNLEUQ 0x13437d(%RIP),%ZMM2,%K2 | vect (100.0%) | |||||||||||||||||
VPTERNLOGD $-0x1,%ZMM2,%ZMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 0x40(%R11,%RCX,8),%ZMM0{%K2}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVDQU64 (%R11,%RCX,8),%ZMM1{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
KUNPCKBW %K1,%K2,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
VPCMPGTQ %ZMM2,%ZMM1,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 1 | vect (100.0%) |
VPCMPGTQ %ZMM2,%ZMM0,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 1 | vect (100.0%) |
KUNPCKBW %K1,%K2,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
KANDW %K1,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
KORTESTW %K1,%K1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 | N/A |
JE 47027c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x152c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 47027c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x152c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VPBROADCASTQ %RAX,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
KSHIFTRW $0x8,%K1,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
VPADDQ %ZMM2,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPADDQ %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM0,0x40(%RDX){%K2} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
VMOVDQU64 %ZMM1,(%RDX){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5fb0,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 4705ac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x185c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMPQ $0x4,0x230(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JNE 470316 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15c6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CALL 586180 <time_getWallclockSeconds> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x228(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x220(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5a4ad8,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VSUBSD (%R14),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x1,%AL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CALL 5831f0 <hypre_printf> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
CALL 4106e0 <fflush@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
CALL 586180 <time_getWallclockSeconds> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD %XMM0,(%R14) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x118(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x160(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R13,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV (%RDX,%RCX,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x168(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 470380 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1630> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x138(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x38(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 4703ba <hypre_BoomerAMGBuildExtPIInterp.extracted+0x166a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x130(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0x2,(%RAX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JL 4705ac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x185c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x118(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %RAX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 470453 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1703> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x158(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPBROADCASTQ %RAX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %R14,%ZMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VMOVDQU64 %ZMM3,0x180(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
VPBROADCASTQ %RCX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
JE 470483 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1733> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA -0x1(%R14),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VPCMPEQQ %ZMM3,%ZMM1,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 1 | vect (100.0%) |
MOV %R14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
KMOVD %K0,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | N/A |
TEST $0x1,%CL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x150(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JE 470495 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1745> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 4704c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1770> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0x150(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x1f0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x1f8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL 520c70 <hypre_alt_insert_new_nodes> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
JMP 4705d7 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1887> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x150(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
VPBROADCASTQ %RAX,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPSUBQ %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ 0x1340d4(%RIP),%ZMM1,%K1 | vect (100.0%) | |||||||||||||||||
VMOVDQU64 (%RDX,%RAX,8),%ZMM1{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPADDQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM0,(%RDX,%RAX,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x1f0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x1f8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 520c70 <hypre_alt_insert_new_nodes> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 47054f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x17ff> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x158(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA -0x1(%R14),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NEG %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPBROADCASTQ %RCX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0x118(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %RAX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPCMPEQQ 0x180(%RSP),%ZMM1,%K0 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 1 | vect (100.0%) |
KMOVD %K0,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | N/A |
TEST $0x1,%AL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 470579 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1829> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 4705ac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x185c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0x158(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x118(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NEG %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPBROADCASTQ %RAX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %RCX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %R14,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
MOV 0x80(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPSUBQ %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ 0x133fe8(%RIP),%ZMM1,%K1 | vect (100.0%) | |||||||||||||||||
VMOVDQU64 (%RAX,%R14,8),%ZMM1{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPADDQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM0,(%RAX,%R14,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
CMPQ $0,0x118(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JLE 4705df <hypre_BoomerAMGBuildExtPIInterp.extracted+0x188f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x118(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
LEA (,%RAX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 58e1b0 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0,(%RDI) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
MOV 0x20(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JLE 470600 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5fd0,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %R12,0xb8(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JLE 472337 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x35e7> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x20(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x40(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VBROADCASTSD 0x12d9ba(%RIP),%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
VBROADCASTSD 0x12d9b0(%RIP),%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
VMOVDQU64 0x133f26(%RIP),%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVSD 0x12d99e(%RIP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VMOVSD 0x12c9a6(%RIP),%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VPBROADCASTQ %RBX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
MOV $0x3ff0000000000000,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
VPXOR %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
VXORPD %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VPBROADCASTQ %RAX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA 0x8(%RCX),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RAX,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xc8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD $0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVQ $-0x2,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
LEA 0x38(%RAX),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R14,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JMP 470715 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x19c5> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
CMPQ $0,0x118(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JE 47234d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x35fd> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 583110 <hypre_Free> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0,(%RAX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JE 472376 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3626> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x20(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
JMP 583110 <hypre_Free> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV 0x20(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0x2,(%RCX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JL 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x60(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RAX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP 0x8(%RDX,%RAX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JGE 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0xe8(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 4723d3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3683> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
Source file and lines | par_lr_interp.c:1196-1757 |
Module | exec |
nb instructions | 753 |
nb uops | 733 |
loop length | 3980 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 5 |
nb stack references | 99 |
micro-operation queue | 122.17 cycles |
front end | 122.17 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 53.75 | 53.75 | 53.75 | 53.75 | 51.00 | 107.67 | 107.67 | 107.67 | 11.50 | 23.00 | 23.00 | 11.50 | 9.00 | 9.00 |
cycles | 53.75 | 53.75 | 53.75 | 53.75 | 51.00 | 110.33 | 110.33 | 110.33 | 11.50 | 23.00 | 23.00 | 11.50 | 9.00 | 9.00 |
Cycles executing div or sqrt instructions | 7.00-12.00 |
Front-end | 122.17 |
Dispatch | 110.33 |
DIV/SQRT | 7.00-12.00 |
Overall L1 | 122.17 |
all | 21% |
load | 44% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 19% |
all | 14% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 33% |
all | 21% |
load | 38% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 91% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 19% |
all | 28% |
load | 51% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 23% |
all | 14% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 27% |
load | 45% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 92% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 22% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
AND $-0x40,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB $0x280,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R8,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0x208(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDI,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x170(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x150(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x168(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x148(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x140(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x130(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x148(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x128(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x108(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x120(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x118(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x110(%RBP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x100(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x238(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xe8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xe0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xc8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd8(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd0(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xc0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xb0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa8(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x98(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x90(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x88(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x80(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x78(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x158(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x68(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x70(%RBP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RCX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x58(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x60(%RBP),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x50(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x178(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x48(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x40(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x38(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x210(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x30(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x28(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RCX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x20(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x10(%RBP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDX,0x1f8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RCX,0x1f0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RSI,0x228(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RDI,0x168(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R8,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R9,0x230(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R10,0x220(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46f022 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2d2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R12,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
TEST %R12,%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 46efd3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x283> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (,%R12,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 58e1b0 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46f032 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMPQ $0,(%RCX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JLE 46f032 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 46f032 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x2e2> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV (%RAX),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %RDI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 46efeb <hypre_BoomerAMGBuildExtPIInterp.extracted+0x29b> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CALL 586110 <hypre_GetThreadNum> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 586100 <hypre_NumActiveThreads> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CQTO | scal (12.5%) | |||||||||||||||||
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IDIV %RSI | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 | scal (12.5%) |
LEA 0x1(%R14),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R13,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R15,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
IMUL %RAX,%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
MOV %RAX,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
IMUL %R14,%R12 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | N/A |
CMP %RSI,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CMOVE %RCX,%RDX | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R14,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %RSI,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JLE 46f12d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3dd> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x1(%R12),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,0x218(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMP %RAX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 46f266 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x516> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TESTB $0x1,0x218(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (1.6%) |
JE 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x28(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CMPQ $0x2,(%RCX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JL 46f0fa <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3aa> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R13,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa8(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%RAX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %RCX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JS 46feb9 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1169> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x80(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x68(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
INC %R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,(%RCX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
INC %RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JMP 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5f50,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb8(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x68(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,(%RAX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV %R13,(%RDX,%RCX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x128(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RDI,(%RDX,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xf8(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %R14,(%RDI,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x140(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5f70,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RCX,(%R14,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x120(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV %R14,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV 0xf8(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xd0(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xe0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x1,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x170(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%R14,%RDX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R10,%RDX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RDX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
LEA (%R11,%RDX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETAE %DIL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R14,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETAE %R8B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R11,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %AL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R14,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %SIL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R11,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %CL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R10,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %DL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
TEST %R8B,%DIL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JNE 46fad6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd86> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR %SIL,%AL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 46fad6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd86> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR %DL,%CL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 46fad6 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xd86> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R14),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R10),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R11),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R9D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD $-0x2,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x7,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JAE 46fb75 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xe25> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
JMP 46fc80 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf30> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
AND $-0x2,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RCX,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV 0x28(%RSP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x88(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 46f2ee <hypre_BoomerAMGBuildExtPIInterp.extracted+0x59e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0xe0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%R10,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R14,%RCX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R11,%RCX,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R14,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %R8B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %R9B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R14,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %CL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R11,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %SIL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R10,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %AL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %R11,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETA %DL | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
TEST %R9B,%R8B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JNE 46fcc2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf72> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
AND %SIL,%CL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JNE 46fcc2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf72> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
AND %DL,%AL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JNE 46fcc2 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xf72> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%R14),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R11),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%R10),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xe0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x1,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
TEST %RSI,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x8(%R10,%R8,8),%R9 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
LEA 0x8(%R11,%R8,8),%RDI | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
LEA 0x8(%R14,%R8,8),%R8 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
JMP 46fcf3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0xfa3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0xe0(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x1,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5f90,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb8(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (%RCX,%RSI,8),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RDX,%RSI,8),%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA -0x8(%R14,%R13,8),%RSI | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
LEA 0x8(%RCX,%R12,8),%RCX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
MOV 0x140(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA 0x8(%RDX,%R12,8),%RDX | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
CMP %RCX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETAEB 0x180(%RSP) | 2 | 1 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
CMP %RSI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETAE %R11B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RDX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R14B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RSI,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
LEA -0x8(%RDI,%R13,8),%RDI | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
SETB %R13B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R10B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RCX,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETBB 0x68(%RSP) | 2 | 1 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
CMP %RDI,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R9B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RCX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETBB 0x70(%RSP) | 2 | 1 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | N/A |
CMP %RDX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R8B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
CMP %RDI,%R15 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
SETB %R15B | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
TEST %R11B,0x180(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JNE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR %R13B,%R14B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR 0x68(%RSP),%R10B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR 0x70(%RSP),%R9B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
OR %R15B,%R8B | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 46fe5c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x110c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%RSI),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDI),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 4700b1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1361> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %R8,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %R9,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA -0x1(%RSI),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0x80(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x30(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x128(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46fea8 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1158> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %RAX,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
JMP 4700ec <hypre_BoomerAMGBuildExtPIInterp.extracted+0x139c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0x80(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x30(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x128(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R12,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JG 47013f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x13ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
CMP $-0x3,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x78(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RAX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP 0x8(%RDX,%RAX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JGE 472388 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3638> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x20(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 46fef3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x11a3> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VPBROADCASTQ %R9,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
MOV 0x80(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x30(%RSP),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV 0xb8(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x128(%RSP),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %RAX,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %R8,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
VPBROADCASTQ %RSI,%ZMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA 0x1(%R12),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
ADD %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPSUBQ %ZMM3,%ZMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ 0x134475(%RIP),%ZMM2,%K1 | vect (100.0%) | |||||||||||||||||
VMOVDQU64 (%RDX,%RAX,8),%ZMM2{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPADDQ %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM1,(%RDX,%RAX,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
VMOVDQU64 (%RCX,%RAX,8),%ZMM1{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPADDQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM0,(%RCX,%RAX,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SUB %R12,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0xd0(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA -0x1(%R13),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA -0x8(%R11,%R9,8),%RDI | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
LEA (%R11,%R12,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RCX,%RAX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RAX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 47018e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x143e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP %RSI,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 47018e <hypre_BoomerAMGBuildExtPIInterp.extracted+0x143e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
JMP 47017c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x142c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x10,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 47020c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x14bc> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %RDX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA -0x1(%RCX),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPTERNLOGD $-0x1,%ZMM1,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
XOR %R8D,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
JMP 4701dc <hypre_BoomerAMGBuildExtPIInterp.extracted+0x148c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
CMP %RCX,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 470214 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x14c4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 4702a1 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1551> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VPBROADCASTQ %RDX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
VPBROADCASTQ %RCX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
ADD %R12,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%R11,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPSUBQ %ZMM1,%ZMM0,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPSUBQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ 0x134348(%RIP),%ZMM0,%K1 | vect (100.0%) | |||||||||||||||||
VPCMPNLEUQ 0x13437d(%RIP),%ZMM2,%K2 | vect (100.0%) | |||||||||||||||||
VPTERNLOGD $-0x1,%ZMM2,%ZMM2,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 0x40(%R11,%RCX,8),%ZMM0{%K2}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVDQU64 (%R11,%RCX,8),%ZMM1{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
KUNPCKBW %K1,%K2,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
VPCMPGTQ %ZMM2,%ZMM1,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 1 | vect (100.0%) |
VPCMPGTQ %ZMM2,%ZMM0,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 1 | vect (100.0%) |
KUNPCKBW %K1,%K2,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
KANDW %K1,%K0,%K1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
KORTESTW %K1,%K1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 | N/A |
JE 47027c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x152c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 47027c <hypre_BoomerAMGBuildExtPIInterp.extracted+0x152c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VPBROADCASTQ %RAX,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
KSHIFTRW $0x8,%K1,%K2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 | N/A |
VPADDQ %ZMM2,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPADDQ %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM0,0x40(%RDX){%K2} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
VMOVDQU64 %ZMM1,(%RDX){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5fb0,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JNE 4705ac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x185c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMPQ $0x4,0x230(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JNE 470316 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x15c6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CALL 586180 <time_getWallclockSeconds> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x228(%RSP),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x220(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5a4ad8,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VSUBSD (%R14),%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x1,%AL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CALL 5831f0 <hypre_printf> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
CALL 4106e0 <fflush@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
CALL 586180 <time_getWallclockSeconds> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMOVSD %XMM0,(%R14) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x118(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x160(%RSP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x48(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R13,(%RSI) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV (%RDX,%RCX,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x168(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R14,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %R13,%R13 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 470380 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1630> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x138(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R13,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x38(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 4703ba <hypre_BoomerAMGBuildExtPIInterp.extracted+0x166a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x130(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
CALL 583040 <hypre_CAlloc> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x58(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0x2,(%RAX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JL 4705ac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x185c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x118(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
TEST %RAX,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 470453 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1703> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x158(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %RAX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPBROADCASTQ %RAX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %R14,%ZMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VMOVDQU64 %ZMM3,0x180(%RSP) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
VPBROADCASTQ %RCX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
JE 470483 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1733> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA -0x1(%R14),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
VPCMPEQQ %ZMM3,%ZMM1,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 1 | vect (100.0%) |
MOV %R14,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
KMOVD %K0,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | N/A |
TEST $0x1,%CL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x150(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JE 470495 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1745> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 4704c0 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1770> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0x150(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x1f0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x1f8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CALL 520c70 <hypre_alt_insert_new_nodes> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
JMP 4705d7 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1887> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x150(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
VPBROADCASTQ %RAX,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPSUBQ %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ 0x1340d4(%RIP),%ZMM1,%K1 | vect (100.0%) | |||||||||||||||||
VMOVDQU64 (%RDX,%RAX,8),%ZMM1{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPADDQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM0,(%RDX,%RAX,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
MOV (%RCX),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x1f0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x1f8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 520c70 <hypre_alt_insert_new_nodes> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
TEST %R14,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 47054f <hypre_BoomerAMGBuildExtPIInterp.extracted+0x17ff> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x158(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x80(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA -0x1(%R14),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NEG %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPBROADCASTQ %RCX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0x118(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %RAX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPCMPEQQ 0x180(%RSP),%ZMM1,%K0 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 1 | vect (100.0%) |
KMOVD %K0,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 | N/A |
TEST $0x1,%AL | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 470579 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x1829> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 4705ac <hypre_BoomerAMGBuildExtPIInterp.extracted+0x185c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV 0x158(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x118(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NEG %RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPBROADCASTQ %RAX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %RCX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VPBROADCASTQ %R14,%ZMM2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
MOV 0x80(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPSUBQ %ZMM2,%ZMM1,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ 0x133fe8(%RIP),%ZMM1,%K1 | vect (100.0%) | |||||||||||||||||
VMOVDQU64 (%RAX,%R14,8),%ZMM1{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VPADDQ %ZMM1,%ZMM0,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VMOVDQU64 %ZMM0,(%RAX,%R14,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 4 | 2 | vect (100.0%) |
CMPQ $0,0x118(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JLE 4705df <hypre_BoomerAMGBuildExtPIInterp.extracted+0x188f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x118(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0xff,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
LEA (,%RAX,8),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 58e1b0 <_intel_fast_memset> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0,(%RDI) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
MOV 0x20(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JLE 470600 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x18b0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV 0x120(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV $0x5d5fd0,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV (%RAX),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 410560 <__kmpc_barrier@plt> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0x98(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x28(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %R12,0xb8(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JLE 472337 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x35e7> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x20(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x40(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VBROADCASTSD 0x12d9ba(%RIP),%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
VBROADCASTSD 0x12d9b0(%RIP),%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 | scal (12.5%) |
VMOVDQU64 0x133f26(%RIP),%ZMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVSD 0x12d99e(%RIP),%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VMOVSD 0x12c9a6(%RIP),%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
VPBROADCASTQ %RBX,%ZMM0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
MOV $0x3ff0000000000000,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
VPXOR %XMM4,%XMM4,%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | vect (25.0%) |
VXORPD %XMM5,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VPBROADCASTQ %RAX,%ZMM1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA 0x8(%RCX),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RAX,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xc8(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADD $0x8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %RAX,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV 0xa0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVQ $-0x2,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (6.3%) |
LEA 0x38(%RAX),%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV %R14,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
JMP 470715 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x19c5> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
XCHG %AX,%AX | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPW (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
CMPQ $0,0x118(%RSP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JE 47234d <hypre_BoomerAMGBuildExtPIInterp.extracted+0x35fd> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RBX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
CALL 583110 <hypre_Free> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | N/A |
MOV 0xb0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0,(%RAX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JE 472376 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3626> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x20(%RSP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
JMP 583110 <hypre_Free> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
LEA -0x28(%RBP),%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | vect (25.0%) |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
MOV 0x20(%RSP),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x90(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMPQ $0x2,(%RCX) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JL 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x60(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RAX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP 0x8(%RDX,%RAX,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | N/A |
JGE 46f13a <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3ea> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0xe8(%RSP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 4723d3 <hypre_BoomerAMGBuildExtPIInterp.extracted+0x3683> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
Name | Coverage (%) | Time (s) |
---|---|---|
▼hypre_BoomerAMGBuildExtPIInterp.extracted– | 0.22 | 0.16 |
▼Loop 1786 - par_lr_interp.c:1221-1748 - exec– | 0.00 | 0.00 |
▼Loop 1794 - par_lr_interp.c:1221-1675 - exec– | 0.05 | 0.04 |
○Loop 1800 - par_lr_interp.c:1221-1627 - exec | 0.05 | 0.04 |
○Loop 1797 - par_lr_interp.c:1644-1650 - exec | 0.04 | 0.02 |
○Loop 1799 - par_lr_interp.c:1221-1636 - exec | 0.00 | 0.00 |
○Loop 1798 - par_lr_interp.c:1644-1650 - exec | 0.00 | 0.00 |
○Loop 1796 - par_lr_interp.c:1655-1660 - exec | 0.00 | 0.00 |
○Loop 1795 - par_lr_interp.c:1655-1660 - exec | 0.00 | 0.00 |
▼Loop 1803 - par_lr_interp.c:1494-1545 - exec– | 0.01 | 0.01 |
○Loop 1806 - par_lr_interp.c:1516-1526 - exec | 0.04 | 0.03 |
○Loop 1805 - par_lr_interp.c:1532-1545 - exec | 0.00 | 0.00 |
○Loop 1804 - par_lr_interp.c:1532-1545 - exec | 0.00 | 0.00 |
▼Loop 1789 - par_lr_interp.c:1221-1736 - exec– | 0.00 | 0.00 |
○Loop 1793 - par_lr_interp.c:1688-1700 - exec | 0.00 | 0.00 |
○Loop 1792 - par_lr_interp.c:1688-1723 - exec | 0.00 | 0.00 |
○Loop 1790 - par_lr_interp.c:1707-1724 - exec | 0.00 | 0.00 |
○Loop 1791 - par_lr_interp.c:1707-1724 - exec | 0.00 | 0.00 |
○Loop 1788 - par_lr_interp.c:1221-1743 - exec | 0.00 | 0.00 |
▼Loop 1801 - par_lr_interp.c:1534-1596 - exec– | 0.00 | 0.00 |
○Loop 1802 - par_lr_interp.c:1573-1596 - exec | 0.00 | 0.01 |
○Loop 1787 - par_lr_interp.c:1221-1745 - exec | 0.00 | 0.00 |
▼Loop 1824 - par_lr_interp.c:1244-1350 - exec– | 0.00 | 0.00 |
▼Loop 1833 - par_lr_interp.c:1264-1303 - exec– | 0.00 | 0.01 |
○Loop 1836 - par_lr_interp.c:1277-1285 - exec | 0.01 | 0.01 |
○Loop 1835 - par_lr_interp.c:1291-1303 - exec | 0.00 | 0.01 |
○Loop 1834 - par_lr_interp.c:1291-1303 - exec | 0.00 | 0.00 |
▼Loop 1827 - par_lr_interp.c:1264-1303 - exec– | 0.00 | 0.01 |
○Loop 1830 - par_lr_interp.c:1277-1285 - exec | 0.01 | 0.01 |
○Loop 1829 - par_lr_interp.c:1291-1303 - exec | 0.00 | 0.00 |
○Loop 1828 - par_lr_interp.c:1291-1303 - exec | 0.00 | 0.00 |
▼Loop 1831 - par_lr_interp.c:1293-1350 - exec– | 0.00 | 0.00 |
○Loop 1832 - par_lr_interp.c:1331-1350 - exec | 0.00 | 0.00 |
▼Loop 1825 - par_lr_interp.c:1293-1350 - exec– | 0.00 | 0.00 |
○Loop 1826 - par_lr_interp.c:1331-1350 - exec | 0.00 | 0.00 |
○Loop 1813 - par_lr_interp.c:1393-1396 - exec | 0.00 | 0.00 |
○Loop 1811 - par_lr_interp.c:1221-1403 - exec | 0.00 | 0.00 |
○Loop 1807 - par_lr_interp.c:1458-1459 - exec | 0.00 | 0.00 |
○Loop 1809 - par_lr_interp.c:1444-1445 - exec | 0.00 | 0.00 |
○Loop 1817 - par_lr_interp.c:1378-1382 - exec | 0.00 | 0.00 |
○Loop 1837 - par_lr_interp.c:1230-1231 - exec | 0.00 | 0.00 |
○Loop 1814 - par_lr_interp.c:1378-1382 - exec | 0.00 | 0.00 |
○Loop 1812 - par_lr_interp.c:1400-1403 - exec | 0.00 | 0.00 |
○Loop 1816 - par_lr_interp.c:1378-1382 - exec | 0.00 | 0.00 |
○Loop 1815 - par_lr_interp.c:1378-1382 - exec | 0.00 | 0.00 |
○Loop 1808 - par_lr_interp.c:1451-1452 - exec | 0.00 | 0.00 |
▼Loop 1820 - par_lr_interp.c:1264-1303 - exec– | 0.00 | 0.00 |
○Loop 1823 - par_lr_interp.c:1277-1285 - exec | 0.00 | 0.00 |
○Loop 1822 - par_lr_interp.c:1291-1303 - exec | 0.00 | 0.00 |
○Loop 1821 - par_lr_interp.c:1291-1303 - exec | 0.00 | 0.00 |
○Loop 1810 - par_lr_interp.c:1393-1396 - exec | 0.00 | 0.00 |
▼Loop 1818 - par_lr_interp.c:1293-1350 - exec– | 0.00 | 0.00 |
○Loop 1819 - par_lr_interp.c:1331-1350 - exec | 0.00 | 0.00 |