Loop Id: 318 | Module: libparcsr_ls.so | Source: ams.c:3532-3534 | Coverage: NA% |
---|
Loop Id: 318 | Module: libparcsr_ls.so | Source: ams.c:3532-3534 | Coverage: NA% |
---|
0x29e20 ADD $0x20,%RDI |
0x29e24 DEC %RSI |
0x29e27 JE 29d17 |
0x29e2d MOV -0xc8(%RBP),%R9 [3] |
0x29e34 MOV -0x10(%R9,%RDI,1),%R8 [5] |
0x29e39 UCOMISD (%R13,%R8,8),%XMM3 [4] |
0x29e40 JBE 29ea0 |
0x29e42 MOV -0x90(%RBP),%R8 [3] |
0x29e49 MOVSD -0x10(%R8,%RDI,1),%XMM0 [6] |
0x29e50 XORPD %XMM4,%XMM0 |
0x29e54 MOVLPD %XMM0,-0x10(%R8,%RDI,1) [6] |
0x29e5b MOV -0x8(%R9,%RDI,1),%R8 [5] |
0x29e60 UCOMISD (%R13,%R8,8),%XMM3 [1] |
0x29e67 JA 29eae |
0x29e69 MOV (%R9,%RDI,1),%R8 [5] |
0x29e6d UCOMISD (%R13,%R8,8),%XMM3 [7] |
0x29e74 JBE 29ed4 |
0x29e76 MOV -0x90(%RBP),%R8 [3] |
0x29e7d MOVSD (%R8,%RDI,1),%XMM0 [6] |
0x29e83 XORPD %XMM4,%XMM0 |
0x29e87 MOVLPD %XMM0,(%R8,%RDI,1) [6] |
0x29e8d MOV 0x8(%R9,%RDI,1),%R8 [5] |
0x29e92 UCOMISD (%R13,%R8,8),%XMM3 [2] |
0x29e99 JBE 29e20 |
0x29e9b JMP 29ee6 |
0x29ea0 MOV -0x8(%R9,%RDI,1),%R8 [5] |
0x29ea5 UCOMISD (%R13,%R8,8),%XMM3 [1] |
0x29eac JBE 29e69 |
0x29eae MOV -0x90(%RBP),%R8 [3] |
0x29eb5 MOVSD -0x8(%R8,%RDI,1),%XMM0 [6] |
0x29ebc XORPD %XMM4,%XMM0 |
0x29ec0 MOVLPD %XMM0,-0x8(%R8,%RDI,1) [6] |
0x29ec7 MOV (%R9,%RDI,1),%R8 [5] |
0x29ecb UCOMISD (%R13,%R8,8),%XMM3 [7] |
0x29ed2 JA 29e76 |
0x29ed4 MOV 0x8(%R9,%RDI,1),%R8 [5] |
0x29ed9 UCOMISD (%R13,%R8,8),%XMM3 [2] |
0x29ee0 JBE 29e20 |
0x29ee6 MOV -0x90(%RBP),%R8 [3] |
0x29eed MOVSD 0x8(%R8,%RDI,1),%XMM0 [6] |
0x29ef4 XORPD %XMM4,%XMM0 |
0x29ef8 MOVLPD %XMM0,0x8(%R8,%RDI,1) [6] |
0x29eff JMP 29e20 |
/home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c: 3532 - 3534 |
-------------------------------------------------------------------------------- |
3532: for (i = ns; i < ne; i++) |
3533: if (A_diag_data[A_diag_I[i]] < 0) |
3534: l1_norm[i] = -l1_norm[i]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.54 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.32 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | P5, P6, P7, |
Function | hypre_ParCSRComputeL1NormsThreads.extracted |
Source | ams.c:3532-3534 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 9.00 |
CQA cycles if no scalar integer | 5.83 |
CQA cycles if FP arith vectorized | 9.00 |
CQA cycles if fully vectorized | 2.08 |
Front-end cycles | 8.33 |
DIV/SQRT cycles | 5.00 |
P0 cycles | 0.75 |
P1 cycles | 0.75 |
P2 cycles | 0.50 |
P3 cycles | 5.00 |
P4 cycles | 9.00 |
P5 cycles | 9.00 |
P6 cycles | 9.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 3.50 |
P10 cycles | 3.50 |
P11 cycles | 5.50 |
P12 cycles | 5.50 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 43.00 |
Nb uops | 50.00 |
Nb loads | 23.00 |
Nb stores | 4.00 |
Nb stack references | 2.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 184.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 21.05 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 36.36 |
Vector-efficiency ratio all | 15.13 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 17.05 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.54 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.32 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.08 |
Bottlenecks | P5, P6, P7, |
Function | hypre_ParCSRComputeL1NormsThreads.extracted |
Source | ams.c:3532-3534 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 9.00 |
CQA cycles if no scalar integer | 5.83 |
CQA cycles if FP arith vectorized | 9.00 |
CQA cycles if fully vectorized | 2.08 |
Front-end cycles | 8.33 |
DIV/SQRT cycles | 5.00 |
P0 cycles | 0.75 |
P1 cycles | 0.75 |
P2 cycles | 0.50 |
P3 cycles | 5.00 |
P4 cycles | 9.00 |
P5 cycles | 9.00 |
P6 cycles | 9.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 3.50 |
P10 cycles | 3.50 |
P11 cycles | 5.50 |
P12 cycles | 5.50 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 43.00 |
Nb uops | 50.00 |
Nb loads | 23.00 |
Nb stores | 4.00 |
Nb stack references | 2.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 184.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 21.05 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 36.36 |
Vector-efficiency ratio all | 15.13 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 17.05 |
Path / |
Function | hypre_ParCSRComputeL1NormsThreads.extracted |
Source file and lines | ams.c:3532-3534 |
Module | libparcsr_ls.so |
nb instructions | 43 |
nb uops | 50 |
loop length | 225 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 2 |
micro-operation queue | 8.33 cycles |
front end | 8.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.00 | 0.75 | 0.75 | 0.50 | 5.00 | 9.00 | 9.00 | 9.00 | 2.00 | 2.00 | 3.50 | 3.50 | 5.50 | 5.50 |
cycles | 5.00 | 0.75 | 0.75 | 0.50 | 5.00 | 9.00 | 9.00 | 9.00 | 2.00 | 2.00 | 3.50 | 3.50 | 5.50 | 5.50 |
Cycles executing div or sqrt instructions | NA |
Front-end | 8.33 |
Dispatch | 9.00 |
Overall L1 | 9.00 |
all | 21% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 36% |
all | 15% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 17% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x20,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 29d17 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c37> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xc8(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x10(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29ea0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1dc0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x90(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD -0x10(%R8,%RDI,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
XORPD %XMM4,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
MOVLPD %XMM0,-0x10(%R8,%RDI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV -0x8(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JA 29eae <hypre_ParCSRComputeL1NormsThreads.extracted+0x1dce> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29ed4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1df4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x90(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD (%R8,%RDI,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
XORPD %XMM4,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
MOVLPD %XMM0,(%R8,%RDI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV 0x8(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29e20 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d40> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 29ee6 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1e06> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x8(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29e69 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d89> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x90(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD -0x8(%R8,%RDI,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
XORPD %XMM4,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
MOVLPD %XMM0,-0x8(%R8,%RDI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV (%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JA 29e76 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d96> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x8(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29e20 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d40> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x90(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD 0x8(%R8,%RDI,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
XORPD %XMM4,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
MOVLPD %XMM0,0x8(%R8,%RDI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
JMP 29e20 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d40> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
Function | hypre_ParCSRComputeL1NormsThreads.extracted |
Source file and lines | ams.c:3532-3534 |
Module | libparcsr_ls.so |
nb instructions | 43 |
nb uops | 50 |
loop length | 225 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 2 |
micro-operation queue | 8.33 cycles |
front end | 8.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.00 | 0.75 | 0.75 | 0.50 | 5.00 | 9.00 | 9.00 | 9.00 | 2.00 | 2.00 | 3.50 | 3.50 | 5.50 | 5.50 |
cycles | 5.00 | 0.75 | 0.75 | 0.50 | 5.00 | 9.00 | 9.00 | 9.00 | 2.00 | 2.00 | 3.50 | 3.50 | 5.50 | 5.50 |
Cycles executing div or sqrt instructions | NA |
Front-end | 8.33 |
Dispatch | 9.00 |
Overall L1 | 9.00 |
all | 21% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 36% |
all | 15% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 17% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x20,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 29d17 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1c37> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xc8(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x10(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29ea0 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1dc0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x90(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD -0x10(%R8,%RDI,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
XORPD %XMM4,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
MOVLPD %XMM0,-0x10(%R8,%RDI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV -0x8(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JA 29eae <hypre_ParCSRComputeL1NormsThreads.extracted+0x1dce> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV (%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29ed4 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1df4> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x90(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD (%R8,%RDI,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
XORPD %XMM4,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
MOVLPD %XMM0,(%R8,%RDI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV 0x8(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29e20 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d40> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
JMP 29ee6 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1e06> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x8(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29e69 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d89> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x90(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD -0x8(%R8,%RDI,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
XORPD %XMM4,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
MOVLPD %XMM0,-0x8(%R8,%RDI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV (%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JA 29e76 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d96> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV 0x8(%R9,%RDI,1),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
UCOMISD (%R13,%R8,8),%XMM3 | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 | scal (12.5%) |
JBE 29e20 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d40> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x90(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD 0x8(%R8,%RDI,1),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
XORPD %XMM4,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
MOVLPD %XMM0,0x8(%R8,%RDI,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
JMP 29e20 <hypre_ParCSRComputeL1NormsThreads.extracted+0x1d40> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
Run 8x1 | Number processes: 8Number nodes: 1Run Command: <executable> -n 400 400 400MPI Command: mpirun -n <number_processes>Dataset: Run Directory: /home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/run/oneview_runs/multicore/icx_9/oneview_run_1720211326OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_NUM_THREADS: 1 |
---|---|
Run 8x2 | Number processes: 8OMP_NUM_THREADS: 2OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
Run 8x4 | Number processes: 8OMP_NUM_THREADS: 4OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
Run 8x8 | Number processes: 8OMP_NUM_THREADS: 8OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
Run 8x16 | Number processes: 8OMP_NUM_THREADS: 16OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
Run 8x24 | Number processes: 8OMP_NUM_THREADS: 24OMP_PROC_BIND: spreadI_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threads |
(8x1) Efficiency | (8x1) Potential Speed-Up (%) | (8x2) Efficiency | (8x2) Potential Speed-Up (%) | (8x4) Efficiency | (8x4) Potential Speed-Up (%) | (8x8) Efficiency | (8x8) Potential Speed-Up (%) | (8x16) Efficiency | (8x16) Potential Speed-Up (%) | (8x24) Efficiency | (8x24) Potential Speed-Up (%) |
---|---|---|---|---|---|---|---|---|---|---|---|
1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 |
Run | Number of threads | Efficiency (ideal is 1) | Speedup | Ideal Speedup | Time (s) | Coverage (%) |
---|---|---|---|---|---|---|
8x1 | ||||||
8x2 | 16 | 1 | 1 | 2 | 0.19999997317791 | 0.11266304552555 |
8x4 | 32 | 1 | 1 | 4 | 0.10999997705221 | 0.085630752146244 |
8x8 | 64 | 1 | 1 | 8 | 0.074999995529652 | 0.070817686617374 |
8x16 | 128 | 1 | 1 | 16 | 0.054999999701977 | 0.063099041581154 |
8x24 | 192 | 1 | 1 | 24 | 0.055000003427267 | 0.069866508245468 |