Loop Id: 381 | Module: libparcsr_ls.so | Source: ams.c:3662-3682 | Coverage: 11.46% |
---|
Loop Id: 381 | Module: libparcsr_ls.so | Source: ams.c:3662-3682 | Coverage: 11.46% |
---|
0x2a9c9 MOV -0x30(%RBP),%RDI |
0x2a9cd NOPL (%RAX) |
0x2a9d0 MULSD %XMM0,%XMM2 |
0x2a9d4 MOV -0x70(%RBP),%RSI |
0x2a9d8 DIVSD (%RSI,%R8,8),%XMM2 |
0x2a9de MOV -0x60(%RBP),%RSI |
0x2a9e2 ADDSD (%RSI,%R8,8),%XMM2 |
0x2a9e8 MOVSD %XMM2,(%RSI,%R8,8) |
(380) 0x2a9ee LEA 0x1(%RDX),%RSI |
(380) 0x2a9f2 CMP %RCX,%RDX |
(380) 0x2a9f5 MOV %RSI,%RDX |
(380) 0x2a9f8 JE 2a99f |
(380) 0x2a9fa MOV -0x78(%RBP),%RAX |
(380) 0x2a9fe LEA (%RAX,%RDX,1),%R8 |
(380) 0x2aa02 MOV (%RDI,%R8,8),%R9 |
(380) 0x2aa06 UCOMISD (%R14,%R9,8),%XMM1 |
(380) 0x2aa0c JE 2a9ee |
0x2aa0e MOV -0x68(%RBP),%RSI |
0x2aa12 MOVSD (%RSI,%R8,8),%XMM2 |
0x2aa18 MOV 0x8(%RDI,%R8,8),%R10 |
0x2aa1d SUB %R9,%R10 |
0x2aa20 JLE 2abdf |
0x2aa26 CMP $0x8,%R10 |
0x2aa2a JB 2aaeb |
0x2aa30 MOV %R10,%R11 |
0x2aa33 SHR $0x3,%R11 |
0x2aa37 LEA (,%R9,8),%RSI |
0x2aa3f NOP |
(383) 0x2aa40 MOV 0x10(%RBX,%RSI,1),%RDI |
(383) 0x2aa45 MOVSD (%R15,%RDI,8),%XMM3 |
(383) 0x2aa4b MOV 0x18(%RBX,%RSI,1),%RDI |
(383) 0x2aa50 MOVHPD (%R15,%RDI,8),%XMM3 |
(383) 0x2aa56 MOV 0x30(%RBX,%RSI,1),%RDI |
(383) 0x2aa5b MOVSD (%R15,%RDI,8),%XMM4 |
(383) 0x2aa61 MOV 0x38(%RBX,%RSI,1),%RDI |
(383) 0x2aa66 MOVHPD (%R15,%RDI,8),%XMM4 |
(383) 0x2aa6c MOV (%RBX,%RSI,1),%RDI |
(383) 0x2aa70 MOVSD (%R15,%RDI,8),%XMM5 |
(383) 0x2aa76 MOV 0x8(%RBX,%RSI,1),%RDI |
(383) 0x2aa7b MOVHPD (%R15,%RDI,8),%XMM5 |
(383) 0x2aa81 MOV 0x20(%RBX,%RSI,1),%RDI |
(383) 0x2aa86 MOVSD (%R15,%RDI,8),%XMM6 |
(383) 0x2aa8c MOV 0x28(%RBX,%RSI,1),%RDI |
(383) 0x2aa91 MOVHPD (%R15,%RDI,8),%XMM6 |
(383) 0x2aa97 MOVUPD 0x10(%R14,%RSI,1),%XMM7 |
(383) 0x2aa9e MULPD %XMM7,%XMM3 |
(383) 0x2aaa2 MOVUPD 0x30(%R14,%RSI,1),%XMM7 |
(383) 0x2aaa9 MULPD %XMM7,%XMM4 |
(383) 0x2aaad MOVUPD (%R14,%RSI,1),%XMM7 |
(383) 0x2aab3 ADDPD %XMM3,%XMM4 |
(383) 0x2aab7 MOVUPD 0x20(%R14,%RSI,1),%XMM3 |
(383) 0x2aabe MULPD %XMM7,%XMM5 |
(383) 0x2aac2 MULPD %XMM3,%XMM6 |
(383) 0x2aac6 ADDPD %XMM5,%XMM6 |
(383) 0x2aaca ADDPD %XMM4,%XMM6 |
(383) 0x2aace MOVAPD %XMM6,%XMM3 |
(383) 0x2aad2 UNPCKHPD %XMM6,%XMM3 |
(383) 0x2aad6 ADDSD %XMM6,%XMM3 |
(383) 0x2aada SUBSD %XMM3,%XMM2 |
(383) 0x2aade ADD $0x40,%RSI |
(383) 0x2aae2 DEC %R11 |
(383) 0x2aae5 JNE 2aa40 |
0x2aaeb MOV %R10D,%ESI |
0x2aaee AND $0x7,%ESI |
0x2aaf1 DEC %RSI |
0x2aaf4 CMP $0x6,%RSI |
0x2aaf8 JA 2ab29 |
0x2ab29 MOV -0x30(%RBP),%RDI |
0x2ab2d JMP 2abdf |
0x2abdf MOV -0x58(%RBP),%RAX |
0x2abe3 MOV (%RAX,%R8,8),%R9 |
0x2abe7 MOV 0x8(%RAX,%R8,8),%R10 |
0x2abec SUB %R9,%R10 |
0x2abef JLE 2a9d0 |
0x2abf5 CMP $0x8,%R10 |
0x2abf9 JB 2acc8 |
0x2abff MOV %R10,%R11 |
0x2ac02 SHR $0x3,%R11 |
0x2ac06 LEA (,%R9,8),%RSI |
0x2ac0e MOV -0x38(%RBP),%RAX |
0x2ac12 NOPW %CS:(%RAX,%RAX,1) |
(382) 0x2ac20 MOV 0x10(%R13,%RSI,1),%RDI |
(382) 0x2ac25 MOVSD (%R12,%RDI,8),%XMM3 |
(382) 0x2ac2b MOV 0x18(%R13,%RSI,1),%RDI |
(382) 0x2ac30 MOVHPD (%R12,%RDI,8),%XMM3 |
(382) 0x2ac36 MOV 0x30(%R13,%RSI,1),%RDI |
(382) 0x2ac3b MOVSD (%R12,%RDI,8),%XMM4 |
(382) 0x2ac41 MOV 0x38(%R13,%RSI,1),%RDI |
(382) 0x2ac46 MOVHPD (%R12,%RDI,8),%XMM4 |
(382) 0x2ac4c MOV (%R13,%RSI,1),%RDI |
(382) 0x2ac51 MOVSD (%R12,%RDI,8),%XMM5 |
(382) 0x2ac57 MOV 0x8(%R13,%RSI,1),%RDI |
(382) 0x2ac5c MOVHPD (%R12,%RDI,8),%XMM5 |
(382) 0x2ac62 MOV 0x20(%R13,%RSI,1),%RDI |
(382) 0x2ac67 MOVSD (%R12,%RDI,8),%XMM6 |
(382) 0x2ac6d MOV 0x28(%R13,%RSI,1),%RDI |
(382) 0x2ac72 MOVHPD (%R12,%RDI,8),%XMM6 |
(382) 0x2ac78 MOVUPD 0x10(%RAX,%RSI,1),%XMM7 |
(382) 0x2ac7e MULPD %XMM7,%XMM3 |
(382) 0x2ac82 MOVUPD 0x30(%RAX,%RSI,1),%XMM7 |
(382) 0x2ac88 MULPD %XMM7,%XMM4 |
(382) 0x2ac8c MOVUPD (%RAX,%RSI,1),%XMM7 |
(382) 0x2ac91 ADDPD %XMM3,%XMM4 |
(382) 0x2ac95 MOVUPD 0x20(%RAX,%RSI,1),%XMM3 |
(382) 0x2ac9b MULPD %XMM7,%XMM5 |
(382) 0x2ac9f MULPD %XMM3,%XMM6 |
(382) 0x2aca3 ADDPD %XMM5,%XMM6 |
(382) 0x2aca7 ADDPD %XMM4,%XMM6 |
(382) 0x2acab MOVAPD %XMM6,%XMM3 |
(382) 0x2acaf UNPCKHPD %XMM6,%XMM3 |
(382) 0x2acb3 ADDSD %XMM6,%XMM3 |
(382) 0x2acb7 SUBSD %XMM3,%XMM2 |
(382) 0x2acbb ADD $0x40,%RSI |
(382) 0x2acbf DEC %R11 |
(382) 0x2acc2 JNE 2ac20 |
0x2acc8 MOV %R10D,%ESI |
0x2accb AND $0x7,%ESI |
0x2acce DEC %RSI |
0x2acd1 CMP $0x6,%RSI |
0x2acd5 JA 2a9c9 |
/home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/build/AMG/AMG/parcsr_ls/ams.c: 3662 - 3682 |
-------------------------------------------------------------------------------- |
3662: #pragma omp parallel for private(i,ii,jj,res) HYPRE_SMP_SCHEDULE |
3663: #endif |
3664: for (i = 0; i < n; i++) |
3665: { |
3666: /*----------------------------------------------------------- |
3667: * If diagonal is nonzero, relax point i; otherwise, skip it. |
3668: *-----------------------------------------------------------*/ |
3669: if (A_diag_data[A_diag_i[i]] != zero) |
3670: { |
3671: res = f_data[i]; |
3672: for (jj = A_diag_i[i]; jj < A_diag_i[i+1]; jj++) |
3673: { |
3674: ii = A_diag_j[jj]; |
3675: res -= A_diag_data[jj] * Vtemp_data[ii]; |
3676: } |
3677: for (jj = A_offd_i[i]; jj < A_offd_i[i+1]; jj++) |
3678: { |
3679: ii = A_offd_j[jj]; |
3680: res -= A_offd_data[jj] * Vext_data[ii]; |
3681: } |
3682: u_data[i] += (relax_weight*res)/l1_norms[i]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►99.94+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.30 |
CQA speedup if FP arith vectorized | 2.44 |
CQA speedup if fully vectorized | 5.20 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | NA |
Bottlenecks | micro-operation queue, |
Function | hypre_ParCSRRelaxThreads.extracted.57 |
Source | ams.c:3662-3662,ams.c:3669-3677,ams.c:3682-3682 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.50 |
CQA cycles if no scalar integer | 5.00 |
CQA cycles if FP arith vectorized | 2.67 |
CQA cycles if fully vectorized | 1.25 |
Front-end cycles | 6.50 |
DIV/SQRT cycles | 4.25 |
P0 cycles | 4.25 |
P1 cycles | 4.00 |
P2 cycles | 4.00 |
P3 cycles | 3.50 |
P4 cycles | 4.67 |
P5 cycles | 4.67 |
P6 cycles | 4.67 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.50 |
P10 cycles | 0.50 |
P11 cycles | 0.50 |
P12 cycles | 0.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 43.00 |
Nb uops | 39.00 |
Nb loads | 13.00 |
Nb stores | 1.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.46 |
Nb FLOP add-sub | 1.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.23 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.30 |
CQA speedup if FP arith vectorized | 2.44 |
CQA speedup if fully vectorized | 5.20 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | NA |
Bottlenecks | micro-operation queue, |
Function | hypre_ParCSRRelaxThreads.extracted.57 |
Source | ams.c:3662-3662,ams.c:3669-3677,ams.c:3682-3682 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.50 |
CQA cycles if no scalar integer | 5.00 |
CQA cycles if FP arith vectorized | 2.67 |
CQA cycles if fully vectorized | 1.25 |
Front-end cycles | 6.50 |
DIV/SQRT cycles | 4.25 |
P0 cycles | 4.25 |
P1 cycles | 4.00 |
P2 cycles | 4.00 |
P3 cycles | 3.50 |
P4 cycles | 4.67 |
P5 cycles | 4.67 |
P6 cycles | 4.67 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 0.50 |
P10 cycles | 0.50 |
P11 cycles | 0.50 |
P12 cycles | 0.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 43.00 |
Nb uops | 39.00 |
Nb loads | 13.00 |
Nb stores | 1.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.46 |
Nb FLOP add-sub | 1.00 |
Nb FLOP mul | 1.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 17.23 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 8.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.50 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 12.50 |
Path / |
Function | hypre_ParCSRRelaxThreads.extracted.57 |
Source file and lines | ams.c:3662-3682 |
Module | libparcsr_ls.so |
nb instructions | 43 |
nb uops | 39 |
loop length | 195 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 6.50 cycles |
front end | 6.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.25 | 4.25 | 4.00 | 4.00 | 3.50 | 4.67 | 4.67 | 4.67 | 1.00 | 1.00 | 0.50 | 0.50 | 0.50 | 0.50 |
cycles | 4.25 | 4.25 | 4.00 | 4.00 | 3.50 | 4.67 | 4.67 | 4.67 | 1.00 | 1.00 | 0.50 | 0.50 | 0.50 | 0.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 6.50 |
Dispatch | 4.67 |
DIV/SQRT | 5.00 |
Overall L1 | 6.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MULSD %XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
DIVSD (%RSI,%R8,8),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 | scal (12.5%) |
MOV -0x60(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADDSD (%RSI,%R8,8),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
MOVSD %XMM2,(%RSI,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD (%RSI,%R8,8),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x8(%RDI,%R8,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
SUB %R9,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 2abdf <hypre_ParCSRRelaxThreads.extracted.57+0x2ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x8,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 2aaeb <hypre_ParCSRRelaxThreads.extracted.57+0x1fb> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%R11 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
LEA (,%R9,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R10D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x6,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JA 2ab29 <hypre_ParCSRRelaxThreads.extracted.57+0x239> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 2abdf <hypre_ParCSRRelaxThreads.extracted.57+0x2ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%R8,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%R8,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
SUB %R9,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 2a9d0 <hypre_ParCSRRelaxThreads.extracted.57+0xe0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x8,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 2acc8 <hypre_ParCSRRelaxThreads.extracted.57+0x3d8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%R11 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
LEA (,%R9,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R10D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x6,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JA 2a9c9 <hypre_ParCSRRelaxThreads.extracted.57+0xd9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
Function | hypre_ParCSRRelaxThreads.extracted.57 |
Source file and lines | ams.c:3662-3682 |
Module | libparcsr_ls.so |
nb instructions | 43 |
nb uops | 39 |
loop length | 195 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
ADD-SUB / MUL ratio | 1.00 |
micro-operation queue | 6.50 cycles |
front end | 6.50 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.25 | 4.25 | 4.00 | 4.00 | 3.50 | 4.67 | 4.67 | 4.67 | 1.00 | 1.00 | 0.50 | 0.50 | 0.50 | 0.50 |
cycles | 4.25 | 4.25 | 4.00 | 4.00 | 3.50 | 4.67 | 4.67 | 4.67 | 1.00 | 1.00 | 0.50 | 0.50 | 0.50 | 0.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 6.50 |
Dispatch | 4.67 |
DIV/SQRT | 5.00 |
Overall L1 | 6.50 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 12% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MULSD %XMM0,%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
DIVSD (%RSI,%R8,8),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 | scal (12.5%) |
MOV -0x60(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
ADDSD (%RSI,%R8,8),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
MOVSD %XMM2,(%RSI,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 | scal (12.5%) |
MOV -0x68(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOVSD (%RSI,%R8,8),%XMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
MOV 0x8(%RDI,%R8,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
SUB %R9,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 2abdf <hypre_ParCSRRelaxThreads.extracted.57+0x2ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x8,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 2aaeb <hypre_ParCSRRelaxThreads.extracted.57+0x1fb> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%R11 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
LEA (,%R9,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOP | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R10D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x6,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JA 2ab29 <hypre_ParCSRRelaxThreads.extracted.57+0x239> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 2abdf <hypre_ParCSRRelaxThreads.extracted.57+0x2ef> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%R8,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%R8,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
SUB %R9,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JLE 2a9d0 <hypre_ParCSRRelaxThreads.extracted.57+0xe0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
CMP $0x8,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 2acc8 <hypre_ParCSRRelaxThreads.extracted.57+0x3d8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %R10,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%R11 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
LEA (,%R9,8),%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %R10D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $0x7,%ESI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
DEC %RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP $0x6,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JA 2a9c9 <hypre_ParCSRRelaxThreads.extracted.57+0xd9> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |