Loop Id: 1428 | Module: exec | Source: par_multi_interp.c:1585-1660 [...] | Coverage: 0.12% |
---|
Loop Id: 1428 | Module: exec | Source: par_multi_interp.c:1585-1660 [...] | Coverage: 0.12% |
---|
0x459430 MOV -0x30(%RBP),%R8 |
0x459434 INC %R8 |
0x459437 CMP -0x40(%RBP),%R8 |
0x45943b JGE 459957 |
0x459441 MOV -0xc0(%RBP),%RCX |
0x459448 MOV %R8,-0x30(%RBP) |
0x45944c MOV -0xc8(%RBP),%RDX |
0x459453 MOV -0x48(%RBP),%RAX |
0x459457 MOV (%RCX,%R8,8),%RCX |
0x45945b MOV (%RDX,%RCX,8),%RDI |
0x45945f MOV 0x8(%RAX,%RCX,8),%RSI |
0x459464 MOV (%RAX,%RCX,8),%R9 |
0x459468 LEA (%RSI,%RDI,1),%RDX |
0x45946c SUB %R9,%RDX |
0x45946f CMP %RDX,%RDI |
0x459472 JGE 459545 |
0x459478 MOV -0xb0(%RBP),%RDX |
0x45947f SUB %R9,%RSI |
0x459482 MOV 0x8(%RDX),%R8 |
0x459486 CMP $0x8,%RSI |
0x45948a JB 459510 |
0x459490 LEA 0x38(%R8,%RDI,8),%R10 |
0x459495 MOV %RSI,%R9 |
0x459498 SHR $0x3,%R9 |
0x45949c NOPL (%RAX) |
(1436) 0x4594a0 MOV -0x38(%R10),%RDX |
(1436) 0x4594a4 MOV (%R15,%RDX,8),%RDX |
(1436) 0x4594a8 MOV %RCX,(%R13,%RDX,8) |
(1436) 0x4594ad MOV -0x30(%R10),%RDX |
(1436) 0x4594b1 MOV (%R15,%RDX,8),%RDX |
(1436) 0x4594b5 MOV %RCX,(%R13,%RDX,8) |
(1436) 0x4594ba MOV -0x28(%R10),%RDX |
(1436) 0x4594be MOV (%R15,%RDX,8),%RDX |
(1436) 0x4594c2 MOV %RCX,(%R13,%RDX,8) |
(1436) 0x4594c7 MOV -0x20(%R10),%RDX |
(1436) 0x4594cb MOV (%R15,%RDX,8),%RDX |
(1436) 0x4594cf MOV %RCX,(%R13,%RDX,8) |
(1436) 0x4594d4 MOV -0x18(%R10),%RDX |
(1436) 0x4594d8 MOV (%R15,%RDX,8),%RDX |
(1436) 0x4594dc MOV %RCX,(%R13,%RDX,8) |
(1436) 0x4594e1 MOV -0x10(%R10),%RDX |
(1436) 0x4594e5 MOV (%R15,%RDX,8),%RDX |
(1436) 0x4594e9 MOV %RCX,(%R13,%RDX,8) |
(1436) 0x4594ee MOV -0x8(%R10),%RDX |
(1436) 0x4594f2 MOV (%R15,%RDX,8),%RDX |
(1436) 0x4594f6 MOV %RCX,(%R13,%RDX,8) |
(1436) 0x4594fb MOV (%R10),%RDX |
(1436) 0x4594fe ADD $0x40,%R10 |
(1436) 0x459502 DEC %R9 |
(1436) 0x459505 MOV (%R15,%RDX,8),%RDX |
(1436) 0x459509 MOV %RCX,(%R13,%RDX,8) |
(1436) 0x45950e JNE 4594a0 |
0x459510 MOV -0x38(%RBP),%R10 |
0x459514 MOV %RSI,%R9 |
0x459517 AND $-0x8,%R9 |
0x45951b CMP %RSI,%R9 |
0x45951e JAE 459545 |
0x459520 LEA (%R8,%RDI,8),%RDI |
0x459524 NOPW %CS:(%RAX,%RAX,1) |
(1435) 0x459530 MOV (%RDI,%R9,8),%RDX |
(1435) 0x459534 INC %R9 |
(1435) 0x459537 MOV (%R15,%RDX,8),%RDX |
(1435) 0x45953b MOV %RCX,(%R13,%RDX,8) |
(1435) 0x459540 CMP %R9,%RSI |
(1435) 0x459543 JNE 459530 |
0x459545 MOV -0x68(%RBP),%RDX |
0x459549 MOV -0x48(%RBP),%RAX |
0x45954d VXORPD %XMM7,%XMM7,%XMM7 |
0x459551 VXORPD %XMM6,%XMM6,%XMM6 |
0x459555 MOV (%RDX,%RCX,8),%RDI |
0x459559 MOV (%RAX,%RCX,8),%RAX |
0x45955d MOV 0x8(%RDX,%RCX,8),%R8 |
0x459562 INC %RDI |
0x459565 CMP %R8,%RDI |
0x459568 JGE 459610 |
0x45956e MOV -0xe0(%RBP),%RSI |
0x459575 JMP 45958c |
(1434) 0x459580 INC %RDI |
(1434) 0x459583 CMP %R8,%RDI |
(1434) 0x459586 JGE 459610 |
(1434) 0x45958c MOV -0x108(%RBP),%RDX |
(1434) 0x459593 MOV (%RDX,%RDI,8),%R9 |
(1434) 0x459597 CMPQ $-0x3,(%R10,%R9,8) |
(1434) 0x45959c JE 4595c3 |
(1434) 0x45959e CMPQ $0x1,-0x90(%RBP) |
(1434) 0x4595a6 JE 4595ba |
(1434) 0x4595a8 MOV -0x80(%RBP),%R10 |
(1434) 0x4595ac MOV (%R10,%RCX,8),%RDX |
(1434) 0x4595b0 CMP (%R10,%R9,8),%RDX |
(1434) 0x4595b4 MOV -0x38(%RBP),%R10 |
(1434) 0x4595b8 JNE 4595c3 |
(1434) 0x4595ba MOV -0x70(%RBP),%RDX |
(1434) 0x4595be VADDSD (%RDX,%RDI,8),%XMM6,%XMM6 |
(1434) 0x4595c3 CMP $-0x1,%R9 |
(1434) 0x4595c7 JE 459580 |
(1434) 0x4595c9 CMP %RCX,(%R13,%R9,8) |
(1434) 0x4595ce JNE 459580 |
(1434) 0x4595d0 MOV -0x70(%RBP),%R8 |
(1434) 0x4595d4 MOV -0x58(%RBP),%RDX |
(1434) 0x4595d8 MOV -0xf8(%RBP),%R11 |
(1434) 0x4595df VMOVQ (%R8,%RDI,8),%XMM8 |
(1434) 0x4595e5 VMOVQ %XMM8,(%RDX,%RAX,8) |
(1434) 0x4595ea MOV (%R11,%R9,8),%RDX |
(1434) 0x4595ee MOV %RDX,(%RSI,%RAX,8) |
(1434) 0x4595f2 MOV -0x68(%RBP),%RDX |
(1434) 0x4595f6 INC %RAX |
(1434) 0x4595f9 VADDSD (%R8,%RDI,8),%XMM7,%XMM7 |
(1434) 0x4595ff MOV 0x8(%RDX,%RCX,8),%R8 |
(1434) 0x459604 JMP 459580 |
0x459610 MOV -0x50(%RBP),%RSI |
0x459614 MOV -0xd0(%RBP),%RDX |
0x45961b MOV (%RDX,%RCX,8),%R8 |
0x45961f MOV 0x8(%RSI,%RCX,8),%RDI |
0x459624 MOV (%RSI,%RCX,8),%R10 |
0x459628 LEA (%RDI,%R8,1),%RDX |
0x45962c SUB %R10,%RDX |
0x45962f CMP %RDX,%R8 |
0x459632 JGE 4596f4 |
0x459638 MOV -0xb8(%RBP),%RDX |
0x45963f SUB %R10,%RDI |
0x459642 MOV 0x8(%RDX),%R9 |
0x459646 CMP $0x8,%RDI |
0x45964a JB 4596c8 |
0x459650 LEA 0x38(%R9,%R8,8),%R11 |
0x459655 MOV %RDI,%R10 |
0x459658 SHR $0x3,%R10 |
0x45965c NOPL (%RAX) |
(1433) 0x459660 MOV -0x38(%R11),%RDX |
(1433) 0x459664 MOV (%RBX,%RDX,8),%RDX |
(1433) 0x459668 MOV %RCX,(%R14,%RDX,8) |
(1433) 0x45966c MOV -0x30(%R11),%RDX |
(1433) 0x459670 MOV (%RBX,%RDX,8),%RDX |
(1433) 0x459674 MOV %RCX,(%R14,%RDX,8) |
(1433) 0x459678 MOV -0x28(%R11),%RDX |
(1433) 0x45967c MOV (%RBX,%RDX,8),%RDX |
(1433) 0x459680 MOV %RCX,(%R14,%RDX,8) |
(1433) 0x459684 MOV -0x20(%R11),%RDX |
(1433) 0x459688 MOV (%RBX,%RDX,8),%RDX |
(1433) 0x45968c MOV %RCX,(%R14,%RDX,8) |
(1433) 0x459690 MOV -0x18(%R11),%RDX |
(1433) 0x459694 MOV (%RBX,%RDX,8),%RDX |
(1433) 0x459698 MOV %RCX,(%R14,%RDX,8) |
(1433) 0x45969c MOV -0x10(%R11),%RDX |
(1433) 0x4596a0 MOV (%RBX,%RDX,8),%RDX |
(1433) 0x4596a4 MOV %RCX,(%R14,%RDX,8) |
(1433) 0x4596a8 MOV -0x8(%R11),%RDX |
(1433) 0x4596ac MOV (%RBX,%RDX,8),%RDX |
(1433) 0x4596b0 MOV %RCX,(%R14,%RDX,8) |
(1433) 0x4596b4 MOV (%R11),%RDX |
(1433) 0x4596b7 ADD $0x40,%R11 |
(1433) 0x4596bb DEC %R10 |
(1433) 0x4596be MOV (%RBX,%RDX,8),%RDX |
(1433) 0x4596c2 MOV %RCX,(%R14,%RDX,8) |
(1433) 0x4596c6 JNE 459660 |
0x4596c8 MOV %RDI,%R10 |
0x4596cb AND $-0x8,%R10 |
0x4596cf CMP %RDI,%R10 |
0x4596d2 JAE 4596f4 |
0x4596d4 LEA (%R9,%R8,8),%R8 |
0x4596d8 NOPL (%RAX,%RAX,1) |
(1432) 0x4596e0 MOV (%R8,%R10,8),%RDX |
(1432) 0x4596e4 INC %R10 |
(1432) 0x4596e7 MOV (%RBX,%RDX,8),%RDX |
(1432) 0x4596eb MOV %RCX,(%R14,%RDX,8) |
(1432) 0x4596ef CMP %R10,%RDI |
(1432) 0x4596f2 JNE 4596e0 |
0x4596f4 MOV -0x78(%RBP),%RSI |
0x4596f8 MOV -0x50(%RBP),%RDX |
0x4596fc MOV (%RDX,%RCX,8),%RDI |
0x459700 MOV (%RSI,%RCX,8),%R8 |
0x459704 MOV 0x8(%RSI,%RCX,8),%R10 |
0x459709 CMP %R10,%R8 |
0x45970c JGE 4597e0 |
0x459712 MOV -0xa8(%RBP),%RDX |
0x459719 LEA (%RDX,%R8,8),%R9 |
0x45971d JMP 459730 |
(1431) 0x459720 INC %R8 |
(1431) 0x459723 ADD $0x8,%R9 |
(1431) 0x459727 CMP %R10,%R8 |
(1431) 0x45972a JGE 4597e0 |
(1431) 0x459730 CMPQ $0,-0x110(%RBP) |
(1431) 0x459738 MOV %R9,%RDX |
(1431) 0x45973b JE 45974b |
(1431) 0x45973d MOV (%R9),%RDX |
(1431) 0x459740 MOV -0x100(%RBP),%R11 |
(1431) 0x459747 LEA (%R11,%RDX,8),%RDX |
(1431) 0x45974b MOV (%RDX),%R11 |
(1431) 0x45974e CMPQ $-0x3,(%R12,%R11,8) |
(1431) 0x459753 JE 459787 |
(1431) 0x459755 CMPQ $0x1,-0x90(%RBP) |
(1431) 0x45975d JE 45977a |
(1431) 0x45975f MOV -0x80(%RBP),%RDX |
(1431) 0x459763 MOV %R12,%RSI |
(1431) 0x459766 MOV -0xd8(%RBP),%R12 |
(1431) 0x45976d MOV (%RDX,%RCX,8),%RDX |
(1431) 0x459771 CMP (%R12,%R11,8),%RDX |
(1431) 0x459775 MOV %RSI,%R12 |
(1431) 0x459778 JNE 459787 |
(1431) 0x45977a MOV -0x88(%RBP),%RDX |
(1431) 0x459781 VADDSD (%RDX,%R8,8),%XMM6,%XMM6 |
(1431) 0x459787 CMP $-0x1,%R11 |
(1431) 0x45978b JE 459720 |
(1431) 0x45978d CMP %RCX,(%R14,%R11,8) |
(1431) 0x459791 JNE 459720 |
(1431) 0x459793 MOV -0x88(%RBP),%R10 |
(1431) 0x45979a MOV -0x60(%RBP),%RDX |
(1431) 0x45979e MOV -0xf0(%RBP),%RSI |
(1431) 0x4597a5 VMOVQ (%R10,%R8,8),%XMM8 |
(1431) 0x4597ab VMOVQ %XMM8,(%RDX,%RDI,8) |
(1431) 0x4597b0 MOV (%RSI,%R11,8),%RDX |
(1431) 0x4597b4 MOV -0xe8(%RBP),%RSI |
(1431) 0x4597bb MOV %RDX,(%RSI,%RDI,8) |
(1431) 0x4597bf MOV -0x78(%RBP),%RDX |
(1431) 0x4597c3 INC %RDI |
(1431) 0x4597c6 VADDSD (%R10,%R8,8),%XMM7,%XMM7 |
(1431) 0x4597cc MOV 0x8(%RDX,%RCX,8),%R10 |
(1431) 0x4597d1 JMP 459720 |
0x4597e0 MOV -0x68(%RBP),%RDX |
0x4597e4 MOV -0x70(%RBP),%RSI |
0x4597e8 MOV (%RDX,%RCX,8),%RDX |
0x4597ec VMULSD (%RSI,%RDX,8),%XMM7,%XMM7 |
0x4597f1 VUCOMISD %XMM1,%XMM7 |
0x4597f5 JE 4597ff |
0x4597f7 VXORPD %XMM0,%XMM6,%XMM5 |
0x4597fb VDIVSD %XMM7,%XMM5,%XMM5 |
0x4597ff MOV -0x48(%RBP),%RDX |
0x459803 MOV -0x38(%RBP),%R10 |
0x459807 MOV (%RDX,%RCX,8),%R8 |
0x45980b SUB %R8,%RAX |
0x45980e JLE 4598ab |
0x459814 MOV %RAX,%R9 |
0x459817 AND $-0x8,%R9 |
0x45981b JE 459868 |
0x45981d MOV -0x58(%RBP),%RDX |
0x459821 VBROADCASTSD %XMM5,%ZMM6 |
0x459827 LEA -0x1(%R9),%R10 |
0x45982b LEA (%RDX,%R8,8),%R11 |
0x45982f XOR %EDX,%EDX |
0x459831 NOPW %CS:(%RAX,%RAX,1) |
(1430) 0x459840 VMULPD (%R11,%RDX,8),%ZMM6,%ZMM7 |
(1430) 0x459847 VMOVUPD %ZMM7,(%R11,%RDX,8) |
(1430) 0x45984e ADD $0x8,%RDX |
(1430) 0x459852 CMP %R10,%RDX |
(1430) 0x459855 JBE 459840 |
0x459857 MOV -0x38(%RBP),%R10 |
0x45985b CMP %R9,%RAX |
0x45985e JE 4598ab |
0x459860 VPBROADCASTQ %RAX,%ZMM7 |
0x459866 JMP 459877 |
0x459868 VPBROADCASTQ %RAX,%ZMM7 |
0x45986e VBROADCASTSD %XMM5,%ZMM6 |
0x459874 XOR %R9D,%R9D |
0x459877 MOV -0x58(%RBP),%RAX |
0x45987b VPBROADCASTQ %R9,%ZMM8 |
0x459881 ADD %R9,%R8 |
0x459884 VPSUBQ %ZMM8,%ZMM7,%ZMM7 |
0x45988a VPCMPNLEUQ %ZMM2,%ZMM7,%K1 |
0x459891 VMOVUPD (%RAX,%R8,8),%ZMM7{%K1}{z} |
0x459898 VMOVAPD %ZMM7,%ZMM3{%K1} |
0x45989e VMULPD %ZMM6,%ZMM3,%ZMM6 |
0x4598a4 VMOVUPD %ZMM6,(%RAX,%R8,8){%K1} |
0x4598ab MOV -0x50(%RBP),%RAX |
0x4598af MOV (%RAX,%RCX,8),%RCX |
0x4598b3 SUB %RCX,%RDI |
0x4598b6 JLE 459430 |
0x4598bc MOV %RDI,%RSI |
0x4598bf AND $-0x8,%RSI |
0x4598c3 JE 45990c |
0x4598c5 MOV -0x60(%RBP),%RAX |
0x4598c9 VBROADCASTSD %XMM5,%ZMM6 |
0x4598cf LEA -0x1(%RSI),%R8 |
0x4598d3 XOR %EDX,%EDX |
0x4598d5 LEA (%RAX,%RCX,8),%R9 |
0x4598d9 NOPL (%RAX) |
(1429) 0x4598e0 VMULPD (%R9,%RDX,8),%ZMM6,%ZMM7 |
(1429) 0x4598e7 VMOVUPD %ZMM7,(%R9,%RDX,8) |
(1429) 0x4598ee ADD $0x8,%RDX |
(1429) 0x4598f2 CMP %R8,%RDX |
(1429) 0x4598f5 JBE 4598e0 |
0x4598f7 MOV -0x30(%RBP),%R8 |
0x4598fb CMP %RSI,%RDI |
0x4598fe JE 459434 |
0x459904 VPBROADCASTQ %RDI,%ZMM7 |
0x45990a JMP 45991e |
0x45990c MOV -0x30(%RBP),%R8 |
0x459910 VPBROADCASTQ %RDI,%ZMM7 |
0x459916 VBROADCASTSD %XMM5,%ZMM6 |
0x45991c XOR %ESI,%ESI |
0x45991e MOV -0x60(%RBP),%RAX |
0x459922 VPBROADCASTQ %RSI,%ZMM8 |
0x459928 ADD %RSI,%RCX |
0x45992b VPSUBQ %ZMM8,%ZMM7,%ZMM7 |
0x459931 VPCMPNLEUQ %ZMM2,%ZMM7,%K1 |
0x459938 VMOVUPD (%RAX,%RCX,8),%ZMM7{%K1}{z} |
0x45993f VMOVAPD %ZMM7,%ZMM4{%K1} |
0x459945 VMULPD %ZMM6,%ZMM4,%ZMM6 |
0x45994b VMOVUPD %ZMM6,(%RAX,%RCX,8){%K1} |
0x459952 JMP 459434 |
/home/eoseret/qaas_runs_CPU_9468/172-019-1763/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1585 - 1660 |
-------------------------------------------------------------------------------- |
1585: if (n_fine) |
[...] |
1598: thread_start = pass_pointer[1] + (pass_length/num_threads)*my_thread_num; |
[...] |
1605: for (i=thread_start; i < thread_stop; i++) |
1606: { |
1607: i1 = pass_array[i]; |
1608: sum_C = 0; |
1609: sum_N = 0; |
1610: j_start = P_diag_start[i1]; |
1611: j_end = j_start+P_diag_i[i1+1]-P_diag_i[i1]; |
1612: for (j=j_start; j < j_end; j++) |
1613: { |
1614: k1 = P_diag_pass[1][j]; |
1615: tmp_marker[C_array[k1]] = i1; |
1616: } |
1617: cnt = P_diag_i[i1]; |
1618: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1619: { |
1620: j1 = A_diag_j[j]; |
1621: if (CF_marker[j1] != -3 && |
1622: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1623: sum_N += A_diag_data[j]; |
1624: if (j1 != -1 && tmp_marker[j1] == i1) |
1625: { |
1626: P_diag_data[cnt] = A_diag_data[j]; |
1627: P_diag_j[cnt++] = fine_to_coarse[j1]; |
1628: sum_C += A_diag_data[j]; |
1629: } |
1630: } |
1631: j_start = P_offd_start[i1]; |
1632: j_end = j_start+P_offd_i[i1+1]-P_offd_i[i1]; |
1633: for (j=j_start; j < j_end; j++) |
1634: { |
1635: k1 = P_offd_pass[1][j]; |
1636: tmp_marker_offd[C_array_offd[k1]] = i1; |
1637: } |
1638: cnt_offd = P_offd_i[i1]; |
1639: for (j=A_offd_i[i1]; j < A_offd_i[i1+1]; j++) |
1640: { |
1641: if (col_offd_S_to_A) |
1642: j1 = map_A_to_S[A_offd_j[j]]; |
1643: else |
1644: j1 = A_offd_j[j]; |
1645: if (CF_marker_offd[j1] != -3 && |
1646: (num_functions == 1 || dof_func[i1] == dof_func_offd[j1])) |
1647: sum_N += A_offd_data[j]; |
1648: if (j1 != -1 && tmp_marker_offd[j1] == i1) |
1649: { |
1650: P_offd_data[cnt_offd] = A_offd_data[j]; |
1651: P_offd_j[cnt_offd++] = map_S_to_new[j1]; |
1652: sum_C += A_offd_data[j]; |
1653: } |
1654: } |
1655: diagonal = A_diag_data[A_diag_i[i1]]; |
1656: if (sum_C*diagonal) alfa = -sum_N/(sum_C*diagonal); |
1657: for (j=P_diag_i[i1]; j < cnt; j++) |
1658: P_diag_data[j] *= alfa; |
1659: for (j=P_offd_i[i1]; j < cnt_offd; j++) |
1660: P_offd_data[j] *= alfa; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.41 |
CQA speedup if FP arith vectorized | 1.01 |
CQA speedup if fully vectorized | 1.23 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.36 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.27 |
Source | par_multi_interp.c:1585-1585,par_multi_interp.c:1598-1598,par_multi_interp.c:1605-1607,par_multi_interp.c:1610-1614,par_multi_interp.c:1617-1618,par_multi_interp.c:1631-1635,par_multi_interp.c:1638-1639,par_multi_interp.c:1655-1660 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 25.33 |
CQA cycles if no scalar integer | 10.50 |
CQA cycles if FP arith vectorized | 25.11 |
CQA cycles if fully vectorized | 20.57 |
Front-end cycles | 25.33 |
DIV/SQRT cycles | 12.25 |
P0 cycles | 12.25 |
P1 cycles | 12.00 |
P2 cycles | 12.00 |
P3 cycles | 10.50 |
P4 cycles | 18.67 |
P5 cycles | 18.67 |
P6 cycles | 18.67 |
P7 cycles | 5.25 |
P8 cycles | 9.00 |
P9 cycles | 8.50 |
P10 cycles | 3.25 |
P11 cycles | 2.50 |
P12 cycles | 2.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 149.00 |
Nb uops | 152.00 |
Nb loads | 49.00 |
Nb stores | 3.00 |
Nb stack references | 17.00 |
FLOP/cycle | 0.71 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 17.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 25.26 |
Bytes prefetched | 0.00 |
Bytes loaded | 504.00 |
Bytes stored | 136.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 30.61 |
Vectorization ratio load | 22.22 |
Vectorization ratio store | 66.67 |
Vectorization ratio mul | 66.67 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 21.21 |
Vector-efficiency ratio all | 34.69 |
Vector-efficiency ratio load | 31.94 |
Vector-efficiency ratio store | 70.83 |
Vector-efficiency ratio mul | 70.83 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 24.24 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.41 |
CQA speedup if FP arith vectorized | 1.01 |
CQA speedup if fully vectorized | 1.23 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.36 |
Bottlenecks | micro-operation queue, |
Function | hypre_BoomerAMGBuildMultipass.extracted.27 |
Source | par_multi_interp.c:1585-1585,par_multi_interp.c:1598-1598,par_multi_interp.c:1605-1607,par_multi_interp.c:1610-1614,par_multi_interp.c:1617-1618,par_multi_interp.c:1631-1635,par_multi_interp.c:1638-1639,par_multi_interp.c:1655-1660 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 25.33 |
CQA cycles if no scalar integer | 10.50 |
CQA cycles if FP arith vectorized | 25.11 |
CQA cycles if fully vectorized | 20.57 |
Front-end cycles | 25.33 |
DIV/SQRT cycles | 12.25 |
P0 cycles | 12.25 |
P1 cycles | 12.00 |
P2 cycles | 12.00 |
P3 cycles | 10.50 |
P4 cycles | 18.67 |
P5 cycles | 18.67 |
P6 cycles | 18.67 |
P7 cycles | 5.25 |
P8 cycles | 9.00 |
P9 cycles | 8.50 |
P10 cycles | 3.25 |
P11 cycles | 2.50 |
P12 cycles | 2.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 149.00 |
Nb uops | 152.00 |
Nb loads | 49.00 |
Nb stores | 3.00 |
Nb stack references | 17.00 |
FLOP/cycle | 0.71 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 17.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 25.26 |
Bytes prefetched | 0.00 |
Bytes loaded | 504.00 |
Bytes stored | 136.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 30.61 |
Vectorization ratio load | 22.22 |
Vectorization ratio store | 66.67 |
Vectorization ratio mul | 66.67 |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 21.21 |
Vector-efficiency ratio all | 34.69 |
Vector-efficiency ratio load | 31.94 |
Vector-efficiency ratio store | 70.83 |
Vector-efficiency ratio mul | 70.83 |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 24.24 |
Path / |
Function | hypre_BoomerAMGBuildMultipass.extracted.27 |
Source file and lines | par_multi_interp.c:1585-1660 |
Module | exec |
nb instructions | 149 |
nb uops | 152 |
loop length | 670 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 6 |
nb stack references | 17 |
micro-operation queue | 25.33 cycles |
front end | 25.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 12.25 | 12.25 | 12.00 | 12.00 | 10.50 | 18.00 | 18.00 | 18.00 | 3.25 | 9.00 | 8.50 | 3.25 | 2.50 | 2.50 |
cycles | 12.25 | 12.25 | 12.00 | 12.00 | 10.50 | 18.67 | 18.67 | 18.67 | 5.25 | 9.00 | 8.50 | 3.25 | 2.50 | 2.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 25.33 |
Dispatch | 18.67 |
DIV/SQRT | 5.00 |
Overall L1 | 25.33 |
all | 12% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 61% |
load | 66% |
store | 100% |
mul | 66% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 50% |
all | 30% |
load | 22% |
store | 66% |
mul | 66% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 21% |
all | 23% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 20% |
all | 53% |
load | 70% |
store | 100% |
mul | 70% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 33% |
all | 34% |
load | 31% |
store | 70% |
mul | 70% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 24% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
INC %R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP -0x40(%RBP),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JGE 459957 <hypre_BoomerAMGBuildMultipass.extracted.27+0x767> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xc0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R8,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV -0xc8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%R8,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RCX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RSI,%RDI,1),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB %R9,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RDX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 459545 <hypre_BoomerAMGBuildMultipass.extracted.27+0x355> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %R9,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x8(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP $0x8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 459510 <hypre_BoomerAMGBuildMultipass.extracted.27+0x320> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x38(%R8,%RDI,8),%R10 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x3,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RSI,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JAE 459545 <hypre_BoomerAMGBuildMultipass.extracted.27+0x355> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (%R8,%RDI,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV (%RDX,%RCX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RDX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
INC %RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 459610 <hypre_BoomerAMGBuildMultipass.extracted.27+0x420> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xe0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 45958c <hypre_BoomerAMGBuildMultipass.extracted.27+0x39c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x50(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0xd0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RSI,%RCX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RSI,%RCX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
LEA (%RDI,%R8,1),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB %R10,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 4596f4 <hypre_BoomerAMGBuildMultipass.extracted.27+0x504> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %R10,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x8(%RDX),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 4596c8 <hypre_BoomerAMGBuildMultipass.extracted.27+0x4d8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x38(%R9,%R8,8),%R11 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
MOV %RDI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%R10 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %RDI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
AND $-0x8,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
CMP %RDI,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JAE 4596f4 <hypre_BoomerAMGBuildMultipass.extracted.27+0x504> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (%R9,%R8,8),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x78(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RCX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RSI,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RSI,%RCX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
CMP %R10,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 4597e0 <hypre_BoomerAMGBuildMultipass.extracted.27+0x5f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDX,%R8,8),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JMP 459730 <hypre_BoomerAMGBuildMultipass.extracted.27+0x540> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMULSD (%RSI,%RDX,8),%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
VUCOMISD %XMM1,%XMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 | scal (12.5%) |
JE 4597ff <hypre_BoomerAMGBuildMultipass.extracted.27+0x60f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VXORPD %XMM0,%XMM6,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
VDIVSD %XMM7,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 | scal (12.5%) |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV (%RDX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %R8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 4598ab <hypre_BoomerAMGBuildMultipass.extracted.27+0x6bb> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 459868 <hypre_BoomerAMGBuildMultipass.extracted.27+0x678> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VBROADCASTSD %XMM5,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA -0x1(%R9),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RDX,%R8,8),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
CMP %R9,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 4598ab <hypre_BoomerAMGBuildMultipass.extracted.27+0x6bb> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %RAX,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
JMP 459877 <hypre_BoomerAMGBuildMultipass.extracted.27+0x687> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VPBROADCASTQ %RAX,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VBROADCASTSD %XMM5,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %R9,%ZMM8 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
ADD %R9,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPSUBQ %ZMM8,%ZMM7,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ %ZMM2,%ZMM7,%K1 | vect (100.0%) | |||||||||||||||||
VMOVUPD (%RAX,%R8,8),%ZMM7{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPD %ZMM7,%ZMM3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
VMULPD %ZMM6,%ZMM3,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVUPD %ZMM6,(%RAX,%R8,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %RCX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 459430 <hypre_BoomerAMGBuildMultipass.extracted.27+0x240> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 45990c <hypre_BoomerAMGBuildMultipass.extracted.27+0x71c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VBROADCASTSD %XMM5,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA -0x1(%RSI),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
LEA (%RAX,%RCX,8),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %RSI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 459434 <hypre_BoomerAMGBuildMultipass.extracted.27+0x244> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %RDI,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
JMP 45991e <hypre_BoomerAMGBuildMultipass.extracted.27+0x72e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %RDI,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VBROADCASTSD %XMM5,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %RSI,%ZMM8 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
ADD %RSI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPSUBQ %ZMM8,%ZMM7,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ %ZMM2,%ZMM7,%K1 | vect (100.0%) | |||||||||||||||||
VMOVUPD (%RAX,%RCX,8),%ZMM7{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPD %ZMM7,%ZMM4{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
VMULPD %ZMM6,%ZMM4,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVUPD %ZMM6,(%RAX,%RCX,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP 459434 <hypre_BoomerAMGBuildMultipass.extracted.27+0x244> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
Function | hypre_BoomerAMGBuildMultipass.extracted.27 |
Source file and lines | par_multi_interp.c:1585-1660 |
Module | exec |
nb instructions | 149 |
nb uops | 152 |
loop length | 670 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 6 |
nb stack references | 17 |
micro-operation queue | 25.33 cycles |
front end | 25.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 12.25 | 12.25 | 12.00 | 12.00 | 10.50 | 18.00 | 18.00 | 18.00 | 3.25 | 9.00 | 8.50 | 3.25 | 2.50 | 2.50 |
cycles | 12.25 | 12.25 | 12.00 | 12.00 | 10.50 | 18.67 | 18.67 | 18.67 | 5.25 | 9.00 | 8.50 | 3.25 | 2.50 | 2.50 |
Cycles executing div or sqrt instructions | 5.00 |
Front-end | 25.33 |
Dispatch | 18.67 |
DIV/SQRT | 5.00 |
Overall L1 | 25.33 |
all | 12% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 61% |
load | 66% |
store | 100% |
mul | 66% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 50% |
all | 30% |
load | 22% |
store | 66% |
mul | 66% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 21% |
all | 23% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 20% |
all | 53% |
load | 70% |
store | 100% |
mul | 70% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 33% |
all | 34% |
load | 31% |
store | 70% |
mul | 70% |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 24% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput | Vectorization |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
INC %R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP -0x40(%RBP),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 | scal (12.5%) |
JGE 459957 <hypre_BoomerAMGBuildMultipass.extracted.27+0x767> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xc0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV %R8,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 | scal (12.5%) |
MOV -0xc8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RCX,%R8,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RCX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RAX,%RCX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RSI,%RDI,1),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB %R9,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RDX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 459545 <hypre_BoomerAMGBuildMultipass.extracted.27+0x355> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xb0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %R9,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x8(%RDX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP $0x8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 459510 <hypre_BoomerAMGBuildMultipass.extracted.27+0x320> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x38(%R8,%RDI,8),%R10 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
SHR $0x3,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV %RSI,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RSI,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JAE 459545 <hypre_BoomerAMGBuildMultipass.extracted.27+0x355> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (%R8,%RDI,8),%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VXORPD %XMM7,%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
VXORPD %XMM6,%XMM6,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (25.0%) |
MOV (%RDX,%RCX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RDX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
INC %RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %R8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 459610 <hypre_BoomerAMGBuildMultipass.extracted.27+0x420> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xe0(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
JMP 45958c <hypre_BoomerAMGBuildMultipass.extracted.27+0x39c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x50(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0xd0(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RSI,%RCX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RSI,%RCX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
LEA (%RDI,%R8,1),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
SUB %R10,%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
CMP %RDX,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 4596f4 <hypre_BoomerAMGBuildMultipass.extracted.27+0x504> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xb8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %R10,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
MOV 0x8(%RDX),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP $0x8,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JB 4596c8 <hypre_BoomerAMGBuildMultipass.extracted.27+0x4d8> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA 0x38(%R9,%R8,8),%R11 | 2 | 0 | 0 | 0.50 | 0.50 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 2 | 0.50 | N/A |
MOV %RDI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
SHR $0x3,%R10 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 | scal (12.5%) |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV %RDI,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | scal (12.5%) |
AND $-0x8,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
CMP %RDI,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JAE 4596f4 <hypre_BoomerAMGBuildMultipass.extracted.27+0x504> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
LEA (%R9,%R8,8),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPL (%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x78(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x50(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RCX,8),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RSI,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV 0x8(%RSI,%RCX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
CMP %R10,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JGE 4597e0 <hypre_BoomerAMGBuildMultipass.extracted.27+0x5f0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0xa8(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
LEA (%RDX,%R8,8),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JMP 459730 <hypre_BoomerAMGBuildMultipass.extracted.27+0x540> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x68(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x70(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RDX,%RCX,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VMULSD (%RSI,%RDX,8),%XMM7,%XMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 | scal (12.5%) |
VUCOMISD %XMM1,%XMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 6 | 1 | scal (12.5%) |
JE 4597ff <hypre_BoomerAMGBuildMultipass.extracted.27+0x60f> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VXORPD %XMM0,%XMM6,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.25 | vect (25.0%) |
VDIVSD %XMM7,%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 | scal (12.5%) |
MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
MOV (%RDX,%RCX,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %R8,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 4598ab <hypre_BoomerAMGBuildMultipass.extracted.27+0x6bb> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 459868 <hypre_BoomerAMGBuildMultipass.extracted.27+0x678> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x58(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VBROADCASTSD %XMM5,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA -0x1(%R9),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
LEA (%RDX,%R8,8),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
NOPW %CS:(%RAX,%RAX,1) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x38(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | scal (12.5%) |
CMP %R9,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 4598ab <hypre_BoomerAMGBuildMultipass.extracted.27+0x6bb> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %RAX,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
JMP 459877 <hypre_BoomerAMGBuildMultipass.extracted.27+0x687> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
VPBROADCASTQ %RAX,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VBROADCASTSD %XMM5,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV -0x58(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %R9,%ZMM8 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
ADD %R9,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPSUBQ %ZMM8,%ZMM7,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ %ZMM2,%ZMM7,%K1 | vect (100.0%) | |||||||||||||||||
VMOVUPD (%RAX,%R8,8),%ZMM7{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPD %ZMM7,%ZMM3{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
VMULPD %ZMM6,%ZMM3,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVUPD %ZMM6,(%RAX,%R8,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
MOV -0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
MOV (%RAX,%RCX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
SUB %RCX,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JLE 459430 <hypre_BoomerAMGBuildMultipass.extracted.27+0x240> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | N/A |
AND $-0x8,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
JE 45990c <hypre_BoomerAMGBuildMultipass.extracted.27+0x71c> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VBROADCASTSD %XMM5,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
LEA -0x1(%RSI),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
LEA (%RAX,%RCX,8),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 | N/A |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
CMP %RSI,%RDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | scal (12.5%) |
JE 459434 <hypre_BoomerAMGBuildMultipass.extracted.27+0x244> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 | N/A |
VPBROADCASTQ %RDI,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
JMP 45991e <hypre_BoomerAMGBuildMultipass.extracted.27+0x72e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |
MOV -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %RDI,%ZMM7 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
VBROADCASTSD %XMM5,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | N/A |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 | N/A |
VPBROADCASTQ %RSI,%ZMM8 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | scal (12.5%) |
ADD %RSI,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 | N/A |
VPSUBQ %ZMM8,%ZMM7,%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 1 | 0.50 | vect (100.0%) |
VPCMPNLEUQ %ZMM2,%ZMM7,%K1 | vect (100.0%) | |||||||||||||||||
VMOVUPD (%RAX,%RCX,8),%ZMM7{%K1}{z} | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVAPD %ZMM7,%ZMM4{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 | vect (100.0%) |
VMULPD %ZMM6,%ZMM4,%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 1 | vect (100.0%) |
VMOVUPD %ZMM6,(%RAX,%RCX,8){%K1} | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 | vect (100.0%) |
JMP 459434 <hypre_BoomerAMGBuildMultipass.extracted.27+0x244> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | N/A |