Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:117-125 [...] | Coverage: 3.59% |
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Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:117-125 [...] | Coverage: 3.59% |
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/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
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69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 117 - 125 |
-------------------------------------------------------------------------------- |
117: #pragma omp parallel for simd collapse(2) |
118: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
119: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
120: double pre_mass_s = density1(i, j) * pre_vol(i, j); |
121: double post_mass_s = pre_mass_s + mass_flux_x(i, j) - mass_flux_x(i + 1, j + 0); |
122: double post_ener_s = (energy1(i, j) * pre_mass_s + ener_flux(i, j) - ener_flux(i + 1, j + 0)) / post_mass_s; |
123: double advec_vol_s = pre_vol(i, j) + vol_flux_x(i, j) - vol_flux_x(i + 1, j + 0); |
124: density1(i, j) = post_mass_s / advec_vol_s; |
125: energy1(i, j) = post_ener_s; |
0x426650 PUSH %RBP |
0x426651 MOV %RSP,%RBP |
0x426654 PUSH %R15 |
0x426656 PUSH %R14 |
0x426658 PUSH %R13 |
0x42665a PUSH %R12 |
0x42665c PUSH %RBX |
0x42665d AND $-0x40,%RSP |
0x426661 SUB $0xc0,%RSP |
0x426668 MOV 0x38(%RDI),%EAX |
0x42666b MOV 0x3c(%RDI),%ECX |
0x42666e MOV 0x30(%RDI),%ESI |
0x426671 MOV 0x34(%RDI),%EDX |
0x426674 ADD $0x2,%ECX |
0x426677 LEA 0x1(%RAX),%R15D |
0x42667b INC %ESI |
0x42667d MOV %ECX,0x48(%RSP) |
0x426681 MOV %ESI,0x44(%RSP) |
0x426685 CMP %ECX,%R15D |
0x426688 JGE 426d8b |
0x42668e MOV %ECX,%R13D |
0x426691 LEA 0x2(%RDX),%R14D |
0x426695 SUB %R15D,%R13D |
0x426698 CMP %R14D,%ESI |
0x42669b JGE 426d8b |
0x4266a1 MOV %RDI,%RBX |
0x4266a4 MOV %R14D,%EDI |
0x4266a7 SUB %ESI,%EDI |
0x4266a9 MOV %EDI,0x4c(%RSP) |
0x4266ad CALL 4046c0 <omp_get_num_threads@plt> |
0x4266b2 MOV %EAX,%R12D |
0x4266b5 CALL 4045b0 <omp_get_thread_num@plt> |
0x4266ba XOR %EDX,%EDX |
0x4266bc MOV %EAX,%R8D |
0x4266bf MOV 0x4c(%RSP),%EAX |
0x4266c3 IMUL %R13D,%EAX |
0x4266c7 DIV %R12D |
0x4266ca MOV %EAX,%ECX |
0x4266cc CMP %EDX,%R8D |
0x4266cf JB 426daf |
0x4266d5 IMUL %ECX,%R8D |
0x4266d9 LEA (%R8,%RDX,1),%R10D |
0x4266dd LEA (%RCX,%R10,1),%R9D |
0x4266e1 MOV %R9D,0x40(%RSP) |
0x4266e6 CMP %R9D,%R10D |
0x4266e9 JAE 426d8b |
0x4266ef MOV %R10D,%EAX |
0x4266f2 XOR %EDX,%EDX |
0x4266f4 MOV 0x44(%RSP),%R11D |
0x4266f9 MOV (%RBX),%RSI |
0x4266fc DIVL 0x4c(%RSP) |
0x426700 MOV 0x10(%RBX),%R13 |
0x426704 MOV 0x8(%RBX),%RDI |
0x426708 MOV 0x28(%RBX),%R12 |
0x42670c MOV %RSI,0x30(%RSP) |
0x426711 MOV %R13,0x20(%RSP) |
0x426716 MOV %RDI,0x18(%RSP) |
0x42671b MOV %R12,0x10(%RSP) |
0x426720 MOV %R14D,%R9D |
0x426723 MOV 0x20(%RBX),%R14 |
0x426727 MOV 0x18(%RBX),%RBX |
0x42672b MOV %R14,0x28(%RSP) |
0x426730 MOV %RBX,0x8(%RSP) |
0x426735 LEA (%RAX,%R15,1),%R15D |
0x426739 ADD %EDX,%R11D |
0x42673c MOVSXD %R15D,%R8 |
0x42673f MOV %R11D,0x9c(%RSP) |
0x426747 SUB %R11D,%R9D |
0x42674a MOV %R8,0xb8(%RSP) |
0x426752 NOPW (%RAX,%RAX,1) |
(112) 0x426758 CMP %R9D,%ECX |
(112) 0x42675b CMOVBE %ECX,%R9D |
(112) 0x42675f LEA (%R10,%R9,1),%ECX |
(112) 0x426763 MOV %R9D,%EDX |
(112) 0x426766 MOV %ECX,0x98(%RSP) |
(112) 0x42676d CMP %ECX,%R10D |
(112) 0x426770 JAE 426d4b |
(112) 0x426776 MOV 0x20(%RSP),%RSI |
(112) 0x42677b MOV 0x30(%RSP),%R9 |
(112) 0x426780 MOV 0x18(%RSP),%R14 |
(112) 0x426785 MOV 0x28(%RSP),%RAX |
(112) 0x42678a MOV 0x10(%RSI),%R11 |
(112) 0x42678e MOV 0x10(%R9),%R15 |
(112) 0x426792 MOV 0x10(%R14),%R12 |
(112) 0x426796 MOV (%R9),%RBX |
(112) 0x426799 MOV 0x10(%RSP),%R9 |
(112) 0x42679e MOV 0xb8(%RSP),%RCX |
(112) 0x4267a6 MOV %R11,0xb0(%RSP) |
(112) 0x4267ae MOV (%RSI),%R11 |
(112) 0x4267b1 MOV 0x8(%RSP),%RSI |
(112) 0x4267b6 MOV %R12,0xa0(%RSP) |
(112) 0x4267be MOV 0x10(%RAX),%R13 |
(112) 0x4267c2 MOV (%RAX),%RDI |
(112) 0x4267c5 IMUL %RCX,%RBX |
(112) 0x4267c9 MOV %R15,0x78(%RSP) |
(112) 0x4267ce MOV (%R14),%R8 |
(112) 0x4267d1 MOV 0x10(%R9),%R12 |
(112) 0x4267d5 IMUL %RCX,%R11 |
(112) 0x4267d9 MOV (%R9),%R9 |
(112) 0x4267dc MOV (%RSI),%RAX |
(112) 0x4267df IMUL %RCX,%RDI |
(112) 0x4267e3 MOV %R13,0x88(%RSP) |
(112) 0x4267eb IMUL %RCX,%R8 |
(112) 0x4267ef MOV %RBX,0x70(%RSP) |
(112) 0x4267f4 MOV 0x10(%RSI),%R14 |
(112) 0x4267f8 IMUL %RCX,%R9 |
(112) 0x4267fc MOV %R11,0x58(%RSP) |
(112) 0x426801 IMUL %RCX,%RAX |
(112) 0x426805 LEA -0x1(%RDX),%ECX |
(112) 0x426808 MOV %RDI,0x80(%RSP) |
(112) 0x426810 MOV %R8,0x90(%RSP) |
(112) 0x426818 MOV %R9,0x60(%RSP) |
(112) 0x42681d MOV %RAX,0xa8(%RSP) |
(112) 0x426825 CMP $0x6,%ECX |
(112) 0x426828 JBE 426da0 |
(112) 0x42682e MOVSXD 0x9c(%RSP),%RAX |
(112) 0x426836 LEA (%RBX,%RAX,1),%RBX |
(112) 0x42683a LEA (%R9,%RAX,1),%R9 |
(112) 0x42683e LEA (%R15,%RBX,8),%RSI |
(112) 0x426842 LEA (%RDI,%RAX,1),%R15 |
(112) 0x426846 SAL $0x3,%R9 |
(112) 0x42684a LEA (%R11,%RAX,1),%RDI |
(112) 0x42684e MOV 0xb0(%RSP),%R11 |
(112) 0x426856 LEA (%R13,%R15,8),%R13 |
(112) 0x42685b SAL $0x3,%RDI |
(112) 0x42685f LEA (%R8,%RAX,1),%R15 |
(112) 0x426863 MOV 0xa0(%RSP),%R8 |
(112) 0x42686b LEA 0x8(%R11,%RDI,1),%RCX |
(112) 0x426870 LEA (%R11,%RDI,1),%RBX |
(112) 0x426874 MOV 0xa8(%RSP),%RDI |
(112) 0x42687c MOV %RCX,0x50(%RSP) |
(112) 0x426881 LEA (%R8,%R15,8),%RCX |
(112) 0x426885 LEA (%R12,%R9,1),%R11 |
(112) 0x426889 ADD %RDI,%RAX |
(112) 0x42688c LEA 0x8(%R12,%R9,1),%R9 |
(112) 0x426891 SAL $0x3,%RAX |
(112) 0x426895 LEA (%R14,%RAX,1),%R8 |
(112) 0x426899 LEA 0x8(%R14,%RAX,1),%RDI |
(112) 0x42689e MOV %EDX,%EAX |
(112) 0x4268a0 SHR $0x3,%EAX |
(112) 0x4268a3 MOV %EAX,%R15D |
(112) 0x4268a6 MOV %R15,%RAX |
(112) 0x4268a9 SAL $0x6,%RAX |
(112) 0x4268ad MOV %RAX,0x68(%RSP) |
(112) 0x4268b2 XOR %EAX,%EAX |
(112) 0x4268b4 AND $0x1,%R15D |
(112) 0x4268b8 JE 42691f |
(112) 0x4268ba VMOVUPD (%R13),%ZMM0 |
(112) 0x4268c1 VMOVUPD (%R11),%ZMM7 |
(112) 0x4268c7 MOV $0x40,%EAX |
(112) 0x4268cc MOV 0x50(%RSP),%R15 |
(112) 0x4268d1 CMPQ $0x40,0x68(%RSP) |
(112) 0x4268d7 VMULPD (%RSI),%ZMM0,%ZMM1 |
(112) 0x4268dd VSUBPD (%R9),%ZMM7,%ZMM3 |
(112) 0x4268e3 VADDPD (%R8),%ZMM0,%ZMM5 |
(112) 0x4268e9 VSUBPD (%RDI),%ZMM5,%ZMM6 |
(112) 0x4268ef VSUBPD (%R15),%ZMM1,%ZMM2 |
(112) 0x4268f5 VFMADD132PD (%RCX),%ZMM3,%ZMM1 |
(112) 0x4268fb VADDPD (%RBX),%ZMM2,%ZMM4 |
(112) 0x426901 VDIVPD %ZMM6,%ZMM4,%ZMM8 |
(112) 0x426907 VDIVPD %ZMM4,%ZMM1,%ZMM9 |
(112) 0x42690d VMOVUPD %ZMM8,(%RSI) |
(112) 0x426913 VMOVUPD %ZMM9,(%RCX) |
(112) 0x426919 JE 426a0b |
(112) 0x42691f MOV %R10D,0x3c(%RSP) |
(112) 0x426924 MOV 0xb8(%RSP),%R15 |
(112) 0x42692c MOV 0x50(%RSP),%R10 |
(113) 0x426931 VMOVUPD (%R13,%RAX,1),%ZMM10 |
(113) 0x426939 VMOVUPD (%R11,%RAX,1),%ZMM14 |
(113) 0x426940 VMULPD (%RSI,%RAX,1),%ZMM10,%ZMM11 |
(113) 0x426947 VSUBPD (%R9,%RAX,1),%ZMM14,%ZMM15 |
(113) 0x42694e VADDPD (%R8,%RAX,1),%ZMM10,%ZMM0 |
(113) 0x426955 VSUBPD (%RDI,%RAX,1),%ZMM0,%ZMM1 |
(113) 0x42695c VSUBPD (%R10,%RAX,1),%ZMM11,%ZMM12 |
(113) 0x426963 VFMADD132PD (%RCX,%RAX,1),%ZMM15,%ZMM11 |
(113) 0x42696a VADDPD (%RBX,%RAX,1),%ZMM12,%ZMM13 |
(113) 0x426971 VDIVPD %ZMM13,%ZMM11,%ZMM4 |
(113) 0x426977 VDIVPD %ZMM1,%ZMM13,%ZMM2 |
(113) 0x42697d VMOVUPD %ZMM2,(%RSI,%RAX,1) |
(113) 0x426984 VMOVUPD %ZMM4,(%RCX,%RAX,1) |
(113) 0x42698b VMOVUPD 0x40(%R13,%RAX,1),%ZMM7 |
(113) 0x426993 VMOVUPD 0x40(%R11,%RAX,1),%ZMM5 |
(113) 0x42699b VMULPD 0x40(%RSI,%RAX,1),%ZMM7,%ZMM6 |
(113) 0x4269a3 VSUBPD 0x40(%R9,%RAX,1),%ZMM5,%ZMM9 |
(113) 0x4269ab VADDPD 0x40(%R8,%RAX,1),%ZMM7,%ZMM10 |
(113) 0x4269b3 VSUBPD 0x40(%RDI,%RAX,1),%ZMM10,%ZMM11 |
(113) 0x4269bb VSUBPD 0x40(%R10,%RAX,1),%ZMM6,%ZMM3 |
(113) 0x4269c3 VFMADD132PD 0x40(%RCX,%RAX,1),%ZMM9,%ZMM6 |
(113) 0x4269cb VADDPD 0x40(%RBX,%RAX,1),%ZMM3,%ZMM8 |
(113) 0x4269d3 VDIVPD %ZMM11,%ZMM8,%ZMM12 |
(113) 0x4269d9 VDIVPD %ZMM8,%ZMM6,%ZMM13 |
(113) 0x4269df VMOVUPD %ZMM12,0x40(%RSI,%RAX,1) |
(113) 0x4269e7 VMOVUPD %ZMM13,0x40(%RCX,%RAX,1) |
(113) 0x4269ef SUB $-0x80,%RAX |
(113) 0x4269f3 CMP %RAX,0x68(%RSP) |
(113) 0x4269f8 JNE 426931 |
(112) 0x4269fe MOV %R15,0xb8(%RSP) |
(112) 0x426a06 MOV 0x3c(%RSP),%R10D |
(112) 0x426a0b MOV 0x9c(%RSP),%ESI |
(112) 0x426a12 MOV %EDX,%R13D |
(112) 0x426a15 AND $-0x8,%R13D |
(112) 0x426a19 ADD %R13D,%R10D |
(112) 0x426a1c LEA (%R13,%RSI,1),%ESI |
(112) 0x426a21 TEST $0x7,%DL |
(112) 0x426a24 JE 426d43 |
(112) 0x426a2a SUB %R13D,%EDX |
(112) 0x426a2d LEA -0x1(%RDX),%EBX |
(112) 0x426a30 CMP $0x2,%EBX |
(112) 0x426a33 JBE 426b12 |
(112) 0x426a39 MOVSXD 0x9c(%RSP),%RAX |
(112) 0x426a41 MOV 0x70(%RSP),%RCX |
(112) 0x426a46 MOV 0x90(%RSP),%RDI |
(112) 0x426a4e MOV 0x78(%RSP),%R9 |
(112) 0x426a53 LEA (%RCX,%RAX,1),%R11 |
(112) 0x426a57 MOV 0xa0(%RSP),%R15 |
(112) 0x426a5f MOV 0x58(%RSP),%R8 |
(112) 0x426a64 ADD %RAX,%RDI |
(112) 0x426a67 ADD %R13,%R11 |
(112) 0x426a6a MOV 0x60(%RSP),%RCX |
(112) 0x426a6f ADD %R13,%RDI |
(112) 0x426a72 LEA (%R9,%R11,8),%RBX |
(112) 0x426a76 LEA (%R8,%RAX,1),%R9 |
(112) 0x426a7a LEA (%R15,%RDI,8),%R11 |
(112) 0x426a7e MOV 0xa8(%RSP),%RDI |
(112) 0x426a86 MOV 0x80(%RSP),%R15 |
(112) 0x426a8e LEA (%RCX,%RAX,1),%R8 |
(112) 0x426a92 ADD %R13,%R9 |
(112) 0x426a95 ADD %R13,%R8 |
(112) 0x426a98 ADD %RAX,%RDI |
(112) 0x426a9b ADD %R15,%RAX |
(112) 0x426a9e VMOVUPD 0x8(%R12,%R8,8),%YMM4 |
(112) 0x426aa5 VMOVUPD (%R12,%R8,8),%YMM1 |
(112) 0x426aab ADD %R13,%RDI |
(112) 0x426aae ADD %R13,%RAX |
(112) 0x426ab1 MOV 0x88(%RSP),%R13 |
(112) 0x426ab9 VMOVUPD (%R13,%RAX,8),%YMM14 |
(112) 0x426ac0 MOV 0xb0(%RSP),%RAX |
(112) 0x426ac8 VMULPD (%RBX),%YMM14,%YMM15 |
(112) 0x426acc VADDPD (%R14,%RDI,8),%YMM14,%YMM7 |
(112) 0x426ad2 VSUBPD 0x8(%R14,%RDI,8),%YMM7,%YMM6 |
(112) 0x426ad9 VADDPD (%RAX,%R9,8),%YMM15,%YMM0 |
(112) 0x426adf VFMSUB132PD (%R11),%YMM4,%YMM15 |
(112) 0x426ae4 VSUBPD 0x8(%RAX,%R9,8),%YMM0,%YMM2 |
(112) 0x426aeb VADDPD %YMM15,%YMM1,%YMM8 |
(112) 0x426af0 VDIVPD %YMM6,%YMM2,%YMM3 |
(112) 0x426af4 VDIVPD %YMM2,%YMM8,%YMM5 |
(112) 0x426af8 VMOVUPD %YMM3,(%RBX) |
(112) 0x426afc VMOVUPD %YMM5,(%R11) |
(112) 0x426b01 TEST $0x3,%DL |
(112) 0x426b04 JE 426d43 |
(112) 0x426b0a AND $-0x4,%EDX |
(112) 0x426b0d ADD %EDX,%R10D |
(112) 0x426b10 ADD %EDX,%ESI |
(112) 0x426b12 MOV 0x80(%RSP),%RCX |
(112) 0x426b1a MOVSXD %ESI,%RDX |
(112) 0x426b1d MOV 0x88(%RSP),%RDI |
(112) 0x426b25 LEA 0x1(%RSI),%EAX |
(112) 0x426b28 MOV 0x70(%RSP),%R9 |
(112) 0x426b2d MOV 0x78(%RSP),%RBX |
(112) 0x426b32 CLTQ |
(112) 0x426b34 LEA (%RCX,%RDX,1),%R8 |
(112) 0x426b38 MOV 0xb0(%RSP),%R13 |
(112) 0x426b40 VMOVSD (%RDI,%R8,8),%XMM9 |
(112) 0x426b46 ADD %RDX,%R9 |
(112) 0x426b49 MOV 0x90(%RSP),%RDI |
(112) 0x426b51 LEA (%RBX,%R9,8),%R11 |
(112) 0x426b55 MOV 0x58(%RSP),%RBX |
(112) 0x426b5a MOV 0xa0(%RSP),%R8 |
(112) 0x426b62 VMULSD (%R11),%XMM9,%XMM10 |
(112) 0x426b67 ADD %RDX,%RDI |
(112) 0x426b6a LEA (%RBX,%RDX,1),%RCX |
(112) 0x426b6e LEA (%RAX,%RBX,1),%R15 |
(112) 0x426b72 LEA (%R13,%R15,8),%R9 |
(112) 0x426b77 VADDSD (%R13,%RCX,8),%XMM10,%XMM11 |
(112) 0x426b7e MOV 0x60(%RSP),%R13 |
(112) 0x426b83 LEA (%R8,%RDI,8),%RCX |
(112) 0x426b87 LEA (%R13,%RDX,1),%R15 |
(112) 0x426b8c LEA (%R13,%RAX,1),%RDI |
(112) 0x426b91 VMOVSD (%R12,%R15,8),%XMM13 |
(112) 0x426b97 LEA (%R12,%RDI,8),%R8 |
(112) 0x426b9b MOV 0xa8(%RSP),%R15 |
(112) 0x426ba3 VMOVSD (%R8),%XMM14 |
(112) 0x426ba8 VSUBSD (%R9),%XMM11,%XMM12 |
(112) 0x426bad ADD %R15,%RDX |
(112) 0x426bb0 MOV %R15,%RDI |
(112) 0x426bb3 VADDSD (%R14,%RDX,8),%XMM9,%XMM15 |
(112) 0x426bb9 VFMSUB132SD (%RCX),%XMM14,%XMM10 |
(112) 0x426bbe LEA 0x1(%R10),%EDX |
(112) 0x426bc2 ADD %RAX,%RDI |
(112) 0x426bc5 LEA (%R14,%RDI,8),%RDI |
(112) 0x426bc9 VSUBSD (%RDI),%XMM15,%XMM0 |
(112) 0x426bcd VADDSD %XMM13,%XMM10,%XMM1 |
(112) 0x426bd2 VDIVSD %XMM0,%XMM12,%XMM2 |
(112) 0x426bd6 VDIVSD %XMM12,%XMM1,%XMM4 |
(112) 0x426bdb VMOVSD %XMM2,(%R11) |
(112) 0x426be0 MOV 0x98(%RSP),%R11D |
(112) 0x426be8 VMOVSD %XMM4,(%RCX) |
(112) 0x426bec CMP %R11D,%EDX |
(112) 0x426bef JAE 426d43 |
(112) 0x426bf5 MOV 0x70(%RSP),%RCX |
(112) 0x426bfa MOV 0x78(%RSP),%R15 |
(112) 0x426bff ADD $0x2,%R10D |
(112) 0x426c03 MOV 0x80(%RSP),%RDX |
(112) 0x426c0b MOV 0x88(%RSP),%R11 |
(112) 0x426c13 ADD %RAX,%RCX |
(112) 0x426c16 VMOVSD (%R8),%XMM5 |
(112) 0x426c1b LEA (%R15,%RCX,8),%RCX |
(112) 0x426c1f LEA (%RAX,%RDX,1),%R15 |
(112) 0x426c23 VMOVSD (%R11,%R15,8),%XMM7 |
(112) 0x426c29 LEA 0x2(%RSI),%EDX |
(112) 0x426c2c MOV 0xb0(%RSP),%R15 |
(112) 0x426c34 MOVSXD %EDX,%RDX |
(112) 0x426c37 VMULSD (%RCX),%XMM7,%XMM6 |
(112) 0x426c3b LEA (%RBX,%RDX,1),%R11 |
(112) 0x426c3f VADDSD (%RDI),%XMM7,%XMM10 |
(112) 0x426c43 LEA (%R15,%R11,8),%R11 |
(112) 0x426c47 MOV 0xa0(%RSP),%R15 |
(112) 0x426c4f MOV 0x98(%RSP),%EDI |
(112) 0x426c56 VSUBSD (%R11),%XMM6,%XMM3 |
(112) 0x426c5b VADDSD (%R9),%XMM3,%XMM8 |
(112) 0x426c60 MOV 0x90(%RSP),%R9 |
(112) 0x426c68 ADD %R9,%RAX |
(112) 0x426c6b LEA (%R13,%RDX,1),%R9 |
(112) 0x426c70 LEA (%R12,%R9,8),%R9 |
(112) 0x426c74 LEA (%R15,%RAX,8),%RAX |
(112) 0x426c78 MOV 0xa8(%RSP),%R15 |
(112) 0x426c80 VSUBSD (%R9),%XMM5,%XMM9 |
(112) 0x426c85 LEA (%R15,%RDX,1),%R8 |
(112) 0x426c89 LEA (%R14,%R8,8),%R8 |
(112) 0x426c8d VFMADD132SD (%RAX),%XMM9,%XMM6 |
(112) 0x426c92 VSUBSD (%R8),%XMM10,%XMM11 |
(112) 0x426c97 VDIVSD %XMM11,%XMM8,%XMM12 |
(112) 0x426c9c VDIVSD %XMM8,%XMM6,%XMM13 |
(112) 0x426ca1 VMOVSD %XMM12,(%RCX) |
(112) 0x426ca5 VMOVSD %XMM13,(%RAX) |
(112) 0x426ca9 CMP %EDI,%R10D |
(112) 0x426cac JAE 426d43 |
(112) 0x426cb2 MOV 0x70(%RSP),%RCX |
(112) 0x426cb7 MOV 0x78(%RSP),%R10 |
(112) 0x426cbc ADD $0x3,%ESI |
(112) 0x426cbf MOV 0x80(%RSP),%RDI |
(112) 0x426cc7 MOVSXD %ESI,%RSI |
(112) 0x426cca VMOVSD (%R9),%XMM1 |
(112) 0x426ccf ADD %RDX,%RCX |
(112) 0x426cd2 ADD %RSI,%RBX |
(112) 0x426cd5 ADD %RSI,%R13 |
(112) 0x426cd8 ADD %RSI,%R15 |
(112) 0x426cdb LEA (%R10,%RCX,8),%RAX |
(112) 0x426cdf MOV 0x88(%RSP),%RCX |
(112) 0x426ce7 ADD %RDX,%RDI |
(112) 0x426cea MOV 0xb0(%RSP),%R10 |
(112) 0x426cf2 VSUBSD (%R12,%R13,8),%XMM1,%XMM4 |
(112) 0x426cf8 VMOVSD (%RCX,%RDI,8),%XMM14 |
(112) 0x426cfd MOV 0xa0(%RSP),%RDI |
(112) 0x426d05 VMULSD (%RAX),%XMM14,%XMM15 |
(112) 0x426d09 VADDSD (%R8),%XMM14,%XMM7 |
(112) 0x426d0e VSUBSD (%R14,%R15,8),%XMM7,%XMM6 |
(112) 0x426d14 VSUBSD (%R10,%RBX,8),%XMM15,%XMM0 |
(112) 0x426d1a VADDSD (%R11),%XMM0,%XMM2 |
(112) 0x426d1f MOV 0x90(%RSP),%R11 |
(112) 0x426d27 ADD %RDX,%R11 |
(112) 0x426d2a LEA (%RDI,%R11,8),%RBX |
(112) 0x426d2e VDIVSD %XMM6,%XMM2,%XMM3 |
(112) 0x426d32 VFMADD132SD (%RBX),%XMM4,%XMM15 |
(112) 0x426d37 VDIVSD %XMM2,%XMM15,%XMM8 |
(112) 0x426d3b VMOVSD %XMM3,(%RAX) |
(112) 0x426d3f VMOVSD %XMM8,(%RBX) |
(112) 0x426d43 MOV 0x98(%RSP),%R10D |
(112) 0x426d4b INCQ 0xb8(%RSP) |
(112) 0x426d53 MOV 0xb8(%RSP),%R12 |
(112) 0x426d5b ADD $0,%R12D |
(112) 0x426d5f CMP %R12D,0x48(%RSP) |
(112) 0x426d64 JLE 426d88 |
(112) 0x426d66 MOV 0x40(%RSP),%ECX |
(112) 0x426d6a MOV 0x44(%RSP),%R14D |
(112) 0x426d6f MOV 0x4c(%RSP),%R9D |
(112) 0x426d74 MOV %R14D,0x9c(%RSP) |
(112) 0x426d7c SUB %R10D,%ECX |
(112) 0x426d7f JMP 426758 |
0x426d84 NOPL (%RAX) |
0x426d88 VZEROUPPER |
0x426d8b LEA -0x28(%RBP),%RSP |
0x426d8f POP %RBX |
0x426d90 POP %R12 |
0x426d92 POP %R13 |
0x426d94 POP %R14 |
0x426d96 POP %R15 |
0x426d98 POP %RBP |
0x426d99 RET |
0x426d9a NOPW (%RAX,%RAX,1) |
(112) 0x426da0 MOV 0x9c(%RSP),%ESI |
(112) 0x426da7 XOR %R13D,%R13D |
(112) 0x426daa JMP 426a2a |
0x426daf INC %ECX |
0x426db1 XOR %EDX,%EDX |
0x426db3 JMP 4266d5 |
0x426db8 NOPL (%RAX,%RAX,1) |
Path / |
Source file and lines | advec_cell.cpp:117-125 |
Module | exec |
nb instructions | 85 |
nb uops | 95 |
loop length | 309 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 15.83 cycles |
front end | 15.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.10 | 8.00 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
cycles | 6.10 | 11.93 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.08-15.21 |
Stall cycles | 0.00 |
Front-end | 15.83 |
Dispatch | 11.93 |
DIV/SQRT | 12.00 |
Overall L1 | 15.83 |
all | 3% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 12% |
all | 8% |
load | 9% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x3c(%RDI),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x34(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %ECX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 426d8b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %ECX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x2(%RDX),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 426d8b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %ESI,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4046c0 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4045b0 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x4c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 426daf <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x75f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %ECX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RCX,%R10,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 426d8b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x44(%RSP),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x4c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV 0x10(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x20(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EDX,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD %R15D,%R8 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R11D,0x9c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R11D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4266d5 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | advec_cell.cpp:117-125 |
Module | exec |
nb instructions | 85 |
nb uops | 95 |
loop length | 309 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 15.83 cycles |
front end | 15.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.10 | 8.00 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
cycles | 6.10 | 11.93 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.08-15.21 |
Stall cycles | 0.00 |
Front-end | 15.83 |
Dispatch | 11.93 |
DIV/SQRT | 12.00 |
Overall L1 | 15.83 |
all | 3% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 12% |
all | 8% |
load | 9% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x3c(%RDI),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x34(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %ECX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 426d8b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %ECX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x2(%RDX),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 426d8b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %ESI,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4046c0 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4045b0 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x4c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 426daf <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x75f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %ECX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RCX,%R10,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 426d8b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x44(%RSP),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x4c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV 0x10(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x20(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EDX,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD %R15D,%R8 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R11D,0x9c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R11D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4266d5 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0– | 3.59 | 2.69 |
▼Loop 112 - advec_cell.cpp:120-125 - exec– | 0 | 0 |
○Loop 113 - advec_cell.cpp:120-125 - exec | 3.59 | 2.68 |