Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:65-110 [...] | Coverage: 2.27% |
---|
Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:65-110 [...] | Coverage: 2.27% |
---|
/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
-------------------------------------------------------------------------------- |
46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 65 - 110 |
-------------------------------------------------------------------------------- |
65: #pragma omp parallel for simd collapse(2) |
66: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
67: for (int i = (x_min + 1); i < (x_max + 2 + 2); i++) |
68: ({ |
69: int upwind, donor, downwind, dif; |
70: double sigmat, sigma3, sigma4, sigmav, sigmam, diffuw, diffdw, limiter, wind; |
71: if (vol_flux_x(i, j) > 0.0) { |
72: upwind = i - 2; |
73: donor = i - 1; |
74: downwind = i; |
75: dif = donor; |
76: } else { |
77: upwind = std::min(i + 1, x_max + 2); |
78: donor = i; |
79: downwind = i - 1; |
80: dif = upwind; |
81: } |
82: sigmat = std::fabs(vol_flux_x(i, j)) / pre_vol(donor, j); |
83: sigma3 = (1.0 + sigmat) * (vertexdx[i] / vertexdx[dif]); |
84: sigma4 = 2.0 - sigmat; |
85: sigmav = sigmat; |
86: diffuw = density1(donor, j) - density1(upwind, j); |
87: diffdw = density1(downwind, j) - density1(donor, j); |
88: wind = 1.0; |
89: if (diffdw <= 0.0) wind = -1.0; |
90: if (diffuw * diffdw > 0.0) { |
91: limiter = (1.0 - sigmav) * wind * |
92: std::fmin(std::fmin(std::fabs(diffuw), std::fabs(diffdw)), |
93: one_by_six * (sigma3 * std::fabs(diffuw) + sigma4 * std::fabs(diffdw))); |
94: } else { |
95: limiter = 0.0; |
96: } |
97: mass_flux_x(i, j) = vol_flux_x(i, j) * (density1(donor, j) + limiter); |
98: sigmam = std::fabs(mass_flux_x(i, j)) / (density1(donor, j) * pre_vol(donor, j)); |
99: diffuw = energy1(donor, j) - energy1(upwind, j); |
100: diffdw = energy1(downwind, j) - energy1(donor, j); |
101: wind = 1.0; |
102: if (diffdw <= 0.0) wind = -1.0; |
103: if (diffuw * diffdw > 0.0) { |
104: limiter = (1.0 - sigmam) * wind * |
105: std::fmin(std::fmin(std::fabs(diffuw), std::fabs(diffdw)), |
106: one_by_six * (sigma3 * std::fabs(diffuw) + sigma4 * std::fabs(diffdw))); |
107: } else { |
108: limiter = 0.0; |
109: } |
110: ener_flux(i, j) = mass_flux_x(i, j) * (energy1(donor, j) + limiter); |
0x41b9d0 PUSH %RBP |
0x41b9d1 MOV %RSP,%RBP |
0x41b9d4 PUSH %R15 |
0x41b9d6 PUSH %R14 |
0x41b9d8 PUSH %R13 |
0x41b9da PUSH %R12 |
0x41b9dc PUSH %RBX |
0x41b9dd AND $-0x40,%RSP |
0x41b9e1 SUB $0x1c0,%RSP |
0x41b9e8 MOV %RDX,0x40(%RSP) |
0x41b9ed MOV 0x50(%RBP),%RAX |
0x41b9f1 MOV 0x40(%RBP),%R12 |
0x41b9f5 MOV 0x38(%RBP),%RDX |
0x41b9f9 MOV 0x30(%RBP),%RSI |
0x41b9fd MOV %RSI,0x78(%RSP) |
0x41ba02 MOV 0x28(%RBP),%R15 |
0x41ba06 MOV 0x20(%RBP),%RBX |
0x41ba0a MOV 0x18(%RBP),%R14 |
0x41ba0e MOV 0x10(%RBP),%R13 |
0x41ba12 MOVL $0,0x64(%RSP) |
0x41ba1a TEST %RAX,%RAX |
0x41ba1d JS 41bf97 |
0x41ba23 MOV %RDX,0x28(%RSP) |
0x41ba28 MOV %RCX,0x48(%RSP) |
0x41ba2d MOV %R8,0x38(%RSP) |
0x41ba32 MOV %R9,0x30(%RSP) |
0x41ba37 MOV (%RDI),%ESI |
0x41ba39 MOVQ $0,0x90(%RSP) |
0x41ba45 MOV %RAX,0x88(%RSP) |
0x41ba4d MOVQ $0x1,0xb8(%RSP) |
0x41ba59 SUB $0x8,%RSP |
0x41ba5d LEA 0xc0(%RSP),%RAX |
0x41ba65 LEA 0x6c(%RSP),%RCX |
0x41ba6a LEA 0x98(%RSP),%R8 |
0x41ba72 LEA 0x90(%RSP),%R9 |
0x41ba7a MOV $0x48c5f0,%EDI |
0x41ba7f MOV %ESI,0x68(%RSP) |
0x41ba83 MOV $0x22,%EDX |
0x41ba88 PUSH $0x1 |
0x41ba8a PUSH $0x1 |
0x41ba8c PUSH %RAX |
0x41ba8d CALL 4031d0 <__kmpc_for_static_init_8@plt> |
0x41ba92 ADD $0x20,%RSP |
0x41ba96 MOV 0x90(%RSP),%RSI |
0x41ba9e MOV 0x88(%RSP),%RAX |
0x41baa6 MOV %RAX,0x70(%RSP) |
0x41baab CMP %RAX,%RSI |
0x41baae JA 41bfb0 |
0x41bab4 MOV %R12,%RDX |
0x41bab7 SUB 0x28(%RSP),%EDX |
0x41babb MOV (%R14),%RAX |
0x41babe MOV %RAX,0x50(%RSP) |
0x41bac3 MOV 0x10(%R14),%RAX |
0x41bac7 MOV %RAX,0x80(%RSP) |
0x41bacf MOV (%RBX),%RAX |
0x41bad2 MOV (%RAX),%RCX |
0x41bad5 MOV %RCX,0x58(%RSP) |
0x41bada MOV 0x10(%RAX),%R14 |
0x41bade MOV 0x48(%RSP),%RAX |
0x41bae3 MOV 0x8(%RAX),%R12 |
0x41bae7 MOV 0x38(%RSP),%RAX |
0x41baec MOV (%RAX),%RAX |
0x41baef MOV (%RAX),%R11 |
0x41baf2 MOV 0x10(%RAX),%RBX |
0x41baf6 MOV (%R13),%RDI |
0x41bafa MOV 0x10(%R13),%RAX |
0x41bafe MOV %RAX,0x38(%RSP) |
0x41bb03 MOV 0x40(%RSP),%RCX |
0x41bb08 ADD $0x2,%ECX |
0x41bb0b LEA 0x1(%RSI),%RAX |
0x41bb0f MOV 0x70(%RSP),%R8 |
0x41bb14 MOV %R15,%R10 |
0x41bb17 LEA 0x1(%R8),%R15 |
0x41bb1b CMP %R15,%RAX |
0x41bb1e CMOVG %RAX,%R15 |
0x41bb22 MOV 0x30(%RSP),%RAX |
0x41bb27 MOV (%RAX),%R8 |
0x41bb2a MOV 0x10(%RAX),%R13 |
0x41bb2e MOV (%R10),%R9 |
0x41bb31 MOV 0x10(%R10),%RAX |
0x41bb35 MOV 0x58(%RSP),%R10 |
0x41bb3a MOV %RAX,0x30(%RSP) |
0x41bb3f SUB %RSI,%R15 |
0x41bb42 TEST $-0x8,%R15D |
0x41bb49 MOV %RCX,0x40(%RSP) |
0x41bb4e MOV %RDX,0x68(%RSP) |
0x41bb53 MOV %RDI,0xb0(%RSP) |
0x41bb5b MOV %R9,0xa0(%RSP) |
0x41bb63 MOV %R11,0x48(%RSP) |
0x41bb68 MOV %R8,0xa8(%RSP) |
0x41bb70 JE 41bfd2 |
0x41bb76 VPBROADCASTQ %RDX,%ZMM16 |
0x41bb7c MOV 0x78(%RSP),%RAX |
0x41bb81 VPBROADCASTQ %RAX,%ZMM0 |
0x41bb87 VMOVDQU64 %ZMM0,0x140(%RSP) |
0x41bb8f MOV 0x28(%RSP),%RAX |
0x41bb94 VPBROADCASTD %EAX,%YMM19 |
0x41bb9a MOV 0x50(%RSP),%RAX |
0x41bb9f VPBROADCASTQ %RAX,%ZMM20 |
0x41bba5 VPBROADCASTD %ECX,%YMM21 |
0x41bbab VPBROADCASTQ %R10,%ZMM22 |
0x41bbb1 VPBROADCASTQ %R11,%ZMM23 |
0x41bbb7 VPBROADCASTQ %RDI,%ZMM24 |
0x41bbbd VPBROADCASTQ %R8,%ZMM25 |
0x41bbc3 VPBROADCASTQ %R9,%ZMM26 |
0x41bbc9 VPBROADCASTQ %RSI,%ZMM0 |
0x41bbcf VPADDQ 0x518a7(%RIP),%ZMM0,%ZMM17 |
0x41bbd9 MOV %R15,0x98(%RSP) |
0x41bbe1 MOV %R15D,%EDI |
0x41bbe4 AND $-0x8,%EDI |
0x41bbe7 XOR %R15D,%R15D |
0x41bbea VBROADCASTSD 0x51464(%RIP),%ZMM28 |
0x41bbf4 VPBROADCASTQ %R14,%ZMM0 |
0x41bbfa VMOVDQU64 %ZMM0,0x100(%RSP) |
0x41bc02 VBROADCASTSD 0x5143c(%RIP),%ZMM31 |
0x41bc0c VPBROADCASTQ %RBX,%ZMM0 |
0x41bc12 VMOVDQU64 %ZMM0,0xc0(%RSP) |
0x41bc1a VBROADCASTSD 0x51464(%RIP),%ZMM29 |
0x41bc24 VBROADCASTSD 0x51462(%RIP),%ZMM18 |
0x41bc2e VXORPD %XMM27,%XMM27,%XMM27 |
0x41bc34 JMP 41bc7f |
0x41bc36 NOPW %CS:(%RAX,%RAX,1) |
(146) 0x41bc40 VADDPD %ZMM10,%ZMM7,%ZMM7{%K1} |
(146) 0x41bc46 VMULPD %ZMM6,%ZMM7,%ZMM2 |
(146) 0x41bc4c VPMULLQ %ZMM1,%ZMM26,%ZMM1 |
(146) 0x41bc52 VPADDQ %ZMM0,%ZMM1,%ZMM0 |
(146) 0x41bc58 KXNORW %K0,%K0,%K1 |
(146) 0x41bc5c MOV 0x30(%RSP),%RAX |
(146) 0x41bc61 VSCATTERQPD %ZMM2,(%RAX,%ZMM0,8){%K1} |
(146) 0x41bc68 VPADDQ 0x51406(%RIP){1to8},%ZMM17,%ZMM17 |
(146) 0x41bc72 ADD $0x8,%R15 |
(146) 0x41bc76 CMP %RDI,%R15 |
(146) 0x41bc79 JAE 41bfa6 |
(146) 0x41bc7f VMOVDQA64 %ZMM17,%ZMM0 |
(146) 0x41bc85 VMOVDQA64 %ZMM16,%ZMM1 |
(146) 0x41bc8b LEA 0x3fe2e(%RIP),%RAX |
(146) 0x41bc92 CALL %RAX |
(146) 0x41bc94 VPADDQ 0x140(%RSP),%ZMM0,%ZMM30 |
(146) 0x41bc9c VMOVDQA64 %ZMM17,%ZMM0 |
(146) 0x41bca2 VMOVDQA64 %ZMM16,%ZMM1 |
(146) 0x41bca8 CALLQ 0x70322(%RIP) |
(146) 0x41bcae VPMOVQD %ZMM0,%YMM0 |
(146) 0x41bcb4 VPADDD %YMM0,%YMM19,%YMM3 |
(146) 0x41bcba VPMOVSXDQ %YMM3,%ZMM0 |
(146) 0x41bcc0 VPSLLQ $0x20,%ZMM30,%ZMM1 |
(146) 0x41bcc7 VPSRAQ $0x20,%ZMM1,%ZMM1 |
(146) 0x41bcce VPXOR %XMM2,%XMM2,%XMM2 |
(146) 0x41bcd2 VPMULLQ %ZMM1,%ZMM20,%ZMM2 |
(146) 0x41bcd8 VPADDQ %ZMM0,%ZMM2,%ZMM2 |
(146) 0x41bcde KXNORW %K0,%K0,%K1 |
(146) 0x41bce2 VXORPD %XMM6,%XMM6,%XMM6 |
(146) 0x41bce6 MOV 0x80(%RSP),%RAX |
(146) 0x41bcee VGATHERQPD (%RAX,%ZMM2,8),%ZMM6{%K1} |
(146) 0x41bcf5 VCMPPD $0x1,%ZMM6,%ZMM27,%K1 |
(146) 0x41bcfc VPCMPEQD %YMM5,%YMM5,%YMM5 |
(146) 0x41bd00 VPADDD %YMM5,%YMM3,%YMM2 |
(146) 0x41bd04 VPMOVSXDQ %YMM2,%ZMM4 |
(146) 0x41bd0a VPBLENDMQ %ZMM4,%ZMM0,%ZMM7{%K1} |
(146) 0x41bd10 VPXOR %XMM2,%XMM2,%XMM2 |
(146) 0x41bd14 VPMULLQ %ZMM1,%ZMM22,%ZMM2 |
(146) 0x41bd1a VPADDQ %ZMM7,%ZMM2,%ZMM2 |
(146) 0x41bd20 KXNORW %K0,%K0,%K2 |
(146) 0x41bd24 VXORPD %XMM8,%XMM8,%XMM8 |
(146) 0x41bd29 VGATHERQPD (%R14,%ZMM2,8),%ZMM8{%K2} |
(146) 0x41bd30 VPSUBD %YMM5,%YMM3,%YMM5 |
(146) 0x41bd34 KXNORW %K0,%K0,%K2 |
(146) 0x41bd38 VXORPD %XMM9,%XMM9,%XMM9 |
(146) 0x41bd3d VGATHERDPD (%R12,%YMM3,8),%ZMM9{%K2} |
(146) 0x41bd44 VPMINSD %YMM5,%YMM21,%YMM5 |
(146) 0x41bd4a VPMOVSXDQ %YMM5,%ZMM5 |
(146) 0x41bd50 VPADDD 0x52aa6(%RIP){1to8},%YMM3,%YMM3 |
(146) 0x41bd5a VMOVDQA64 %ZMM5,%ZMM10 |
(146) 0x41bd60 VPMOVSXDQ %YMM3,%ZMM10{%K1} |
(146) 0x41bd66 VMOVDQA64 %ZMM4,%ZMM5{%K1} |
(146) 0x41bd6c KXNORW %K0,%K0,%K2 |
(146) 0x41bd70 VPXOR %XMM3,%XMM3,%XMM3 |
(146) 0x41bd74 VGATHERQPD (%R12,%ZMM5,8),%ZMM3{%K2} |
(146) 0x41bd7b VPBLENDMQ %ZMM0,%ZMM4,%ZMM11{%K1} |
(146) 0x41bd81 VPXOR %XMM4,%XMM4,%XMM4 |
(146) 0x41bd85 VPMULLQ %ZMM1,%ZMM23,%ZMM4 |
(146) 0x41bd8b VPADDQ %ZMM7,%ZMM4,%ZMM5 |
(146) 0x41bd91 KXNORW %K0,%K0,%K1 |
(146) 0x41bd95 VXORPD %XMM12,%XMM12,%XMM12 |
(146) 0x41bd9a VGATHERQPD (%RBX,%ZMM5,8),%ZMM12{%K1} |
(146) 0x41bda1 VANDPD %ZMM28,%ZMM6,%ZMM13 |
(146) 0x41bda7 VDIVPD %ZMM8,%ZMM13,%ZMM8 |
(146) 0x41bdad VPADDQ %ZMM10,%ZMM4,%ZMM13 |
(146) 0x41bdb3 KXNORW %K0,%K0,%K1 |
(146) 0x41bdb7 VXORPD %XMM14,%XMM14,%XMM14 |
(146) 0x41bdbc VGATHERQPD (%RBX,%ZMM13,8),%ZMM14{%K1} |
(146) 0x41bdc3 VFMADD213PD %ZMM9,%ZMM8,%ZMM9 |
(146) 0x41bdc9 VDIVPD %ZMM3,%ZMM9,%ZMM3 |
(146) 0x41bdcf VPADDQ %ZMM11,%ZMM4,%ZMM4 |
(146) 0x41bdd5 KXNORW %K0,%K0,%K1 |
(146) 0x41bdd9 VXORPD %XMM9,%XMM9,%XMM9 |
(146) 0x41bdde VGATHERQPD (%RBX,%ZMM4,8),%ZMM9{%K1} |
(146) 0x41bde5 VBROADCASTSD 0x51291(%RIP),%ZMM4 |
(146) 0x41bdef VSUBPD %ZMM8,%ZMM4,%ZMM4 |
(146) 0x41bdf5 VSUBPD %ZMM14,%ZMM12,%ZMM13 |
(146) 0x41bdfb VSUBPD %ZMM12,%ZMM9,%ZMM9 |
(146) 0x41be01 VMULPD %ZMM13,%ZMM9,%ZMM14 |
(146) 0x41be07 VCMPPD $0x1,%ZMM14,%ZMM27,%K1 |
(146) 0x41be0e VANDPD %ZMM28,%ZMM13,%ZMM13 |
(146) 0x41be14 VANDPD %ZMM28,%ZMM9,%ZMM14 |
(146) 0x41be1a VMINPD %ZMM14,%ZMM13,%ZMM15 |
(146) 0x41be20 VMULPD %ZMM3,%ZMM13,%ZMM13 |
(146) 0x41be26 VFMADD231PD %ZMM14,%ZMM4,%ZMM13 |
(146) 0x41be2c VMULPD %ZMM29,%ZMM13,%ZMM13 |
(146) 0x41be32 VMINPD %ZMM13,%ZMM15,%ZMM13 |
(146) 0x41be38 VCMPPD $0x1,%ZMM9,%ZMM27,%K2 |
(146) 0x41be3f VSUBPD %ZMM8,%ZMM31,%ZMM8 |
(146) 0x41be45 VXORPD %ZMM18,%ZMM8,%ZMM9 |
(146) 0x41be4b VMOVAPD %ZMM8,%ZMM9{%K2} |
(146) 0x41be51 VFMADD231PD %ZMM9,%ZMM13,%ZMM12{%K1} |
(146) 0x41be57 VMULPD %ZMM6,%ZMM12,%ZMM6 |
(146) 0x41be5d VPXOR %XMM8,%XMM8,%XMM8 |
(146) 0x41be62 VPMULLQ %ZMM1,%ZMM24,%ZMM8 |
(146) 0x41be68 VPADDQ %ZMM0,%ZMM8,%ZMM8 |
(146) 0x41be6e KXNORW %K0,%K0,%K1 |
(146) 0x41be72 MOV 0x38(%RSP),%RAX |
(146) 0x41be77 VSCATTERQPD %ZMM6,(%RAX,%ZMM8,8){%K1} |
(146) 0x41be7e VPXOR %XMM8,%XMM8,%XMM8 |
(146) 0x41be83 VPMULLQ %ZMM1,%ZMM25,%ZMM8 |
(146) 0x41be89 VPADDQ %ZMM7,%ZMM8,%ZMM9 |
(146) 0x41be8f KXNORW %K0,%K0,%K1 |
(146) 0x41be93 VPXOR %XMM7,%XMM7,%XMM7 |
(146) 0x41be97 VGATHERQPD (%R13,%ZMM9,8),%ZMM7{%K1} |
(146) 0x41be9f VPADDQ %ZMM10,%ZMM8,%ZMM9 |
(146) 0x41bea5 KXNORW %K0,%K0,%K1 |
(146) 0x41bea9 VPXOR %XMM10,%XMM10,%XMM10 |
(146) 0x41beae VGATHERQPD (%R13,%ZMM9,8),%ZMM10{%K1} |
(146) 0x41beb6 VPADDQ %ZMM11,%ZMM8,%ZMM8 |
(146) 0x41bebc KXNORW %K0,%K0,%K1 |
(146) 0x41bec0 VPXOR %XMM11,%XMM11,%XMM11 |
(146) 0x41bec5 VGATHERQPD (%R13,%ZMM8,8),%ZMM11{%K1} |
(146) 0x41becd VSUBPD %ZMM10,%ZMM7,%ZMM9 |
(146) 0x41bed3 VSUBPD %ZMM7,%ZMM11,%ZMM8 |
(146) 0x41bed9 VMULPD %ZMM9,%ZMM8,%ZMM10 |
(146) 0x41bedf VCMPPD $0x1,%ZMM10,%ZMM27,%K1 |
(146) 0x41bee6 KORTESTB %K1,%K1 |
(146) 0x41beea VXORPD %XMM10,%XMM10,%XMM10 |
(146) 0x41beef JE 41bc40 |
(146) 0x41bef5 VPSLLQ $0x3,%ZMM2,%ZMM2 |
(146) 0x41befc VPADDQ 0x100(%RSP),%ZMM2,%ZMM2 |
(146) 0x41bf04 VPSLLQ $0x3,%ZMM5,%ZMM5 |
(146) 0x41bf0b VPADDQ 0xc0(%RSP),%ZMM5,%ZMM5 |
(146) 0x41bf13 KMOVQ %K1,%K2 |
(146) 0x41bf18 VGATHERQPD (,%ZMM5,1),%ZMM10{%K2} |
(146) 0x41bf23 KMOVQ %K1,%K2 |
(146) 0x41bf28 VXORPD %XMM5,%XMM5,%XMM5 |
(146) 0x41bf2c VGATHERQPD (,%ZMM2,1),%ZMM5{%K2} |
(146) 0x41bf37 VANDPD %ZMM28,%ZMM6,%ZMM2 |
(146) 0x41bf3d VMULPD %ZMM10,%ZMM5,%ZMM5 |
(146) 0x41bf43 VDIVPD %ZMM5,%ZMM2,%ZMM2 |
(146) 0x41bf49 VCMPPD $0x1,%ZMM8,%ZMM27,%K2 |
(146) 0x41bf50 VSUBPD %ZMM2,%ZMM31,%ZMM2 |
(146) 0x41bf56 VXORPD %ZMM18,%ZMM2,%ZMM5 |
(146) 0x41bf5c VMOVAPD %ZMM2,%ZMM5{%K2} |
(146) 0x41bf62 VANDPD %ZMM28,%ZMM9,%ZMM2 |
(146) 0x41bf68 VANDPD %ZMM28,%ZMM8,%ZMM8 |
(146) 0x41bf6e VMINPD %ZMM8,%ZMM2,%ZMM9 |
(146) 0x41bf74 VMULPD %ZMM3,%ZMM2,%ZMM2 |
(146) 0x41bf7a VFMADD213PD %ZMM2,%ZMM8,%ZMM4 |
(146) 0x41bf80 VMULPD %ZMM29,%ZMM4,%ZMM2 |
(146) 0x41bf86 VMINPD %ZMM2,%ZMM9,%ZMM2 |
(146) 0x41bf8c VMULPD %ZMM2,%ZMM5,%ZMM10 |
(146) 0x41bf92 JMP 41bc40 |
0x41bf97 LEA -0x28(%RBP),%RSP |
0x41bf9b POP %RBX |
0x41bf9c POP %R12 |
0x41bf9e POP %R13 |
0x41bfa0 POP %R14 |
0x41bfa2 POP %R15 |
0x41bfa4 POP %RBP |
0x41bfa5 RET |
0x41bfa6 CMP %RDI,0x98(%RSP) |
0x41bfae JNE 41bfcf |
0x41bfb0 MOV $0x48c610,%EDI |
0x41bfb5 MOV 0x60(%RSP),%ESI |
0x41bfb9 LEA -0x28(%RBP),%RSP |
0x41bfbd POP %RBX |
0x41bfbe POP %R12 |
0x41bfc0 POP %R13 |
0x41bfc2 POP %R14 |
0x41bfc4 POP %R15 |
0x41bfc6 POP %RBP |
0x41bfc7 VZEROUPPER |
0x41bfca JMP 403050 |
0x41bfcf ADD %RDI,%RSI |
0x41bfd2 VPXOR %XMM0,%XMM0,%XMM0 |
0x41bfd6 VMOVDDUP 0x5107a(%RIP),%XMM1 |
0x41bfde VMOVSD 0x5109a(%RIP),%XMM2 |
0x41bfe6 VMOVSD 0x5105a(%RIP),%XMM3 |
0x41bfee VMOVDDUP 0x5109a(%RIP),%XMM4 |
0x41bff6 VMOVDDUP 0x5105a(%RIP),%XMM5 |
0x41bffe VMOVSD 0x51082(%RIP),%XMM6 |
0x41c006 JMP 41c03d |
0x41c008 NOPL (%RAX,%RAX,1) |
(145) 0x41c010 VADDSD %XMM11,%XMM10,%XMM8 |
(145) 0x41c015 VMULSD %XMM7,%XMM8,%XMM7 |
(145) 0x41c019 IMUL 0xa0(%RSP),%RCX |
(145) 0x41c022 ADD %RAX,%RCX |
(145) 0x41c025 MOV 0x30(%RSP),%RAX |
(145) 0x41c02a VMOVSD %XMM7,(%RAX,%RCX,8) |
(145) 0x41c02f INC %RSI |
(145) 0x41c032 CMP 0x70(%RSP),%RSI |
(145) 0x41c037 JG 41bfb0 |
(145) 0x41c03d MOV %RSI,%RDI |
(145) 0x41c040 SHR $0x20,%RDI |
(145) 0x41c044 JE 41c060 |
(145) 0x41c046 MOV %RSI,%RAX |
(145) 0x41c049 XOR %EDX,%EDX |
(145) 0x41c04b MOV 0x68(%RSP),%R8 |
(145) 0x41c050 DIV %R8 |
(145) 0x41c053 MOV %RAX,%RCX |
(145) 0x41c056 JMP 41c06e |
0x41c058 NOPL (%RAX,%RAX,1) |
(145) 0x41c060 MOV %ESI,%EAX |
(145) 0x41c062 XOR %EDX,%EDX |
(145) 0x41c064 MOV 0x68(%RSP),%R8 |
(145) 0x41c069 DIV %R8D |
(145) 0x41c06c MOV %EAX,%ECX |
(145) 0x41c06e MOV 0x28(%RSP),%R9 |
(145) 0x41c073 MOV 0x50(%RSP),%R10 |
(145) 0x41c078 MOV 0x58(%RSP),%R11 |
(145) 0x41c07d TEST %RDI,%RDI |
(145) 0x41c080 JE 41c090 |
(145) 0x41c082 MOV %RSI,%RAX |
(145) 0x41c085 CQTO |
(145) 0x41c087 IDIV %R8 |
(145) 0x41c08a JMP 41c097 |
0x41c08c NOPL (%RAX) |
(145) 0x41c090 MOV %ESI,%EAX |
(145) 0x41c092 XOR %EDX,%EDX |
(145) 0x41c094 DIV %R8D |
(145) 0x41c097 ADD 0x78(%RSP),%RCX |
(145) 0x41c09c ADD %R9D,%EDX |
(145) 0x41c09f MOVSXD %EDX,%RAX |
(145) 0x41c0a2 MOVSXD %ECX,%RCX |
(145) 0x41c0a5 MOV %R10,%RDI |
(145) 0x41c0a8 IMUL %RCX,%RDI |
(145) 0x41c0ac ADD %RAX,%RDI |
(145) 0x41c0af MOV 0x80(%RSP),%R8 |
(145) 0x41c0b7 VMOVSD (%R8,%RDI,8),%XMM7 |
(145) 0x41c0bd VUCOMISD %XMM7,%XMM0 |
(145) 0x41c0c1 JAE 41c0e0 |
(145) 0x41c0c3 LEA -0x2(%RDX),%EDI |
(145) 0x41c0c6 DEC %EDX |
(145) 0x41c0c8 MOVSXD %EDX,%R10 |
(145) 0x41c0cb MOVSXD %EDI,%RDX |
(145) 0x41c0ce MOV %RAX,%RDI |
(145) 0x41c0d1 MOV %R10,%R9 |
(145) 0x41c0d4 JMP 41c0fe |
0x41c0d6 NOPW %CS:(%RAX,%RAX,1) |
(145) 0x41c0e0 LEA 0x1(%RDX),%R8D |
(145) 0x41c0e4 MOV 0x40(%RSP),%RDI |
(145) 0x41c0e9 CMP %R8D,%EDI |
(145) 0x41c0ec CMOVL %EDI,%R8D |
(145) 0x41c0f0 DEC %EDX |
(145) 0x41c0f2 MOVSXD %EDX,%RDI |
(145) 0x41c0f5 MOVSXD %R8D,%RDX |
(145) 0x41c0f8 MOV %RDX,%R10 |
(145) 0x41c0fb MOV %RAX,%R9 |
(145) 0x41c0fe VANDPD %XMM1,%XMM7,%XMM8 |
(145) 0x41c102 MOV %R11,%R8 |
(145) 0x41c105 IMUL %RCX,%R8 |
(145) 0x41c109 ADD %R9,%R8 |
(145) 0x41c10c VDIVSD (%R14,%R8,8),%XMM8,%XMM12 |
(145) 0x41c112 VMOVSD (%R12,%RAX,8),%XMM8 |
(145) 0x41c118 VFMADD213SD %XMM8,%XMM12,%XMM8 |
(145) 0x41c11d VDIVSD (%R12,%R10,8),%XMM8,%XMM8 |
(145) 0x41c123 MOV 0x48(%RSP),%R11 |
(145) 0x41c128 IMUL %RCX,%R11 |
(145) 0x41c12c LEA (%R11,%R9,1),%R10 |
(145) 0x41c130 VMOVSD (%RBX,%R10,8),%XMM11 |
(145) 0x41c136 LEA (%R11,%RDX,1),%R15 |
(145) 0x41c13a VSUBSD (%RBX,%R15,8),%XMM11,%XMM13 |
(145) 0x41c140 ADD %RDI,%R11 |
(145) 0x41c143 VMOVSD (%RBX,%R11,8),%XMM10 |
(145) 0x41c149 VSUBSD %XMM12,%XMM2,%XMM9 |
(145) 0x41c14e VSUBSD %XMM11,%XMM10,%XMM14 |
(145) 0x41c153 VMULSD %XMM13,%XMM14,%XMM15 |
(145) 0x41c158 VXORPD %XMM10,%XMM10,%XMM10 |
(145) 0x41c15d VUCOMISD %XMM10,%XMM15 |
(145) 0x41c162 VXORPD %XMM15,%XMM15,%XMM15 |
(145) 0x41c167 JBE 41c1a4 |
(145) 0x41c169 VSUBSD %XMM12,%XMM3,%XMM12 |
(145) 0x41c16e VXORPD %XMM4,%XMM12,%XMM15 |
(145) 0x41c172 VCMPSD $0x1,%XMM14,%XMM0,%K1 |
(145) 0x41c179 VMOVSD %XMM12,%XMM15,%XMM15{%K1} |
(145) 0x41c17f VANDPD %XMM5,%XMM13,%XMM12 |
(145) 0x41c183 VANDPD %XMM5,%XMM14,%XMM13 |
(145) 0x41c187 VMINSD %XMM13,%XMM12,%XMM14 |
(145) 0x41c18c VMULSD %XMM8,%XMM12,%XMM12 |
(145) 0x41c191 VFMADD231SD %XMM13,%XMM9,%XMM12 |
(145) 0x41c196 VMULSD %XMM6,%XMM12,%XMM12 |
(145) 0x41c19a VMINSD %XMM12,%XMM14,%XMM12 |
(145) 0x41c19f VMULSD %XMM15,%XMM12,%XMM15 |
(145) 0x41c1a4 VADDSD %XMM11,%XMM15,%XMM11 |
(145) 0x41c1a9 VMULSD %XMM7,%XMM11,%XMM7 |
(145) 0x41c1ad MOV 0xb0(%RSP),%R11 |
(145) 0x41c1b5 IMUL %RCX,%R11 |
(145) 0x41c1b9 ADD %RAX,%R11 |
(145) 0x41c1bc MOV 0x38(%RSP),%R15 |
(145) 0x41c1c1 VMOVSD %XMM7,(%R15,%R11,8) |
(145) 0x41c1c7 MOV 0xa8(%RSP),%R11 |
(145) 0x41c1cf IMUL %RCX,%R11 |
(145) 0x41c1d3 ADD %R11,%R9 |
(145) 0x41c1d6 VMOVSD (%R13,%R9,8),%XMM11 |
(145) 0x41c1dd ADD %R11,%RDX |
(145) 0x41c1e0 VSUBSD (%R13,%RDX,8),%XMM11,%XMM12 |
(145) 0x41c1e7 ADD %RDI,%R11 |
(145) 0x41c1ea VMOVSD (%R13,%R11,8),%XMM13 |
(145) 0x41c1f1 VSUBSD %XMM11,%XMM13,%XMM13 |
(145) 0x41c1f6 VMULSD %XMM12,%XMM13,%XMM14 |
(145) 0x41c1fb VUCOMISD %XMM10,%XMM14 |
(145) 0x41c200 JBE 41c010 |
(145) 0x41c206 VANDPD %XMM5,%XMM7,%XMM10 |
(145) 0x41c20a VMOVSD (%R14,%R8,8),%XMM14 |
(145) 0x41c210 VMULSD (%RBX,%R10,8),%XMM14,%XMM14 |
(145) 0x41c216 VDIVSD %XMM14,%XMM10,%XMM10 |
(145) 0x41c21b VSUBSD %XMM10,%XMM3,%XMM10 |
(145) 0x41c220 VXORPD %XMM4,%XMM10,%XMM14 |
(145) 0x41c224 VCMPSD $0x1,%XMM13,%XMM0,%K1 |
(145) 0x41c22b VMOVSD %XMM10,%XMM14,%XMM14{%K1} |
(145) 0x41c231 VANDPD %XMM5,%XMM12,%XMM10 |
(145) 0x41c235 VANDPD %XMM5,%XMM13,%XMM12 |
(145) 0x41c239 VMINSD %XMM12,%XMM10,%XMM13 |
(145) 0x41c23e VMULSD %XMM8,%XMM10,%XMM8 |
(145) 0x41c243 VFMADD213SD %XMM8,%XMM12,%XMM9 |
(145) 0x41c248 VMULSD %XMM6,%XMM9,%XMM8 |
(145) 0x41c24c VMINSD %XMM8,%XMM13,%XMM8 |
(145) 0x41c251 VMULSD %XMM8,%XMM14,%XMM10 |
(145) 0x41c256 JMP 41c010 |
0x41c25b NOPL (%RAX,%RAX,1) |
Path / |
Source file and lines | advec_cell.cpp:65-110 |
Module | exec |
nb instructions | 157 |
nb uops | 159 |
loop length | 772 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 2 |
used zmm registers | 13 |
nb stack references | 33 |
micro-operation queue | 26.50 cycles |
front end | 26.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.50 | 5.60 | 20.67 | 20.67 | 18.50 | 13.00 | 5.50 | 18.50 | 18.50 | 18.50 | 5.40 | 20.67 |
cycles | 5.50 | 5.60 | 20.67 | 20.67 | 18.50 | 13.00 | 5.50 | 18.50 | 18.50 | 18.50 | 5.40 | 20.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 26.33 |
Stall cycles | 0.00 |
Front-end | 26.50 |
Dispatch | 20.67 |
Overall L1 | 26.50 |
all | 9% |
load | 9% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 9% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 20% |
all | 9% |
load | 4% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 17% |
load | 19% |
store | 21% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 31% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 16% |
load | 16% |
store | 21% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 31% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x1c0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 41bf97 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x5c7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x6c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x98(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x90(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48c5f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4031d0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x90(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 41bfb0 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x5e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x28(%RSP),%EDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x70(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R15,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R10),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RSI,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $-0x8,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 41bfd2 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x602> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RDX,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %ECX,%YMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R10,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R11,%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDI,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R8,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R9,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x518a7(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
MOV %R15,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD 0x51464(%RIP),%ZMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPBROADCASTQ %R14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VBROADCASTSD 0x5143c(%RIP),%ZMM31 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPBROADCASTQ %RBX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VBROADCASTSD 0x51464(%RIP),%ZMM29 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x51462(%RIP),%ZMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VXORPD %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 41bc7f <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x2af> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
CMP %RDI,0x98(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 41bfcf <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x5ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x48c610,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x60(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPXOR %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x5107a(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x5109a(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x5105a(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x5109a(%RIP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x5105a(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x51082(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 41c03d <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x66d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | advec_cell.cpp:65-110 |
Module | exec |
nb instructions | 157 |
nb uops | 159 |
loop length | 772 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 2 |
used zmm registers | 13 |
nb stack references | 33 |
micro-operation queue | 26.50 cycles |
front end | 26.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.50 | 5.60 | 20.67 | 20.67 | 18.50 | 13.00 | 5.50 | 18.50 | 18.50 | 18.50 | 5.40 | 20.67 |
cycles | 5.50 | 5.60 | 20.67 | 20.67 | 18.50 | 13.00 | 5.50 | 18.50 | 18.50 | 18.50 | 5.40 | 20.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 26.33 |
Stall cycles | 0.00 |
Front-end | 26.50 |
Dispatch | 20.67 |
Overall L1 | 26.50 |
all | 9% |
load | 9% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 9% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 20% |
all | 9% |
load | 4% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
all | 17% |
load | 19% |
store | 21% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 31% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 15% |
all | 16% |
load | 16% |
store | 21% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 31% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x1c0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RDX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,0x64(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 41bf97 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x5c7> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDX,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x6c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x98(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x90(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48c5f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4031d0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x90(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x88(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 41bfb0 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x5e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x28(%RSP),%EDX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R14),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RSI),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x70(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%R8),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R15,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%R15 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R10),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R10),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RSI,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $-0x8,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 41bfd2 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x602> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RDX,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x28(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTD %ECX,%YMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R10,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R11,%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDI,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R8,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R9,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x518a7(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
MOV %R15,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
XOR %R15D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VBROADCASTSD 0x51464(%RIP),%ZMM28 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPBROADCASTQ %R14,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VBROADCASTSD 0x5143c(%RIP),%ZMM31 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VPBROADCASTQ %RBX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VBROADCASTSD 0x51464(%RIP),%ZMM29 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x51462(%RIP),%ZMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VXORPD %XMM27,%XMM27,%XMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 41bc7f <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x2af> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
CMP %RDI,0x98(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 41bfcf <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x5ff> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x48c610,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x60(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
ADD %RDI,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPXOR %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDDUP 0x5107a(%RIP),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x5109a(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x5105a(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x5109a(%RIP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x5105a(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x51082(%RIP),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 41c03d <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27+0x66d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_.extracted.27– | 2.27 | 1.86 |
○Loop 146 - advec_cell.cpp:65-110 - exec | 2.27 | 1.85 |
○Loop 145 - advec_cell.cpp:65-110 - exec | 0 | 0 |