Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:208-216 [...] | Coverage: 3.6% |
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Function: _Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_ ... | Module: exec | Source: advec_cell.cpp:208-216 [...] | Coverage: 3.6% |
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/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
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69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 208 - 216 |
-------------------------------------------------------------------------------- |
208: #pragma omp parallel for simd collapse(2) |
209: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
210: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
211: double pre_mass_s = density1(i, j) * pre_vol(i, j); |
212: double post_mass_s = pre_mass_s + mass_flux_y(i, j) - mass_flux_y(i + 0, j + 1); |
213: double post_ener_s = (energy1(i, j) * pre_mass_s + ener_flux(i, j) - ener_flux(i + 0, j + 1)) / post_mass_s; |
214: double advec_vol_s = pre_vol(i, j) + vol_flux_y(i, j) - vol_flux_y(i + 0, j + 1); |
215: density1(i, j) = post_mass_s / advec_vol_s; |
216: energy1(i, j) = post_ener_s; |
0x428680 PUSH %RBP |
0x428681 MOV %RSP,%RBP |
0x428684 PUSH %R15 |
0x428686 PUSH %R14 |
0x428688 PUSH %R13 |
0x42868a PUSH %R12 |
0x42868c PUSH %RBX |
0x42868d MOV %RDI,%RBX |
0x428690 AND $-0x40,%RSP |
0x428694 SUB $0x100,%RSP |
0x42869b MOV 0x38(%RDI),%EAX |
0x42869e MOV 0x3c(%RDI),%EDX |
0x4286a1 MOV 0x30(%RDI),%EDI |
0x4286a4 MOV 0x34(%RBX),%ESI |
0x4286a7 ADD $0x2,%EDX |
0x4286aa LEA 0x1(%RAX),%R15D |
0x4286ae INC %EDI |
0x4286b0 MOV %EDX,0x70(%RSP) |
0x4286b4 MOV %EDI,0x6c(%RSP) |
0x4286b8 CMP %EDX,%R15D |
0x4286bb JGE 428e33 |
0x4286c1 MOV %EDX,%R13D |
0x4286c4 LEA 0x2(%RSI),%R14D |
0x4286c8 SUB %R15D,%R13D |
0x4286cb CMP %R14D,%EDI |
0x4286ce JGE 428e33 |
0x4286d4 MOV %R14D,%ECX |
0x4286d7 SUB %EDI,%ECX |
0x4286d9 MOV %ECX,0x74(%RSP) |
0x4286dd CALL 4046c0 <omp_get_num_threads@plt> |
0x4286e2 MOV %EAX,%R12D |
0x4286e5 CALL 4045b0 <omp_get_thread_num@plt> |
0x4286ea XOR %EDX,%EDX |
0x4286ec MOV %EAX,%R8D |
0x4286ef MOV 0x74(%RSP),%EAX |
0x4286f3 IMUL %R13D,%EAX |
0x4286f7 DIV %R12D |
0x4286fa MOV %EAX,%ECX |
0x4286fc CMP %EDX,%R8D |
0x4286ff JB 428e56 |
0x428705 IMUL %ECX,%R8D |
0x428709 LEA (%R8,%RDX,1),%R11D |
0x42870d LEA (%RCX,%R11,1),%R9D |
0x428711 MOV %R9D,0x68(%RSP) |
0x428716 CMP %R9D,%R11D |
0x428719 JAE 428e33 |
0x42871f MOV %R11D,%EAX |
0x428722 XOR %EDX,%EDX |
0x428724 MOV 0x6c(%RSP),%R10D |
0x428729 MOV (%RBX),%RDI |
0x42872c DIVL 0x74(%RSP) |
0x428730 MOV 0x20(%RBX),%RSI |
0x428734 MOV 0x8(%RBX),%R13 |
0x428738 MOV 0x28(%RBX),%R12 |
0x42873c MOV %RDI,0x60(%RSP) |
0x428741 MOV %RSI,0x58(%RSP) |
0x428746 MOV %R13,0x48(%RSP) |
0x42874b MOV %R12,0x40(%RSP) |
0x428750 LEA (%RAX,%R15,1),%R15D |
0x428754 MOV %R14D,%EAX |
0x428757 MOV 0x10(%RBX),%R14 |
0x42875b MOV 0x18(%RBX),%RBX |
0x42875f ADD %EDX,%R10D |
0x428762 MOVSXD %R15D,%R8 |
0x428765 MOV %R11D,%R15D |
0x428768 MOV %R10D,0xd4(%RSP) |
0x428770 SUB %R10D,%EAX |
0x428773 MOV %R14,0x50(%RSP) |
0x428778 MOV %RBX,0x38(%RSP) |
0x42877d MOV %R8,0xc8(%RSP) |
0x428785 NOPL (%RAX) |
(122) 0x428788 CMP %EAX,%ECX |
(122) 0x42878a CMOVBE %ECX,%EAX |
(122) 0x42878d LEA (%R15,%RAX,1),%ECX |
(122) 0x428791 MOV %EAX,%EDX |
(122) 0x428793 MOV %ECX,0xd0(%RSP) |
(122) 0x42879a CMP %ECX,%R15D |
(122) 0x42879d JAE 428df7 |
(122) 0x4287a3 MOV 0x50(%RSP),%R10 |
(122) 0x4287a8 MOV 0xc8(%RSP),%RSI |
(122) 0x4287b0 MOV 0x58(%RSP),%R9 |
(122) 0x4287b5 MOV 0x48(%RSP),%R12 |
(122) 0x4287ba MOV (%R10),%R14 |
(122) 0x4287bd MOV 0x40(%RSP),%RCX |
(122) 0x4287c2 MOV 0x10(%R9),%RAX |
(122) 0x4287c6 MOV 0x10(%R10),%RDI |
(122) 0x4287ca MOV %RSI,%R10 |
(122) 0x4287cd MOV 0x10(%R12),%R8 |
(122) 0x4287d2 IMUL %R14,%R10 |
(122) 0x4287d6 MOV 0x60(%RSP),%R11 |
(122) 0x4287db MOV %RAX,0xe8(%RSP) |
(122) 0x4287e3 MOV (%RCX),%RAX |
(122) 0x4287e6 MOV 0x10(%R11),%R13 |
(122) 0x4287ea MOV (%R11),%RBX |
(122) 0x4287ed MOV %R8,0xf0(%RSP) |
(122) 0x4287f5 MOV %RSI,%R8 |
(122) 0x4287f8 IMUL %RAX,%R8 |
(122) 0x4287fc ADD %R10,%R14 |
(122) 0x4287ff MOV (%R9),%R11 |
(122) 0x428802 MOV (%R12),%R9 |
(122) 0x428806 MOV %R14,0xa8(%RSP) |
(122) 0x42880e MOV 0x10(%RCX),%R14 |
(122) 0x428812 IMUL %RSI,%RBX |
(122) 0x428816 MOV 0x38(%RSP),%RCX |
(122) 0x42881b IMUL %RSI,%R11 |
(122) 0x42881f MOV %R13,0xb0(%RSP) |
(122) 0x428827 IMUL %RSI,%R9 |
(122) 0x42882b LEA (%RAX,%R8,1),%R12 |
(122) 0x42882f MOV %R10,0x98(%RSP) |
(122) 0x428837 MOV (%RCX),%RAX |
(122) 0x42883a MOV %R12,0xf8(%RSP) |
(122) 0x428842 MOV 0x10(%RCX),%R12 |
(122) 0x428846 LEA -0x1(%RDX),%ECX |
(122) 0x428849 MOV %RBX,0x88(%RSP) |
(122) 0x428851 IMUL %RAX,%RSI |
(122) 0x428855 MOV %R11,0x90(%RSP) |
(122) 0x42885d MOV %R9,0xb8(%RSP) |
(122) 0x428865 MOV %R8,0xc0(%RSP) |
(122) 0x42886d MOV %RSI,0xd8(%RSP) |
(122) 0x428875 LEA (%RAX,%RSI,1),%RSI |
(122) 0x428879 MOV %RSI,0xe0(%RSP) |
(122) 0x428881 CMP $0x6,%ECX |
(122) 0x428884 JBE 428e48 |
(122) 0x42888a MOVSXD 0xd4(%RSP),%RAX |
(122) 0x428892 MOV 0xa8(%RSP),%RCX |
(122) 0x42889a LEA (%RBX,%RAX,1),%RBX |
(122) 0x42889e LEA (%R10,%RAX,1),%R10 |
(122) 0x4288a2 ADD %RAX,%RCX |
(122) 0x4288a5 ADD %RAX,%R8 |
(122) 0x4288a8 LEA (%R13,%RBX,8),%RSI |
(122) 0x4288ad LEA (%R11,%RAX,1),%R13 |
(122) 0x4288b1 MOV 0xe8(%RSP),%R11 |
(122) 0x4288b9 LEA (%RDI,%R10,8),%RBX |
(122) 0x4288bd MOV 0xf0(%RSP),%R10 |
(122) 0x4288c5 LEA (%R9,%RAX,1),%R9 |
(122) 0x4288c9 LEA (%R11,%R13,8),%R13 |
(122) 0x4288cd LEA (%RDI,%RCX,8),%R11 |
(122) 0x4288d1 MOV %R11,0x80(%RSP) |
(122) 0x4288d9 LEA (%R14,%R8,8),%R11 |
(122) 0x4288dd MOV 0xf8(%RSP),%R8 |
(122) 0x4288e5 LEA (%R10,%R9,8),%RCX |
(122) 0x4288e9 MOV 0xd8(%RSP),%R9 |
(122) 0x4288f1 ADD %RAX,%R8 |
(122) 0x4288f4 LEA (%R14,%R8,8),%R10 |
(122) 0x4288f8 LEA (%R9,%RAX,1),%R8 |
(122) 0x4288fc LEA (%R12,%R8,8),%R9 |
(122) 0x428900 MOV 0xe0(%RSP),%R8 |
(122) 0x428908 ADD %R8,%RAX |
(122) 0x42890b LEA (%R12,%RAX,8),%R8 |
(122) 0x42890f MOV %EDX,%EAX |
(122) 0x428911 SHR $0x3,%EAX |
(122) 0x428914 MOV %RAX,0x78(%RSP) |
(122) 0x428919 SAL $0x6,%RAX |
(122) 0x42891d MOV %RAX,0xa0(%RSP) |
(122) 0x428925 XOR %EAX,%EAX |
(122) 0x428927 TESTB $0x1,0x78(%RSP) |
(122) 0x42892c JE 428999 |
(122) 0x42892e VMOVUPD (%R13),%ZMM0 |
(122) 0x428935 VMOVUPD (%R11),%ZMM6 |
(122) 0x42893b MOV 0x80(%RSP),%RAX |
(122) 0x428943 CMPQ $0x40,0xa0(%RSP) |
(122) 0x42894c VMULPD (%RSI),%ZMM0,%ZMM1 |
(122) 0x428952 VSUBPD (%R10),%ZMM6,%ZMM3 |
(122) 0x428958 VADDPD (%R9),%ZMM0,%ZMM5 |
(122) 0x42895e VSUBPD (%R8),%ZMM5,%ZMM7 |
(122) 0x428964 VSUBPD (%RAX),%ZMM1,%ZMM2 |
(122) 0x42896a VFMADD132PD (%RCX),%ZMM3,%ZMM1 |
(122) 0x428970 MOV $0x40,%EAX |
(122) 0x428975 VADDPD (%RBX),%ZMM2,%ZMM4 |
(122) 0x42897b VDIVPD %ZMM7,%ZMM4,%ZMM8 |
(122) 0x428981 VDIVPD %ZMM4,%ZMM1,%ZMM9 |
(122) 0x428987 VMOVUPD %ZMM8,(%RSI) |
(122) 0x42898d VMOVUPD %ZMM9,(%RCX) |
(122) 0x428993 JE 428a7b |
(122) 0x428999 MOV %R15D,0x78(%RSP) |
(122) 0x42899e MOV 0x80(%RSP),%R15 |
(123) 0x4289a6 VMOVUPD (%R13,%RAX,1),%ZMM10 |
(123) 0x4289ae VMOVUPD (%R11,%RAX,1),%ZMM14 |
(123) 0x4289b5 VMULPD (%RSI,%RAX,1),%ZMM10,%ZMM11 |
(123) 0x4289bc VSUBPD (%R10,%RAX,1),%ZMM14,%ZMM15 |
(123) 0x4289c3 VADDPD (%R9,%RAX,1),%ZMM10,%ZMM0 |
(123) 0x4289ca VSUBPD (%R8,%RAX,1),%ZMM0,%ZMM1 |
(123) 0x4289d1 VSUBPD (%R15,%RAX,1),%ZMM11,%ZMM12 |
(123) 0x4289d8 VFMADD132PD (%RCX,%RAX,1),%ZMM15,%ZMM11 |
(123) 0x4289df VADDPD (%RBX,%RAX,1),%ZMM12,%ZMM13 |
(123) 0x4289e6 VDIVPD %ZMM13,%ZMM11,%ZMM4 |
(123) 0x4289ec VDIVPD %ZMM1,%ZMM13,%ZMM2 |
(123) 0x4289f2 VMOVUPD %ZMM2,(%RSI,%RAX,1) |
(123) 0x4289f9 VMOVUPD %ZMM4,(%RCX,%RAX,1) |
(123) 0x428a00 VMOVUPD 0x40(%R13,%RAX,1),%ZMM6 |
(123) 0x428a08 VMOVUPD 0x40(%R11,%RAX,1),%ZMM5 |
(123) 0x428a10 VMULPD 0x40(%RSI,%RAX,1),%ZMM6,%ZMM7 |
(123) 0x428a18 VSUBPD 0x40(%R10,%RAX,1),%ZMM5,%ZMM9 |
(123) 0x428a20 VADDPD 0x40(%R9,%RAX,1),%ZMM6,%ZMM10 |
(123) 0x428a28 VSUBPD 0x40(%R8,%RAX,1),%ZMM10,%ZMM11 |
(123) 0x428a30 VSUBPD 0x40(%R15,%RAX,1),%ZMM7,%ZMM3 |
(123) 0x428a38 VFMADD132PD 0x40(%RCX,%RAX,1),%ZMM9,%ZMM7 |
(123) 0x428a40 VADDPD 0x40(%RBX,%RAX,1),%ZMM3,%ZMM8 |
(123) 0x428a48 VDIVPD %ZMM11,%ZMM8,%ZMM12 |
(123) 0x428a4e VDIVPD %ZMM8,%ZMM7,%ZMM13 |
(123) 0x428a54 VMOVUPD %ZMM12,0x40(%RSI,%RAX,1) |
(123) 0x428a5c VMOVUPD %ZMM13,0x40(%RCX,%RAX,1) |
(123) 0x428a64 SUB $-0x80,%RAX |
(123) 0x428a68 CMP %RAX,0xa0(%RSP) |
(123) 0x428a70 JNE 4289a6 |
(122) 0x428a76 MOV 0x78(%RSP),%R15D |
(122) 0x428a7b MOV 0xd4(%RSP),%ESI |
(122) 0x428a82 MOV %EDX,%ECX |
(122) 0x428a84 AND $-0x8,%ECX |
(122) 0x428a87 ADD %ECX,%R15D |
(122) 0x428a8a LEA (%RCX,%RSI,1),%ESI |
(122) 0x428a8d TEST $0x7,%DL |
(122) 0x428a90 JE 428def |
(122) 0x428a96 SUB %ECX,%EDX |
(122) 0x428a98 LEA -0x1(%RDX),%R13D |
(122) 0x428a9c CMP $0x2,%R13D |
(122) 0x428aa0 JBE 428ba6 |
(122) 0x428aa6 MOVSXD 0xd4(%RSP),%RAX |
(122) 0x428aae MOV 0x88(%RSP),%RBX |
(122) 0x428ab6 MOV 0xb0(%RSP),%R10 |
(122) 0x428abe MOV 0xb8(%RSP),%R9 |
(122) 0x428ac6 LEA (%RBX,%RAX,1),%R11 |
(122) 0x428aca MOV 0xf0(%RSP),%R13 |
(122) 0x428ad2 ADD %RCX,%R11 |
(122) 0x428ad5 LEA (%R9,%RAX,1),%R8 |
(122) 0x428ad9 MOV 0xd8(%RSP),%R9 |
(122) 0x428ae1 LEA (%R10,%R11,8),%RBX |
(122) 0x428ae5 MOV 0xe0(%RSP),%R10 |
(122) 0x428aed ADD %RCX,%R8 |
(122) 0x428af0 LEA (%R13,%R8,8),%R11 |
(122) 0x428af5 MOV 0xe8(%RSP),%R13 |
(122) 0x428afd ADD %RAX,%R9 |
(122) 0x428b00 LEA (%R10,%RAX,1),%R8 |
(122) 0x428b04 MOV 0x90(%RSP),%R10 |
(122) 0x428b0c ADD %RCX,%R9 |
(122) 0x428b0f ADD %RCX,%R8 |
(122) 0x428b12 ADD %RAX,%R10 |
(122) 0x428b15 ADD %RCX,%R10 |
(122) 0x428b18 VMOVUPD (%R13,%R10,8),%YMM14 |
(122) 0x428b1f MOV 0xa8(%RSP),%R10 |
(122) 0x428b27 MOV 0x98(%RSP),%R13 |
(122) 0x428b2f VMULPD (%RBX),%YMM14,%YMM15 |
(122) 0x428b33 ADD %RAX,%R10 |
(122) 0x428b36 VADDPD (%R12,%R9,8),%YMM14,%YMM6 |
(122) 0x428b3c ADD %RCX,%R10 |
(122) 0x428b3f ADD %RAX,%R13 |
(122) 0x428b42 ADD %RCX,%R13 |
(122) 0x428b45 VSUBPD (%R12,%R8,8),%YMM6,%YMM7 |
(122) 0x428b4b VSUBPD (%RDI,%R10,8),%YMM15,%YMM0 |
(122) 0x428b51 MOV 0xc0(%RSP),%R10 |
(122) 0x428b59 ADD %RAX,%R10 |
(122) 0x428b5c VADDPD (%RDI,%R13,8),%YMM0,%YMM1 |
(122) 0x428b62 MOV 0xf8(%RSP),%R13 |
(122) 0x428b6a ADD %RCX,%R10 |
(122) 0x428b6d VMOVUPD (%R14,%R10,8),%YMM2 |
(122) 0x428b73 ADD %R13,%RAX |
(122) 0x428b76 VDIVPD %YMM7,%YMM1,%YMM3 |
(122) 0x428b7a ADD %RCX,%RAX |
(122) 0x428b7d VSUBPD (%R14,%RAX,8),%YMM2,%YMM4 |
(122) 0x428b83 VFMADD132PD (%R11),%YMM4,%YMM15 |
(122) 0x428b88 VDIVPD %YMM1,%YMM15,%YMM8 |
(122) 0x428b8c VMOVUPD %YMM3,(%RBX) |
(122) 0x428b90 VMOVUPD %YMM8,(%R11) |
(122) 0x428b95 TEST $0x3,%DL |
(122) 0x428b98 JE 428def |
(122) 0x428b9e AND $-0x4,%EDX |
(122) 0x428ba1 ADD %EDX,%R15D |
(122) 0x428ba4 ADD %EDX,%ESI |
(122) 0x428ba6 MOV 0x90(%RSP),%R11 |
(122) 0x428bae MOVSXD %ESI,%RAX |
(122) 0x428bb1 MOV 0xe8(%RSP),%R9 |
(122) 0x428bb9 MOV 0x88(%RSP),%RBX |
(122) 0x428bc1 MOV 0xb0(%RSP),%RCX |
(122) 0x428bc9 LEA (%R11,%RAX,1),%R8 |
(122) 0x428bcd MOV 0xa8(%RSP),%R10 |
(122) 0x428bd5 VMOVSD (%R9,%R8,8),%XMM5 |
(122) 0x428bdb LEA (%RBX,%RAX,1),%RDX |
(122) 0x428bdf MOV 0xb8(%RSP),%R9 |
(122) 0x428be7 LEA (%RCX,%RDX,8),%RCX |
(122) 0x428beb LEA (%R10,%RAX,1),%R13 |
(122) 0x428bef MOV 0xf0(%RSP),%R8 |
(122) 0x428bf7 VMULSD (%RCX),%XMM5,%XMM9 |
(122) 0x428bfb ADD %RAX,%R9 |
(122) 0x428bfe VSUBSD (%RDI,%R13,8),%XMM9,%XMM10 |
(122) 0x428c04 MOV 0x98(%RSP),%R13 |
(122) 0x428c0c LEA (%R13,%RAX,1),%RDX |
(122) 0x428c11 VADDSD (%RDI,%RDX,8),%XMM10,%XMM11 |
(122) 0x428c16 LEA (%R8,%R9,8),%RDX |
(122) 0x428c1a MOV 0xc0(%RSP),%R9 |
(122) 0x428c22 MOV 0xf8(%RSP),%R8 |
(122) 0x428c2a ADD %RAX,%R9 |
(122) 0x428c2d VMOVSD (%R14,%R9,8),%XMM12 |
(122) 0x428c33 MOV 0xd8(%RSP),%R9 |
(122) 0x428c3b ADD %RAX,%R8 |
(122) 0x428c3e VSUBSD (%R14,%R8,8),%XMM12,%XMM13 |
(122) 0x428c44 LEA (%R9,%RAX,1),%R8 |
(122) 0x428c48 MOV 0xe0(%RSP),%R9 |
(122) 0x428c50 VADDSD (%R12,%R8,8),%XMM5,%XMM14 |
(122) 0x428c56 ADD %R9,%RAX |
(122) 0x428c59 VFMADD132SD (%RDX),%XMM13,%XMM9 |
(122) 0x428c5e VSUBSD (%R12,%RAX,8),%XMM14,%XMM15 |
(122) 0x428c64 LEA 0x1(%RSI),%EAX |
(122) 0x428c67 VDIVSD %XMM15,%XMM11,%XMM0 |
(122) 0x428c6c VDIVSD %XMM11,%XMM9,%XMM1 |
(122) 0x428c71 VMOVSD %XMM0,(%RCX) |
(122) 0x428c75 MOV 0xd0(%RSP),%ECX |
(122) 0x428c7c VMOVSD %XMM1,(%RDX) |
(122) 0x428c80 LEA 0x1(%R15),%EDX |
(122) 0x428c84 CMP %ECX,%EDX |
(122) 0x428c86 JAE 428def |
(122) 0x428c8c CLTQ |
(122) 0x428c8e MOV 0xb0(%RSP),%R9 |
(122) 0x428c96 ADD $0x2,%ESI |
(122) 0x428c99 LEA (%RBX,%RAX,1),%R8 |
(122) 0x428c9d LEA (%R11,%RAX,1),%RDX |
(122) 0x428ca1 LEA (%R9,%R8,8),%RCX |
(122) 0x428ca5 MOV 0xe8(%RSP),%R8 |
(122) 0x428cad LEA (%R10,%RAX,1),%R9 |
(122) 0x428cb1 VMOVSD (%R8,%RDX,8),%XMM4 |
(122) 0x428cb7 MOV 0xf0(%RSP),%R8 |
(122) 0x428cbf LEA (%R13,%RAX,1),%RDX |
(122) 0x428cc4 VMULSD (%RCX),%XMM4,%XMM6 |
(122) 0x428cc8 VSUBSD (%RDI,%R9,8),%XMM6,%XMM2 |
(122) 0x428cce MOV 0xb8(%RSP),%R9 |
(122) 0x428cd6 ADD %RAX,%R9 |
(122) 0x428cd9 VADDSD (%RDI,%RDX,8),%XMM2,%XMM7 |
(122) 0x428cde LEA (%R8,%R9,8),%RDX |
(122) 0x428ce2 MOV 0xc0(%RSP),%R9 |
(122) 0x428cea MOV 0xf8(%RSP),%R8 |
(122) 0x428cf2 ADD %RAX,%R9 |
(122) 0x428cf5 VMOVSD (%R14,%R9,8),%XMM3 |
(122) 0x428cfb ADD %RAX,%R8 |
(122) 0x428cfe MOV 0xd8(%RSP),%R9 |
(122) 0x428d06 VSUBSD (%R14,%R8,8),%XMM3,%XMM8 |
(122) 0x428d0c LEA (%R9,%RAX,1),%R8 |
(122) 0x428d10 VADDSD (%R12,%R8,8),%XMM4,%XMM5 |
(122) 0x428d16 MOV 0xe0(%RSP),%R8 |
(122) 0x428d1e VFMADD132SD (%RDX),%XMM8,%XMM6 |
(122) 0x428d23 ADD %R8,%RAX |
(122) 0x428d26 VSUBSD (%R12,%RAX,8),%XMM5,%XMM9 |
(122) 0x428d2c LEA 0x2(%R15),%EAX |
(122) 0x428d30 MOV 0xd0(%RSP),%R15D |
(122) 0x428d38 VDIVSD %XMM9,%XMM7,%XMM10 |
(122) 0x428d3d VDIVSD %XMM7,%XMM6,%XMM11 |
(122) 0x428d41 VMOVSD %XMM10,(%RCX) |
(122) 0x428d45 VMOVSD %XMM11,(%RDX) |
(122) 0x428d49 CMP %R15D,%EAX |
(122) 0x428d4c JAE 428def |
(122) 0x428d52 MOVSXD %ESI,%RSI |
(122) 0x428d55 MOV 0xe8(%RSP),%RDX |
(122) 0x428d5d MOV %RBX,%RCX |
(122) 0x428d60 MOV 0xb0(%RSP),%RBX |
(122) 0x428d68 ADD %RSI,%R11 |
(122) 0x428d6b ADD %RSI,%RCX |
(122) 0x428d6e ADD %RSI,%R10 |
(122) 0x428d71 ADD %RSI,%R13 |
(122) 0x428d74 VMOVSD (%RDX,%R11,8),%XMM12 |
(122) 0x428d7a LEA (%RBX,%RCX,8),%RAX |
(122) 0x428d7e MOV 0xc0(%RSP),%RCX |
(122) 0x428d86 ADD %RSI,%R9 |
(122) 0x428d89 MOV 0xf8(%RSP),%R11 |
(122) 0x428d91 MOV 0xf0(%RSP),%R15 |
(122) 0x428d99 ADD %RSI,%R8 |
(122) 0x428d9c VMULSD (%RAX),%XMM12,%XMM13 |
(122) 0x428da0 ADD %RSI,%RCX |
(122) 0x428da3 VADDSD (%R12,%R9,8),%XMM12,%XMM4 |
(122) 0x428da9 VMOVSD (%R14,%RCX,8),%XMM0 |
(122) 0x428daf ADD %RSI,%R11 |
(122) 0x428db2 VSUBSD (%R14,%R11,8),%XMM0,%XMM1 |
(122) 0x428db8 VSUBSD (%R12,%R8,8),%XMM4,%XMM6 |
(122) 0x428dbe VSUBSD (%RDI,%R10,8),%XMM13,%XMM14 |
(122) 0x428dc4 VADDSD (%RDI,%R13,8),%XMM14,%XMM15 |
(122) 0x428dca MOV 0xb8(%RSP),%RDI |
(122) 0x428dd2 ADD %RSI,%RDI |
(122) 0x428dd5 LEA (%R15,%RDI,8),%RBX |
(122) 0x428dd9 VDIVSD %XMM6,%XMM15,%XMM2 |
(122) 0x428ddd VFMADD132SD (%RBX),%XMM1,%XMM13 |
(122) 0x428de2 VDIVSD %XMM15,%XMM13,%XMM7 |
(122) 0x428de7 VMOVSD %XMM2,(%RAX) |
(122) 0x428deb VMOVSD %XMM7,(%RBX) |
(122) 0x428def MOV 0xd0(%RSP),%R15D |
(122) 0x428df7 INCQ 0xc8(%RSP) |
(122) 0x428dff MOV 0xc8(%RSP),%R14 |
(122) 0x428e07 ADD $0,%R14D |
(122) 0x428e0b CMP %R14D,0x70(%RSP) |
(122) 0x428e10 JLE 428e30 |
(122) 0x428e12 MOV 0x68(%RSP),%ECX |
(122) 0x428e16 MOV 0x6c(%RSP),%R12D |
(122) 0x428e1b MOV 0x74(%RSP),%EAX |
(122) 0x428e1f MOV %R12D,0xd4(%RSP) |
(122) 0x428e27 SUB %R15D,%ECX |
(122) 0x428e2a JMP 428788 |
0x428e2f NOP |
0x428e30 VZEROUPPER |
0x428e33 LEA -0x28(%RBP),%RSP |
0x428e37 POP %RBX |
0x428e38 POP %R12 |
0x428e3a POP %R13 |
0x428e3c POP %R14 |
0x428e3e POP %R15 |
0x428e40 POP %RBP |
0x428e41 RET |
0x428e42 NOPW (%RAX,%RAX,1) |
(122) 0x428e48 MOV 0xd4(%RSP),%ESI |
(122) 0x428e4f XOR %ECX,%ECX |
(122) 0x428e51 JMP 428a96 |
0x428e56 INC %ECX |
0x428e58 XOR %EDX,%EDX |
0x428e5a JMP 428705 |
0x428e5f NOP |
Path / |
Source file and lines | advec_cell.cpp:208-216 |
Module | exec |
nb instructions | 86 |
nb uops | 96 |
loop length | 299 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 16.00 cycles |
front end | 16.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.10 | 8.00 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
cycles | 6.10 | 11.93 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.23-15.34 |
Stall cycles | 0.00 |
Front-end | 16.00 |
Dispatch | 11.93 |
DIV/SQRT | 12.00 |
Overall L1 | 16.00 |
all | 3% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 14% |
all | 9% |
load | 10% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x3c(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x34(%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 428e33 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x2(%RSI),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 428e33 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %EDI,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4046c0 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4045b0 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x74(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 428e56 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x7d6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %ECX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RCX,%R11,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 428e33 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x6c(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x74(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV 0x20(%RBX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x10(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDX,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD %R15D,%R8 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R11D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R10D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 428705 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | advec_cell.cpp:208-216 |
Module | exec |
nb instructions | 86 |
nb uops | 96 |
loop length | 299 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 16.00 cycles |
front end | 16.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.10 | 8.00 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
cycles | 6.10 | 11.93 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.23-15.34 |
Stall cycles | 0.00 |
Front-end | 16.00 |
Dispatch | 11.93 |
DIV/SQRT | 12.00 |
Overall L1 | 16.00 |
all | 3% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 14% |
all | 9% |
load | 10% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x100,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x3c(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x34(%RBX),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,0x6c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 428e33 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x2(%RSI),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 428e33 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14D,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %EDI,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4046c0 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4045b0 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x74(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 428e56 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x7d6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %ECX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RCX,%R11,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 428e33 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x7b3> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R11D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x6c(%RSP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x74(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV 0x20(%RBX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R14D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x10(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDX,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD %R15D,%R8 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R11D,%R15D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R10D,0xd4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R10D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R14,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 428705 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0+0x85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.7.lto_priv.0– | 3.6 | 2.69 |
▼Loop 122 - advec_cell.cpp:211-216 - exec– | 0 | 0 |
○Loop 123 - advec_cell.cpp:211-216 - exec | 3.6 | 2.69 |