Function: _Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracte ... | Module: exec | Source: PdV.cpp:69-83 [...] | Coverage: 5.01% |
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Function: _Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracte ... | Module: exec | Source: PdV.cpp:69-83 [...] | Coverage: 5.01% |
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/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/PdV.cpp: 69 - 83 |
-------------------------------------------------------------------------------- |
69: #pragma omp parallel for simd collapse(2) |
70: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
71: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
72: double left_flux = (xarea(i, j) * (xvel0(i, j) + xvel0(i + 0, j + 1) + xvel1(i, j) + xvel1(i + 0, j + 1))) * 0.25 * dt; |
73: double right_flux = |
74: (xarea(i + 1, j + 0) * (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1) + xvel1(i + 1, j + 0) + xvel1(i + 1, j + 1))) * 0.25 * dt; |
75: double bottom_flux = (yarea(i, j) * (yvel0(i, j) + yvel0(i + 1, j + 0) + yvel1(i, j) + yvel1(i + 1, j + 0))) * 0.25 * dt; |
76: double top_flux = |
77: (yarea(i + 0, j + 1) * (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1) + yvel1(i + 0, j + 1) + yvel1(i + 1, j + 1))) * 0.25 * dt; |
78: double total_flux = right_flux - left_flux + top_flux - bottom_flux; |
79: double volume_change_s = volume(i, j) / (volume(i, j) + total_flux); |
80: double recip_volume = 1.0 / volume(i, j); |
81: double energy_change = (pressure(i, j) / density0(i, j) + viscosity(i, j) / density0(i, j)) * total_flux * recip_volume; |
82: energy1(i, j) = energy0(i, j) - energy_change; |
83: density1(i, j) = density0(i, j) * volume_change_s; |
/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
0x43a4d0 PUSH %RBP |
0x43a4d1 MOV %RSP,%RBP |
0x43a4d4 PUSH %R15 |
0x43a4d6 PUSH %R14 |
0x43a4d8 PUSH %R13 |
0x43a4da PUSH %R12 |
0x43a4dc PUSH %RBX |
0x43a4dd AND $-0x40,%RSP |
0x43a4e1 SUB $0x500,%RSP |
0x43a4e8 MOV 0x80(%RBP),%RAX |
0x43a4ef MOV 0x70(%RBP),%R13 |
0x43a4f3 MOV 0x68(%RBP),%RSI |
0x43a4f7 MOV 0x58(%RBP),%R14 |
0x43a4fb MOV 0x50(%RBP),%R10 |
0x43a4ff MOV %R10,0x180(%RSP) |
0x43a507 MOV 0x48(%RBP),%R15 |
0x43a50b MOV 0x40(%RBP),%R12 |
0x43a50f MOV 0x38(%RBP),%R11 |
0x43a513 MOV 0x30(%RBP),%R10 |
0x43a517 MOV %R10,0x140(%RSP) |
0x43a51f MOV 0x28(%RBP),%RBX |
0x43a523 MOV 0x20(%RBP),%R10 |
0x43a527 MOV %R10,0x18(%RSP) |
0x43a52c MOV 0x18(%RBP),%R10 |
0x43a530 MOV %R10,0x20(%RSP) |
0x43a535 MOV 0x10(%RBP),%R10 |
0x43a539 MOV %R10,0x48(%RSP) |
0x43a53e MOV 0x60(%RBP),%R10D |
0x43a542 MOV %R10D,0x2c(%RSP) |
0x43a547 MOVL $0,0x74(%RSP) |
0x43a54f TEST %RAX,%RAX |
0x43a552 JS 43adbd |
0x43a558 MOV %R14,0x38(%RSP) |
0x43a55d MOV %R11,0x40(%RSP) |
0x43a562 MOV %RSI,0x30(%RSP) |
0x43a567 MOV %RDX,%R14 |
0x43a56a MOV %RCX,0x60(%RSP) |
0x43a56f MOV %R8,0x50(%RSP) |
0x43a574 MOV %R9,0x58(%RSP) |
0x43a579 MOV (%RDI),%ESI |
0x43a57b MOVQ $0,0xf0(%RSP) |
0x43a587 MOV %RAX,0xe8(%RSP) |
0x43a58f MOVQ $0x1,0x138(%RSP) |
0x43a59b SUB $0x8,%RSP |
0x43a59f LEA 0x140(%RSP),%RAX |
0x43a5a7 LEA 0x7c(%RSP),%RCX |
0x43a5ac LEA 0xf8(%RSP),%R8 |
0x43a5b4 LEA 0xf0(%RSP),%R9 |
0x43a5bc MOV $0x48d6f0,%EDI |
0x43a5c1 MOV %ESI,0x78(%RSP) |
0x43a5c5 MOV $0x22,%EDX |
0x43a5ca PUSH $0x1 |
0x43a5cc PUSH $0x1 |
0x43a5ce PUSH %RAX |
0x43a5cf CALL 4031d0 <__kmpc_for_static_init_8@plt> |
0x43a5d4 ADD $0x20,%RSP |
0x43a5d8 MOV 0xf0(%RSP),%R11 |
0x43a5e0 MOV 0xe8(%RSP),%RAX |
0x43a5e8 MOV %RAX,0xd8(%RSP) |
0x43a5f0 CMP %RAX,%R11 |
0x43a5f3 JA 43ad9e |
0x43a5f9 VMOVQ %R14,%XMM0 |
0x43a5fe MOV %R13,%RCX |
0x43a601 SUB 0x30(%RSP),%ECX |
0x43a605 LEA 0x1(%R11),%RAX |
0x43a609 MOV 0xd8(%RSP),%RDI |
0x43a611 MOV %RBX,%RDX |
0x43a614 LEA 0x1(%RDI),%RBX |
0x43a618 CMP %RBX,%RAX |
0x43a61b CMOVG %RAX,%RBX |
0x43a61f MOV 0x60(%RSP),%RAX |
0x43a624 MOV (%RAX),%RSI |
0x43a627 MOV %RSI,0x68(%RSP) |
0x43a62c MOV 0x10(%RAX),%R13 |
0x43a630 MOV (%R12),%R10 |
0x43a634 MOV 0x10(%R12),%RAX |
0x43a639 MOV %RAX,0x60(%RSP) |
0x43a63e MOV (%R15),%RDI |
0x43a641 MOV 0x10(%R15),%RAX |
0x43a645 MOV %RAX,0xc0(%RSP) |
0x43a64d MOV 0x50(%RSP),%RAX |
0x43a652 MOV (%RAX),%RSI |
0x43a655 MOV %RSI,0xb8(%RSP) |
0x43a65d MOV 0x10(%RAX),%R14 |
0x43a661 MOV 0x180(%RSP),%RAX |
0x43a669 MOV (%RAX),%R9 |
0x43a66c MOV 0x10(%RAX),%R15 |
0x43a670 MOV 0x38(%RSP),%RAX |
0x43a675 MOV (%RAX),%RSI |
0x43a678 MOV %RSI,0xd0(%RSP) |
0x43a680 MOV 0x10(%RAX),%R12 |
0x43a684 VMULSD 0x329e4(%RIP),%XMM0,%XMM4 |
0x43a68c MOV 0x58(%RSP),%RAX |
0x43a691 MOV (%RAX),%R8 |
0x43a694 MOV 0x10(%RAX),%RAX |
0x43a698 MOV %RAX,0x58(%RSP) |
0x43a69d MOV 0x140(%RSP),%RAX |
0x43a6a5 MOV (%RAX),%RSI |
0x43a6a8 MOV %RSI,0xb0(%RSP) |
0x43a6b0 MOV 0x10(%RAX),%RAX |
0x43a6b4 MOV %RAX,0x50(%RSP) |
0x43a6b9 MOV 0x48(%RSP),%RAX |
0x43a6be MOV (%RAX),%RSI |
0x43a6c1 MOV %RSI,0xa8(%RSP) |
0x43a6c9 MOV 0x10(%RAX),%RAX |
0x43a6cd MOV %RAX,0xa0(%RSP) |
0x43a6d5 MOV 0x40(%RSP),%RAX |
0x43a6da MOV (%RAX),%RSI |
0x43a6dd MOV %RSI,0xc8(%RSP) |
0x43a6e5 MOV 0x10(%RAX),%RAX |
0x43a6e9 MOV %RAX,0x48(%RSP) |
0x43a6ee MOV 0x18(%RSP),%RAX |
0x43a6f3 MOV (%RAX),%RSI |
0x43a6f6 MOV %RSI,0x98(%RSP) |
0x43a6fe MOV 0x10(%RAX),%RAX |
0x43a702 MOV %RAX,0x40(%RSP) |
0x43a707 MOV (%RDX),%RAX |
0x43a70a MOV %RAX,0x90(%RSP) |
0x43a712 MOV 0x10(%RDX),%RAX |
0x43a716 MOV 0xd0(%RSP),%RDX |
0x43a71e MOV %RAX,0x38(%RSP) |
0x43a723 MOV 0x20(%RSP),%RAX |
0x43a728 MOV (%RAX),%RSI |
0x43a72b MOV %RSI,0x88(%RSP) |
0x43a733 MOV 0x10(%RAX),%RAX |
0x43a737 SUB %R11,%RBX |
0x43a73a TEST $-0x8,%EBX |
0x43a740 MOV %RCX,0x80(%RSP) |
0x43a748 MOV %R13,0x130(%RSP) |
0x43a750 MOV %R10,0x78(%RSP) |
0x43a755 MOV %RDI,%RSI |
0x43a758 MOV %RDI,0x128(%RSP) |
0x43a760 MOV %R14,0x120(%RSP) |
0x43a768 MOV %R9,%RDI |
0x43a76b MOV %R9,0x118(%RSP) |
0x43a773 MOV %R15,0x110(%RSP) |
0x43a77b MOV %R12,0x108(%RSP) |
0x43a783 MOV %R8,%R9 |
0x43a786 MOV %R8,0x100(%RSP) |
0x43a78e MOV 0xc8(%RSP),%R8 |
0x43a796 MOV %RAX,0xe0(%RSP) |
0x43a79e JE 43b07b |
0x43a7a4 VPBROADCASTQ %RCX,%ZMM0 |
0x43a7aa VMOVDQU64 %ZMM0,0x180(%RSP) |
0x43a7b2 MOV 0x2c(%RSP),%EAX |
0x43a7b6 VPBROADCASTD %EAX,%YMM0 |
0x43a7bc VMOVDQU %YMM0,0x140(%RSP) |
0x43a7c5 MOV 0x30(%RSP),%RAX |
0x43a7ca VPBROADCASTD %EAX,%YMM0 |
0x43a7d0 VMOVDQU %YMM0,0x1e0(%RSP) |
0x43a7d9 MOV 0x68(%RSP),%RAX |
0x43a7de VPBROADCASTQ %RAX,%ZMM0 |
0x43a7e4 VMOVDQU64 %ZMM0,0x480(%RSP) |
0x43a7ec VPBROADCASTQ %R10,%ZMM0 |
0x43a7f2 VMOVDQU64 %ZMM0,0x440(%RSP) |
0x43a7fa VPBROADCASTQ %RSI,%ZMM0 |
0x43a800 VMOVDQU64 %ZMM0,0x400(%RSP) |
0x43a808 MOV 0xb8(%RSP),%RAX |
0x43a810 VPBROADCASTQ %RAX,%ZMM24 |
0x43a816 VPBROADCASTQ %RDI,%ZMM25 |
0x43a81c VPBROADCASTQ %RDX,%ZMM26 |
0x43a822 VMOVUPD %XMM4,0x170(%RSP) |
0x43a82b VBROADCASTSD %XMM4,%ZMM0 |
0x43a831 VMOVUPD %ZMM0,0x3c0(%RSP) |
0x43a839 VPBROADCASTQ %R9,%ZMM0 |
0x43a83f VMOVDQU64 %ZMM0,0x380(%RSP) |
0x43a847 MOV 0xb0(%RSP),%RAX |
0x43a84f VPBROADCASTQ %RAX,%ZMM0 |
0x43a855 VMOVDQU64 %ZMM0,0x340(%RSP) |
0x43a85d MOV 0xa8(%RSP),%RAX |
0x43a865 VPBROADCASTQ %RAX,%ZMM0 |
0x43a86b VMOVDQU64 %ZMM0,0x300(%RSP) |
0x43a873 VPBROADCASTQ %R8,%ZMM0 |
0x43a879 VMOVDQU64 %ZMM0,0x2c0(%RSP) |
0x43a881 MOV 0x98(%RSP),%RAX |
0x43a889 VPBROADCASTQ %RAX,%ZMM0 |
0x43a88f VMOVDQU64 %ZMM0,0x280(%RSP) |
0x43a897 MOV 0x90(%RSP),%RAX |
0x43a89f VPBROADCASTQ %RAX,%ZMM0 |
0x43a8a5 VMOVDQU64 %ZMM0,0x240(%RSP) |
0x43a8ad MOV 0x88(%RSP),%RAX |
0x43a8b5 VPBROADCASTQ %RAX,%ZMM0 |
0x43a8bb VMOVDQU64 %ZMM0,0x200(%RSP) |
0x43a8c3 MOV %R11,0x20(%RSP) |
0x43a8c8 VPBROADCASTQ %R11,%ZMM0 |
0x43a8ce VPADDQ 0x33628(%RIP),%ZMM0,%ZMM17 |
0x43a8d8 MOV %RBX,0xf8(%RSP) |
0x43a8e0 AND $-0x8,%EBX |
0x43a8e3 MOV %RBX,0x18(%RSP) |
0x43a8e8 XOR %EBX,%EBX |
0x43a8ea MOV 0xc0(%RSP),%RDI |
0x43a8f2 MOV 0xa0(%RSP),%RSI |
0x43a8fa NOPW (%RAX,%RAX,1) |
(388) 0x43a900 VMOVDQA64 %ZMM17,%ZMM0 |
(388) 0x43a906 VMOVUPS 0x180(%RSP),%ZMM16 |
(388) 0x43a90e VMOVAPS %ZMM16,%ZMM1 |
(388) 0x43a914 LEA 0x211a5(%RIP),%RAX |
(388) 0x43a91b CALL %RAX |
(388) 0x43a91d VPMOVQD %ZMM0,%YMM0 |
(388) 0x43a923 VPADDD 0x140(%RSP),%YMM0,%YMM21 |
(388) 0x43a92b VMOVDQA64 %ZMM17,%ZMM0 |
(388) 0x43a931 VMOVAPS %ZMM16,%ZMM1 |
(388) 0x43a937 CALLQ 0x51693(%RIP) |
(388) 0x43a93d VPMOVQD %ZMM0,%YMM1 |
(388) 0x43a943 VPMOVSXDQ %YMM21,%ZMM0 |
(388) 0x43a949 VMOVDQU64 0x480(%RSP),%ZMM2 |
(388) 0x43a951 VPMULLQ %ZMM0,%ZMM2,%ZMM7 |
(388) 0x43a957 VPADDD 0x1e0(%RSP),%YMM1,%YMM9 |
(388) 0x43a960 KXNORW %K0,%K0,%K3 |
(388) 0x43a964 VPXOR %XMM2,%XMM2,%XMM2 |
(388) 0x43a968 VMOVDQU64 0x440(%RSP),%ZMM3 |
(388) 0x43a970 VPMULLQ %ZMM0,%ZMM3,%ZMM11 |
(388) 0x43a976 VPCMPEQD %YMM12,%YMM12,%YMM12 |
(388) 0x43a97b VPSUBD %YMM12,%YMM21,%YMM1 |
(388) 0x43a981 VPMOVSXDQ %YMM1,%ZMM8 |
(388) 0x43a987 VPMULLQ %ZMM8,%ZMM3,%ZMM10 |
(388) 0x43a98d VPMOVSXDQ %YMM9,%ZMM1 |
(388) 0x43a993 KXNORW %K0,%K0,%K5 |
(388) 0x43a997 VPXOR %XMM3,%XMM3,%XMM3 |
(388) 0x43a99b VMOVDQU64 0x400(%RSP),%ZMM5 |
(388) 0x43a9a3 VPMULLQ %ZMM0,%ZMM5,%ZMM14 |
(388) 0x43a9a9 VPADDQ %ZMM1,%ZMM7,%ZMM15 |
(388) 0x43a9af KXNORW %K0,%K0,%K1 |
(388) 0x43a9b3 VXORPD %XMM4,%XMM4,%XMM4 |
(388) 0x43a9b7 VPMULLQ %ZMM8,%ZMM5,%ZMM13 |
(388) 0x43a9bd VPADDQ %ZMM1,%ZMM11,%ZMM21 |
(388) 0x43a9c3 KXNORW %K0,%K0,%K4 |
(388) 0x43a9c7 VPXOR %XMM5,%XMM5,%XMM5 |
(388) 0x43a9cb KXNORW %K0,%K0,%K2 |
(388) 0x43a9cf VXORPD %XMM6,%XMM6,%XMM6 |
(388) 0x43a9d3 VPSUBD %YMM12,%YMM9,%YMM9 |
(388) 0x43a9d8 VPADDQ %ZMM1,%ZMM14,%ZMM27 |
(388) 0x43a9de VPMOVSXDQ %YMM9,%ZMM12 |
(388) 0x43a9e4 VPADDQ %ZMM12,%ZMM7,%ZMM28 |
(388) 0x43a9ea KXNORW %K0,%K0,%K6 |
(388) 0x43a9ee VPXOR %XMM7,%XMM7,%XMM7 |
(388) 0x43a9f2 KXNORW %K0,%K0,%K7 |
(388) 0x43a9f6 VPADDQ %ZMM12,%ZMM11,%ZMM29 |
(388) 0x43a9fc VPXOR %XMM9,%XMM9,%XMM9 |
(388) 0x43aa01 VGATHERQPD (%R13,%ZMM15,8),%ZMM2{%K3} |
(388) 0x43aa09 KXNORW %K0,%K0,%K3 |
(388) 0x43aa0d MOV 0x60(%RSP),%RAX |
(388) 0x43aa12 VGATHERQPD (%RAX,%ZMM21,8),%ZMM3{%K5} |
(388) 0x43aa19 VPXOR %XMM11,%XMM11,%XMM11 |
(388) 0x43aa1e KXNORW %K0,%K0,%K5 |
(388) 0x43aa22 VPXORD %XMM21,%XMM21,%XMM21 |
(388) 0x43aa28 VPMULLQ %ZMM0,%ZMM24,%ZMM21 |
(388) 0x43aa2e VPADDQ %ZMM12,%ZMM14,%ZMM30 |
(388) 0x43aa34 VPXOR %XMM14,%XMM14,%XMM14 |
(388) 0x43aa39 VGATHERQPD (%RDI,%ZMM27,8),%ZMM5{%K4} |
(388) 0x43aa40 KXNORW %K0,%K0,%K4 |
(388) 0x43aa44 VXORPD %XMM15,%XMM15,%XMM15 |
(388) 0x43aa49 VPXORD %XMM27,%XMM27,%XMM27 |
(388) 0x43aa4f VPMULLQ %ZMM0,%ZMM25,%ZMM27 |
(388) 0x43aa55 VPADDQ %ZMM1,%ZMM21,%ZMM31 |
(388) 0x43aa5b VPADDQ %ZMM1,%ZMM27,%ZMM18 |
(388) 0x43aa61 VGATHERQPD (%R13,%ZMM28,8),%ZMM7{%K6} |
(388) 0x43aa69 KXNORW %K0,%K0,%K6 |
(388) 0x43aa6d VGATHERQPD (%RAX,%ZMM29,8),%ZMM9{%K7} |
(388) 0x43aa74 VPXORD %XMM21,%XMM21,%XMM21 |
(388) 0x43aa7a VGATHERQPD (%RDI,%ZMM30,8),%ZMM14{%K5} |
(388) 0x43aa81 VPADDQ %ZMM12,%ZMM27,%ZMM28 |
(388) 0x43aa87 VGATHERQPD (%R14,%ZMM31,8),%ZMM15{%K4} |
(388) 0x43aa8e KXNORW %K0,%K0,%K4 |
(388) 0x43aa92 VGATHERQPD (%R15,%ZMM18,8),%ZMM21{%K6} |
(388) 0x43aa99 VPXORD %XMM27,%XMM27,%XMM27 |
(388) 0x43aa9f VGATHERQPD (%R15,%ZMM28,8),%ZMM27{%K4} |
(388) 0x43aaa6 VPXORD %XMM18,%XMM18,%XMM18 |
(388) 0x43aaac VPMULLQ %ZMM0,%ZMM26,%ZMM18 |
(388) 0x43aab2 VPADDQ %ZMM1,%ZMM18,%ZMM29 |
(388) 0x43aab8 KXNORW %K0,%K0,%K4 |
(388) 0x43aabc VPADDQ %ZMM1,%ZMM10,%ZMM30 |
(388) 0x43aac2 VXORPD %XMM28,%XMM28,%XMM28 |
(388) 0x43aac8 VGATHERQPD (%R12,%ZMM29,8),%ZMM28{%K4} |
(388) 0x43aacf VPADDQ %ZMM12,%ZMM18,%ZMM18 |
(388) 0x43aad5 KXNORW %K0,%K0,%K4 |
(388) 0x43aad9 VPXORD %XMM31,%XMM31,%XMM31 |
(388) 0x43aadf VPMULLQ %ZMM8,%ZMM24,%ZMM31 |
(388) 0x43aae5 VPADDQ %ZMM1,%ZMM13,%ZMM19 |
(388) 0x43aaeb VXORPD %XMM29,%XMM29,%XMM29 |
(388) 0x43aaf1 VGATHERQPD (%R12,%ZMM18,8),%ZMM29{%K4} |
(388) 0x43aaf8 VMOVDQU64 0x340(%RSP),%ZMM16 |
(388) 0x43ab00 VPXORD %XMM18,%XMM18,%XMM18 |
(388) 0x43ab06 VPMULLQ %ZMM0,%ZMM16,%ZMM18 |
(388) 0x43ab0c VPADDQ %ZMM1,%ZMM18,%ZMM18 |
(388) 0x43ab12 KXNORW %K0,%K0,%K4 |
(388) 0x43ab16 VPADDQ %ZMM12,%ZMM10,%ZMM10 |
(388) 0x43ab1c VXORPD %XMM20,%XMM20,%XMM20 |
(388) 0x43ab22 MOV 0x50(%RSP),%RCX |
(388) 0x43ab27 VGATHERQPD (%RCX,%ZMM18,8),%ZMM20{%K4} |
(388) 0x43ab2e KXNORW %K0,%K0,%K4 |
(388) 0x43ab32 VXORPD %XMM18,%XMM18,%XMM18 |
(388) 0x43ab38 VPMULLQ %ZMM8,%ZMM25,%ZMM22 |
(388) 0x43ab3e VPADDQ %ZMM12,%ZMM13,%ZMM13 |
(388) 0x43ab44 VPADDQ %ZMM1,%ZMM31,%ZMM31 |
(388) 0x43ab4a VGATHERQPD (%RAX,%ZMM30,8),%ZMM4{%K1} |
(388) 0x43ab51 KXNORW %K0,%K0,%K1 |
(388) 0x43ab55 VGATHERQPD (%RDI,%ZMM19,8),%ZMM6{%K2} |
(388) 0x43ab5c VXORPD %XMM19,%XMM19,%XMM19 |
(388) 0x43ab62 KXNORW %K0,%K0,%K2 |
(388) 0x43ab66 VPMULLQ %ZMM8,%ZMM26,%ZMM8 |
(388) 0x43ab6c VPADDQ %ZMM1,%ZMM22,%ZMM30 |
(388) 0x43ab72 VPXORD %XMM16,%XMM16,%XMM16 |
(388) 0x43ab78 VGATHERQPD (%RAX,%ZMM10,8),%ZMM11{%K3} |
(388) 0x43ab7f KXNORW %K0,%K0,%K3 |
(388) 0x43ab83 VGATHERQPD (%RDI,%ZMM13,8),%ZMM18{%K4} |
(388) 0x43ab8a VMOVDQU64 0x2c0(%RSP),%ZMM10 |
(388) 0x43ab92 VPMULLQ %ZMM0,%ZMM10,%ZMM10 |
(388) 0x43ab98 VPADDQ %ZMM1,%ZMM10,%ZMM10 |
(388) 0x43ab9e KXNORW %K0,%K0,%K4 |
(388) 0x43aba2 VPADDQ %ZMM12,%ZMM22,%ZMM13 |
(388) 0x43aba8 VPXORD %XMM22,%XMM22,%XMM22 |
(388) 0x43abae MOV 0x48(%RSP),%RAX |
(388) 0x43abb3 VGATHERQPD (%RAX,%ZMM10,8),%ZMM22{%K4} |
(388) 0x43abba VXORPD %XMM10,%XMM10,%XMM10 |
(388) 0x43abbf VPADDQ %ZMM12,%ZMM8,%ZMM12 |
(388) 0x43abc5 VMOVDQU64 0x380(%RSP),%ZMM23 |
(388) 0x43abcd VPMULLQ %ZMM0,%ZMM23,%ZMM23 |
(388) 0x43abd3 VPADDQ %ZMM1,%ZMM8,%ZMM8 |
(388) 0x43abd9 KXNORW %K0,%K0,%K4 |
(388) 0x43abdd VGATHERQPD (%R14,%ZMM31,8),%ZMM19{%K1} |
(388) 0x43abe4 VXORPD %XMM31,%XMM31,%XMM31 |
(388) 0x43abea VGATHERQPD (%R15,%ZMM30,8),%ZMM16{%K2} |
(388) 0x43abf1 KXNORW %K0,%K0,%K1 |
(388) 0x43abf5 VGATHERQPD (%R15,%ZMM13,8),%ZMM10{%K3} |
(388) 0x43abfc VXORPD %XMM13,%XMM13,%XMM13 |
(388) 0x43ac01 VGATHERQPD (%R12,%ZMM8,8),%ZMM31{%K4} |
(388) 0x43ac08 VPADDQ %ZMM1,%ZMM23,%ZMM8 |
(388) 0x43ac0e VGATHERQPD (%R12,%ZMM12,8),%ZMM13{%K1} |
(388) 0x43ac15 KXNORW %K0,%K0,%K1 |
(388) 0x43ac19 VXORPD %XMM12,%XMM12,%XMM12 |
(388) 0x43ac1e VMOVDQU64 0x300(%RSP),%ZMM23 |
(388) 0x43ac26 VPMULLQ %ZMM0,%ZMM23,%ZMM23 |
(388) 0x43ac2c VPADDQ %ZMM1,%ZMM23,%ZMM23 |
(388) 0x43ac32 KXNORW %K0,%K0,%K2 |
(388) 0x43ac36 MOV 0x58(%RSP),%RAX |
(388) 0x43ac3b VGATHERQPD (%RAX,%ZMM8,8),%ZMM12{%K1} |
(388) 0x43ac42 VXORPD %XMM8,%XMM8,%XMM8 |
(388) 0x43ac47 VGATHERQPD (%RSI,%ZMM23,8),%ZMM8{%K2} |
(388) 0x43ac4e VADDPD %ZMM5,%ZMM3,%ZMM3 |
(388) 0x43ac54 VADDPD %ZMM6,%ZMM4,%ZMM4 |
(388) 0x43ac5a VADDPD %ZMM3,%ZMM4,%ZMM3 |
(388) 0x43ac60 VMULPD %ZMM2,%ZMM3,%ZMM2 |
(388) 0x43ac66 VADDPD %ZMM21,%ZMM27,%ZMM3 |
(388) 0x43ac6c VADDPD %ZMM29,%ZMM28,%ZMM4 |
(388) 0x43ac72 VADDPD %ZMM4,%ZMM3,%ZMM3 |
(388) 0x43ac78 VFNMSUB213PD %ZMM2,%ZMM15,%ZMM3 |
(388) 0x43ac7e VADDPD %ZMM14,%ZMM9,%ZMM2 |
(388) 0x43ac84 VADDPD %ZMM18,%ZMM11,%ZMM4 |
(388) 0x43ac8a VADDPD %ZMM2,%ZMM4,%ZMM2 |
(388) 0x43ac90 VADDPD %ZMM16,%ZMM10,%ZMM4 |
(388) 0x43ac96 VFMADD231PD %ZMM2,%ZMM7,%ZMM3 |
(388) 0x43ac9c VADDPD %ZMM13,%ZMM31,%ZMM2 |
(388) 0x43aca2 VMOVDQU64 0x280(%RSP),%ZMM5 |
(388) 0x43acaa VPMULLQ %ZMM0,%ZMM5,%ZMM5 |
(388) 0x43acb0 KXNORW %K0,%K0,%K1 |
(388) 0x43acb4 VPADDQ %ZMM1,%ZMM5,%ZMM5 |
(388) 0x43acba VXORPD %XMM6,%XMM6,%XMM6 |
(388) 0x43acbe MOV 0x40(%RSP),%RAX |
(388) 0x43acc3 VGATHERQPD (%RAX,%ZMM5,8),%ZMM6{%K1} |
(388) 0x43acca VADDPD %ZMM2,%ZMM4,%ZMM2 |
(388) 0x43acd0 VFMADD213PD %ZMM3,%ZMM19,%ZMM2 |
(388) 0x43acd6 VMULPD 0x3c0(%RSP),%ZMM2,%ZMM2 |
(388) 0x43acde VADDPD %ZMM20,%ZMM22,%ZMM3 |
(388) 0x43ace4 VMULPD %ZMM12,%ZMM8,%ZMM4 |
(388) 0x43acea VMULPD %ZMM2,%ZMM3,%ZMM3 |
(388) 0x43acf0 VDIVPD %ZMM4,%ZMM3,%ZMM3 |
(388) 0x43acf6 VMOVDQU64 0x240(%RSP),%ZMM4 |
(388) 0x43acfe VPMULLQ %ZMM0,%ZMM4,%ZMM4 |
(388) 0x43ad04 VSUBPD %ZMM3,%ZMM6,%ZMM3 |
(388) 0x43ad0a VPADDQ %ZMM1,%ZMM4,%ZMM4 |
(388) 0x43ad10 KXNORW %K0,%K0,%K1 |
(388) 0x43ad14 KXNORW %K0,%K0,%K2 |
(388) 0x43ad18 MOV 0x38(%RSP),%RAX |
(388) 0x43ad1d VSCATTERQPD %ZMM3,(%RAX,%ZMM4,8){%K1} |
(388) 0x43ad24 VXORPD %XMM3,%XMM3,%XMM3 |
(388) 0x43ad28 VGATHERQPD (%RSI,%ZMM23,8),%ZMM3{%K2} |
(388) 0x43ad2f VADDPD %ZMM12,%ZMM2,%ZMM2 |
(388) 0x43ad35 VMULPD %ZMM12,%ZMM3,%ZMM3 |
(388) 0x43ad3b VDIVPD %ZMM2,%ZMM3,%ZMM2 |
(388) 0x43ad41 VMOVDQU64 0x200(%RSP),%ZMM3 |
(388) 0x43ad49 VPMULLQ %ZMM0,%ZMM3,%ZMM0 |
(388) 0x43ad4f VPADDQ %ZMM1,%ZMM0,%ZMM0 |
(388) 0x43ad55 KXNORW %K0,%K0,%K1 |
(388) 0x43ad59 MOV 0xe0(%RSP),%RAX |
(388) 0x43ad61 VSCATTERQPD %ZMM2,(%RAX,%ZMM0,8){%K1} |
(388) 0x43ad68 VPADDQ 0x32306(%RIP){1to8},%ZMM17,%ZMM17 |
(388) 0x43ad72 ADD $0x8,%RBX |
(388) 0x43ad76 CMP 0x18(%RSP),%RBX |
(388) 0x43ad7b JB 43a900 |
0x43ad81 MOV 0x18(%RSP),%RAX |
0x43ad86 CMP %RAX,0xf8(%RSP) |
0x43ad8e MOV 0x20(%RSP),%R11 |
0x43ad93 VMOVUPD 0x170(%RSP),%XMM4 |
0x43ad9c JNE 43adcc |
0x43ad9e MOV $0x48d710,%EDI |
0x43ada3 MOV 0x70(%RSP),%ESI |
0x43ada7 LEA -0x28(%RBP),%RSP |
0x43adab POP %RBX |
0x43adac POP %R12 |
0x43adae POP %R13 |
0x43adb0 POP %R14 |
0x43adb2 POP %R15 |
0x43adb4 POP %RBP |
0x43adb5 VZEROUPPER |
0x43adb8 JMP 403050 |
0x43adbd LEA -0x28(%RBP),%RSP |
0x43adc1 POP %RBX |
0x43adc2 POP %R12 |
0x43adc4 POP %R13 |
0x43adc6 POP %R14 |
0x43adc8 POP %R15 |
0x43adca POP %RBP |
0x43adcb RET |
0x43adcc ADD 0x18(%RSP),%R11 |
0x43add1 JMP 43b07b |
0x43add6 NOPW %CS:(%RAX,%RAX,1) |
(387) 0x43ade0 MOV %R11,%RAX |
(387) 0x43ade3 CQTO |
(387) 0x43ade5 IDIV %R9 |
(387) 0x43ade8 ADD %R10D,%EDX |
(387) 0x43adeb MOVSXD %EDX,%RAX |
(387) 0x43adee MOVSXD %ECX,%RCX |
(387) 0x43adf1 IMUL %RCX,%RSI |
(387) 0x43adf5 MOV %RSI,0x18(%RSP) |
(387) 0x43adfa LEA (%RSI,%RAX,1),%R10 |
(387) 0x43adfe MOV %RDI,%RBX |
(387) 0x43ae01 IMUL %RCX,%RBX |
(387) 0x43ae05 LEA (%RBX,%RAX,1),%R11 |
(387) 0x43ae09 LEA 0x1(%RCX),%R8D |
(387) 0x43ae0d MOVSXD %R8D,%R9 |
(387) 0x43ae10 MOV %RDI,%R8 |
(387) 0x43ae13 IMUL %R9,%R8 |
(387) 0x43ae17 MOV 0x60(%RSP),%R14 |
(387) 0x43ae1c VMOVSD (%R14,%R11,8),%XMM0 |
(387) 0x43ae22 MOV 0x128(%RSP),%RDI |
(387) 0x43ae2a MOV %RDI,%RDX |
(387) 0x43ae2d IMUL %RCX,%RDX |
(387) 0x43ae31 MOV %RDX,0x180(%RSP) |
(387) 0x43ae39 LEA (%RDX,%RAX,1),%R12 |
(387) 0x43ae3d MOV 0xc0(%RSP),%RDX |
(387) 0x43ae45 VMOVSD (%RDX,%R12,8),%XMM1 |
(387) 0x43ae4b MOV %RDI,%R12 |
(387) 0x43ae4e IMUL %R9,%R12 |
(387) 0x43ae52 LEA 0x1(%RBX,%RAX,1),%R13 |
(387) 0x43ae57 LEA 0x1(%R8,%RAX,1),%RSI |
(387) 0x43ae5c MOV %RSI,0x140(%RSP) |
(387) 0x43ae64 ADD %RAX,%R8 |
(387) 0x43ae67 VMOVSD (%R14,%R13,8),%XMM2 |
(387) 0x43ae6d LEA 0x1(%R12,%RAX,1),%RBX |
(387) 0x43ae72 VADDSD (%R14,%R8,8),%XMM0,%XMM0 |
(387) 0x43ae78 ADD %RAX,%R12 |
(387) 0x43ae7b MOV 0x118(%RSP),%R15 |
(387) 0x43ae83 MOV %R15,%R8 |
(387) 0x43ae86 IMUL %RCX,%R8 |
(387) 0x43ae8a MOV %RDX,%RDI |
(387) 0x43ae8d VADDSD (%RDX,%R12,8),%XMM1,%XMM1 |
(387) 0x43ae93 LEA 0x1(%R8,%RAX,1),%R12 |
(387) 0x43ae98 ADD %RAX,%R8 |
(387) 0x43ae9b MOV 0x110(%RSP),%RDX |
(387) 0x43aea3 VMOVSD (%RDX,%R8,8),%XMM3 |
(387) 0x43aea9 MOV 0xd0(%RSP),%R13 |
(387) 0x43aeb1 MOV %R13,%R8 |
(387) 0x43aeb4 IMUL %RCX,%R8 |
(387) 0x43aeb8 VADDSD %XMM0,%XMM1,%XMM0 |
(387) 0x43aebc MOV 0x130(%RSP),%R11 |
(387) 0x43aec4 VMULSD (%R11,%R10,8),%XMM0,%XMM0 |
(387) 0x43aeca LEA (%R8,%RAX,1),%R10 |
(387) 0x43aece MOV 0x108(%RSP),%RSI |
(387) 0x43aed6 VMOVSD (%RSI,%R10,8),%XMM1 |
(387) 0x43aedc VADDSD (%RDX,%R12,8),%XMM3,%XMM3 |
(387) 0x43aee2 MOV %R14,%R12 |
(387) 0x43aee5 LEA 0x1(%R8,%RAX,1),%R8 |
(387) 0x43aeea VADDSD (%RSI,%R8,8),%XMM1,%XMM1 |
(387) 0x43aef0 MOV 0xb8(%RSP),%R10 |
(387) 0x43aef8 MOV %R10,%R8 |
(387) 0x43aefb IMUL %RCX,%R8 |
(387) 0x43aeff ADD %RAX,%R8 |
(387) 0x43af02 VADDSD %XMM3,%XMM1,%XMM1 |
(387) 0x43af06 MOV 0x120(%RSP),%R14 |
(387) 0x43af0e VFNMSUB132SD (%R14,%R8,8),%XMM0,%XMM1 |
(387) 0x43af14 MOV 0x180(%RSP),%R8 |
(387) 0x43af1c LEA 0x1(%R8,%RAX,1),%R8 |
(387) 0x43af21 VMOVSD (%RDI,%R8,8),%XMM0 |
(387) 0x43af27 MOV 0x140(%RSP),%R8 |
(387) 0x43af2f VADDSD (%R12,%R8,8),%XMM2,%XMM2 |
(387) 0x43af35 MOV 0x18(%RSP),%R8 |
(387) 0x43af3a LEA 0x1(%R8,%RAX,1),%R12 |
(387) 0x43af3f VADDSD (%RDI,%RBX,8),%XMM0,%XMM0 |
(387) 0x43af44 MOV %RDX,%RBX |
(387) 0x43af47 IMUL %R9,%R15 |
(387) 0x43af4b VADDSD %XMM2,%XMM0,%XMM0 |
(387) 0x43af4f VFMADD132SD (%R11,%R12,8),%XMM1,%XMM0 |
(387) 0x43af55 LEA 0x1(%R15,%RAX,1),%RDX |
(387) 0x43af5a ADD %RAX,%R15 |
(387) 0x43af5d VMOVSD (%RBX,%R15,8),%XMM1 |
(387) 0x43af63 MOV %R10,%R8 |
(387) 0x43af66 IMUL %R9,%R8 |
(387) 0x43af6a IMUL %R13,%R9 |
(387) 0x43af6e VADDSD (%RBX,%RDX,8),%XMM1,%XMM1 |
(387) 0x43af73 LEA (%R9,%RAX,1),%RDX |
(387) 0x43af77 VMOVSD (%RSI,%RDX,8),%XMM2 |
(387) 0x43af7c ADD %RAX,%R8 |
(387) 0x43af7f LEA 0x1(%R9,%RAX,1),%RDX |
(387) 0x43af84 VADDSD (%RSI,%RDX,8),%XMM2,%XMM2 |
(387) 0x43af89 VADDSD %XMM1,%XMM2,%XMM1 |
(387) 0x43af8d VFMADD132SD (%R14,%R8,8),%XMM0,%XMM1 |
(387) 0x43af93 VMULSD %XMM4,%XMM1,%XMM0 |
(387) 0x43af97 MOV 0x100(%RSP),%RDX |
(387) 0x43af9f IMUL %RCX,%RDX |
(387) 0x43afa3 ADD %RAX,%RDX |
(387) 0x43afa6 MOV 0x58(%RSP),%RSI |
(387) 0x43afab VMOVSD (%RSI,%RDX,8),%XMM1 |
(387) 0x43afb0 MOV 0xb0(%RSP),%RDX |
(387) 0x43afb8 IMUL %RCX,%RDX |
(387) 0x43afbc ADD %RAX,%RDX |
(387) 0x43afbf MOV 0xc8(%RSP),%R8 |
(387) 0x43afc7 IMUL %RCX,%R8 |
(387) 0x43afcb ADD %RAX,%R8 |
(387) 0x43afce MOV 0x48(%RSP),%RSI |
(387) 0x43afd3 VMOVSD (%RSI,%R8,8),%XMM2 |
(387) 0x43afd9 MOV 0xa8(%RSP),%R8 |
(387) 0x43afe1 IMUL %RCX,%R8 |
(387) 0x43afe5 ADD %RAX,%R8 |
(387) 0x43afe8 MOV 0x50(%RSP),%RSI |
(387) 0x43afed VADDSD (%RSI,%RDX,8),%XMM2,%XMM2 |
(387) 0x43aff2 VMULSD %XMM0,%XMM2,%XMM2 |
(387) 0x43aff6 MOV 0xa0(%RSP),%RSI |
(387) 0x43affe VMULSD (%RSI,%R8,8),%XMM1,%XMM3 |
(387) 0x43b004 VDIVSD %XMM3,%XMM2,%XMM2 |
(387) 0x43b008 MOV 0x98(%RSP),%RDX |
(387) 0x43b010 IMUL %RCX,%RDX |
(387) 0x43b014 ADD %RAX,%RDX |
(387) 0x43b017 MOV 0x40(%RSP),%RDI |
(387) 0x43b01c VMOVSD (%RDI,%RDX,8),%XMM3 |
(387) 0x43b021 VSUBSD %XMM2,%XMM3,%XMM2 |
(387) 0x43b025 MOV 0x90(%RSP),%RDX |
(387) 0x43b02d IMUL %RCX,%RDX |
(387) 0x43b031 ADD %RAX,%RDX |
(387) 0x43b034 MOV 0x38(%RSP),%RDI |
(387) 0x43b039 VMOVSD %XMM2,(%RDI,%RDX,8) |
(387) 0x43b03e VMULSD (%RSI,%R8,8),%XMM1,%XMM2 |
(387) 0x43b044 IMUL 0x88(%RSP),%RCX |
(387) 0x43b04d ADD %RAX,%RCX |
(387) 0x43b050 VADDSD %XMM1,%XMM0,%XMM0 |
(387) 0x43b054 VDIVSD %XMM0,%XMM2,%XMM0 |
(387) 0x43b058 MOV 0xe0(%RSP),%RAX |
(387) 0x43b060 VMOVSD %XMM0,(%RAX,%RCX,8) |
(387) 0x43b065 MOV 0x20(%RSP),%R11 |
(387) 0x43b06a INC %R11 |
(387) 0x43b06d CMP 0xd8(%RSP),%R11 |
(387) 0x43b075 JG 43ad9e |
(387) 0x43b07b MOV %R11,%R8 |
(387) 0x43b07e SHR $0x20,%R8 |
(387) 0x43b082 JE 43b0a0 |
(387) 0x43b084 MOV %R11,%RAX |
(387) 0x43b087 XOR %EDX,%EDX |
(387) 0x43b089 MOV 0x80(%RSP),%R9 |
(387) 0x43b091 DIV %R9 |
(387) 0x43b094 MOV %RAX,%RCX |
(387) 0x43b097 JMP 43b0b2 |
0x43b099 NOPL (%RAX) |
(387) 0x43b0a0 MOV %R11D,%EAX |
(387) 0x43b0a3 XOR %EDX,%EDX |
(387) 0x43b0a5 MOV 0x80(%RSP),%R9 |
(387) 0x43b0ad DIV %R9D |
(387) 0x43b0b0 MOV %EAX,%ECX |
(387) 0x43b0b2 MOV 0x30(%RSP),%R10 |
(387) 0x43b0b7 MOV 0x78(%RSP),%RDI |
(387) 0x43b0bc MOV 0x68(%RSP),%RSI |
(387) 0x43b0c1 ADD 0x2c(%RSP),%ECX |
(387) 0x43b0c5 TEST %R8,%R8 |
(387) 0x43b0c8 MOV %R11,0x20(%RSP) |
(387) 0x43b0cd JNE 43ade0 |
(387) 0x43b0d3 MOV %R11D,%EAX |
(387) 0x43b0d6 XOR %EDX,%EDX |
(387) 0x43b0d8 DIV %R9D |
(387) 0x43b0db JMP 43ade8 |
Path / |
Source file and lines | PdV.cpp:69-83 |
Module | exec |
nb instructions | 221 |
nb uops | 223 |
loop length | 1174 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 1 |
used zmm registers | 5 |
nb stack references | 69 |
micro-operation queue | 37.17 cycles |
front end | 37.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.50 | 5.60 | 29.67 | 29.67 | 36.50 | 19.00 | 5.50 | 36.50 | 36.50 | 36.50 | 5.40 | 29.67 |
cycles | 5.50 | 5.60 | 29.67 | 29.67 | 36.50 | 19.00 | 5.50 | 36.50 | 36.50 | 36.50 | 5.40 | 29.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 38.16-38.17 |
Stall cycles | 1.16 |
LM full (events) | 2.99 |
Front-end | 37.17 |
Dispatch | 36.50 |
Overall L1 | 37.17 |
all | 12% |
load | 3% |
store | 21% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 60% |
load | 50% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 14% |
load | 6% |
store | 23% |
mul | 0% |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 3% |
all | 21% |
load | 14% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 39% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 35% |
load | 18% |
store | 62% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 21% |
load | 14% |
store | 30% |
mul | 12% |
add-sub | 39% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x500,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x2c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 43adbd <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x140(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x7c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf0(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48d6f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4031d0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xf0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 43ad9e <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8ce> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVQ %R14,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x30(%RSP),%ECX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x180(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD 0x329e4(%RIP),%XMM0,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R11,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 43b07b <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xbab> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RCX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x2c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R10,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %RSI,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDI,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDX,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM4,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM4,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM0,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R9,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xb0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xa8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x98(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x88(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %R11,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x33628(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
MOV %RBX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,0xf8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD 0x170(%RSP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JNE 43adcc <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x48d710,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x70(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
ADD 0x18(%RSP),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JMP 43b07b <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xbab> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | PdV.cpp:69-83 |
Module | exec |
nb instructions | 221 |
nb uops | 223 |
loop length | 1174 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 1 |
used zmm registers | 5 |
nb stack references | 69 |
micro-operation queue | 37.17 cycles |
front end | 37.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.50 | 5.60 | 29.67 | 29.67 | 36.50 | 19.00 | 5.50 | 36.50 | 36.50 | 36.50 | 5.40 | 29.67 |
cycles | 5.50 | 5.60 | 29.67 | 29.67 | 36.50 | 19.00 | 5.50 | 36.50 | 36.50 | 36.50 | 5.40 | 29.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 38.16-38.17 |
Stall cycles | 1.16 |
LM full (events) | 2.99 |
Front-end | 37.17 |
Dispatch | 36.50 |
Overall L1 | 37.17 |
all | 12% |
load | 3% |
store | 21% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 3% |
all | 60% |
load | 50% |
store | 100% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 14% |
load | 6% |
store | 23% |
mul | 0% |
add-sub | 33% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 3% |
all | 21% |
load | 14% |
store | 28% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 39% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 35% |
load | 18% |
store | 62% |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 21% |
load | 14% |
store | 30% |
mul | 12% |
add-sub | 39% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x500,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x68(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x28(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RBP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x2c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x74(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 43adbd <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8ed> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R14,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0x138(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x140(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x7c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf0(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48d6f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 4031d0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xf0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 43ad9e <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8ce> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVQ %R14,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV %R13,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x30(%RSP),%ECX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x1(%RDI),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %RBX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%RBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x50(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x180(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD 0x329e4(%RIP),%XMM0,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV 0x58(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x140(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x50(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RDX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R11,%RBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,0x80(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x130(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R9,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xc8(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 43b07b <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xbab> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RCX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x2c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x30(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x1e0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x480(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R10,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x440(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %RSI,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x400(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDI,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDX,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM4,0x170(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM4,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM0,0x3c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R9,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x380(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xb0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x340(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xa8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x300(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R8,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x2c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x98(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x280(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x90(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x240(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0x88(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV %R11,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x33628(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
MOV %RBX,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
AND $-0x8,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RBX,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %EBX,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xc0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xa0(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x18(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,0xf8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD 0x170(%RSP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JNE 43adcc <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x8fc> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x48d710,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x70(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
ADD 0x18(%RSP),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JMP 43b07b <_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xbab> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z10PdV_kernelbiiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted– | 5.01 | 4.09 |
○Loop 388 - PdV.cpp:69-83 - exec | 5.01 | 4.08 |
○Loop 387 - PdV.cpp:69-83 - exec | 0 | 0 |