Function: _Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted | Module: exec | Source: accelerate.cpp:40-53 [...] | Coverage: 3.33% |
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Function: _Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted | Module: exec | Source: accelerate.cpp:40-53 [...] | Coverage: 3.33% |
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/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/accelerate.cpp: 40 - 53 |
-------------------------------------------------------------------------------- |
40: #pragma omp parallel for simd collapse(2) |
41: for (int j = (y_min + 1); j < (y_max + 1 + 2); j++) { |
42: for (int i = (x_min + 1); i < (x_max + 1 + 2); i++) { |
43: double stepbymass_s = halfdt / ((density0(i - 1, j - 1) * volume(i - 1, j - 1) + density0(i - 1, j + 0) * volume(i - 1, j + 0) + |
44: density0(i, j) * volume(i, j) + density0(i + 0, j - 1) * volume(i + 0, j - 1)) * |
45: 0.25); |
46: xvel1(i, j) = xvel0(i, j) - stepbymass_s * (xarea(i, j) * (pressure(i, j) - pressure(i - 1, j + 0)) + |
47: xarea(i + 0, j - 1) * (pressure(i + 0, j - 1) - pressure(i - 1, j - 1))); |
48: yvel1(i, j) = yvel0(i, j) - stepbymass_s * (yarea(i, j) * (pressure(i, j) - pressure(i + 0, j - 1)) + |
49: yarea(i - 1, j + 0) * (pressure(i - 1, j + 0) - pressure(i - 1, j - 1))); |
50: xvel1(i, j) = xvel1(i, j) - stepbymass_s * (xarea(i, j) * (viscosity(i, j) - viscosity(i - 1, j + 0)) + |
51: xarea(i + 0, j - 1) * (viscosity(i + 0, j - 1) - viscosity(i - 1, j - 1))); |
52: yvel1(i, j) = yvel1(i, j) - stepbymass_s * (yarea(i, j) * (viscosity(i, j) - viscosity(i + 0, j - 1)) + |
53: yarea(i - 1, j + 0) * (viscosity(i - 1, j + 0) - viscosity(i - 1, j - 1))); |
/home/eoseret/qaas_runs_CPU_9468/171-145-9336/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
0x41a6a0 PUSH %RBP |
0x41a6a1 MOV %RSP,%RBP |
0x41a6a4 PUSH %R15 |
0x41a6a6 PUSH %R14 |
0x41a6a8 PUSH %R13 |
0x41a6aa PUSH %R12 |
0x41a6ac PUSH %RBX |
0x41a6ad AND $-0x40,%RSP |
0x41a6b1 SUB $0x280,%RSP |
0x41a6b8 MOV 0x68(%RBP),%RAX |
0x41a6bc MOV 0x58(%RBP),%R12 |
0x41a6c0 MOV 0x50(%RBP),%RSI |
0x41a6c4 MOV 0x38(%RBP),%R11 |
0x41a6c8 MOV 0x30(%RBP),%R13 |
0x41a6cc MOV 0x28(%RBP),%R10 |
0x41a6d0 MOV %R10,0x40(%RSP) |
0x41a6d5 MOV 0x20(%RBP),%RBX |
0x41a6d9 MOV 0x18(%RBP),%R15 |
0x41a6dd VMOVQ 0x40(%RBP),%XMM0 |
0x41a6e2 MOV 0x10(%RBP),%R14 |
0x41a6e6 MOV 0x48(%RBP),%R10D |
0x41a6ea MOV %R10D,0x54(%RSP) |
0x41a6ef MOVL $0,0x84(%RSP) |
0x41a6fa TEST %RAX,%RAX |
0x41a6fd JS 41aede |
0x41a703 MOV %R15,0x58(%RSP) |
0x41a708 MOV %R11,0x68(%RSP) |
0x41a70d MOV %RSI,0x60(%RSP) |
0x41a712 MOV %R9,%R15 |
0x41a715 MOV %R8,0x70(%RSP) |
0x41a71a MOV %RDX,0x48(%RSP) |
0x41a71f MOV %RCX,0x38(%RSP) |
0x41a724 MOV (%RDI),%ESI |
0x41a726 MOVQ $0,0xf0(%RSP) |
0x41a732 MOV %RAX,0xe8(%RSP) |
0x41a73a MOVQ $0x1,0x128(%RSP) |
0x41a746 SUB $0x8,%RSP |
0x41a74a LEA 0x130(%RSP),%RAX |
0x41a752 LEA 0x8c(%RSP),%RCX |
0x41a75a LEA 0xf8(%RSP),%R8 |
0x41a762 LEA 0xf0(%RSP),%R9 |
0x41a76a MOV $0x48c3b0,%EDI |
0x41a76f MOV %ESI,0x88(%RSP) |
0x41a776 MOV $0x22,%EDX |
0x41a77b PUSH $0x1 |
0x41a77d PUSH $0x1 |
0x41a77f PUSH %RAX |
0x41a780 VMOVDQU %XMM0,0x150(%RSP) |
0x41a789 CALL 4031d0 <__kmpc_for_static_init_8@plt> |
0x41a78e VMOVUPD 0x150(%RSP),%XMM3 |
0x41a797 ADD $0x20,%RSP |
0x41a79b MOV 0xf0(%RSP),%R11 |
0x41a7a3 MOV 0xe8(%RSP),%RAX |
0x41a7ab MOV %RAX,0xd8(%RSP) |
0x41a7b3 CMP %RAX,%R11 |
0x41a7b6 JA 41aebc |
0x41a7bc MOV %R12,%RCX |
0x41a7bf SUB 0x60(%RSP),%ECX |
0x41a7c3 MOV (%R15),%RAX |
0x41a7c6 MOV %RAX,0x78(%RSP) |
0x41a7cb MOV 0x10(%R15),%R15 |
0x41a7cf LEA 0x1(%R11),%RAX |
0x41a7d3 MOV 0xd8(%RSP),%RDI |
0x41a7db INC %RDI |
0x41a7de CMP %RDI,%RAX |
0x41a7e1 CMOVG %RAX,%RDI |
0x41a7e5 MOV 0x70(%RSP),%R12 |
0x41a7ea MOV (%R12),%R8 |
0x41a7ee MOV 0x10(%R12),%R12 |
0x41a7f3 MOV (%RBX),%R9 |
0x41a7f6 MOV 0x10(%RBX),%RAX |
0x41a7fa MOV %RAX,0x70(%RSP) |
0x41a7ff MOV 0x48(%RSP),%RAX |
0x41a804 MOV (%RAX),%R10 |
0x41a807 MOV 0x10(%RAX),%RAX |
0x41a80b MOV %RAX,0xd0(%RSP) |
0x41a813 MOV (%R14),%RDX |
0x41a816 MOV 0x10(%R14),%RBX |
0x41a81a MOV (%R13),%RAX |
0x41a81e MOV %RAX,0xc8(%RSP) |
0x41a826 MOV 0x10(%R13),%RAX |
0x41a82a MOV %RAX,0x48(%RSP) |
0x41a82f MOV 0x40(%RSP),%RAX |
0x41a834 MOV (%RAX),%RSI |
0x41a837 MOV %RSI,0xc0(%RSP) |
0x41a83f MOV 0x10(%RAX),%RAX |
0x41a843 MOV %RAX,0xe0(%RSP) |
0x41a84b MOV 0x38(%RSP),%RAX |
0x41a850 MOV (%RAX),%RSI |
0x41a853 MOV %RSI,0xb8(%RSP) |
0x41a85b MOV 0x10(%RAX),%RAX |
0x41a85f MOV %RAX,0xb0(%RSP) |
0x41a867 MOV 0x68(%RSP),%RAX |
0x41a86c MOV (%RAX),%RSI |
0x41a86f MOV 0x10(%RAX),%RAX |
0x41a873 MOV 0x58(%RSP),%R13 |
0x41a878 MOV (%R13),%R14 |
0x41a87c MOV %R14,0xa8(%RSP) |
0x41a884 MOV 0x10(%R13),%R13 |
0x41a888 MOV %R13,0x58(%RSP) |
0x41a88d MOV 0xd0(%RSP),%R14 |
0x41a895 SUB %R11,%RDI |
0x41a898 TEST $-0x8,%EDI |
0x41a89e MOV %RCX,0xa0(%RSP) |
0x41a8a6 MOV %R15,0x98(%RSP) |
0x41a8ae MOV %R8,0x120(%RSP) |
0x41a8b6 MOV %R12,0x118(%RSP) |
0x41a8be MOV %R10,0x108(%RSP) |
0x41a8c6 MOV %RDX,0x90(%RSP) |
0x41a8ce MOV %RBX,0x88(%RSP) |
0x41a8d6 MOV %RAX,0x68(%RSP) |
0x41a8db MOV %R9,0x110(%RSP) |
0x41a8e3 MOV %RSI,0x100(%RSP) |
0x41a8eb JE 41b152 |
0x41a8f1 VPBROADCASTQ %RCX,%ZMM16 |
0x41a8f7 MOV 0x54(%RSP),%EAX |
0x41a8fb VPBROADCASTD %EAX,%YMM0 |
0x41a901 VMOVDQU %YMM0,0x160(%RSP) |
0x41a90a MOV 0x60(%RSP),%RAX |
0x41a90f VPBROADCASTD %EAX,%YMM0 |
0x41a915 VMOVDQU %YMM0,0x140(%RSP) |
0x41a91e MOV 0x78(%RSP),%RAX |
0x41a923 VPBROADCASTQ %RAX,%ZMM20 |
0x41a929 VPBROADCASTQ %R8,%ZMM21 |
0x41a92f VBROADCASTSD %XMM3,%ZMM0 |
0x41a935 VMOVUPD %ZMM0,0x200(%RSP) |
0x41a93d VPBROADCASTQ %R9,%ZMM0 |
0x41a943 VMOVDQU64 %ZMM0,0x1c0(%RSP) |
0x41a94b VPBROADCASTQ %R10,%ZMM24 |
0x41a951 VPBROADCASTQ %RDX,%ZMM25 |
0x41a957 MOV 0xc8(%RSP),%RAX |
0x41a95f VPBROADCASTQ %RAX,%ZMM0 |
0x41a965 VMOVDQU64 %ZMM0,0x180(%RSP) |
0x41a96d MOV 0xc0(%RSP),%RAX |
0x41a975 VPBROADCASTQ %RAX,%ZMM27 |
0x41a97b MOV 0xb8(%RSP),%RAX |
0x41a983 VPBROADCASTQ %RAX,%ZMM28 |
0x41a989 VPBROADCASTQ %RSI,%ZMM29 |
0x41a98f MOV 0xa8(%RSP),%RAX |
0x41a997 VPBROADCASTQ %RAX,%ZMM30 |
0x41a99d MOV %R11,0x40(%RSP) |
0x41a9a2 VPBROADCASTQ %R11,%ZMM0 |
0x41a9a8 VPADDQ 0x52a0e(%RIP),%ZMM0,%ZMM17 |
0x41a9b2 MOV %RDI,0xf8(%RSP) |
0x41a9ba MOV %EDI,%R13D |
0x41a9bd AND $-0x8,%R13D |
0x41a9c1 MOV %R13,0x38(%RSP) |
0x41a9c6 XOR %R13D,%R13D |
0x41a9c9 MOV 0xb0(%RSP),%RDI |
0x41a9d1 MOV 0x58(%RSP),%RSI |
0x41a9d6 NOPW %CS:(%RAX,%RAX,1) |
(140) 0x41a9e0 VMOVDQA64 %ZMM17,%ZMM0 |
(140) 0x41a9e6 VMOVDQA64 %ZMM16,%ZMM1 |
(140) 0x41a9ec LEA 0x410cd(%RIP),%RAX |
(140) 0x41a9f3 CALL %RAX |
(140) 0x41a9f5 VPMOVQD %ZMM0,%YMM0 |
(140) 0x41a9fb VPADDD 0x160(%RSP),%YMM0,%YMM31 |
(140) 0x41aa03 VMOVDQA64 %ZMM17,%ZMM0 |
(140) 0x41aa09 VMOVDQA64 %ZMM16,%ZMM1 |
(140) 0x41aa0f CALLQ 0x715bb(%RIP) |
(140) 0x41aa15 VPMOVQD %ZMM0,%YMM0 |
(140) 0x41aa1b VPADDD 0x140(%RSP),%YMM0,%YMM2 |
(140) 0x41aa24 VPCMPEQD %YMM1,%YMM1,%YMM1 |
(140) 0x41aa28 VPADDD %YMM1,%YMM2,%YMM0 |
(140) 0x41aa2c VPADDD %YMM1,%YMM31,%YMM1 |
(140) 0x41aa32 VPMOVSXDQ %YMM1,%ZMM1 |
(140) 0x41aa38 VPXOR %XMM5,%XMM5,%XMM5 |
(140) 0x41aa3c VPMULLQ %ZMM1,%ZMM20,%ZMM5 |
(140) 0x41aa42 VPMOVSXDQ %YMM0,%ZMM0 |
(140) 0x41aa48 KXNORW %K0,%K0,%K1 |
(140) 0x41aa4c VXORPD %XMM4,%XMM4,%XMM4 |
(140) 0x41aa50 VPMULLQ %ZMM1,%ZMM21,%ZMM8 |
(140) 0x41aa56 VPADDQ %ZMM0,%ZMM5,%ZMM7 |
(140) 0x41aa5c KXNORW %K0,%K0,%K2 |
(140) 0x41aa60 VPMOVSXDQ %YMM31,%ZMM3 |
(140) 0x41aa66 VPMULLQ %ZMM3,%ZMM20,%ZMM9 |
(140) 0x41aa6c VPADDQ %ZMM0,%ZMM8,%ZMM10 |
(140) 0x41aa72 VXORPD %XMM6,%XMM6,%XMM6 |
(140) 0x41aa76 VGATHERQPD (%R15,%ZMM7,8),%ZMM4{%K1} |
(140) 0x41aa7d VPADDQ %ZMM0,%ZMM9,%ZMM11 |
(140) 0x41aa83 VGATHERQPD (%R12,%ZMM10,8),%ZMM6{%K2} |
(140) 0x41aa8a KXNORW %K0,%K0,%K1 |
(140) 0x41aa8e VXORPD %XMM7,%XMM7,%XMM7 |
(140) 0x41aa92 VPXOR %XMM10,%XMM10,%XMM10 |
(140) 0x41aa97 VPMULLQ %ZMM3,%ZMM21,%ZMM10 |
(140) 0x41aa9d VPADDQ %ZMM0,%ZMM10,%ZMM12 |
(140) 0x41aaa3 KXNORW %K0,%K0,%K2 |
(140) 0x41aaa7 VGATHERQPD (%R15,%ZMM11,8),%ZMM7{%K1} |
(140) 0x41aaae VXORPD %XMM11,%XMM11,%XMM11 |
(140) 0x41aab3 VGATHERQPD (%R12,%ZMM12,8),%ZMM11{%K2} |
(140) 0x41aaba VPMOVSXDQ %YMM2,%ZMM2 |
(140) 0x41aac0 VPADDQ %ZMM2,%ZMM9,%ZMM9 |
(140) 0x41aac6 KXNORW %K0,%K0,%K1 |
(140) 0x41aaca VXORPD %XMM12,%XMM12,%XMM12 |
(140) 0x41aacf VPADDQ %ZMM2,%ZMM10,%ZMM10 |
(140) 0x41aad5 KXNORW %K0,%K0,%K2 |
(140) 0x41aad9 VGATHERQPD (%R15,%ZMM9,8),%ZMM12{%K1} |
(140) 0x41aae0 VXORPD %XMM9,%XMM9,%XMM9 |
(140) 0x41aae5 VGATHERQPD (%R12,%ZMM10,8),%ZMM9{%K2} |
(140) 0x41aaec VPADDQ %ZMM2,%ZMM5,%ZMM5 |
(140) 0x41aaf2 KXNORW %K0,%K0,%K1 |
(140) 0x41aaf6 VXORPD %XMM10,%XMM10,%XMM10 |
(140) 0x41aafb VPADDQ %ZMM2,%ZMM8,%ZMM8 |
(140) 0x41ab01 KXNORW %K0,%K0,%K2 |
(140) 0x41ab05 VGATHERQPD (%R15,%ZMM5,8),%ZMM10{%K1} |
(140) 0x41ab0c VXORPD %XMM13,%XMM13,%XMM13 |
(140) 0x41ab11 VGATHERQPD (%R12,%ZMM8,8),%ZMM13{%K2} |
(140) 0x41ab18 VPXOR %XMM5,%XMM5,%XMM5 |
(140) 0x41ab1c VPMULLQ %ZMM3,%ZMM24,%ZMM5 |
(140) 0x41ab22 KXNORW %K0,%K0,%K1 |
(140) 0x41ab26 VXORPD %XMM8,%XMM8,%XMM8 |
(140) 0x41ab2b VPADDQ %ZMM2,%ZMM5,%ZMM5 |
(140) 0x41ab31 VPMULLQ %ZMM3,%ZMM25,%ZMM14 |
(140) 0x41ab37 KXNORW %K0,%K0,%K2 |
(140) 0x41ab3b VXORPD %XMM15,%XMM15,%XMM15 |
(140) 0x41ab40 VPADDQ %ZMM2,%ZMM14,%ZMM31 |
(140) 0x41ab46 VPADDQ %ZMM0,%ZMM14,%ZMM14 |
(140) 0x41ab4c VGATHERQPD (%R14,%ZMM5,8),%ZMM8{%K1} |
(140) 0x41ab53 KXNORW %K0,%K0,%K1 |
(140) 0x41ab57 VGATHERQPD (%RBX,%ZMM31,8),%ZMM15{%K2} |
(140) 0x41ab5e VXORPD %XMM18,%XMM18,%XMM18 |
(140) 0x41ab64 VGATHERQPD (%RBX,%ZMM14,8),%ZMM18{%K1} |
(140) 0x41ab6b VPMULLQ %ZMM1,%ZMM25,%ZMM19 |
(140) 0x41ab71 KXNORW %K0,%K0,%K1 |
(140) 0x41ab75 VPADDQ %ZMM2,%ZMM19,%ZMM22 |
(140) 0x41ab7b VXORPD %XMM23,%XMM23,%XMM23 |
(140) 0x41ab81 VGATHERQPD (%RBX,%ZMM22,8),%ZMM23{%K1} |
(140) 0x41ab88 VPADDQ %ZMM0,%ZMM19,%ZMM19 |
(140) 0x41ab8e KXNORW %K0,%K0,%K1 |
(140) 0x41ab92 VMULPD %ZMM4,%ZMM6,%ZMM4 |
(140) 0x41ab98 VXORPD %XMM26,%XMM26,%XMM26 |
(140) 0x41ab9e VGATHERQPD (%RBX,%ZMM19,8),%ZMM26{%K1} |
(140) 0x41aba5 VFMADD213PD %ZMM4,%ZMM7,%ZMM11 |
(140) 0x41abab VMOVDQU64 0x1c0(%RSP),%ZMM4 |
(140) 0x41abb3 VPMULLQ %ZMM3,%ZMM4,%ZMM4 |
(140) 0x41abb9 KXNORW %K0,%K0,%K1 |
(140) 0x41abbd VFMADD213PD %ZMM11,%ZMM12,%ZMM9 |
(140) 0x41abc3 VXORPD %XMM7,%XMM7,%XMM7 |
(140) 0x41abc7 VPXOR %XMM6,%XMM6,%XMM6 |
(140) 0x41abcb VPMULLQ %ZMM1,%ZMM24,%ZMM6 |
(140) 0x41abd1 VPADDQ %ZMM2,%ZMM6,%ZMM6 |
(140) 0x41abd7 VPADDQ %ZMM2,%ZMM4,%ZMM4 |
(140) 0x41abdd KXNORW %K0,%K0,%K2 |
(140) 0x41abe1 MOV 0x70(%RSP),%RAX |
(140) 0x41abe6 VGATHERQPD (%RAX,%ZMM4,8),%ZMM7{%K1} |
(140) 0x41abed VXORPD %XMM11,%XMM11,%XMM11 |
(140) 0x41abf2 VGATHERQPD (%R14,%ZMM6,8),%ZMM11{%K2} |
(140) 0x41abf9 VFMADD213PD %ZMM9,%ZMM10,%ZMM13 |
(140) 0x41abff VSUBPD %ZMM15,%ZMM18,%ZMM9 |
(140) 0x41ac05 VMULPD 0x52461(%RIP){1to8},%ZMM13,%ZMM4 |
(140) 0x41ac0f VMOVUPD 0x200(%RSP),%ZMM10 |
(140) 0x41ac17 VDIVPD %ZMM4,%ZMM10,%ZMM4 |
(140) 0x41ac1d VMULPD %ZMM8,%ZMM9,%ZMM8 |
(140) 0x41ac23 VSUBPD %ZMM23,%ZMM26,%ZMM9 |
(140) 0x41ac29 VMOVDQU64 0x180(%RSP),%ZMM10 |
(140) 0x41ac31 VPMULLQ %ZMM3,%ZMM10,%ZMM10 |
(140) 0x41ac37 VFMADD213PD %ZMM8,%ZMM11,%ZMM9 |
(140) 0x41ac3d VPADDQ %ZMM2,%ZMM10,%ZMM8 |
(140) 0x41ac43 KXNORW %K0,%K0,%K1 |
(140) 0x41ac47 VPXOR %XMM10,%XMM10,%XMM10 |
(140) 0x41ac4c VPMULLQ %ZMM3,%ZMM27,%ZMM10 |
(140) 0x41ac52 VFMADD213PD %ZMM7,%ZMM4,%ZMM9 |
(140) 0x41ac58 VPXOR %XMM11,%XMM11,%XMM11 |
(140) 0x41ac5d VPMULLQ %ZMM3,%ZMM28,%ZMM11 |
(140) 0x41ac63 KXNORW %K0,%K0,%K2 |
(140) 0x41ac67 VXORPD %XMM12,%XMM12,%XMM12 |
(140) 0x41ac6c MOV 0x48(%RSP),%RCX |
(140) 0x41ac71 VSCATTERQPD %ZMM9,(%RCX,%ZMM8,8){%K1} |
(140) 0x41ac78 KXNORW %K0,%K0,%K1 |
(140) 0x41ac7c VGATHERQPD (%RBX,%ZMM31,8),%ZMM12{%K2} |
(140) 0x41ac83 VXORPD %XMM13,%XMM13,%XMM13 |
(140) 0x41ac88 VGATHERQPD (%RBX,%ZMM22,8),%ZMM13{%K1} |
(140) 0x41ac8f VPADDQ %ZMM2,%ZMM11,%ZMM7 |
(140) 0x41ac95 KXNORW %K0,%K0,%K1 |
(140) 0x41ac99 VXORPD %XMM15,%XMM15,%XMM15 |
(140) 0x41ac9e KXNORW %K0,%K0,%K2 |
(140) 0x41aca2 VXORPD %XMM18,%XMM18,%XMM18 |
(140) 0x41aca8 VGATHERQPD (%RDI,%ZMM7,8),%ZMM15{%K1} |
(140) 0x41acaf KXNORW %K0,%K0,%K1 |
(140) 0x41acb3 VGATHERQPD (%RBX,%ZMM14,8),%ZMM18{%K2} |
(140) 0x41acba VXORPD %XMM14,%XMM14,%XMM14 |
(140) 0x41acbf VGATHERQPD (%RBX,%ZMM19,8),%ZMM14{%K1} |
(140) 0x41acc6 KXNORW %K0,%K0,%K1 |
(140) 0x41acca VXORPD %XMM19,%XMM19,%XMM19 |
(140) 0x41acd0 VPADDQ %ZMM0,%ZMM11,%ZMM9 |
(140) 0x41acd6 VPADDQ %ZMM2,%ZMM10,%ZMM10 |
(140) 0x41acdc KXNORW %K0,%K0,%K2 |
(140) 0x41ace0 MOV 0xe0(%RSP),%RAX |
(140) 0x41ace8 VGATHERQPD (%RAX,%ZMM10,8),%ZMM19{%K1} |
(140) 0x41acef VXORPD %XMM10,%XMM10,%XMM10 |
(140) 0x41acf4 VGATHERQPD (%RDI,%ZMM9,8),%ZMM10{%K2} |
(140) 0x41acfb VSUBPD %ZMM12,%ZMM13,%ZMM11 |
(140) 0x41ad01 VMULPD %ZMM15,%ZMM11,%ZMM11 |
(140) 0x41ad07 VSUBPD %ZMM18,%ZMM14,%ZMM12 |
(140) 0x41ad0d VPXOR %XMM13,%XMM13,%XMM13 |
(140) 0x41ad12 VPMULLQ %ZMM3,%ZMM29,%ZMM13 |
(140) 0x41ad18 VFMADD213PD %ZMM11,%ZMM10,%ZMM12 |
(140) 0x41ad1e VPADDQ %ZMM2,%ZMM13,%ZMM10 |
(140) 0x41ad24 VPMULLQ %ZMM3,%ZMM30,%ZMM3 |
(140) 0x41ad2a VFMADD213PD %ZMM19,%ZMM4,%ZMM12 |
(140) 0x41ad30 KXNORW %K0,%K0,%K1 |
(140) 0x41ad34 VPADDQ %ZMM2,%ZMM3,%ZMM11 |
(140) 0x41ad3a KXNORW %K0,%K0,%K2 |
(140) 0x41ad3e VPXOR %XMM13,%XMM13,%XMM13 |
(140) 0x41ad43 VPADDQ %ZMM0,%ZMM3,%ZMM3 |
(140) 0x41ad49 MOV 0x68(%RSP),%RAX |
(140) 0x41ad4e VSCATTERQPD %ZMM12,(%RAX,%ZMM10,8){%K1} |
(140) 0x41ad55 KXNORW %K0,%K0,%K1 |
(140) 0x41ad59 VGATHERQPD (%RSI,%ZMM11,8),%ZMM13{%K2} |
(140) 0x41ad60 VXORPD %XMM12,%XMM12,%XMM12 |
(140) 0x41ad65 VGATHERQPD (%RSI,%ZMM3,8),%ZMM12{%K1} |
(140) 0x41ad6c VPMULLQ %ZMM1,%ZMM30,%ZMM1 |
(140) 0x41ad72 KXNORW %K0,%K0,%K1 |
(140) 0x41ad76 VXORPD %XMM14,%XMM14,%XMM14 |
(140) 0x41ad7b VGATHERQPD (%R14,%ZMM5,8),%ZMM14{%K1} |
(140) 0x41ad82 KXNORW %K0,%K0,%K1 |
(140) 0x41ad86 VPADDQ %ZMM2,%ZMM1,%ZMM2 |
(140) 0x41ad8c KXNORW %K0,%K0,%K2 |
(140) 0x41ad90 VPADDQ %ZMM0,%ZMM1,%ZMM0 |
(140) 0x41ad96 VPXOR %XMM1,%XMM1,%XMM1 |
(140) 0x41ad9a VXORPD %XMM5,%XMM5,%XMM5 |
(140) 0x41ad9e VGATHERQPD (%R14,%ZMM6,8),%ZMM1{%K1} |
(140) 0x41ada5 KXNORW %K0,%K0,%K1 |
(140) 0x41ada9 VGATHERQPD (%RSI,%ZMM2,8),%ZMM5{%K2} |
(140) 0x41adb0 VXORPD %XMM6,%XMM6,%XMM6 |
(140) 0x41adb4 VGATHERQPD (%RSI,%ZMM0,8),%ZMM6{%K1} |
(140) 0x41adbb KXNORW %K0,%K0,%K1 |
(140) 0x41adbf VSUBPD %ZMM13,%ZMM12,%ZMM12 |
(140) 0x41adc5 VXORPD %XMM13,%XMM13,%XMM13 |
(140) 0x41adca VGATHERQPD (%RCX,%ZMM8,8),%ZMM13{%K1} |
(140) 0x41add1 VMULPD %ZMM14,%ZMM12,%ZMM12 |
(140) 0x41add7 VSUBPD %ZMM5,%ZMM6,%ZMM5 |
(140) 0x41addd VFMADD213PD %ZMM12,%ZMM1,%ZMM5 |
(140) 0x41ade3 VFMADD213PD %ZMM13,%ZMM4,%ZMM5 |
(140) 0x41ade9 KXNORW %K0,%K0,%K1 |
(140) 0x41aded VSCATTERQPD %ZMM5,(%RCX,%ZMM8,8){%K1} |
(140) 0x41adf4 KXNORW %K0,%K0,%K1 |
(140) 0x41adf8 VXORPD %XMM1,%XMM1,%XMM1 |
(140) 0x41adfc KXNORW %K0,%K0,%K2 |
(140) 0x41ae00 VGATHERQPD (%RSI,%ZMM11,8),%ZMM1{%K1} |
(140) 0x41ae07 VXORPD %XMM5,%XMM5,%XMM5 |
(140) 0x41ae0b VGATHERQPD (%RSI,%ZMM2,8),%ZMM5{%K2} |
(140) 0x41ae12 KXNORW %K0,%K0,%K1 |
(140) 0x41ae16 VXORPD %XMM2,%XMM2,%XMM2 |
(140) 0x41ae1a VGATHERQPD (%RDI,%ZMM7,8),%ZMM2{%K1} |
(140) 0x41ae21 KXNORW %K0,%K0,%K1 |
(140) 0x41ae25 VXORPD %XMM6,%XMM6,%XMM6 |
(140) 0x41ae29 KXNORW %K0,%K0,%K2 |
(140) 0x41ae2d VGATHERQPD (%RSI,%ZMM3,8),%ZMM6{%K1} |
(140) 0x41ae34 VXORPD %XMM3,%XMM3,%XMM3 |
(140) 0x41ae38 VGATHERQPD (%RSI,%ZMM0,8),%ZMM3{%K2} |
(140) 0x41ae3f KXNORW %K0,%K0,%K1 |
(140) 0x41ae43 VXORPD %XMM0,%XMM0,%XMM0 |
(140) 0x41ae47 VGATHERQPD (%RDI,%ZMM9,8),%ZMM0{%K1} |
(140) 0x41ae4e KXNORW %K0,%K0,%K1 |
(140) 0x41ae52 VSUBPD %ZMM1,%ZMM5,%ZMM1 |
(140) 0x41ae58 VXORPD %XMM5,%XMM5,%XMM5 |
(140) 0x41ae5c VGATHERQPD (%RAX,%ZMM10,8),%ZMM5{%K1} |
(140) 0x41ae63 VMULPD %ZMM2,%ZMM1,%ZMM1 |
(140) 0x41ae69 VSUBPD %ZMM6,%ZMM3,%ZMM2 |
(140) 0x41ae6f VFMADD213PD %ZMM1,%ZMM0,%ZMM2 |
(140) 0x41ae75 VFMADD213PD %ZMM5,%ZMM4,%ZMM2 |
(140) 0x41ae7b KXNORW %K0,%K0,%K1 |
(140) 0x41ae7f VSCATTERQPD %ZMM2,(%RAX,%ZMM10,8){%K1} |
(140) 0x41ae86 VPADDQ 0x521e8(%RIP){1to8},%ZMM17,%ZMM17 |
(140) 0x41ae90 ADD $0x8,%R13 |
(140) 0x41ae94 CMP 0x38(%RSP),%R13 |
(140) 0x41ae99 JB 41a9e0 |
0x41ae9f MOV 0x38(%RSP),%RAX |
0x41aea4 CMP %RAX,0xf8(%RSP) |
0x41aeac VMOVUPD 0x130(%RSP),%XMM3 |
0x41aeb5 MOV 0x40(%RSP),%R11 |
0x41aeba JNE 41aeed |
0x41aebc MOV $0x48c3d0,%EDI |
0x41aec1 MOV 0x80(%RSP),%ESI |
0x41aec8 LEA -0x28(%RBP),%RSP |
0x41aecc POP %RBX |
0x41aecd POP %R12 |
0x41aecf POP %R13 |
0x41aed1 POP %R14 |
0x41aed3 POP %R15 |
0x41aed5 POP %RBP |
0x41aed6 VZEROUPPER |
0x41aed9 JMP 403050 |
0x41aede LEA -0x28(%RBP),%RSP |
0x41aee2 POP %RBX |
0x41aee3 POP %R12 |
0x41aee5 POP %R13 |
0x41aee7 POP %R14 |
0x41aee9 POP %R15 |
0x41aeeb POP %RBP |
0x41aeec RET |
0x41aeed ADD 0x38(%RSP),%R11 |
0x41aef2 JMP 41b152 |
0x41aef7 NOPW (%RAX,%RAX,1) |
(139) 0x41af00 MOV %R11,%RAX |
(139) 0x41af03 CQTO |
(139) 0x41af05 IDIV %R9 |
(139) 0x41af08 ADD %R10D,%EDX |
(139) 0x41af0b LEA -0x1(%RCX),%EAX |
(139) 0x41af0e MOVSXD %EAX,%RDI |
(139) 0x41af11 MOV %R13,%R8 |
(139) 0x41af14 IMUL %RDI,%R8 |
(139) 0x41af18 MOVSXD %EDX,%RDX |
(139) 0x41af1b LEA -0x1(%R8,%RDX,1),%R9 |
(139) 0x41af20 MOV 0x120(%RSP),%R12 |
(139) 0x41af28 MOV %R12,%R10 |
(139) 0x41af2b IMUL %RDI,%R10 |
(139) 0x41af2f LEA -0x1(%R10,%RDX,1),%R11 |
(139) 0x41af34 MOV 0x118(%RSP),%R15 |
(139) 0x41af3c VMOVSD (%R15,%R11,8),%XMM0 |
(139) 0x41af42 VMULSD (%R14,%R9,8),%XMM0,%XMM0 |
(139) 0x41af48 MOVSXD %ECX,%RCX |
(139) 0x41af4b MOV %R13,%R9 |
(139) 0x41af4e IMUL %RCX,%R9 |
(139) 0x41af52 LEA -0x1(%R9,%RDX,1),%R11 |
(139) 0x41af57 IMUL %RCX,%R12 |
(139) 0x41af5b LEA -0x1(%R12,%RDX,1),%R13 |
(139) 0x41af60 VMOVSD (%R15,%R13,8),%XMM1 |
(139) 0x41af66 VFMADD132SD (%R14,%R11,8),%XMM0,%XMM1 |
(139) 0x41af6c ADD %RDX,%R9 |
(139) 0x41af6f ADD %RDX,%R12 |
(139) 0x41af72 VMOVSD (%R15,%R12,8),%XMM0 |
(139) 0x41af78 VFMADD132SD (%R14,%R9,8),%XMM1,%XMM0 |
(139) 0x41af7e ADD %RDX,%R8 |
(139) 0x41af81 ADD %RDX,%R10 |
(139) 0x41af84 VMOVSD (%R15,%R10,8),%XMM1 |
(139) 0x41af8a VFMADD132SD (%R14,%R8,8),%XMM0,%XMM1 |
(139) 0x41af90 VMULSD 0x520d8(%RIP),%XMM1,%XMM0 |
(139) 0x41af98 VDIVSD %XMM0,%XMM3,%XMM0 |
(139) 0x41af9c MOV 0x110(%RSP),%R11 |
(139) 0x41afa4 IMUL %RCX,%R11 |
(139) 0x41afa8 ADD %RDX,%R11 |
(139) 0x41afab MOV 0x108(%RSP),%R10 |
(139) 0x41afb3 MOV %R10,%R9 |
(139) 0x41afb6 IMUL %RCX,%R9 |
(139) 0x41afba ADD %RDX,%R9 |
(139) 0x41afbd MOV %RSI,%R8 |
(139) 0x41afc0 IMUL %RCX,%R8 |
(139) 0x41afc4 LEA -0x1(%R8,%RDX,1),%R13 |
(139) 0x41afc9 ADD %RDX,%R8 |
(139) 0x41afcc VMOVSD (%RBX,%R13,8),%XMM1 |
(139) 0x41afd2 VSUBSD (%RBX,%R8,8),%XMM1,%XMM1 |
(139) 0x41afd8 MOV %RSI,%R12 |
(139) 0x41afdb MOV 0xd0(%RSP),%RSI |
(139) 0x41afe3 VMULSD (%RSI,%R9,8),%XMM1,%XMM1 |
(139) 0x41afe9 IMUL %RDI,%R10 |
(139) 0x41afed ADD %RDX,%R10 |
(139) 0x41aff0 IMUL %RDI,%R12 |
(139) 0x41aff4 LEA -0x1(%R12,%RDX,1),%R15 |
(139) 0x41aff9 ADD %RDX,%R12 |
(139) 0x41affc VMOVSD (%RBX,%R15,8),%XMM2 |
(139) 0x41b002 VSUBSD (%RBX,%R12,8),%XMM2,%XMM2 |
(139) 0x41b008 VFMADD132SD (%RSI,%R10,8),%XMM1,%XMM2 |
(139) 0x41b00e MOV 0x70(%RSP),%R14 |
(139) 0x41b013 VFMADD213SD (%R14,%R11,8),%XMM0,%XMM2 |
(139) 0x41b019 MOV 0xc8(%RSP),%R11 |
(139) 0x41b021 IMUL %RCX,%R11 |
(139) 0x41b025 ADD %RDX,%R11 |
(139) 0x41b028 MOV 0x48(%RSP),%RAX |
(139) 0x41b02d VMOVSD %XMM2,(%RAX,%R11,8) |
(139) 0x41b033 VMOVSD (%RBX,%R12,8),%XMM1 |
(139) 0x41b039 MOV 0xc0(%RSP),%R14 |
(139) 0x41b041 IMUL %RCX,%R14 |
(139) 0x41b045 ADD %RDX,%R14 |
(139) 0x41b048 VSUBSD (%RBX,%R8,8),%XMM1,%XMM1 |
(139) 0x41b04e MOV 0xb8(%RSP),%R8 |
(139) 0x41b056 IMUL %RCX,%R8 |
(139) 0x41b05a VMOVSD (%RBX,%R15,8),%XMM2 |
(139) 0x41b060 LEA (%R8,%RDX,1),%R12 |
(139) 0x41b064 MOV 0xb0(%RSP),%R15 |
(139) 0x41b06c VMULSD (%R15,%R12,8),%XMM1,%XMM1 |
(139) 0x41b072 LEA -0x1(%R8,%RDX,1),%RAX |
(139) 0x41b077 MOV %RAX,0x38(%RSP) |
(139) 0x41b07c VSUBSD (%RBX,%R13,8),%XMM2,%XMM2 |
(139) 0x41b082 VFMADD132SD (%R15,%RAX,8),%XMM1,%XMM2 |
(139) 0x41b088 MOV 0xe0(%RSP),%RBX |
(139) 0x41b090 VFMADD213SD (%RBX,%R14,8),%XMM0,%XMM2 |
(139) 0x41b096 MOV 0x100(%RSP),%R13 |
(139) 0x41b09e IMUL %RCX,%R13 |
(139) 0x41b0a2 ADD %RDX,%R13 |
(139) 0x41b0a5 MOV 0x68(%RSP),%R8 |
(139) 0x41b0aa VMOVSD %XMM2,(%R8,%R13,8) |
(139) 0x41b0b0 MOV 0xa8(%RSP),%RBX |
(139) 0x41b0b8 IMUL %RBX,%RCX |
(139) 0x41b0bc LEA -0x1(%RCX,%RDX,1),%R14 |
(139) 0x41b0c1 ADD %RDX,%RCX |
(139) 0x41b0c4 MOV 0x58(%RSP),%RAX |
(139) 0x41b0c9 VMOVSD (%RAX,%R14,8),%XMM1 |
(139) 0x41b0cf VSUBSD (%RAX,%RCX,8),%XMM1,%XMM1 |
(139) 0x41b0d4 VMULSD (%RSI,%R9,8),%XMM1,%XMM1 |
(139) 0x41b0da IMUL %RBX,%RDI |
(139) 0x41b0de LEA (%RDI,%RDX,1),%R9 |
(139) 0x41b0e2 LEA -0x1(%RDI,%RDX,1),%RDX |
(139) 0x41b0e7 VMOVSD (%RAX,%RDX,8),%XMM2 |
(139) 0x41b0ec VSUBSD (%RAX,%R9,8),%XMM2,%XMM2 |
(139) 0x41b0f2 VFMADD132SD (%RSI,%R10,8),%XMM1,%XMM2 |
(139) 0x41b0f8 MOV 0x48(%RSP),%RBX |
(139) 0x41b0fd VFMADD213SD (%RBX,%R11,8),%XMM0,%XMM2 |
(139) 0x41b103 VMOVSD %XMM2,(%RBX,%R11,8) |
(139) 0x41b109 VMOVSD (%RAX,%R9,8),%XMM1 |
(139) 0x41b10f VSUBSD (%RAX,%RCX,8),%XMM1,%XMM1 |
(139) 0x41b114 VMULSD (%R15,%R12,8),%XMM1,%XMM1 |
(139) 0x41b11a VMOVSD (%RAX,%RDX,8),%XMM2 |
(139) 0x41b11f VSUBSD (%RAX,%R14,8),%XMM2,%XMM2 |
(139) 0x41b125 MOV 0x38(%RSP),%RAX |
(139) 0x41b12a VFMADD132SD (%R15,%RAX,8),%XMM1,%XMM2 |
(139) 0x41b130 VFMADD213SD (%R8,%R13,8),%XMM0,%XMM2 |
(139) 0x41b136 VMOVSD %XMM2,(%R8,%R13,8) |
(139) 0x41b13c MOV 0x40(%RSP),%R11 |
(139) 0x41b141 INC %R11 |
(139) 0x41b144 CMP 0xd8(%RSP),%R11 |
(139) 0x41b14c JG 41aebc |
(139) 0x41b152 MOV %R11,%R8 |
(139) 0x41b155 SHR $0x20,%R8 |
(139) 0x41b159 JE 41b170 |
(139) 0x41b15b MOV %R11,%RAX |
(139) 0x41b15e XOR %EDX,%EDX |
(139) 0x41b160 MOV 0xa0(%RSP),%R9 |
(139) 0x41b168 DIV %R9 |
(139) 0x41b16b MOV %RAX,%RCX |
(139) 0x41b16e JMP 41b182 |
(139) 0x41b170 MOV %R11D,%EAX |
(139) 0x41b173 XOR %EDX,%EDX |
(139) 0x41b175 MOV 0xa0(%RSP),%R9 |
(139) 0x41b17d DIV %R9D |
(139) 0x41b180 MOV %EAX,%ECX |
(139) 0x41b182 MOV 0x60(%RSP),%R10 |
(139) 0x41b187 MOV 0x98(%RSP),%R14 |
(139) 0x41b18f MOV 0x90(%RSP),%RSI |
(139) 0x41b197 MOV 0x88(%RSP),%RBX |
(139) 0x41b19f MOV 0x78(%RSP),%R13 |
(139) 0x41b1a4 ADD 0x54(%RSP),%ECX |
(139) 0x41b1a8 TEST %R8,%R8 |
(139) 0x41b1ab MOV %R11,0x40(%RSP) |
(139) 0x41b1b0 JNE 41af00 |
(139) 0x41b1b6 MOV %R11D,%EAX |
(139) 0x41b1b9 XOR %EDX,%EDX |
(139) 0x41b1bb DIV %R9D |
(139) 0x41b1be JMP 41af08 |
0x41b1c3 NOPW %CS:(%RAX,%RAX,1) |
0x41b1cd NOPL (%RAX) |
Path / |
Source file and lines | accelerate.cpp:40-53 |
Module | exec |
nb instructions | 180 |
nb uops | 182 |
loop length | 942 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 1 |
used zmm registers | 11 |
nb stack references | 52 |
micro-operation queue | 30.33 cycles |
front end | 30.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.30 | 5.20 | 24.33 | 24.33 | 27.00 | 15.00 | 5.30 | 27.00 | 27.00 | 27.00 | 5.20 | 24.33 |
cycles | 5.30 | 5.20 | 24.33 | 24.33 | 27.00 | 15.00 | 5.30 | 27.00 | 27.00 | 27.00 | 5.20 | 24.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 30.16 |
Stall cycles | 0.00 |
Front-end | 30.33 |
Dispatch | 27.00 |
Overall L1 | 30.33 |
all | 8% |
load | 5% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 75% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 15% |
store | 13% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 4% |
all | 15% |
load | 16% |
store | 17% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 53% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 40% |
load | 25% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 17% |
load | 17% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 53% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x280,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ 0x40(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x54(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 41aede <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x83e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x130(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x8c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf0(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48c3b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
VMOVDQU %XMM0,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
CALL 4031d0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVUPD 0x150(%RSP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xf0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 41aebc <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x81c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x60(%RSP),%ECX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R15),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R13),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R11,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $-0x8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 41b152 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xab2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RCX,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x54(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R8,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM3,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R9,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R10,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDX,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xc8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xa8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM30 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x52a0e(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
MOV %RDI,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R13,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,0xf8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVUPD 0x130(%RSP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
MOV 0x40(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 41aeed <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x84d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x48c3d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
ADD 0x38(%RSP),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JMP 41b152 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xab2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | accelerate.cpp:40-53 |
Module | exec |
nb instructions | 180 |
nb uops | 182 |
loop length | 942 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 1 |
used zmm registers | 11 |
nb stack references | 52 |
micro-operation queue | 30.33 cycles |
front end | 30.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.30 | 5.20 | 24.33 | 24.33 | 27.00 | 15.00 | 5.30 | 27.00 | 27.00 | 27.00 | 5.20 | 24.33 |
cycles | 5.30 | 5.20 | 24.33 | 24.33 | 27.00 | 15.00 | 5.30 | 27.00 | 27.00 | 27.00 | 5.20 | 24.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 30.16 |
Stall cycles | 0.00 |
Front-end | 30.33 |
Dispatch | 27.00 |
Overall L1 | 30.33 |
all | 8% |
load | 5% |
store | 11% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 4% |
all | 75% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 15% |
store | 13% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 4% |
all | 15% |
load | 16% |
store | 17% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 53% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 40% |
load | 25% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 17% |
load | 17% |
store | 19% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 53% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0x280,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x68(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x20(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVQ 0x40(%RBP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x48(%RBP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R10D,0x54(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,0x84(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
TEST %RAX,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 41aede <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x83e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R15,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R8,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVQ $0,0xf0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0xe8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVQ $0x1,0x128(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x130(%RSP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x8c(%RSP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf8(%RSP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0xf0(%RSP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x48c3b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
VMOVDQU %XMM0,0x150(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
CALL 4031d0 <__kmpc_for_static_init_8@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
VMOVUPD 0x150(%RSP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xf0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %RAX,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JA 41aebc <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x81c> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R12,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB 0x60(%RSP),%ECX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV (%R15),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R15),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA 0x1(%R11),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RDI,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RAX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV 0x70(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R12),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RBX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x48(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xc8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R13),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x40(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xe0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xb0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x68(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R13),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0xa8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%R13),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0xd0(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R11,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
TEST $-0x8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,0xa0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R15,0x98(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,0x120(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x108(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDX,0x90(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x88(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9,0x110(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RSI,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 41b152 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xab2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RCX,%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x54(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x160(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x60(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %EAX,%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU %YMM0,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
MOV 0x78(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %R8,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM3,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %ZMM0,0x200(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R9,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x1c0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VPBROADCASTQ %R10,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RDX,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xc8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVDQU64 %ZMM0,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
MOV 0xc0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM27 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xb8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM28 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPBROADCASTQ %RSI,%ZMM29 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0xa8(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTQ %RAX,%ZMM30 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R11,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %R11,%ZMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPADDQ 0x52a0e(%RIP),%ZMM0,%ZMM17 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
MOV %RDI,0xf8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R13,0x38(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %R13D,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xb0(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x58(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,0xf8(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVUPD 0x130(%RSP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
MOV 0x40(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JNE 41aeed <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0x84d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x48c3d0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x80(%RSP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 403050 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
ADD 0x38(%RSP),%R11 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JMP 41b152 <_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted+0xab2> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼_Z17accelerate_kerneliiiidRN6clover8Buffer2DIdEES2_S2_S2_S2_S2_S2_S2_S2_S2_.extracted– | 3.33 | 2.72 |
○Loop 140 - accelerate.cpp:40-53 - exec | 3.33 | 2.71 |
○Loop 139 - accelerate.cpp:40-53 - exec | 0 | 0 |