Loop Id: 99 | Module: exec | Source: advec_cell.cpp:71-110 [...] | Coverage: 0.01% |
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Loop Id: 99 | Module: exec | Source: advec_cell.cpp:71-110 [...] | Coverage: 0.01% |
---|
0x418eb8 CMP %EDX,%ECX |
0x418eba CMOVBE %ECX,%EDX |
0x418ebd MOV 0x1a4(%RSP),%ECX |
0x418ec4 MOV %EDX,0x190(%RSP) |
0x418ecb ADD %ECX,%EDX |
0x418ecd MOV %EDX,0x1bc(%RSP) |
0x418ed4 CMP %EDX,%ECX |
0x418ed6 JAE 419706 |
0x418edc MOV 0x38(%RSP),%RAX |
0x418ee1 MOV 0x30(%RSP),%RDX |
0x418ee6 MOV 0x18(%RSP),%R12 |
0x418eeb MOV 0x28(%RSP),%R13 |
0x418ef0 MOV 0x10(%RDX),%R9 |
0x418ef4 MOV 0x10(%RAX),%R11 |
0x418ef8 MOV (%RAX),%RSI |
0x418efb MOV 0x20(%RSP),%R14 |
0x418f00 MOV 0x10(%RSP),%RAX |
0x418f05 MOV 0x198(%RSP),%R10 |
0x418f0d MOV %R9,0x1b0(%RSP) |
0x418f15 MOV (%RDX),%RBX |
0x418f18 MOV (%R12),%RCX |
0x418f1c MOV %R11,0x78(%RSP) |
0x418f21 MOV 0x8(%R13),%RDI |
0x418f25 MOV 0x10(%R14),%R15 |
0x418f29 IMUL %R10,%RSI |
0x418f2d MOV 0x8(%RSP),%R13 |
0x418f32 MOV (%R14),%R14 |
0x418f35 IMUL %R10,%RBX |
0x418f39 MOV (%RAX),%R9 |
0x418f3c IMUL %R10,%RCX |
0x418f40 MOV 0x10(%R12),%R8 |
0x418f45 MOV 0x10(%R13),%RDX |
0x418f49 IMUL %R10,%R14 |
0x418f4d MOV %RSI,0x70(%RSP) |
0x418f52 IMUL %R10,%R9 |
0x418f56 MOV %R8,0x188(%RSP) |
0x418f5e MOV 0x10(%RAX),%R8 |
0x418f62 IMUL (%R13),%R10 |
0x418f67 MOV 0x190(%RSP),%R13D |
0x418f6f MOV %RBX,0x1a8(%RSP) |
0x418f77 MOV %RCX,0x68(%RSP) |
0x418f7c LEA -0x1(%R13),%R12D |
0x418f80 MOV %RDX,0x180(%RSP) |
0x418f88 MOV %R10,0x60(%RSP) |
0x418f8d CMP $0xe,%R12D |
0x418f91 JBE 4194a1 |
0x418f97 MOVSXD 0x1a0(%RSP),%RAX |
0x418f9f SHR $0x4,%R13D |
0x418fa3 VPBROADCASTD 0x1a0(%RSP),%ZMM1 |
0x418fab LEA (%R15,%R14,8),%RDX |
0x418faf KXNORB %K1,%K1,%K1 |
0x418fb3 SAL $0x7,%R13 |
0x418fb7 VBROADCASTSD 0x337bf(%RIP),%ZMM3 |
0x418fc1 VBROADCASTSD 0x337cd(%RIP),%ZMM9 |
0x418fcb VXORPD %XMM8,%XMM8,%XMM8 |
0x418fd0 LEA (%RSI,%RAX,1),%RSI |
0x418fd4 MOV %R13,0x58(%RSP) |
0x418fd9 MOV $0x10,%R13D |
0x418fdf ADD %RAX,%RCX |
0x418fe2 LEA (%R11,%RSI,8),%R12 |
0x418fe6 MOV 0x1b0(%RSP),%R11 |
0x418fee VPBROADCASTD %R13D,%ZMM5 |
0x418ff4 MOV $-0x2,%R13D |
0x418ffa VPBROADCASTD %R13D,%ZMM2 |
0x419000 MOV $0x1,%R13D |
0x419006 VPADDD 0x335f0(%RIP),%ZMM1,%ZMM27 |
0x419010 VBROADCASTSD 0x33776(%RIP),%ZMM26 |
0x41901a LEA (%R11,%RBX,8),%RSI |
0x41901e MOV 0x188(%RSP),%R11 |
0x419026 LEA (%RDI,%RAX,8),%RBX |
0x41902a ADD %R10,%RAX |
0x41902d MOV 0x180(%RSP),%R10 |
0x419035 VPBROADCASTD %R13D,%ZMM4 |
0x41903b VBROADCASTSD 0x335fb(%RIP),%ZMM24 |
0x419045 VMOVDQA32 %ZMM5,0x140(%RSP) |
0x41904d VBROADCASTSD 0x33629(%RIP),%ZMM23 |
0x419057 MOV 0x58(%RSP),%R13 |
0x41905c LEA (%R11,%RCX,8),%R11 |
0x419060 VMOVDQA32 %ZMM2,0x100(%RSP) |
0x419068 LEA (%R10,%RAX,8),%R10 |
0x41906c LEA (%R8,%R9,8),%RCX |
0x419070 XOR %EAX,%EAX |
0x419072 VMOVDQA32 %ZMM4,0xc0(%RSP) |
0x41907a NOPW (%RAX,%RAX,1) |
(101) 0x419080 VMOVDQA32 %ZMM27,%ZMM10 |
(101) 0x419086 VMOVUPD 0x40(%R12,%RAX,1),%ZMM4 |
(101) 0x41908e VMOVUPD (%R12,%RAX,1),%ZMM11 |
(101) 0x419095 KMOVB %K1,%K4 |
(101) 0x419099 KMOVB %K1,%K5 |
(101) 0x41909d KMOVB %K1,%K6 |
(101) 0x4190a1 VPADDD 0xc0(%RSP),%ZMM10,%ZMM14 |
(101) 0x4190a9 VPADDD 0x3360d(%RIP),%ZMM10,%ZMM7 |
(101) 0x4190b3 VEXTRACTI32X8 $0x1,%ZMM10,%YMM6 |
(101) 0x4190ba KMOVB %K1,%K7 |
(101) 0x4190be VCMPPD $0xe,%ZMM8,%ZMM11,%K3 |
(101) 0x4190c5 VCMPPD $0xe,%ZMM8,%ZMM4,%K2 |
(101) 0x4190cc VPMOVSXDQ %YMM10,%ZMM12 |
(101) 0x4190d2 VPMINSD 0x80(%RSP),%ZMM14,%ZMM0 |
(101) 0x4190da VPMOVSXDQ %YMM6,%ZMM13 |
(101) 0x4190e0 VPADDD 0x100(%RSP),%ZMM10,%ZMM15 |
(101) 0x4190e8 VEXTRACTI32X8 $0x1,%ZMM7,%YMM1 |
(101) 0x4190ef VMOVDQA64 %ZMM12,%ZMM18 |
(101) 0x4190f5 VMOVDQA64 %ZMM13,%ZMM17 |
(101) 0x4190fb VPMOVSXDQ %YMM0,%ZMM14 |
(101) 0x419101 VEXTRACTI32X8 $0x1,%ZMM0,%YMM2 |
(101) 0x419108 VPMOVSXDQ %YMM7,%ZMM18{%K3} |
(101) 0x41910e VMOVDQA64 %ZMM14,%ZMM11 |
(101) 0x419114 VPMOVSXDQ %YMM1,%ZMM17{%K2} |
(101) 0x41911a VPMOVSXDQ %YMM2,%ZMM0 |
(101) 0x419120 VMOVUPD (%RBX,%RAX,1),%ZMM2 |
(101) 0x419127 VPMOVSXDQ %YMM7,%ZMM11{%K3} |
(101) 0x41912d VPMOVSXDQ %YMM7,%ZMM22 |
(101) 0x419133 VPMOVSXDQ %YMM1,%ZMM21 |
(101) 0x419139 VANDPD (%R12,%RAX,1),%ZMM3,%ZMM7 |
(101) 0x419140 VMOVDQA64 %ZMM12,%ZMM22{%K3} |
(101) 0x419146 VMOVDQA64 %ZMM13,%ZMM21{%K2} |
(101) 0x41914c VPMOVSXDQ %YMM15,%ZMM14{%K3} |
(101) 0x419152 VGATHERQPD (%RSI,%ZMM18,8),%ZMM13{%K4} |
(101) 0x419159 VEXTRACTI32X8 $0x1,%ZMM15,%YMM12 |
(101) 0x419160 KMOVB %K1,%K3 |
(101) 0x419164 KMOVB %K1,%K4 |
(101) 0x419168 VGATHERQPD (%RSI,%ZMM17,8),%ZMM15{%K5} |
(101) 0x41916f VANDPD %ZMM3,%ZMM4,%ZMM5 |
(101) 0x419175 VMOVDQA64 %ZMM0,%ZMM6 |
(101) 0x41917b VDIVPD %ZMM13,%ZMM7,%ZMM10 |
(101) 0x419181 KMOVB %K1,%K5 |
(101) 0x419185 VDIVPD %ZMM15,%ZMM5,%ZMM7 |
(101) 0x41918b VPMOVSXDQ %YMM1,%ZMM6{%K2} |
(101) 0x419191 VADDPD %ZMM9,%ZMM7,%ZMM13 |
(101) 0x419197 VGATHERQPD (%RDI,%ZMM11,8),%ZMM4{%K6} |
(101) 0x41919e KMOVB %K1,%K6 |
(101) 0x4191a2 VGATHERQPD (%RDI,%ZMM6,8),%ZMM1{%K7} |
(101) 0x4191a9 VADDPD %ZMM9,%ZMM10,%ZMM11 |
(101) 0x4191af VMOVUPD 0x40(%RBX,%RAX,1),%ZMM6 |
(101) 0x4191b7 VPMOVSXDQ %YMM12,%ZMM0{%K2} |
(101) 0x4191bd VDIVPD %ZMM4,%ZMM2,%ZMM16 |
(101) 0x4191c3 KMOVB %K1,%K2 |
(101) 0x4191c7 VGATHERQPD (%RDX,%ZMM14,8),%ZMM15{%K4} |
(101) 0x4191ce VGATHERQPD (%RDX,%ZMM17,8),%ZMM5{%K2} |
(101) 0x4191d5 VGATHERQPD (%RDX,%ZMM0,8),%ZMM4{%K5} |
(101) 0x4191dc KMOVB %K1,%K7 |
(101) 0x4191e0 VDIVPD %ZMM1,%ZMM6,%ZMM12 |
(101) 0x4191e6 VGATHERQPD (%RDX,%ZMM18,8),%ZMM6{%K3} |
(101) 0x4191ed VSUBPD %ZMM7,%ZMM26,%ZMM20 |
(101) 0x4191f3 VSUBPD %ZMM10,%ZMM26,%ZMM2 |
(101) 0x4191f9 VMULPD %ZMM13,%ZMM12,%ZMM1 |
(101) 0x4191ff VGATHERQPD (%RDX,%ZMM21,8),%ZMM13{%K7} |
(101) 0x419206 VGATHERQPD (%RDX,%ZMM22,8),%ZMM12{%K6} |
(101) 0x41920d KMOVB %K1,%K7 |
(101) 0x419211 KMOVB %K1,%K6 |
(101) 0x419215 VMULPD %ZMM11,%ZMM16,%ZMM16 |
(101) 0x41921b VSUBPD %ZMM5,%ZMM13,%ZMM13 |
(101) 0x419221 VSUBPD %ZMM15,%ZMM6,%ZMM11 |
(101) 0x419227 VSUBPD %ZMM4,%ZMM5,%ZMM15 |
(101) 0x41922d VSUBPD %ZMM6,%ZMM12,%ZMM12 |
(101) 0x419233 VSUBPD %ZMM7,%ZMM9,%ZMM7 |
(101) 0x419239 VSUBPD %ZMM10,%ZMM9,%ZMM10 |
(101) 0x41923f VCMPPD $0x2,%ZMM8,%ZMM13,%K2 |
(101) 0x419246 VPADDD 0x140(%RSP),%ZMM27,%ZMM27 |
(101) 0x41924e VMULPD %ZMM13,%ZMM15,%ZMM28 |
(101) 0x419254 VANDPD %ZMM3,%ZMM13,%ZMM13 |
(101) 0x41925a VANDPD %ZMM3,%ZMM15,%ZMM4 |
(101) 0x419260 VMULPD %ZMM13,%ZMM20,%ZMM19 |
(101) 0x419266 VCMPPD $0x2,%ZMM8,%ZMM12,%K3 |
(101) 0x41926d VMULPD %ZMM12,%ZMM11,%ZMM30 |
(101) 0x419273 VANDPD %ZMM3,%ZMM12,%ZMM12 |
(101) 0x419279 VANDPD %ZMM3,%ZMM11,%ZMM11 |
(101) 0x41927f VMULPD %ZMM12,%ZMM2,%ZMM15 |
(101) 0x419285 VBLENDMPD %ZMM24,%ZMM9,%ZMM31{%K2} |
(101) 0x41928b KMOVB %K1,%K2 |
(101) 0x41928f VBLENDMPD %ZMM24,%ZMM9,%ZMM29{%K3} |
(101) 0x419295 KMOVB %K1,%K3 |
(101) 0x419299 VCMPPD $0xe,%ZMM8,%ZMM28,%K5 |
(101) 0x4192a0 VFMADD231PD %ZMM4,%ZMM1,%ZMM19 |
(101) 0x4192a6 VMINPD %ZMM13,%ZMM4,%ZMM4 |
(101) 0x4192ac VCMPPD $0xe,%ZMM8,%ZMM30,%K4 |
(101) 0x4192b3 VFMADD231PD %ZMM11,%ZMM16,%ZMM15 |
(101) 0x4192b9 VMINPD %ZMM12,%ZMM11,%ZMM11 |
(101) 0x4192bf VMULPD %ZMM23,%ZMM19,%ZMM19 |
(101) 0x4192c5 VMULPD %ZMM23,%ZMM15,%ZMM15 |
(101) 0x4192cb VMINPD %ZMM4,%ZMM19,%ZMM13 |
(101) 0x4192d1 VMULPD %ZMM31,%ZMM7,%ZMM4 |
(101) 0x4192d7 VMULPD %ZMM29,%ZMM10,%ZMM7 |
(101) 0x4192dd VMINPD %ZMM11,%ZMM15,%ZMM12 |
(101) 0x4192e3 VFMADD231PD %ZMM13,%ZMM4,%ZMM5{%K5} |
(101) 0x4192e9 KMOVB %K1,%K5 |
(101) 0x4192ed VFMADD231PD %ZMM12,%ZMM7,%ZMM6{%K4} |
(101) 0x4192f3 KMOVB %K1,%K4 |
(101) 0x4192f7 VMULPD 0x40(%R12,%RAX,1),%ZMM5,%ZMM5 |
(101) 0x4192ff VMULPD (%R12,%RAX,1),%ZMM6,%ZMM6 |
(101) 0x419306 VMOVUPD %ZMM5,0x40(%R11,%RAX,1) |
(101) 0x41930e VMOVUPD %ZMM6,(%R11,%RAX,1) |
(101) 0x419315 VGATHERQPD (%RCX,%ZMM18,8),%ZMM10{%K4} |
(101) 0x41931c VGATHERQPD (%RSI,%ZMM18,8),%ZMM15{%K3} |
(101) 0x419323 VGATHERQPD (%RSI,%ZMM17,8),%ZMM13{%K2} |
(101) 0x41932a KMOVB %K1,%K3 |
(101) 0x41932e KMOVB %K1,%K2 |
(101) 0x419332 VGATHERQPD (%RCX,%ZMM17,8),%ZMM7{%K5} |
(101) 0x419339 VGATHERQPD (%RDX,%ZMM18,8),%ZMM12{%K6} |
(101) 0x419340 VGATHERQPD (%RDX,%ZMM17,8),%ZMM11{%K7} |
(101) 0x419347 KMOVB %K1,%K6 |
(101) 0x41934b KMOVB %K1,%K7 |
(101) 0x41934f VMULPD %ZMM15,%ZMM12,%ZMM12 |
(101) 0x419355 VGATHERQPD (%RCX,%ZMM14,8),%ZMM4{%K6} |
(101) 0x41935c VGATHERQPD (%RCX,%ZMM0,8),%ZMM18{%K7} |
(101) 0x419363 VGATHERQPD (%RCX,%ZMM22,8),%ZMM29{%K3} |
(101) 0x41936a VGATHERQPD (%RCX,%ZMM21,8),%ZMM14{%K2} |
(101) 0x419371 VSUBPD %ZMM4,%ZMM10,%ZMM0 |
(101) 0x419377 VSUBPD %ZMM7,%ZMM14,%ZMM4 |
(101) 0x41937d VSUBPD %ZMM10,%ZMM29,%ZMM31 |
(101) 0x419383 VMULPD %ZMM13,%ZMM11,%ZMM11 |
(101) 0x419389 VSUBPD %ZMM18,%ZMM7,%ZMM17 |
(101) 0x41938f VANDPD %ZMM3,%ZMM4,%ZMM28 |
(101) 0x419395 VCMPPD $0x2,%ZMM8,%ZMM4,%K5 |
(101) 0x41939c VANDPD %ZMM3,%ZMM31,%ZMM19 |
(101) 0x4193a2 VMULPD %ZMM28,%ZMM20,%ZMM20 |
(101) 0x4193a8 VCMPPD $0x2,%ZMM8,%ZMM31,%K4 |
(101) 0x4193af VANDPD %ZMM3,%ZMM17,%ZMM18 |
(101) 0x4193b5 VMULPD %ZMM19,%ZMM2,%ZMM2 |
(101) 0x4193bb VMULPD %ZMM31,%ZMM0,%ZMM21 |
(101) 0x4193c1 VANDPD %ZMM3,%ZMM0,%ZMM0 |
(101) 0x4193c7 VBLENDMPD %ZMM24,%ZMM9,%ZMM22{%K5} |
(101) 0x4193cd VMULPD %ZMM4,%ZMM17,%ZMM14 |
(101) 0x4193d3 VBLENDMPD %ZMM24,%ZMM9,%ZMM30{%K4} |
(101) 0x4193d9 VFMADD132PD %ZMM18,%ZMM20,%ZMM1 |
(101) 0x4193df VFMADD231PD %ZMM0,%ZMM16,%ZMM2 |
(101) 0x4193e5 VMINPD %ZMM28,%ZMM18,%ZMM16 |
(101) 0x4193eb VMINPD %ZMM19,%ZMM0,%ZMM0 |
(101) 0x4193f1 VCMPPD $0xe,%ZMM8,%ZMM21,%K6 |
(101) 0x4193f8 VCMPPD $0xe,%ZMM8,%ZMM14,%K7 |
(101) 0x4193ff VANDPD %ZMM3,%ZMM5,%ZMM14 |
(101) 0x419405 VDIVPD %ZMM11,%ZMM14,%ZMM13 |
(101) 0x41940b VMULPD %ZMM23,%ZMM1,%ZMM4 |
(101) 0x419411 VMULPD %ZMM23,%ZMM2,%ZMM2 |
(101) 0x419417 VMINPD %ZMM16,%ZMM4,%ZMM1 |
(101) 0x41941d VMULPD %ZMM22,%ZMM1,%ZMM4 |
(101) 0x419423 VMINPD %ZMM0,%ZMM2,%ZMM1 |
(101) 0x419429 VANDPD %ZMM3,%ZMM6,%ZMM0 |
(101) 0x41942f VDIVPD %ZMM12,%ZMM0,%ZMM15 |
(101) 0x419435 VSUBPD %ZMM15,%ZMM9,%ZMM0 |
(101) 0x41943b VMULPD %ZMM30,%ZMM1,%ZMM2 |
(101) 0x419441 VSUBPD %ZMM13,%ZMM9,%ZMM1 |
(101) 0x419447 VFMADD231PD %ZMM1,%ZMM4,%ZMM7{%K7} |
(101) 0x41944d VFMADD231PD %ZMM0,%ZMM2,%ZMM10{%K6} |
(101) 0x419453 VMULPD %ZMM5,%ZMM7,%ZMM5 |
(101) 0x419459 VMULPD %ZMM6,%ZMM10,%ZMM6 |
(101) 0x41945f VMOVUPD %ZMM5,0x40(%R10,%RAX,1) |
(101) 0x419467 VMOVUPD %ZMM6,(%R10,%RAX,1) |
(101) 0x41946e SUB $-0x80,%RAX |
(101) 0x419472 CMP %RAX,%R13 |
(101) 0x419475 JNE 419080 |
0x41947b MOV 0x190(%RSP),%R12D |
0x419483 MOV %R12D,%ESI |
0x419486 AND $-0x10,%ESI |
0x419489 ADD %ESI,0x1a4(%RSP) |
0x419490 ADD %ESI,0x1a0(%RSP) |
0x419497 AND $0xf,%R12D |
0x41949b JE 4196f8 |
0x4194a1 MOV 0x68(%RSP),%R13 |
0x4194a6 MOV 0x188(%RSP),%R10 |
0x4194ae VXORPD %XMM15,%XMM15,%XMM15 |
0x4194b3 MOV 0x78(%RSP),%R11 |
0x4194b8 MOV 0x70(%RSP),%RDX |
0x4194bd LEA (%R10,%R13,8),%R12 |
0x4194c1 MOVSXD 0x1a0(%RSP),%RAX |
0x4194c9 MOV 0x180(%RSP),%RSI |
0x4194d1 LEA (%R11,%RDX,8),%RCX |
0x4194d5 MOV 0x60(%RSP),%R11 |
0x4194da VMOVSD 0x3315e(%RIP),%XMM8 |
0x4194e2 MOV %R12,0x100(%RSP) |
0x4194ea MOV 0x1a4(%RSP),%R12D |
0x4194f2 MOV %RCX,0x140(%RSP) |
0x4194fa LEA (%RSI,%R11,8),%R13 |
0x4194fe SUB %EAX,%R12D |
0x419501 JMP 4196a4 |
(100) 0x419510 LEA -0x1(%RAX),%RDX |
(100) 0x419514 LEA -0x2(%RAX),%R10D |
(100) 0x419518 MOV %RAX,%RSI |
(100) 0x41951b MOVSXD %R10D,%RCX |
(100) 0x41951e MOV %RDX,%R11 |
(100) 0x419521 VMOVSD (%RDI,%RAX,8),%XMM9 |
(100) 0x419526 MOV 0x1a8(%RSP),%RBX |
(100) 0x41952e VMOVSD %XMM25,%XMM25,%XMM5 |
(100) 0x419534 VANDPD 0x33244(%RIP),%XMM12,%XMM3 |
(100) 0x41953c VMOVSD 0x3324c(%RIP),%XMM10 |
(100) 0x419544 VDIVSD (%RDI,%R11,8),%XMM9,%XMM4 |
(100) 0x41954a LEA (%R14,%RDX,1),%R11 |
(100) 0x41954e LEA (%RBX,%RDX,1),%R10 |
(100) 0x419552 MOV 0x1b0(%RSP),%RBX |
(100) 0x41955a LEA (%R15,%R11,8),%R11 |
(100) 0x41955e VMOVSD (%R11),%XMM11 |
(100) 0x419563 LEA (%RBX,%R10,8),%R10 |
(100) 0x419567 LEA (%R14,%RCX,1),%RBX |
(100) 0x41956b VDIVSD (%R10),%XMM3,%XMM2 |
(100) 0x419570 VADDSD %XMM25,%XMM2,%XMM0 |
(100) 0x419576 VSUBSD %XMM2,%XMM10,%XMM13 |
(100) 0x41957a VSUBSD (%R15,%RBX,8),%XMM11,%XMM7 |
(100) 0x419580 LEA (%R14,%RSI,1),%RBX |
(100) 0x419584 VMOVSD (%R15,%RBX,8),%XMM1 |
(100) 0x41958a VMULSD %XMM0,%XMM4,%XMM14 |
(100) 0x41958e VSUBSD %XMM11,%XMM1,%XMM6 |
(100) 0x419593 VMULSD %XMM6,%XMM7,%XMM4 |
(100) 0x419597 VCMPSD $0x6,%XMM15,%XMM6,%XMM3 |
(100) 0x41959d VBLENDVPD %XMM3,%XMM5,%XMM8,%XMM9 |
(100) 0x4195a3 VCOMISD %XMM15,%XMM4 |
(100) 0x4195a8 JBE 4195e4 |
(100) 0x4195aa VANDPD 0x331ce(%RIP),%XMM6,%XMM10 |
(100) 0x4195b2 VANDPD 0x331c6(%RIP),%XMM7,%XMM0 |
(100) 0x4195ba VSUBSD %XMM2,%XMM25,%XMM2 |
(100) 0x4195c0 VMULSD %XMM13,%XMM10,%XMM7 |
(100) 0x4195c5 VMINSD %XMM10,%XMM0,%XMM1 |
(100) 0x4195ca VFMADD231SD %XMM14,%XMM0,%XMM7 |
(100) 0x4195cf VMULSD 0x330a9(%RIP),%XMM7,%XMM6 |
(100) 0x4195d7 VMINSD %XMM1,%XMM6,%XMM3 |
(100) 0x4195db VMULSD %XMM2,%XMM3,%XMM5 |
(100) 0x4195df VFMADD231SD %XMM5,%XMM9,%XMM11 |
(100) 0x4195e4 VMULSD %XMM11,%XMM12,%XMM12 |
(100) 0x4195e9 MOV 0x100(%RSP),%RBX |
(100) 0x4195f1 ADD %R9,%RDX |
(100) 0x4195f4 ADD %R9,%RSI |
(100) 0x4195f7 ADD %R9,%RCX |
(100) 0x4195fa VMOVSD %XMM25,%XMM25,%XMM1 |
(100) 0x419600 VMOVSD %XMM12,(%RBX,%RAX,8) |
(100) 0x419605 VMOVSD (%R8,%RDX,8),%XMM0 |
(100) 0x41960b VMOVSD (%R8,%RSI,8),%XMM10 |
(100) 0x419611 VMOVSD (%R11),%XMM9 |
(100) 0x419616 VMOVSD (%R10),%XMM11 |
(100) 0x41961b VSUBSD %XMM0,%XMM10,%XMM7 |
(100) 0x41961f VSUBSD (%R8,%RCX,8),%XMM0,%XMM4 |
(100) 0x419625 VMULSD %XMM7,%XMM4,%XMM3 |
(100) 0x419629 VCMPSD $0x6,%XMM15,%XMM7,%XMM6 |
(100) 0x41962f VBLENDVPD %XMM6,%XMM1,%XMM8,%XMM2 |
(100) 0x419635 VCOMISD %XMM15,%XMM3 |
(100) 0x41963a JBE 419686 |
(100) 0x41963c VMULSD %XMM11,%XMM9,%XMM5 |
(100) 0x419641 VANDPD 0x33137(%RIP),%XMM7,%XMM7 |
(100) 0x419649 VANDPD 0x3312f(%RIP),%XMM4,%XMM4 |
(100) 0x419651 VMULSD %XMM13,%XMM7,%XMM13 |
(100) 0x419656 VMINSD %XMM7,%XMM4,%XMM6 |
(100) 0x41965a VFMADD231SD %XMM14,%XMM4,%XMM13 |
(100) 0x41965f VANDPD 0x33119(%RIP),%XMM12,%XMM14 |
(100) 0x419667 VDIVSD %XMM5,%XMM14,%XMM9 |
(100) 0x41966b VMULSD 0x3300d(%RIP),%XMM13,%XMM10 |
(100) 0x419673 VMINSD %XMM6,%XMM10,%XMM1 |
(100) 0x419677 VSUBSD %XMM9,%XMM25,%XMM11 |
(100) 0x41967d VMULSD %XMM1,%XMM11,%XMM3 |
(100) 0x419681 VFMADD231SD %XMM3,%XMM2,%XMM0 |
(100) 0x419686 VMULSD %XMM12,%XMM0,%XMM12 |
(100) 0x41968b MOV 0x1bc(%RSP),%ECX |
(100) 0x419692 VMOVSD %XMM12,(%R13,%RAX,8) |
(100) 0x419699 INC %RAX |
(100) 0x41969c LEA (%R12,%RAX,1),%ESI |
(100) 0x4196a0 CMP %ECX,%ESI |
(100) 0x4196a2 JAE 4196f8 |
(100) 0x4196a4 MOV 0x140(%RSP),%RBX |
(100) 0x4196ac VMOVSD (%RBX,%RAX,8),%XMM12 |
(100) 0x4196b1 VCOMISD %XMM15,%XMM12 |
(100) 0x4196b6 JA 419510 |
(100) 0x4196bc MOV 0x194(%RSP),%ECX |
(100) 0x4196c3 LEA 0x1(%RAX),%EDX |
(100) 0x4196c6 LEA -0x1(%RAX),%RSI |
(100) 0x4196ca CMP %ECX,%EDX |
(100) 0x4196cc CMOVG %ECX,%EDX |
(100) 0x4196cf MOVSXD %EDX,%R11 |
(100) 0x4196d2 MOV %RAX,%RDX |
(100) 0x4196d5 MOV %R11,%RCX |
(100) 0x4196d8 JMP 419521 |
0x4196f8 MOV 0x1bc(%RSP),%EDX |
0x4196ff MOV %EDX,0x1a4(%RSP) |
0x419706 INCQ 0x198(%RSP) |
0x41970e MOV 0x48(%RSP),%EAX |
0x419712 MOV 0x40(%RSP),%R8D |
0x419717 SUB %R8D,%EAX |
0x41971a MOV 0x198(%RSP),%RDI |
0x419722 ADD %EDI,%EAX |
0x419724 CMP %EAX,0x54(%RSP) |
0x419728 JLE 4196e0 |
0x41972a MOV 0x4c(%RSP),%ECX |
0x41972e MOV 0x1a4(%RSP),%R9D |
0x419736 MOV 0x50(%RSP),%R12D |
0x41973b MOV 0x1b8(%RSP),%EDX |
0x419742 SUB %R9D,%ECX |
0x419745 MOV %R12D,0x1a0(%RSP) |
0x41974d JMP 418eb8 |
/software/compilers/gcc/gcc-13.1.0-full+isl+binutils/include/c++/13.1.0/bits/stl_algobase.h: 238 - 238 |
-------------------------------------------------------------------------------- |
238: if (__b < __a) |
/scratch_na/users/xoserete/qaas_runs/171-320-5323/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 46 - 69 |
-------------------------------------------------------------------------------- |
46: T &operator[](size_t i) const { return data[i]; } |
[...] |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/scratch_na/users/xoserete/qaas_runs/171-320-5323/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 71 - 110 |
-------------------------------------------------------------------------------- |
71: if (vol_flux_x(i, j) > 0.0) { |
72: upwind = i - 2; |
73: donor = i - 1; |
74: downwind = i; |
75: dif = donor; |
76: } else { |
77: upwind = std::min(i + 1, x_max + 2); |
78: donor = i; |
79: downwind = i - 1; |
80: dif = upwind; |
81: } |
82: sigmat = std::fabs(vol_flux_x(i, j)) / pre_vol(donor, j); |
83: sigma3 = (1.0 + sigmat) * (vertexdx[i] / vertexdx[dif]); |
84: sigma4 = 2.0 - sigmat; |
85: sigmav = sigmat; |
86: diffuw = density1(donor, j) - density1(upwind, j); |
87: diffdw = density1(downwind, j) - density1(donor, j); |
88: wind = 1.0; |
89: if (diffdw <= 0.0) wind = -1.0; |
90: if (diffuw * diffdw > 0.0) { |
91: limiter = (1.0 - sigmav) * wind * |
92: std::fmin(std::fmin(std::fabs(diffuw), std::fabs(diffdw)), |
93: one_by_six * (sigma3 * std::fabs(diffuw) + sigma4 * std::fabs(diffdw))); |
94: } else { |
95: limiter = 0.0; |
96: } |
97: mass_flux_x(i, j) = vol_flux_x(i, j) * (density1(donor, j) + limiter); |
98: sigmam = std::fabs(mass_flux_x(i, j)) / (density1(donor, j) * pre_vol(donor, j)); |
99: diffuw = energy1(donor, j) - energy1(upwind, j); |
100: diffdw = energy1(downwind, j) - energy1(donor, j); |
101: wind = 1.0; |
102: if (diffdw <= 0.0) wind = -1.0; |
103: if (diffuw * diffdw > 0.0) { |
104: limiter = (1.0 - sigmam) * wind * |
105: std::fmin(std::fmin(std::fabs(diffuw), std::fabs(diffdw)), |
106: one_by_six * (sigma3 * std::fabs(diffuw) + sigma4 * std::fabs(diffdw))); |
107: } else { |
108: limiter = 0.0; |
109: } |
110: ener_flux(i, j) = mass_flux_x(i, j) * (energy1(donor, j) + limiter); |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 5.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.30 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.14 |
Bottlenecks | micro-operation queue, |
Function | advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D |
Source | stl_algobase.h:238-238,context.h:46-46,context.h:69-69,advec_cell.cpp:71-72,advec_cell.cpp:77-77,advec_cell.cpp:82-82,advec_cell.cpp:88-88,advec_cell.cpp:110-110 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 21.67 |
CQA cycles if no scalar integer | 4.33 |
CQA cycles if FP arith vectorized | 21.67 |
CQA cycles if fully vectorized | 16.66 |
Front-end cycles | 21.67 |
DIV/SQRT cycles | 7.80 |
P0 cycles | 10.00 |
P1 cycles | 19.00 |
P2 cycles | 19.00 |
P3 cycles | 10.50 |
P4 cycles | 7.70 |
P5 cycles | 7.90 |
P6 cycles | 10.50 |
P7 cycles | 10.50 |
P8 cycles | 10.50 |
P9 cycles | 7.80 |
P10 cycles | 19.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 22.14 |
Stall cycles (UFS) | 0.00 |
Nb insns | 125.00 |
Nb uops | 130.00 |
Nb loads | 57.00 |
Nb stores | 21.00 |
Nb stack references | 30.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.89 |
Bytes prefetched | 0.00 |
Bytes loaded | 444.00 |
Bytes stored | 312.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 15.79 |
Vectorization ratio load | 8.33 |
Vectorization ratio store | 14.29 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 13.33 |
Vector-efficiency ratio all | 20.07 |
Vector-efficiency ratio load | 17.71 |
Vector-efficiency ratio store | 23.21 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 10.83 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 5.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.30 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.14 |
Bottlenecks | micro-operation queue, |
Function | advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D |
Source | stl_algobase.h:238-238,context.h:46-46,context.h:69-69,advec_cell.cpp:71-72,advec_cell.cpp:77-77,advec_cell.cpp:82-82,advec_cell.cpp:88-88,advec_cell.cpp:110-110 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 21.67 |
CQA cycles if no scalar integer | 4.33 |
CQA cycles if FP arith vectorized | 21.67 |
CQA cycles if fully vectorized | 16.66 |
Front-end cycles | 21.67 |
DIV/SQRT cycles | 7.80 |
P0 cycles | 10.00 |
P1 cycles | 19.00 |
P2 cycles | 19.00 |
P3 cycles | 10.50 |
P4 cycles | 7.70 |
P5 cycles | 7.90 |
P6 cycles | 10.50 |
P7 cycles | 10.50 |
P8 cycles | 10.50 |
P9 cycles | 7.80 |
P10 cycles | 19.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 22.14 |
Stall cycles (UFS) | 0.00 |
Nb insns | 125.00 |
Nb uops | 130.00 |
Nb loads | 57.00 |
Nb stores | 21.00 |
Nb stack references | 30.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 34.89 |
Bytes prefetched | 0.00 |
Bytes loaded | 444.00 |
Bytes stored | 312.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 15.79 |
Vectorization ratio load | 8.33 |
Vectorization ratio store | 14.29 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 100.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 13.33 |
Vector-efficiency ratio all | 20.07 |
Vector-efficiency ratio load | 17.71 |
Vector-efficiency ratio store | 23.21 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 100.00 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 10.83 |
Path / |
nb instructions | 125 |
nb uops | 130 |
loop length | 685 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 10 |
nb stack references | 30 |
micro-operation queue | 21.67 cycles |
front end | 21.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.80 | 7.80 | 19.00 | 19.00 | 10.50 | 7.70 | 7.90 | 10.50 | 10.50 | 10.50 | 7.80 | 19.00 |
cycles | 7.80 | 10.00 | 19.00 | 19.00 | 10.50 | 7.70 | 7.90 | 10.50 | 10.50 | 10.50 | 7.80 | 19.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 22.14 |
Stall cycles | 0.00 |
Front-end | 21.67 |
Dispatch | 19.00 |
Overall L1 | 21.67 |
all | 13% |
load | 16% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 28% |
all | 15% |
load | 8% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 21% |
load | 22% |
store | 23% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 15% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 20% |
load | 17% |
store | 23% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVBE %ECX,%EDX | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
MOV 0x1a4(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x190(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %ECX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x1bc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 419706 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x9a6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RDX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x198(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x1b0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R13),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x10(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R13),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL (%R13),%R10 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x190(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x1a8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x1(%R13),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0xe,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4194a1 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x741> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD 0x1a0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x4,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VPBROADCASTD 0x1a0(%RSP),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
LEA (%R15,%R14,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORB %K1,%K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SAL $0x7,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VBROADCASTSD 0x337bf(%RIP),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x337cd(%RIP),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VXORPD %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RSI,%RAX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x10,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R11,%RSI,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x1b0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %R13D,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $-0x2,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R13D,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $0x1,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPADDD 0x335f0(%RIP),%ZMM1,%ZMM27 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VBROADCASTSD 0x33776(%RIP),%ZMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
LEA (%R11,%RBX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x188(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDI,%RAX,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x180(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %R13D,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD 0x335fb(%RIP),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VMOVDQA32 %ZMM5,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VBROADCASTSD 0x33629(%RIP),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV 0x58(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RCX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA32 %ZMM2,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
LEA (%R10,%RAX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA32 %ZMM4,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x190(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x10,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %ESI,0x1a4(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %ESI,0x1a0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
AND $0xf,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 4196f8 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x998> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x188(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM15,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x78(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R10,%R13,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD 0x1a0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x180(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x60(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x3315e(%RIP),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x1a4(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RSI,%R11,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %EAX,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4196a4 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x944> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x1bc(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x1a4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INCQ 0x198(%RSP) | 3 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV 0x48(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x198(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,0x54(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4196e0 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x980> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x4c(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x1a4(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x1b8(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R9D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12D,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 418eb8 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x158> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
nb instructions | 125 |
nb uops | 130 |
loop length | 685 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 10 |
nb stack references | 30 |
micro-operation queue | 21.67 cycles |
front end | 21.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 7.80 | 7.80 | 19.00 | 19.00 | 10.50 | 7.70 | 7.90 | 10.50 | 10.50 | 10.50 | 7.80 | 19.00 |
cycles | 7.80 | 10.00 | 19.00 | 19.00 | 10.50 | 7.70 | 7.90 | 10.50 | 10.50 | 10.50 | 7.80 | 19.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 22.14 |
Stall cycles | 0.00 |
Front-end | 21.67 |
Dispatch | 19.00 |
Overall L1 | 21.67 |
all | 13% |
load | 16% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 28% |
all | 15% |
load | 8% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 13% |
all | 21% |
load | 22% |
store | 23% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 15% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 16% |
all | 20% |
load | 17% |
store | 23% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 100% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVBE %ECX,%EDX | 2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1-2 | 1 |
MOV 0x1a4(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x190(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
ADD %ECX,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDX,0x1bc(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EDX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 419706 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x9a6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x38(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RSP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RDX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RAX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RSP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x198(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R9,0x1b0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R12),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R11,0x78(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x8(%R13),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R14),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RSI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x8(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%R14),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RBX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV (%RAX),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV 0x10(%R12),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%R13),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R10,%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RSI,0x70(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R10,%R9 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R8,0x188(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x10(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL (%R13),%R10 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x190(%RSP),%R13D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RBX,0x1a8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,0x68(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA -0x1(%R13),%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDX,0x180(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,0x60(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0xe,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 4194a1 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x741> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD 0x1a0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SHR $0x4,%R13D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VPBROADCASTD 0x1a0(%RSP),%ZMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
LEA (%R15,%R14,8),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
KXNORB %K1,%K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
SAL $0x7,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
VBROADCASTSD 0x337bf(%RIP),%ZMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VBROADCASTSD 0x337cd(%RIP),%ZMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VXORPD %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RSI,%RAX,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R13,0x58(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x10,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%R11,%RSI,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x1b0(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %R13D,%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $-0x2,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTD %R13D,%ZMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV $0x1,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPADDD 0x335f0(%RIP),%ZMM1,%ZMM27 | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.67 |
VBROADCASTSD 0x33776(%RIP),%ZMM26 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
LEA (%R11,%RBX,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x188(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RDI,%RAX,8),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %R10,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x180(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VPBROADCASTD %R13D,%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD 0x335fb(%RIP),%ZMM24 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
VMOVDQA32 %ZMM5,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
VBROADCASTSD 0x33629(%RIP),%ZMM23 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
MOV 0x58(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RCX,8),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA32 %ZMM2,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
LEA (%R10,%RAX,8),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%R9,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVDQA32 %ZMM4,0xc0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x190(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x10,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %ESI,0x1a4(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADD %ESI,0x1a0(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
AND $0xf,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 4196f8 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x998> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x68(%RSP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x188(%RSP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM15,%XMM15,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x78(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x70(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R10,%R13,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD 0x1a0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x180(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R11,%RDX,8),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x60(%RSP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x3315e(%RIP),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R12,0x100(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV 0x1a4(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,0x140(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RSI,%R11,8),%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SUB %EAX,%R12D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JMP 4196a4 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x944> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x1bc(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,0x1a4(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INCQ 0x198(%RSP) | 3 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV 0x48(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x40(%RSP),%R8D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x198(%RSP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %EDI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,0x54(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 4196e0 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x980> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x4c(%RSP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x1a4(%RSP),%R9D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x50(%RSP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x1b8(%RSP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R9D,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R12D,0x1a0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 418eb8 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.2.lto_priv.0+0x158> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |