Loop Id: 174 | Module: exec | Source: field_summary.cpp:80-82 | Coverage: 0.02% |
---|
Loop Id: 174 | Module: exec | Source: field_summary.cpp:80-82 | Coverage: 0.02% |
---|
0x437940 KXORW %K0,%K0,%K0 |
0x437944 VXORPD %XMM17,%XMM17,%XMM17 |
0x43794a XOR %EAX,%EAX |
0x43794c VMOVAPD %ZMM17,%ZMM2{%K1} |
0x437952 KANDB %K0,%K1,%K1 |
0x437956 KORTESTB %K1,%K1 |
0x43795a VMOVAPD %ZMM17,%ZMM18 |
0x437960 JE 437740 |
0x437966 KORTESTB %K1,%K1 |
0x43796a JE 437940 |
0x43796c VPBROADCASTQ %RAX,%ZMM17 |
0x437972 VPXORD %XMM19,%XMM19,%XMM19 |
0x437978 VPMULLQ %ZMM17,%ZMM24,%ZMM19 |
0x43797e VPXORD %XMM20,%XMM20,%XMM20 |
0x437984 VPMULLQ %ZMM17,%ZMM25,%ZMM20 |
0x43798a KXNORW %K0,%K0,%K2 |
0x43798e XOR %ECX,%ECX |
0x437990 JMP 4379e0 |
(175) 0x4379c0 KXORW %K0,%K0,%K0 |
(175) 0x4379c4 VXORPD %XMM18,%XMM18,%XMM18 |
(175) 0x4379ca XOR %ECX,%ECX |
(175) 0x4379cc VMOVAPD %ZMM18,%ZMM17{%K2} |
(175) 0x4379d2 KANDB %K0,%K2,%K2 |
(175) 0x4379d6 KTESTB %K2,%K1 |
(175) 0x4379da JE 437a6d |
(175) 0x4379e0 KANDB %K2,%K1,%K3 |
(175) 0x4379e4 KORTESTB %K3,%K3 |
(175) 0x4379e8 JE 4379c0 |
(175) 0x4379ea VPBROADCASTQ %RCX,%ZMM21 |
(175) 0x4379f0 VPADDQ %ZMM3,%ZMM21,%ZMM22 |
(175) 0x4379f6 VPADDQ %ZMM19,%ZMM22,%ZMM22 |
(175) 0x4379fc KMOVQ %K3,%K4 |
(175) 0x437a01 VXORPD %XMM23,%XMM23,%XMM23 |
(175) 0x437a07 VGATHERQPD (%RBX,%ZMM22,8),%ZMM23{%K4} |
(175) 0x437a0e VMOVAPD %ZMM23,%ZMM7{%K3} |
(175) 0x437a14 VPADDQ %ZMM4,%ZMM21,%ZMM21 |
(175) 0x437a1a VPADDQ %ZMM20,%ZMM21,%ZMM21 |
(175) 0x437a20 KMOVQ %K3,%K4 |
(175) 0x437a25 VXORPD %XMM22,%XMM22,%XMM22 |
(175) 0x437a2b VGATHERQPD (%R12,%ZMM21,8),%ZMM22{%K4} |
(175) 0x437a32 VMULPD %ZMM7,%ZMM7,%ZMM21 |
(175) 0x437a38 VMOVAPD %ZMM22,%ZMM9{%K3} |
(175) 0x437a3e VFMADD231PD %ZMM9,%ZMM9,%ZMM21 |
(175) 0x437a44 VFMADD231PD %ZMM26,%ZMM21,%ZMM18 |
(175) 0x437a4a INC %RCX |
(175) 0x437a4d VPBROADCASTQ %RCX,%ZMM21 |
(175) 0x437a53 VPCMPGTQ %ZMM21,%ZMM5,%K0 |
(175) 0x437a59 VMOVAPD %ZMM18,%ZMM17{%K2} |
(175) 0x437a5f KANDB %K0,%K2,%K2 |
(175) 0x437a63 KTESTB %K2,%K1 |
(175) 0x437a67 JNE 4379e0 |
0x437a6d INC %RAX |
0x437a70 VPBROADCASTQ %RAX,%ZMM18 |
0x437a76 VPCMPGTQ %ZMM18,%ZMM6,%K0 |
0x437a7c JMP 43794c |
/scratch_na/users/xoserete/qaas_runs/171-320-5323/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/field_summary.cpp: 80 - 82 |
-------------------------------------------------------------------------------- |
80: for (int kv = k; kv <= k + 1; ++kv) { |
81: for (int jv = j; jv <= j + 1; ++jv) { |
82: vsqrd += 0.25 * (field.xvel0(jv, kv) * field.xvel0(jv, kv) + field.yvel0(jv, kv) * field.yvel0(jv, kv)); |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.21 - 1.06 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.45 - 1.60 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.55 - 1.46 |
Bottlenecks | |
Function | field_summary(global_variables&, parallel_&) [clone .extracted] |
Source | field_summary.cpp:80-82 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.67 - 6.33 |
CQA cycles if no scalar integer | 4.67 - 6.00 |
CQA cycles if FP arith vectorized | 5.67 - 6.33 |
CQA cycles if fully vectorized | 3.92 - 3.96 |
Front-end cycles | 3.56 |
DIV/SQRT cycles | 5.67 |
P0 cycles | 1.33 |
P1 cycles | 0.00 |
P2 cycles | 0.00 |
P3 cycles | 0.00 |
P4 cycles | 4.33 |
P5 cycles | 2.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 4 - 6 |
FE+BE cycles (UFS) | 5.94 - 5.97 |
Stall cycles (UFS) | 2.04 - 2.07 |
Nb insns | 16.00 |
Nb uops | 21.33 |
Nb loads | 0.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 - 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 0.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 0.00 |
Stride 0 | 1.33 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 71.67 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 66.67 |
Vector-efficiency ratio all | 58.02 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 51.04 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 16.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.00 - 1.50 |
Bottlenecks | |
Function | field_summary(global_variables&, parallel_&) [clone .extracted] |
Source | field_summary.cpp:80-82 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.00 - 6.00 |
CQA cycles if no scalar integer | 4.00 - 6.00 |
CQA cycles if FP arith vectorized | 4.00 - 6.00 |
CQA cycles if fully vectorized | 0.25 - 0.38 |
Front-end cycles | 1.67 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 0.00 |
P1 cycles | 0.00 |
P2 cycles | 0.00 |
P3 cycles | 0.00 |
P4 cycles | 0.00 |
P5 cycles | 2.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 4 - 6 |
FE+BE cycles (UFS) | 4.04 |
Stall cycles (UFS) | 1.52 |
Nb insns | 10.00 |
Nb uops | 10.00 |
Nb loads | 0.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 - 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 0.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 0.00 |
Stride 0 | 0.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 75.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 75.00 |
Vector-efficiency ratio all | 57.81 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 57.81 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.30 - 1.08 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.13 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.44 |
Bottlenecks | P0, P5, |
Function | field_summary(global_variables&, parallel_&) [clone .extracted] |
Source | field_summary.cpp:80-82 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 6.50 |
CQA cycles if no scalar integer | 5.00 - 6.00 |
CQA cycles if FP arith vectorized | 6.50 |
CQA cycles if fully vectorized | 5.75 |
Front-end cycles | 4.50 |
DIV/SQRT cycles | 6.50 |
P0 cycles | 2.00 |
P1 cycles | 0.00 |
P2 cycles | 0.00 |
P3 cycles | 0.00 |
P4 cycles | 6.50 |
P5 cycles | 2.00 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 4 - 6 |
FE+BE cycles (UFS) | 6.89 - 6.94 |
Stall cycles (UFS) | 2.30 - 2.34 |
Nb insns | 19.00 |
Nb uops | 27.00 |
Nb loads | 0.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 0.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 0.00 |
Bytes stored | 0.00 |
Stride 0 | 2.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 70.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | 100.00 |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 62.50 |
Vector-efficiency ratio all | 58.13 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 100.00 |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 47.66 |
Path / |
Function | field_summary(global_variables&, parallel_&) [clone .extracted] |
Source file and lines | field_summary.cpp:80-82 |
Module | exec |
nb instructions | 16 |
nb uops | 21.33 |
loop length | 74.67 |
used x86 registers | 1.67 |
used mmx registers | 0 |
used xmm registers | 1.67 |
used ymm registers | 0 |
used zmm registers | 6.33 |
nb stack references | 0 |
micro-operation queue | 3.56 cycles |
front end | 3.56 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.67 | 1.33 | 0.00 | 0.00 | 0.00 | 4.33 | 2.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 5.67 | 1.33 | 0.00 | 0.00 | 0.00 | 4.33 | 2.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 4.00-6.00 |
FE+BE cycles | 5.94-5.97 |
Stall cycles | 2.04-2.07 |
ROB full (events) | 0.51 |
RS full (events) | 3.49-3.45 |
Front-end | 3.56 |
Dispatch | 5.67 |
Data deps. | 4.00-6.00 |
Overall L1 | 5.67-6.33 |
all | 41% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 33% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 71% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 66% |
all | 33% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 22% |
all | 91% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 91% |
all | 58% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 51% |
Function | field_summary(global_variables&, parallel_&) [clone .extracted] |
Source file and lines | field_summary.cpp:80-82 |
Module | exec |
nb instructions | 10 |
nb uops | 10 |
loop length | 44 |
used x86 registers | 1 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 3 |
nb stack references | 0 |
micro-operation queue | 1.67 cycles |
front end | 1.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 2.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 4.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 2.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 4.00-6.00 |
FE+BE cycles | 4.04 |
Stall cycles | 1.52 |
ROB full (events) | 1.52 |
RS full (events) | 1.79 |
Front-end | 1.67 |
Dispatch | 4.00 |
Data deps. | 4.00-6.00 |
Overall L1 | 4.00-6.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 75% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 75% |
all | 6% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 75% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 75% |
all | 57% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 57% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
KXORW %K0,%K0,%K0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
VXORPD %XMM17,%XMM17,%XMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVAPD %ZMM17,%ZMM2{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
KANDB %K0,%K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VMOVAPD %ZMM17,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
JE 437740 <_Z13field_summaryR16global_variablesR9parallel_.extracted+0x1e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 437940 <_Z13field_summaryR16global_variablesR9parallel_.extracted+0x3e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | field_summary(global_variables&, parallel_&) [clone .extracted] |
Source file and lines | field_summary.cpp:80-82 |
Module | exec |
nb instructions | 19 |
nb uops | 27 |
loop length | 90 |
used x86 registers | 2 |
used mmx registers | 0 |
used xmm registers | 2 |
used ymm registers | 0 |
used zmm registers | 8 |
nb stack references | 0 |
micro-operation queue | 4.50 cycles |
front end | 4.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.50 | 2.00 | 0.00 | 0.00 | 0.00 | 6.50 | 2.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 6.50 | 2.00 | 0.00 | 0.00 | 0.00 | 6.50 | 2.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 4.00-6.00 |
FE+BE cycles | 6.89-6.94 |
Stall cycles | 2.30-2.34 |
RS full (events) | 4.34-4.28 |
Front-end | 4.50 |
Dispatch | 6.50 |
Data deps. | 4.00-6.00 |
Overall L1 | 6.50 |
all | 62% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 50% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 70% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 62% |
all | 47% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 30% |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 58% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | 100% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 47% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVAPD %ZMM17,%ZMM2{%K1} | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
KANDB %K0,%K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
VMOVAPD %ZMM17,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
JE 437740 <_Z13field_summaryR16global_variablesR9parallel_.extracted+0x1e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
KORTESTB %K1,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JE 437940 <_Z13field_summaryR16global_variablesR9parallel_.extracted+0x3e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VPBROADCASTQ %RAX,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPXORD %XMM19,%XMM19,%XMM19 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPMULLQ %ZMM17,%ZMM24,%ZMM19 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
VPXORD %XMM20,%XMM20,%XMM20 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.33 |
VPMULLQ %ZMM17,%ZMM25,%ZMM20 | 5 | 1.50 | 0 | 0 | 0 | 0 | 1.50 | 0 | 0 | 0 | 0 | 0 | 0 | 15 | 1.50 |
KXNORW %K0,%K0,%K2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4379e0 <_Z13field_summaryR16global_variablesR9parallel_.extracted+0x480> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VPBROADCASTQ %RAX,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPCMPGTQ %ZMM18,%ZMM6,%K0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0-3 | 1 |
JMP 43794c <_Z13field_summaryR16global_variablesR9parallel_.extracted+0x3ec> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |