Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ... | Module: exec | Source: advec_cell.cpp:117-125 [...] | Coverage: 2.66% |
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Function: advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D<double>&, clover::Buffer1 ... | Module: exec | Source: advec_cell.cpp:117-125 [...] | Coverage: 2.66% |
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/scratch_na/users/xoserete/qaas_runs/171-320-5323/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69 |
-------------------------------------------------------------------------------- |
69: T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; } |
/scratch_na/users/xoserete/qaas_runs/171-320-5323/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_cell.cpp: 117 - 125 |
-------------------------------------------------------------------------------- |
117: #pragma omp parallel for simd collapse(2) |
118: for (int j = (y_min + 1); j < (y_max + 2); j++) { |
119: for (int i = (x_min + 1); i < (x_max + 2); i++) { |
120: double pre_mass_s = density1(i, j) * pre_vol(i, j); |
121: double post_mass_s = pre_mass_s + mass_flux_x(i, j) - mass_flux_x(i + 1, j + 0); |
122: double post_ener_s = (energy1(i, j) * pre_mass_s + ener_flux(i, j) - ener_flux(i + 1, j + 0)) / post_mass_s; |
123: double advec_vol_s = pre_vol(i, j) + vol_flux_x(i, j) - vol_flux_x(i + 1, j + 0); |
124: density1(i, j) = post_mass_s / advec_vol_s; |
125: energy1(i, j) = post_ener_s; |
0x419760 PUSH %RBP |
0x419761 MOV %RSP,%RBP |
0x419764 PUSH %R15 |
0x419766 PUSH %R14 |
0x419768 PUSH %R13 |
0x41976a PUSH %R12 |
0x41976c PUSH %RBX |
0x41976d AND $-0x40,%RSP |
0x419771 SUB $0xc0,%RSP |
0x419778 MOV 0x38(%RDI),%EAX |
0x41977b MOV 0x3c(%RDI),%ECX |
0x41977e MOV 0x30(%RDI),%ESI |
0x419781 MOV 0x34(%RDI),%EDX |
0x419784 ADD $0x2,%ECX |
0x419787 LEA 0x1(%RAX),%R15D |
0x41978b INC %ESI |
0x41978d MOV %ECX,0x48(%RSP) |
0x419791 MOV %ESI,0x44(%RSP) |
0x419795 CMP %ECX,%R15D |
0x419798 JGE 419e9b |
0x41979e MOV %ECX,%R13D |
0x4197a1 LEA 0x2(%RDX),%R14D |
0x4197a5 SUB %R15D,%R13D |
0x4197a8 CMP %R14D,%ESI |
0x4197ab JGE 419e9b |
0x4197b1 MOV %RDI,%RBX |
0x4197b4 MOV %R14D,%EDI |
0x4197b7 SUB %ESI,%EDI |
0x4197b9 MOV %EDI,0x4c(%RSP) |
0x4197bd CALL 4046c0 <omp_get_num_threads@plt> |
0x4197c2 MOV %EAX,%R12D |
0x4197c5 CALL 4045b0 <omp_get_thread_num@plt> |
0x4197ca XOR %EDX,%EDX |
0x4197cc MOV %EAX,%R8D |
0x4197cf MOV 0x4c(%RSP),%EAX |
0x4197d3 IMUL %R13D,%EAX |
0x4197d7 DIV %R12D |
0x4197da MOV %EAX,%ECX |
0x4197dc CMP %EDX,%R8D |
0x4197df JB 419ebf |
0x4197e5 IMUL %ECX,%R8D |
0x4197e9 LEA (%R8,%RDX,1),%R10D |
0x4197ed LEA (%RCX,%R10,1),%R9D |
0x4197f1 MOV %R9D,0x40(%RSP) |
0x4197f6 CMP %R9D,%R10D |
0x4197f9 JAE 419e9b |
0x4197ff MOV %R10D,%EAX |
0x419802 XOR %EDX,%EDX |
0x419804 MOV 0x44(%RSP),%R11D |
0x419809 MOV (%RBX),%RSI |
0x41980c DIVL 0x4c(%RSP) |
0x419810 MOV 0x10(%RBX),%R13 |
0x419814 MOV 0x8(%RBX),%RDI |
0x419818 MOV 0x28(%RBX),%R12 |
0x41981c MOV %RSI,0x30(%RSP) |
0x419821 MOV %R13,0x20(%RSP) |
0x419826 MOV %RDI,0x18(%RSP) |
0x41982b MOV %R12,0x10(%RSP) |
0x419830 MOV %R14D,%R9D |
0x419833 MOV 0x20(%RBX),%R14 |
0x419837 MOV 0x18(%RBX),%RBX |
0x41983b MOV %R14,0x28(%RSP) |
0x419840 MOV %RBX,0x8(%RSP) |
0x419845 LEA (%RAX,%R15,1),%R15D |
0x419849 ADD %EDX,%R11D |
0x41984c MOVSXD %R15D,%R8 |
0x41984f MOV %R11D,0x9c(%RSP) |
0x419857 SUB %R11D,%R9D |
0x41985a MOV %R8,0xb8(%RSP) |
0x419862 NOPW (%RAX,%RAX,1) |
(102) 0x419868 CMP %R9D,%ECX |
(102) 0x41986b CMOVBE %ECX,%R9D |
(102) 0x41986f LEA (%R10,%R9,1),%ECX |
(102) 0x419873 MOV %R9D,%EDX |
(102) 0x419876 MOV %ECX,0x98(%RSP) |
(102) 0x41987d CMP %ECX,%R10D |
(102) 0x419880 JAE 419e5b |
(102) 0x419886 MOV 0x20(%RSP),%RSI |
(102) 0x41988b MOV 0x30(%RSP),%R9 |
(102) 0x419890 MOV 0x18(%RSP),%R14 |
(102) 0x419895 MOV 0x28(%RSP),%RAX |
(102) 0x41989a MOV 0x10(%RSI),%R11 |
(102) 0x41989e MOV 0x10(%R9),%R15 |
(102) 0x4198a2 MOV 0x10(%R14),%R12 |
(102) 0x4198a6 MOV (%R9),%RBX |
(102) 0x4198a9 MOV 0x10(%RSP),%R9 |
(102) 0x4198ae MOV 0xb8(%RSP),%RCX |
(102) 0x4198b6 MOV %R11,0xb0(%RSP) |
(102) 0x4198be MOV (%RSI),%R11 |
(102) 0x4198c1 MOV 0x8(%RSP),%RSI |
(102) 0x4198c6 MOV %R12,0xa0(%RSP) |
(102) 0x4198ce MOV 0x10(%RAX),%R13 |
(102) 0x4198d2 MOV (%RAX),%RDI |
(102) 0x4198d5 IMUL %RCX,%RBX |
(102) 0x4198d9 MOV %R15,0x78(%RSP) |
(102) 0x4198de MOV (%R14),%R8 |
(102) 0x4198e1 MOV 0x10(%R9),%R12 |
(102) 0x4198e5 IMUL %RCX,%R11 |
(102) 0x4198e9 MOV (%R9),%R9 |
(102) 0x4198ec MOV (%RSI),%RAX |
(102) 0x4198ef IMUL %RCX,%RDI |
(102) 0x4198f3 MOV %R13,0x88(%RSP) |
(102) 0x4198fb IMUL %RCX,%R8 |
(102) 0x4198ff MOV %RBX,0x70(%RSP) |
(102) 0x419904 MOV 0x10(%RSI),%R14 |
(102) 0x419908 IMUL %RCX,%R9 |
(102) 0x41990c MOV %R11,0x58(%RSP) |
(102) 0x419911 IMUL %RCX,%RAX |
(102) 0x419915 LEA -0x1(%RDX),%ECX |
(102) 0x419918 MOV %RDI,0x80(%RSP) |
(102) 0x419920 MOV %R8,0x90(%RSP) |
(102) 0x419928 MOV %R9,0x60(%RSP) |
(102) 0x41992d MOV %RAX,0xa8(%RSP) |
(102) 0x419935 CMP $0x6,%ECX |
(102) 0x419938 JBE 419eb0 |
(102) 0x41993e MOVSXD 0x9c(%RSP),%RAX |
(102) 0x419946 LEA (%RBX,%RAX,1),%RBX |
(102) 0x41994a LEA (%R9,%RAX,1),%R9 |
(102) 0x41994e LEA (%R15,%RBX,8),%RSI |
(102) 0x419952 LEA (%RDI,%RAX,1),%R15 |
(102) 0x419956 SAL $0x3,%R9 |
(102) 0x41995a LEA (%R11,%RAX,1),%RDI |
(102) 0x41995e MOV 0xb0(%RSP),%R11 |
(102) 0x419966 LEA (%R13,%R15,8),%R13 |
(102) 0x41996b SAL $0x3,%RDI |
(102) 0x41996f LEA (%R8,%RAX,1),%R15 |
(102) 0x419973 MOV 0xa0(%RSP),%R8 |
(102) 0x41997b LEA 0x8(%R11,%RDI,1),%RCX |
(102) 0x419980 LEA (%R11,%RDI,1),%RBX |
(102) 0x419984 MOV 0xa8(%RSP),%RDI |
(102) 0x41998c MOV %RCX,0x50(%RSP) |
(102) 0x419991 LEA (%R8,%R15,8),%RCX |
(102) 0x419995 LEA (%R12,%R9,1),%R11 |
(102) 0x419999 ADD %RDI,%RAX |
(102) 0x41999c LEA 0x8(%R12,%R9,1),%R9 |
(102) 0x4199a1 SAL $0x3,%RAX |
(102) 0x4199a5 LEA (%R14,%RAX,1),%R8 |
(102) 0x4199a9 LEA 0x8(%R14,%RAX,1),%RDI |
(102) 0x4199ae MOV %EDX,%EAX |
(102) 0x4199b0 SHR $0x3,%EAX |
(102) 0x4199b3 MOV %EAX,%R15D |
(102) 0x4199b6 MOV %R15,%RAX |
(102) 0x4199b9 SAL $0x6,%RAX |
(102) 0x4199bd MOV %RAX,0x68(%RSP) |
(102) 0x4199c2 XOR %EAX,%EAX |
(102) 0x4199c4 AND $0x1,%R15D |
(102) 0x4199c8 JE 419a2f |
(102) 0x4199ca VMOVUPD (%R13),%ZMM0 |
(102) 0x4199d1 VMOVUPD (%R11),%ZMM7 |
(102) 0x4199d7 MOV $0x40,%EAX |
(102) 0x4199dc MOV 0x50(%RSP),%R15 |
(102) 0x4199e1 CMPQ $0x40,0x68(%RSP) |
(102) 0x4199e7 VMULPD (%RSI),%ZMM0,%ZMM1 |
(102) 0x4199ed VSUBPD (%R9),%ZMM7,%ZMM3 |
(102) 0x4199f3 VADDPD (%R8),%ZMM0,%ZMM5 |
(102) 0x4199f9 VSUBPD (%RDI),%ZMM5,%ZMM6 |
(102) 0x4199ff VSUBPD (%R15),%ZMM1,%ZMM2 |
(102) 0x419a05 VFMADD132PD (%RCX),%ZMM3,%ZMM1 |
(102) 0x419a0b VADDPD (%RBX),%ZMM2,%ZMM4 |
(102) 0x419a11 VDIVPD %ZMM6,%ZMM4,%ZMM8 |
(102) 0x419a17 VDIVPD %ZMM4,%ZMM1,%ZMM9 |
(102) 0x419a1d VMOVUPD %ZMM8,(%RSI) |
(102) 0x419a23 VMOVUPD %ZMM9,(%RCX) |
(102) 0x419a29 JE 419b1b |
(102) 0x419a2f MOV %R10D,0x3c(%RSP) |
(102) 0x419a34 MOV 0xb8(%RSP),%R15 |
(102) 0x419a3c MOV 0x50(%RSP),%R10 |
(103) 0x419a41 VMOVUPD (%R13,%RAX,1),%ZMM10 |
(103) 0x419a49 VMOVUPD (%R11,%RAX,1),%ZMM14 |
(103) 0x419a50 VMULPD (%RSI,%RAX,1),%ZMM10,%ZMM11 |
(103) 0x419a57 VSUBPD (%R9,%RAX,1),%ZMM14,%ZMM15 |
(103) 0x419a5e VADDPD (%R8,%RAX,1),%ZMM10,%ZMM0 |
(103) 0x419a65 VSUBPD (%RDI,%RAX,1),%ZMM0,%ZMM1 |
(103) 0x419a6c VSUBPD (%R10,%RAX,1),%ZMM11,%ZMM12 |
(103) 0x419a73 VFMADD132PD (%RCX,%RAX,1),%ZMM15,%ZMM11 |
(103) 0x419a7a VADDPD (%RBX,%RAX,1),%ZMM12,%ZMM13 |
(103) 0x419a81 VDIVPD %ZMM13,%ZMM11,%ZMM4 |
(103) 0x419a87 VDIVPD %ZMM1,%ZMM13,%ZMM2 |
(103) 0x419a8d VMOVUPD %ZMM2,(%RSI,%RAX,1) |
(103) 0x419a94 VMOVUPD %ZMM4,(%RCX,%RAX,1) |
(103) 0x419a9b VMOVUPD 0x40(%R13,%RAX,1),%ZMM7 |
(103) 0x419aa3 VMOVUPD 0x40(%R11,%RAX,1),%ZMM5 |
(103) 0x419aab VMULPD 0x40(%RSI,%RAX,1),%ZMM7,%ZMM6 |
(103) 0x419ab3 VSUBPD 0x40(%R9,%RAX,1),%ZMM5,%ZMM9 |
(103) 0x419abb VADDPD 0x40(%R8,%RAX,1),%ZMM7,%ZMM10 |
(103) 0x419ac3 VSUBPD 0x40(%RDI,%RAX,1),%ZMM10,%ZMM11 |
(103) 0x419acb VSUBPD 0x40(%R10,%RAX,1),%ZMM6,%ZMM3 |
(103) 0x419ad3 VFMADD132PD 0x40(%RCX,%RAX,1),%ZMM9,%ZMM6 |
(103) 0x419adb VADDPD 0x40(%RBX,%RAX,1),%ZMM3,%ZMM8 |
(103) 0x419ae3 VDIVPD %ZMM11,%ZMM8,%ZMM12 |
(103) 0x419ae9 VDIVPD %ZMM8,%ZMM6,%ZMM13 |
(103) 0x419aef VMOVUPD %ZMM12,0x40(%RSI,%RAX,1) |
(103) 0x419af7 VMOVUPD %ZMM13,0x40(%RCX,%RAX,1) |
(103) 0x419aff SUB $-0x80,%RAX |
(103) 0x419b03 CMP %RAX,0x68(%RSP) |
(103) 0x419b08 JNE 419a41 |
(102) 0x419b0e MOV %R15,0xb8(%RSP) |
(102) 0x419b16 MOV 0x3c(%RSP),%R10D |
(102) 0x419b1b MOV 0x9c(%RSP),%ESI |
(102) 0x419b22 MOV %EDX,%R13D |
(102) 0x419b25 AND $-0x8,%R13D |
(102) 0x419b29 ADD %R13D,%R10D |
(102) 0x419b2c LEA (%R13,%RSI,1),%ESI |
(102) 0x419b31 TEST $0x7,%DL |
(102) 0x419b34 JE 419e53 |
(102) 0x419b3a SUB %R13D,%EDX |
(102) 0x419b3d LEA -0x1(%RDX),%EBX |
(102) 0x419b40 CMP $0x2,%EBX |
(102) 0x419b43 JBE 419c22 |
(102) 0x419b49 MOVSXD 0x9c(%RSP),%RAX |
(102) 0x419b51 MOV 0x70(%RSP),%RCX |
(102) 0x419b56 MOV 0x90(%RSP),%RDI |
(102) 0x419b5e MOV 0x78(%RSP),%R9 |
(102) 0x419b63 LEA (%RCX,%RAX,1),%R11 |
(102) 0x419b67 MOV 0xa0(%RSP),%R15 |
(102) 0x419b6f MOV 0x58(%RSP),%R8 |
(102) 0x419b74 ADD %RAX,%RDI |
(102) 0x419b77 ADD %R13,%R11 |
(102) 0x419b7a MOV 0x60(%RSP),%RCX |
(102) 0x419b7f ADD %R13,%RDI |
(102) 0x419b82 LEA (%R9,%R11,8),%RBX |
(102) 0x419b86 LEA (%R8,%RAX,1),%R9 |
(102) 0x419b8a LEA (%R15,%RDI,8),%R11 |
(102) 0x419b8e MOV 0xa8(%RSP),%RDI |
(102) 0x419b96 MOV 0x80(%RSP),%R15 |
(102) 0x419b9e LEA (%RCX,%RAX,1),%R8 |
(102) 0x419ba2 ADD %R13,%R9 |
(102) 0x419ba5 ADD %R13,%R8 |
(102) 0x419ba8 ADD %RAX,%RDI |
(102) 0x419bab ADD %R15,%RAX |
(102) 0x419bae VMOVUPD 0x8(%R12,%R8,8),%YMM4 |
(102) 0x419bb5 VMOVUPD (%R12,%R8,8),%YMM1 |
(102) 0x419bbb ADD %R13,%RDI |
(102) 0x419bbe ADD %R13,%RAX |
(102) 0x419bc1 MOV 0x88(%RSP),%R13 |
(102) 0x419bc9 VMOVUPD (%R13,%RAX,8),%YMM14 |
(102) 0x419bd0 MOV 0xb0(%RSP),%RAX |
(102) 0x419bd8 VMULPD (%RBX),%YMM14,%YMM15 |
(102) 0x419bdc VADDPD (%R14,%RDI,8),%YMM14,%YMM7 |
(102) 0x419be2 VSUBPD 0x8(%R14,%RDI,8),%YMM7,%YMM6 |
(102) 0x419be9 VADDPD (%RAX,%R9,8),%YMM15,%YMM0 |
(102) 0x419bef VFMSUB132PD (%R11),%YMM4,%YMM15 |
(102) 0x419bf4 VSUBPD 0x8(%RAX,%R9,8),%YMM0,%YMM2 |
(102) 0x419bfb VADDPD %YMM15,%YMM1,%YMM8 |
(102) 0x419c00 VDIVPD %YMM6,%YMM2,%YMM3 |
(102) 0x419c04 VDIVPD %YMM2,%YMM8,%YMM5 |
(102) 0x419c08 VMOVUPD %YMM3,(%RBX) |
(102) 0x419c0c VMOVUPD %YMM5,(%R11) |
(102) 0x419c11 TEST $0x3,%DL |
(102) 0x419c14 JE 419e53 |
(102) 0x419c1a AND $-0x4,%EDX |
(102) 0x419c1d ADD %EDX,%R10D |
(102) 0x419c20 ADD %EDX,%ESI |
(102) 0x419c22 MOV 0x80(%RSP),%RCX |
(102) 0x419c2a MOVSXD %ESI,%RDX |
(102) 0x419c2d MOV 0x88(%RSP),%RDI |
(102) 0x419c35 LEA 0x1(%RSI),%EAX |
(102) 0x419c38 MOV 0x70(%RSP),%R9 |
(102) 0x419c3d MOV 0x78(%RSP),%RBX |
(102) 0x419c42 CLTQ |
(102) 0x419c44 LEA (%RCX,%RDX,1),%R8 |
(102) 0x419c48 MOV 0xb0(%RSP),%R13 |
(102) 0x419c50 VMOVSD (%RDI,%R8,8),%XMM9 |
(102) 0x419c56 ADD %RDX,%R9 |
(102) 0x419c59 MOV 0x90(%RSP),%RDI |
(102) 0x419c61 LEA (%RBX,%R9,8),%R11 |
(102) 0x419c65 MOV 0x58(%RSP),%RBX |
(102) 0x419c6a MOV 0xa0(%RSP),%R8 |
(102) 0x419c72 VMULSD (%R11),%XMM9,%XMM10 |
(102) 0x419c77 ADD %RDX,%RDI |
(102) 0x419c7a LEA (%RBX,%RDX,1),%RCX |
(102) 0x419c7e LEA (%RAX,%RBX,1),%R15 |
(102) 0x419c82 LEA (%R13,%R15,8),%R9 |
(102) 0x419c87 VADDSD (%R13,%RCX,8),%XMM10,%XMM11 |
(102) 0x419c8e MOV 0x60(%RSP),%R13 |
(102) 0x419c93 LEA (%R8,%RDI,8),%RCX |
(102) 0x419c97 LEA (%R13,%RDX,1),%R15 |
(102) 0x419c9c LEA (%R13,%RAX,1),%RDI |
(102) 0x419ca1 VMOVSD (%R12,%R15,8),%XMM13 |
(102) 0x419ca7 LEA (%R12,%RDI,8),%R8 |
(102) 0x419cab MOV 0xa8(%RSP),%R15 |
(102) 0x419cb3 VMOVSD (%R8),%XMM14 |
(102) 0x419cb8 VSUBSD (%R9),%XMM11,%XMM12 |
(102) 0x419cbd ADD %R15,%RDX |
(102) 0x419cc0 MOV %R15,%RDI |
(102) 0x419cc3 VADDSD (%R14,%RDX,8),%XMM9,%XMM15 |
(102) 0x419cc9 VFMSUB132SD (%RCX),%XMM14,%XMM10 |
(102) 0x419cce LEA 0x1(%R10),%EDX |
(102) 0x419cd2 ADD %RAX,%RDI |
(102) 0x419cd5 LEA (%R14,%RDI,8),%RDI |
(102) 0x419cd9 VSUBSD (%RDI),%XMM15,%XMM0 |
(102) 0x419cdd VADDSD %XMM13,%XMM10,%XMM1 |
(102) 0x419ce2 VDIVSD %XMM0,%XMM12,%XMM2 |
(102) 0x419ce6 VDIVSD %XMM12,%XMM1,%XMM4 |
(102) 0x419ceb VMOVSD %XMM2,(%R11) |
(102) 0x419cf0 MOV 0x98(%RSP),%R11D |
(102) 0x419cf8 VMOVSD %XMM4,(%RCX) |
(102) 0x419cfc CMP %R11D,%EDX |
(102) 0x419cff JAE 419e53 |
(102) 0x419d05 MOV 0x70(%RSP),%RCX |
(102) 0x419d0a MOV 0x78(%RSP),%R15 |
(102) 0x419d0f ADD $0x2,%R10D |
(102) 0x419d13 MOV 0x80(%RSP),%RDX |
(102) 0x419d1b MOV 0x88(%RSP),%R11 |
(102) 0x419d23 ADD %RAX,%RCX |
(102) 0x419d26 VMOVSD (%R8),%XMM5 |
(102) 0x419d2b LEA (%R15,%RCX,8),%RCX |
(102) 0x419d2f LEA (%RAX,%RDX,1),%R15 |
(102) 0x419d33 VMOVSD (%R11,%R15,8),%XMM7 |
(102) 0x419d39 LEA 0x2(%RSI),%EDX |
(102) 0x419d3c MOV 0xb0(%RSP),%R15 |
(102) 0x419d44 MOVSXD %EDX,%RDX |
(102) 0x419d47 VMULSD (%RCX),%XMM7,%XMM6 |
(102) 0x419d4b LEA (%RBX,%RDX,1),%R11 |
(102) 0x419d4f VADDSD (%RDI),%XMM7,%XMM10 |
(102) 0x419d53 LEA (%R15,%R11,8),%R11 |
(102) 0x419d57 MOV 0xa0(%RSP),%R15 |
(102) 0x419d5f MOV 0x98(%RSP),%EDI |
(102) 0x419d66 VSUBSD (%R11),%XMM6,%XMM3 |
(102) 0x419d6b VADDSD (%R9),%XMM3,%XMM8 |
(102) 0x419d70 MOV 0x90(%RSP),%R9 |
(102) 0x419d78 ADD %R9,%RAX |
(102) 0x419d7b LEA (%R13,%RDX,1),%R9 |
(102) 0x419d80 LEA (%R12,%R9,8),%R9 |
(102) 0x419d84 LEA (%R15,%RAX,8),%RAX |
(102) 0x419d88 MOV 0xa8(%RSP),%R15 |
(102) 0x419d90 VSUBSD (%R9),%XMM5,%XMM9 |
(102) 0x419d95 LEA (%R15,%RDX,1),%R8 |
(102) 0x419d99 LEA (%R14,%R8,8),%R8 |
(102) 0x419d9d VFMADD132SD (%RAX),%XMM9,%XMM6 |
(102) 0x419da2 VSUBSD (%R8),%XMM10,%XMM11 |
(102) 0x419da7 VDIVSD %XMM11,%XMM8,%XMM12 |
(102) 0x419dac VDIVSD %XMM8,%XMM6,%XMM13 |
(102) 0x419db1 VMOVSD %XMM12,(%RCX) |
(102) 0x419db5 VMOVSD %XMM13,(%RAX) |
(102) 0x419db9 CMP %EDI,%R10D |
(102) 0x419dbc JAE 419e53 |
(102) 0x419dc2 MOV 0x70(%RSP),%RCX |
(102) 0x419dc7 MOV 0x78(%RSP),%R10 |
(102) 0x419dcc ADD $0x3,%ESI |
(102) 0x419dcf MOV 0x80(%RSP),%RDI |
(102) 0x419dd7 MOVSXD %ESI,%RSI |
(102) 0x419dda VMOVSD (%R9),%XMM1 |
(102) 0x419ddf ADD %RDX,%RCX |
(102) 0x419de2 ADD %RSI,%RBX |
(102) 0x419de5 ADD %RSI,%R13 |
(102) 0x419de8 ADD %RSI,%R15 |
(102) 0x419deb LEA (%R10,%RCX,8),%RAX |
(102) 0x419def MOV 0x88(%RSP),%RCX |
(102) 0x419df7 ADD %RDX,%RDI |
(102) 0x419dfa MOV 0xb0(%RSP),%R10 |
(102) 0x419e02 VSUBSD (%R12,%R13,8),%XMM1,%XMM4 |
(102) 0x419e08 VMOVSD (%RCX,%RDI,8),%XMM14 |
(102) 0x419e0d MOV 0xa0(%RSP),%RDI |
(102) 0x419e15 VMULSD (%RAX),%XMM14,%XMM15 |
(102) 0x419e19 VADDSD (%R8),%XMM14,%XMM7 |
(102) 0x419e1e VSUBSD (%R14,%R15,8),%XMM7,%XMM6 |
(102) 0x419e24 VSUBSD (%R10,%RBX,8),%XMM15,%XMM0 |
(102) 0x419e2a VADDSD (%R11),%XMM0,%XMM2 |
(102) 0x419e2f MOV 0x90(%RSP),%R11 |
(102) 0x419e37 ADD %RDX,%R11 |
(102) 0x419e3a LEA (%RDI,%R11,8),%RBX |
(102) 0x419e3e VDIVSD %XMM6,%XMM2,%XMM3 |
(102) 0x419e42 VFMADD132SD (%RBX),%XMM4,%XMM15 |
(102) 0x419e47 VDIVSD %XMM2,%XMM15,%XMM8 |
(102) 0x419e4b VMOVSD %XMM3,(%RAX) |
(102) 0x419e4f VMOVSD %XMM8,(%RBX) |
(102) 0x419e53 MOV 0x98(%RSP),%R10D |
(102) 0x419e5b INCQ 0xb8(%RSP) |
(102) 0x419e63 MOV 0xb8(%RSP),%R12 |
(102) 0x419e6b ADD $0,%R12D |
(102) 0x419e6f CMP %R12D,0x48(%RSP) |
(102) 0x419e74 JLE 419e98 |
(102) 0x419e76 MOV 0x40(%RSP),%ECX |
(102) 0x419e7a MOV 0x44(%RSP),%R14D |
(102) 0x419e7f MOV 0x4c(%RSP),%R9D |
(102) 0x419e84 MOV %R14D,0x9c(%RSP) |
(102) 0x419e8c SUB %R10D,%ECX |
(102) 0x419e8f JMP 419868 |
0x419e94 NOPL (%RAX) |
0x419e98 VZEROUPPER |
0x419e9b LEA -0x28(%RBP),%RSP |
0x419e9f POP %RBX |
0x419ea0 POP %R12 |
0x419ea2 POP %R13 |
0x419ea4 POP %R14 |
0x419ea6 POP %R15 |
0x419ea8 POP %RBP |
0x419ea9 RET |
0x419eaa NOPW (%RAX,%RAX,1) |
(102) 0x419eb0 MOV 0x9c(%RSP),%ESI |
(102) 0x419eb7 XOR %R13D,%R13D |
(102) 0x419eba JMP 419b3a |
0x419ebf INC %ECX |
0x419ec1 XOR %EDX,%EDX |
0x419ec3 JMP 4197e5 |
0x419ec8 NOPL (%RAX,%RAX,1) |
Path / |
Source file and lines | advec_cell.cpp:117-125 |
Module | exec |
nb instructions | 85 |
nb uops | 95 |
loop length | 309 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 15.83 cycles |
front end | 15.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.10 | 8.00 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
cycles | 6.10 | 11.93 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.08-15.21 |
Stall cycles | 0.00 |
Front-end | 15.83 |
Dispatch | 11.93 |
DIV/SQRT | 12.00 |
Overall L1 | 15.83 |
all | 3% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 12% |
all | 8% |
load | 9% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x3c(%RDI),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x34(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %ECX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 419e9b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %ECX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x2(%RDX),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 419e9b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %ESI,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4046c0 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4045b0 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x4c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 419ebf <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x75f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %ECX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RCX,%R10,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 419e9b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x44(%RSP),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x4c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV 0x10(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x20(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EDX,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD %R15D,%R8 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R11D,0x9c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R11D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4197e5 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | advec_cell.cpp:117-125 |
Module | exec |
nb instructions | 85 |
nb uops | 95 |
loop length | 309 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 13 |
micro-operation queue | 15.83 cycles |
front end | 15.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.10 | 8.00 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
cycles | 6.10 | 11.93 | 6.67 | 6.67 | 10.00 | 6.07 | 5.90 | 10.00 | 10.00 | 10.00 | 5.93 | 6.67 |
Cycles executing div or sqrt instructions | 12.00 |
FE+BE cycles | 15.08-15.21 |
Stall cycles | 0.00 |
Front-end | 15.83 |
Dispatch | 11.93 |
DIV/SQRT | 12.00 |
Overall L1 | 15.83 |
all | 3% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 12% |
all | 8% |
load | 9% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
AND $-0x40,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB $0xc0,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV 0x38(%RDI),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x3c(%RDI),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x30(%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x34(%RDI),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x2,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RAX),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
INC %ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ECX,0x48(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,0x44(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %ECX,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 419e9b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %ECX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x2(%RDX),%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
SUB %R15D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %R14D,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 419e9b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RDI,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R14D,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SUB %ESI,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,0x4c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 4046c0 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 4045b0 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x4c(%RSP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R13D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
DIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
MOV %EAX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 419ebf <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x75f> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %ECX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
LEA (%R8,%RDX,1),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA (%RCX,%R10,1),%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %R9D,0x40(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 419e9b <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x73b> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10D,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x44(%RSP),%R11D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RBX),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DIVL 0x4c(%RSP) | 5 | 0 | 3 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 11-16 | 6 |
MOV 0x10(%RBX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x28(%RBX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RSI,0x30(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R13,0x20(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RDI,0x18(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R12,0x10(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R14D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x20(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,0x28(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RBX,0x8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RAX,%R15,1),%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
ADD %EDX,%R11D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOVSXD %R15D,%R8 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV %R11D,0x9c(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %R11D,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %R8,0xb8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
LEA -0x28(%RBP),%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
INC %ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4197e5 <_Z17advec_cell_kerneliiiiiiRN6clover8Buffer1DIdEES2_RNS_8Buffer2DIdEES5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_S5_._omp_fn.3.lto_priv.0+0x85> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼advec_cell_kernel(int, int, int, int, int, int, clover::Buffer1D | 2.66 | 0.85 |
▼Loop 102 - advec_cell.cpp:120-125 - exec– | 0.01 | 0 |
○Loop 103 - advec_cell.cpp:120-125 - exec | 2.65 | 0.84 |