OV - - Function .omp_outlined..362

	Function: .omp_outlined..362	Module: exec	Source: flux_calc.cpp:36-40 [...]	Coverage: 2.93%

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/flux_calc.cpp: 36 - 40

--------------------------------------------------------------------------------

36: #pragma omp parallel for simd collapse(2)

37:   for (int j = (y_min + 1); j < (y_max + 1 + 2); j++) {

38:     for (int i = (x_min + 1); i < (x_max + 1 + 2); i++) {

39:       vol_flux_x(i, j) = 0.25 * dt * xarea(i, j) * (xvel0(i, j) + xvel0(i + 0, j + 1) + xvel1(i, j) + xvel1(i + 0, j + 1));

40:       vol_flux_y(i, j) = 0.25 * dt * yarea(i, j) * (yvel0(i, j) + yvel0(i + 1, j + 0) + yvel1(i, j) + yvel1(i + 1, j + 0));

0x245e60 PUSH	%RBP

0x245e61 MOV	%RSP,%RBP

0x245e64 PUSH	%R15

0x245e66 PUSH	%R14

0x245e68 PUSH	%R13

0x245e6a PUSH	%R12

0x245e6c PUSH	%RBX

0x245e6d SUB	$0x118,%RSP

0x245e74 MOV	(%RDX),%EBX

0x245e76 INC	%EBX

0x245e78 MOV	(%RCX),%EAX

0x245e7a ADD	$0x3,%EAX

0x245e7d SUB	%EBX,%EAX

0x245e7f JLE	246597

0x245e85 MOV	(%R8),%ECX

0x245e88 INC	%ECX

0x245e8a MOV	(%R9),%R12D

0x245e8d ADD	$0x3,%R12D

0x245e91 CMP	%ECX,%R12D

0x245e94 JLE	246597

0x245e9a MOV	%ECX,-0x2c(%RBP)

0x245e9d SUB	%ECX,%R12D

0x245ea0 MOV	%RAX,%R14

0x245ea3 IMUL	%R12,%R14

0x245ea7 DEC	%R14

0x245eaa MOVQ	$0,-0xe0(%RBP)

0x245eb5 MOV	%R14,-0x50(%RBP)

0x245eb9 MOVQ	$0x1,-0x140(%RBP)

0x245ec4 MOVL	$0,-0x58(%RBP)

0x245ecb MOV	(%RDI),%ESI

0x245ecd SUB	$0x8,%RSP

0x245ed1 LEA	-0x140(%RBP),%RAX

0x245ed8 LEA	-0x58(%RBP),%RCX

0x245edc LEA	-0xe0(%RBP),%R8

0x245ee3 LEA	-0x50(%RBP),%R9

0x245ee7 MOV	$0x212408,%EDI

0x245eec MOV	%ESI,-0x54(%RBP)

0x245eef MOV	$0x22,%EDX

0x245ef4 PUSH	$0x1

0x245ef6 PUSH	$0x1

0x245ef8 PUSH	%RAX

0x245ef9 CALL	261360 <@plt_start@+0x4f0>

0x245efe MOV	%R14,%R8

0x245f01 ADD	$0x20,%RSP

0x245f05 MOV	-0x50(%RBP),%RAX

0x245f09 CMP	%R14,%RAX

0x245f0c CMOVL	%RAX,%R8

0x245f10 MOV	%R8,-0x50(%RBP)

0x245f14 MOV	-0xe0(%RBP),%R10

0x245f1b CMP	%R8,%R10

0x245f1e JG	246587

0x245f24 MOV	0x50(%RBP),%RAX

0x245f28 MOV	0x48(%RBP),%RCX

0x245f2c MOV	0x40(%RBP),%RDX

0x245f30 MOV	0x30(%RBP),%RSI

0x245f34 MOV	0x28(%RBP),%RDI

0x245f38 MOV	%R8,-0x80(%RBP)

0x245f3c MOV	0x20(%RBP),%R8

0x245f40 MOV	0x10(%RBP),%R9

0x245f44 MOV	(%R8),%R11

0x245f47 MOV	0x10(%R8),%R15

0x245f4b MOV	(%RDI),%R13

0x245f4e MOV	%R13,-0x40(%RBP)

0x245f52 MOV	0x10(%RDI),%R13

0x245f56 MOV	(%RSI),%RDI

0x245f59 MOV	%RDI,-0x38(%RBP)

0x245f5d MOV	0x10(%RSI),%RSI

0x245f61 MOV	%RSI,-0xd8(%RBP)

0x245f68 MOV	(%R9),%RSI

0x245f6b MOV	%RSI,-0xd0(%RBP)

0x245f72 MOV	0x10(%R9),%RSI

0x245f76 MOV	%RSI,-0xc8(%RBP)

0x245f7d MOV	(%RDX),%RSI

0x245f80 MOV	%RSI,-0xc0(%RBP)

0x245f87 MOV	0x10(%RDX),%RDX

0x245f8b MOV	%RDX,-0xb8(%RBP)

0x245f92 MOV	(%RCX),%RDX

0x245f95 MOV	%RDX,-0xb0(%RBP)

0x245f9c MOV	0x10(%RCX),%RCX

0x245fa0 MOV	%RCX,-0xa8(%RBP)

0x245fa7 MOV	(%RAX),%RCX

0x245faa MOV	%RCX,-0xa0(%RBP)

0x245fb1 MOV	0x10(%RAX),%RAX

0x245fb5 MOV	%RAX,-0x98(%RBP)

0x245fbc MOV	0x38(%RBP),%RAX

0x245fc0 MOV	(%RAX),%RCX

0x245fc3 MOV	%RCX,-0x90(%RBP)

0x245fca MOV	0x10(%RAX),%RAX

0x245fce MOV	%RAX,-0x88(%RBP)

0x245fd5 MOV	-0x80(%RBP),%RAX

0x245fd9 SUB	%R10,%RAX

0x245fdc INC	%RAX

0x245fdf CMP	$0x4,%RAX

0x245fe3 JAE	245ff5

0x245fe5 MOV	%R11,%R8

0x245fe8 MOV	-0x40(%RBP),%RDI

0x245fec MOV	-0x38(%RBP),%R9

0x245ff0 JMP	2466fc

0x245ff5 MOV	%R13,-0x60(%RBP)

0x245ff9 MOV	%R15,-0x68(%RBP)

0x245ffd MOV	%R11,-0x70(%RBP)

0x246001 MOV	%RBX,-0x78(%RBP)

0x246005 MOV	%RAX,-0xf0(%RBP)

0x24600c AND	$-0x4,%RAX

0x246010 VMOVSD	-0x43398(%RIP),%XMM0

0x246018 MOV	%R10,%RCX

0x24601b MOV	%RAX,-0xe8(%RBP)

0x246022 MOV	%RAX,%RDX

0x246025 MOV	%R12,-0x100(%RBP)

0x24602c MOV	%R10,-0xf8(%RBP)

0x246033 JMP	2464ac

0x246038 NOPL	(%RAX,%RAX,1)

(277) 0x246040 MOV	%R15,%RAX

(277) 0x246043 CQTO

(277) 0x246045 IDIV	%R12

(277) 0x246048 MOV	-0x2c(%RBP),%R8D

(277) 0x24604c MOV	%RAX,-0x120(%RBP)

(277) 0x246053 MOV	-0x78(%RBP),%RSI

(277) 0x246057 LEA	(%RSI,%RDI,1),%ECX

(277) 0x24605a MOV	%RDI,-0x48(%RBP)

(277) 0x24605e LEA	(%RSI,%RBX,1),%EDI

(277) 0x246061 LEA	(%RSI,%R10,1),%R9D

(277) 0x246065 MOV	%R10,-0x128(%RBP)

(277) 0x24606c LEA	(%RSI,%RAX,1),%R10D

(277) 0x246070 ADD	%R8D,%R11D

(277) 0x246073 ADD	%R8D,%R13D

(277) 0x246076 ADD	%R8D,%R14D

(277) 0x246079 ADD	%R8D,%EDX

(277) 0x24607c MOV	0x18(%RBP),%R8

(277) 0x246080 VMULSD	(%R8),%XMM0,%XMM1

(277) 0x246085 VBROADCASTSD	%XMM1,%YMM1

(277) 0x24608a MOV	%RBX,-0x110(%RBP)

(277) 0x246091 MOVSXD	%R11D,%RBX

(277) 0x246094 MOVSXD	%R13D,%R12

(277) 0x246097 MOVSXD	%R14D,%R11

(277) 0x24609a MOVSXD	%EDX,%R15

(277) 0x24609d MOVSXD	%ECX,%R8

(277) 0x2460a0 MOVSXD	%EDI,%R13

(277) 0x2460a3 MOVSXD	%R9D,%RAX

(277) 0x2460a6 MOVSXD	%R10D,%R14

(277) 0x2460a9 MOV	-0x70(%RBP),%RDI

(277) 0x2460ad MOV	%RDI,%RCX

(277) 0x2460b0 IMUL	%RAX,%RCX

(277) 0x2460b4 ADD	%R11,%RCX

(277) 0x2460b7 MOV	-0x68(%RBP),%R10

(277) 0x2460bb VMOVSD	(%R10,%RCX,8),%XMM2

(277) 0x2460c1 MOV	%RDI,%RCX

(277) 0x2460c4 IMUL	%R14,%RCX

(277) 0x2460c8 ADD	%R15,%RCX

(277) 0x2460cb VMOVHPD	(%R10,%RCX,8),%XMM2,%XMM2

(277) 0x2460d1 MOV	%RDI,%RCX

(277) 0x2460d4 IMUL	%R8,%RCX

(277) 0x2460d8 MOV	%R8,-0x118(%RBP)

(277) 0x2460df ADD	%RBX,%RCX

(277) 0x2460e2 VMOVSD	(%R10,%RCX,8),%XMM3

(277) 0x2460e8 MOV	%RDI,%RCX

(277) 0x2460eb IMUL	%R13,%RCX

(277) 0x2460ef ADD	%R12,%RCX

(277) 0x2460f2 VMOVHPD	(%R10,%RCX,8),%XMM3,%XMM3

(277) 0x2460f8 VINSERTF128	$0x1,%XMM2,%YMM3,%YMM2

(277) 0x2460fe VMULPD	%YMM2,%YMM1,%YMM1

(277) 0x246102 MOV	-0x40(%RBP),%RDX

(277) 0x246106 MOV	%RDX,%RCX

(277) 0x246109 IMUL	%RAX,%RCX

(277) 0x24610d MOV	%RAX,%R9

(277) 0x246110 MOV	%RAX,-0x108(%RBP)

(277) 0x246117 ADD	%R11,%RCX

(277) 0x24611a MOV	-0x60(%RBP),%RAX

(277) 0x24611e VMOVSD	(%RAX,%RCX,8),%XMM2

(277) 0x246123 MOV	%RDX,%RCX

(277) 0x246126 IMUL	%R14,%RCX

(277) 0x24612a ADD	%R15,%RCX

(277) 0x24612d VMOVHPD	(%RAX,%RCX,8),%XMM2,%XMM2

(277) 0x246132 MOV	%RDX,%RCX

(277) 0x246135 IMUL	%R8,%RCX

(277) 0x246139 ADD	%RBX,%RCX

(277) 0x24613c VMOVSD	(%RAX,%RCX,8),%XMM3

(277) 0x246141 MOV	%RDX,%RCX

(277) 0x246144 IMUL	%R13,%RCX

(277) 0x246148 ADD	%R12,%RCX

(277) 0x24614b VMOVHPD	(%RAX,%RCX,8),%XMM3,%XMM3

(277) 0x246150 VINSERTF128	$0x1,%XMM2,%YMM3,%YMM2

(277) 0x246156 MOV	-0x48(%RBP),%RCX

(277) 0x24615a ADD	%ESI,%ECX

(277) 0x24615c INC	%ECX

(277) 0x24615e MOV	-0x110(%RBP),%RDI

(277) 0x246165 LEA	0x1(%RSI,%RDI,1),%EDI

(277) 0x246169 MOV	%EDI,-0x48(%RBP)

(277) 0x24616c MOV	-0x128(%RBP),%RDI

(277) 0x246173 LEA	0x1(%RSI,%RDI,1),%EDI

(277) 0x246177 MOV	-0x120(%RBP),%R8

(277) 0x24617e LEA	0x1(%RSI,%R8,1),%ESI

(277) 0x246183 MOVSXD	%ECX,%R8

(277) 0x246186 MOVSXD	%EDI,%R10

(277) 0x246189 MOVSXD	%ESI,%RDI

(277) 0x24618c MOV	%RDX,%RCX

(277) 0x24618f IMUL	%R10,%RCX

(277) 0x246193 ADD	%R11,%RCX

(277) 0x246196 VMOVSD	(%RAX,%RCX,8),%XMM3

(277) 0x24619b MOV	%RDX,%RCX

(277) 0x24619e IMUL	%RDI,%RCX

(277) 0x2461a2 ADD	%R15,%RCX

(277) 0x2461a5 VMOVHPD	(%RAX,%RCX,8),%XMM3,%XMM3

(277) 0x2461aa MOVSXD	-0x48(%RBP),%RCX

(277) 0x2461ae MOV	%RDX,%RSI

(277) 0x2461b1 IMUL	%R8,%RSI

(277) 0x2461b5 ADD	%RBX,%RSI

(277) 0x2461b8 VMOVSD	(%RAX,%RSI,8),%XMM4

(277) 0x2461bd IMUL	%RCX,%RDX

(277) 0x2461c1 ADD	%R12,%RDX

(277) 0x2461c4 VMOVHPD	(%RAX,%RDX,8),%XMM4,%XMM4

(277) 0x2461c9 VINSERTF128	$0x1,%XMM3,%YMM4,%YMM3

(277) 0x2461cf MOV	-0x38(%RBP),%RAX

(277) 0x2461d3 MOV	%RAX,%RSI

(277) 0x2461d6 IMUL	%R9,%RSI

(277) 0x2461da ADD	%R11,%RSI

(277) 0x2461dd MOV	-0xd8(%RBP),%RDX

(277) 0x2461e4 VMOVSD	(%RDX,%RSI,8),%XMM4

(277) 0x2461e9 MOV	%RAX,%RSI

(277) 0x2461ec IMUL	%R14,%RSI

(277) 0x2461f0 ADD	%R15,%RSI

(277) 0x2461f3 VMOVHPD	(%RDX,%RSI,8),%XMM4,%XMM4

(277) 0x2461f8 VADDPD	%YMM3,%YMM2,%YMM2

(277) 0x2461fc MOV	%RAX,%RSI

(277) 0x2461ff MOV	-0x118(%RBP),%R9

(277) 0x246206 IMUL	%R9,%RSI

(277) 0x24620a ADD	%RBX,%RSI

(277) 0x24620d VMOVSD	(%RDX,%RSI,8),%XMM3

(277) 0x246212 MOV	%RAX,%RSI

(277) 0x246215 IMUL	%R13,%RSI

(277) 0x246219 ADD	%R12,%RSI

(277) 0x24621c VMOVHPD	(%RDX,%RSI,8),%XMM3,%XMM3

(277) 0x246221 VINSERTF128	$0x1,%XMM4,%YMM3,%YMM3

(277) 0x246227 VADDPD	%YMM3,%YMM2,%YMM2

(277) 0x24622b IMUL	%RAX,%R8

(277) 0x24622f IMUL	%RAX,%RCX

(277) 0x246233 IMUL	%RAX,%R10

(277) 0x246237 IMUL	%RAX,%RDI

(277) 0x24623b ADD	%RBX,%R8

(277) 0x24623e ADD	%R12,%RCX

(277) 0x246241 ADD	%R11,%R10

(277) 0x246244 ADD	%R15,%RDI

(277) 0x246247 VMOVSD	(%RDX,%R10,8),%XMM3

(277) 0x24624d VMOVHPD	(%RDX,%RDI,8),%XMM3,%XMM3

(277) 0x246252 VMOVSD	(%RDX,%R8,8),%XMM4

(277) 0x246258 VMOVHPD	(%RDX,%RCX,8),%XMM4,%XMM4

(277) 0x24625d VINSERTF128	$0x1,%XMM3,%YMM4,%YMM3

(277) 0x246263 VADDPD	%YMM3,%YMM2,%YMM2

(277) 0x246267 VMULPD	%YMM2,%YMM1,%YMM1

(277) 0x24626b MOV	-0xd0(%RBP),%RDI

(277) 0x246272 MOV	%RDI,%RAX

(277) 0x246275 MOV	%R9,%R8

(277) 0x246278 IMUL	%R9,%RAX

(277) 0x24627c MOV	%RDI,%RCX

(277) 0x24627f IMUL	%R13,%RCX

(277) 0x246283 MOV	%RDI,%RSI

(277) 0x246286 MOV	-0x108(%RBP),%R9

(277) 0x24628d IMUL	%R9,%RSI

(277) 0x246291 IMUL	%R14,%RDI

(277) 0x246295 ADD	%RBX,%RAX

(277) 0x246298 ADD	%R12,%RCX

(277) 0x24629b ADD	%R11,%RSI

(277) 0x24629e ADD	%R15,%RDI

(277) 0x2462a1 MOV	-0xc8(%RBP),%RDX

(277) 0x2462a8 VMOVLPD	%XMM1,(%RDX,%RAX,8)

(277) 0x2462ad VMOVHPD	%XMM1,(%RDX,%RCX,8)

(277) 0x2462b2 VEXTRACTF128	$0x1,%YMM1,%XMM1

(277) 0x2462b8 VMOVLPD	%XMM1,(%RDX,%RSI,8)

(277) 0x2462bd VMOVHPD	%XMM1,(%RDX,%RDI,8)

(277) 0x2462c2 MOV	-0xc0(%RBP),%RDI

(277) 0x2462c9 MOV	%RDI,%RAX

(277) 0x2462cc IMUL	%R8,%RAX

(277) 0x2462d0 MOV	%RDI,%RCX

(277) 0x2462d3 IMUL	%R13,%RCX

(277) 0x2462d7 MOV	%RDI,%RSI

(277) 0x2462da IMUL	%R9,%RSI

(277) 0x2462de IMUL	%R14,%RDI

(277) 0x2462e2 ADD	%RBX,%RAX

(277) 0x2462e5 ADD	%R11,%RSI

(277) 0x2462e8 ADD	%R15,%RDI

(277) 0x2462eb MOV	-0xb8(%RBP),%RDX

(277) 0x2462f2 VMOVSD	(%RDX,%RSI,8),%XMM1

(277) 0x2462f7 VMOVHPD	(%RDX,%RDI,8),%XMM1,%XMM1

(277) 0x2462fc ADD	%R12,%RCX

(277) 0x2462ff VMOVSD	(%RDX,%RAX,8),%XMM2

(277) 0x246304 VMOVHPD	(%RDX,%RCX,8),%XMM2,%XMM2

(277) 0x246309 MOV	-0xb0(%RBP),%RDI

(277) 0x246310 MOV	%RDI,%RAX

(277) 0x246313 IMUL	%R8,%RAX

(277) 0x246317 MOV	%RDI,%RCX

(277) 0x24631a MOV	%RDI,%RSI

(277) 0x24631d IMUL	%R9,%RSI

(277) 0x246321 IMUL	%R14,%RDI

(277) 0x246325 LEA	(%RSI,%R11,1),%R10

(277) 0x246329 MOV	-0xa8(%RBP),%RDX

(277) 0x246330 VMOVSD	(%RDX,%R10,8),%XMM3

(277) 0x246336 LEA	(%RDI,%R15,1),%R10

(277) 0x24633a VMOVHPD	(%RDX,%R10,8),%XMM3,%XMM3

(277) 0x246340 IMUL	%R13,%RCX

(277) 0x246344 LEA	(%RAX,%RBX,1),%R10

(277) 0x246348 VMOVSD	(%RDX,%R10,8),%XMM4

(277) 0x24634e LEA	(%RCX,%R12,1),%R10

(277) 0x246352 VMOVHPD	(%RDX,%R10,8),%XMM4,%XMM4

(277) 0x246358 LEA	0x1(%RAX,%RBX,1),%RAX

(277) 0x24635d LEA	0x1(%RSI,%R11,1),%RSI

(277) 0x246362 LEA	0x1(%RDI,%R15,1),%RDI

(277) 0x246367 VMOVSD	(%RDX,%RSI,8),%XMM5

(277) 0x24636c VMOVHPD	(%RDX,%RDI,8),%XMM5,%XMM5

(277) 0x246371 LEA	0x1(%RCX,%R12,1),%RCX

(277) 0x246376 VMOVSD	(%RDX,%RAX,8),%XMM6

(277) 0x24637b VMOVHPD	(%RDX,%RCX,8),%XMM6,%XMM6

(277) 0x246380 MOV	-0xa0(%RBP),%RDI

(277) 0x246387 MOV	%RDI,%RAX

(277) 0x24638a IMUL	%R8,%RAX

(277) 0x24638e MOV	%RDI,%RCX

(277) 0x246391 MOV	%RDI,%RSI

(277) 0x246394 IMUL	%R9,%RSI

(277) 0x246398 IMUL	%R14,%RDI

(277) 0x24639c LEA	(%RSI,%R11,1),%R10

(277) 0x2463a0 MOV	-0x98(%RBP),%RDX

(277) 0x2463a7 VMOVSD	(%RDX,%R10,8),%XMM7

(277) 0x2463ad LEA	(%RDI,%R15,1),%R10

(277) 0x2463b1 VMOVHPD	(%RDX,%R10,8),%XMM7,%XMM7

(277) 0x2463b7 IMUL	%R13,%RCX

(277) 0x2463bb LEA	(%RAX,%RBX,1),%R10

(277) 0x2463bf VMOVSD	(%RDX,%R10,8),%XMM8

(277) 0x2463c5 LEA	(%RCX,%R12,1),%R10

(277) 0x2463c9 VMOVHPD	(%RDX,%R10,8),%XMM8,%XMM8

(277) 0x2463cf LEA	0x1(%RSI,%R11,1),%RSI

(277) 0x2463d4 VMOVSD	(%RDX,%RSI,8),%XMM9

(277) 0x2463d9 LEA	0x1(%RDI,%R15,1),%RSI

(277) 0x2463de VMOVHPD	(%RDX,%RSI,8),%XMM9,%XMM9

(277) 0x2463e3 LEA	0x1(%RAX,%RBX,1),%RAX

(277) 0x2463e8 VMOVSD	(%RDX,%RAX,8),%XMM10

(277) 0x2463ed LEA	0x1(%RCX,%R12,1),%RAX

(277) 0x2463f2 VMOVHPD	(%RDX,%RAX,8),%XMM10,%XMM10

(277) 0x2463f7 MOV	-0x90(%RBP),%RAX

(277) 0x2463fe MOV	%R8,%RCX

(277) 0x246401 IMUL	%RAX,%RCX

(277) 0x246405 ADD	%RBX,%RCX

(277) 0x246408 IMUL	%RAX,%R13

(277) 0x24640c ADD	%R12,%R13

(277) 0x24640f MOV	%R9,%RDX

(277) 0x246412 IMUL	%RAX,%RDX

(277) 0x246416 ADD	%R11,%RDX

(277) 0x246419 IMUL	%RAX,%R14

(277) 0x24641d ADD	%R15,%R14

(277) 0x246420 VINSERTF128	$0x1,%XMM1,%YMM2,%YMM1

(277) 0x246426 MOV	0x18(%RBP),%RAX

(277) 0x24642a VMULSD	(%RAX),%XMM0,%XMM2

(277) 0x24642e VBROADCASTSD	%XMM2,%YMM2

(277) 0x246433 VMULPD	%YMM1,%YMM2,%YMM1

(277) 0x246437 VINSERTF128	$0x1,%XMM3,%YMM4,%YMM2

(277) 0x24643d VINSERTF128	$0x1,%XMM5,%YMM6,%YMM3

(277) 0x246443 VADDPD	%YMM3,%YMM2,%YMM2

(277) 0x246447 VINSERTF128	$0x1,%XMM7,%YMM8,%YMM3

(277) 0x24644d VADDPD	%YMM3,%YMM2,%YMM2

(277) 0x246451 VINSERTF128	$0x1,%XMM9,%YMM10,%YMM3

(277) 0x246457 VADDPD	%YMM3,%YMM2,%YMM2

(277) 0x24645b VMULPD	%YMM2,%YMM1,%YMM1

(277) 0x24645f MOV	-0x88(%RBP),%RAX

(277) 0x246466 VMOVLPD	%XMM1,(%RAX,%RCX,8)

(277) 0x24646b VMOVHPD	%XMM1,(%RAX,%R13,8)

(277) 0x246471 VEXTRACTF128	$0x1,%YMM1,%XMM1

(277) 0x246477 VMOVLPD	%XMM1,(%RAX,%RDX,8)

(277) 0x24647c VMOVHPD	%XMM1,(%RAX,%R14,8)

(277) 0x246482 MOV	-0x138(%RBP),%RCX

(277) 0x246489 ADD	$0x4,%RCX

(277) 0x24648d MOV	-0x130(%RBP),%RDX

(277) 0x246494 ADD	$-0x4,%RDX

(277) 0x246498 MOV	-0x100(%RBP),%R12

(277) 0x24649f MOV	-0xf8(%RBP),%R10

(277) 0x2464a6 JE	24655f

(277) 0x2464ac LEA	0x1(%RCX),%R8

(277) 0x2464b0 MOV	%RCX,%RAX

(277) 0x2464b3 SHR	$0x20,%RAX

(277) 0x2464b7 MOV	%RDX,-0x130(%RBP)

(277) 0x2464be JE	2464d0

(277) 0x2464c0 MOV	%RCX,%RAX

(277) 0x2464c3 CQTO

(277) 0x2464c5 IDIV	%R12

(277) 0x2464c8 MOV	%RDX,%R11

(277) 0x2464cb MOV	%RAX,%RDI

(277) 0x2464ce JMP	2464dc

(277) 0x2464d0 MOV	%ECX,%EAX

(277) 0x2464d2 XOR	%EDX,%EDX

(277) 0x2464d4 DIV	%R12D

(277) 0x2464d7 MOV	%EDX,%R11D

(277) 0x2464da MOV	%EAX,%EDI

(277) 0x2464dc LEA	0x2(%RCX),%R10

(277) 0x2464e0 MOV	%R8,%RAX

(277) 0x2464e3 SHR	$0x20,%RAX

(277) 0x2464e7 JE	246500

(277) 0x2464e9 MOV	%R8,%RAX

(277) 0x2464ec CQTO

(277) 0x2464ee IDIV	%R12

(277) 0x2464f1 MOV	%RDX,%R13

(277) 0x2464f4 MOV	%RAX,%RBX

(277) 0x2464f7 JMP	24650d

0x2464f9 NOPL	(%RAX)

(277) 0x246500 MOV	%R8D,%EAX

(277) 0x246503 XOR	%EDX,%EDX

(277) 0x246505 DIV	%R12D

(277) 0x246508 MOV	%EDX,%R13D

(277) 0x24650b MOV	%EAX,%EBX

(277) 0x24650d LEA	0x3(%RCX),%R15

(277) 0x246511 MOV	%R10,%RAX

(277) 0x246514 SHR	$0x20,%RAX

(277) 0x246518 JE	246530

(277) 0x24651a MOV	%R10,%RAX

(277) 0x24651d CQTO

(277) 0x24651f IDIV	%R12

(277) 0x246522 MOV	%RDX,%R14

(277) 0x246525 MOV	%RAX,%R10

(277) 0x246528 JMP	24653e

0x24652a NOPW	(%RAX,%RAX,1)

(277) 0x246530 MOV	%R10D,%EAX

(277) 0x246533 XOR	%EDX,%EDX

(277) 0x246535 DIV	%R12D

(277) 0x246538 MOV	%EDX,%R14D

(277) 0x24653b MOV	%EAX,%R10D

(277) 0x24653e MOV	%R15,%RAX

(277) 0x246541 SHR	$0x20,%RAX

(277) 0x246545 MOV	%RCX,-0x138(%RBP)

(277) 0x24654c JNE	246040

(277) 0x246552 MOV	%R15D,%EAX

(277) 0x246555 XOR	%EDX,%EDX

(277) 0x246557 DIV	%R12D

(277) 0x24655a JMP	246048

0x24655f MOV	-0xe8(%RBP),%RAX

0x246566 CMP	%RAX,-0xf0(%RBP)

0x24656d MOV	-0x78(%RBP),%RBX

0x246571 MOV	-0x70(%RBP),%R8

0x246575 MOV	-0x68(%RBP),%R15

0x246579 MOV	-0x40(%RBP),%RDI

0x24657d MOV	-0x60(%RBP),%R13

0x246581 MOV	-0x38(%RBP),%R9

0x246585 JNE	2465a9

0x246587 MOV	$0x212420,%EDI

0x24658c MOV	-0x54(%RBP),%ESI

0x24658f VZEROUPPER

0x246592 CALL	261370 <@plt_start@+0x500>

0x246597 ADD	$0x118,%RSP

0x24659e POP	%RBX

0x24659f POP	%R12

0x2465a1 POP	%R13

0x2465a3 POP	%R14

0x2465a5 POP	%R15

0x2465a7 POP	%RBP

0x2465a8 RET

0x2465a9 ADD	%RAX,%R10

0x2465ac JMP	2466fc

0x2465b1 NOPW	%CS:(%RAX,%RAX,1)

(276) 0x2465c0 MOV	%R10,%RAX

(276) 0x2465c3 CQTO

(276) 0x2465c5 IDIV	%R12

(276) 0x2465c8 MOV	%R8,%R11

(276) 0x2465cb MOV	-0x2c(%RBP),%ESI

(276) 0x2465ce LEA	(%RBX,%RAX,1),%ECX

(276) 0x2465d1 VMOVSD	-0x43959(%RIP),%XMM0

(276) 0x2465d9 MOV	0x18(%RBP),%R14

(276) 0x2465dd VMULSD	(%R14),%XMM0,%XMM1

(276) 0x2465e2 ADD	%ESI,%EDX

(276) 0x2465e4 MOVSXD	%EDX,%RDX

(276) 0x2465e7 MOVSXD	%ECX,%RSI

(276) 0x2465ea MOV	%R8,%RCX

(276) 0x2465ed IMUL	%RSI,%RCX

(276) 0x2465f1 ADD	%RDX,%RCX

(276) 0x2465f4 VMULSD	(%R15,%RCX,8),%XMM1,%XMM1

(276) 0x2465fa MOV	%RDI,%RCX

(276) 0x2465fd IMUL	%RSI,%RCX

(276) 0x246601 ADD	%RDX,%RCX

(276) 0x246604 VMOVSD	(%R13,%RCX,8),%XMM2

(276) 0x24660b ADD	%EBX,%EAX

(276) 0x24660d INC	%EAX

(276) 0x24660f CLTQ

(276) 0x246611 MOV	%RDI,%RCX

(276) 0x246614 IMUL	%RAX,%RCX

(276) 0x246618 ADD	%RDX,%RCX

(276) 0x24661b VADDSD	(%R13,%RCX,8),%XMM2,%XMM2

(276) 0x246622 MOV	%R9,%RCX

(276) 0x246625 IMUL	%RSI,%RCX

(276) 0x246629 ADD	%RDX,%RCX

(276) 0x24662c MOV	-0xd8(%RBP),%R11

(276) 0x246633 VADDSD	(%R11,%RCX,8),%XMM2,%XMM2

(276) 0x246639 IMUL	%R9,%RAX

(276) 0x24663d ADD	%RDX,%RAX

(276) 0x246640 VADDSD	(%R11,%RAX,8),%XMM2,%XMM2

(276) 0x246646 VMULSD	%XMM2,%XMM1,%XMM1

(276) 0x24664a MOV	-0xd0(%RBP),%RAX

(276) 0x246651 IMUL	%RSI,%RAX

(276) 0x246655 ADD	%RDX,%RAX

(276) 0x246658 MOV	-0xc8(%RBP),%RCX

(276) 0x24665f VMOVSD	%XMM1,(%RCX,%RAX,8)

(276) 0x246664 VMULSD	(%R14),%XMM0,%XMM0

(276) 0x246669 MOV	-0xc0(%RBP),%RAX

(276) 0x246670 IMUL	%RSI,%RAX

(276) 0x246674 ADD	%RDX,%RAX

(276) 0x246677 MOV	-0xb8(%RBP),%RCX

(276) 0x24667e VMULSD	(%RCX,%RAX,8),%XMM0,%XMM0

(276) 0x246683 MOV	-0xb0(%RBP),%RAX

(276) 0x24668a IMUL	%RSI,%RAX

(276) 0x24668e LEA	(%RAX,%RDX,1),%RCX

(276) 0x246692 MOV	-0xa8(%RBP),%R11

(276) 0x246699 VMOVSD	(%R11,%RCX,8),%XMM1

(276) 0x24669f ADD	%RDX,%RAX

(276) 0x2466a2 INC	%RAX

(276) 0x2466a5 VADDSD	(%R11,%RAX,8),%XMM1,%XMM1

(276) 0x2466ab MOV	-0xa0(%RBP),%RAX

(276) 0x2466b2 IMUL	%RSI,%RAX

(276) 0x2466b6 LEA	(%RAX,%RDX,1),%RCX

(276) 0x2466ba MOV	-0x98(%RBP),%R11

(276) 0x2466c1 VADDSD	(%R11,%RCX,8),%XMM1,%XMM1

(276) 0x2466c7 ADD	%RDX,%RAX

(276) 0x2466ca INC	%RAX

(276) 0x2466cd VADDSD	(%R11,%RAX,8),%XMM1,%XMM1

(276) 0x2466d3 IMUL	-0x90(%RBP),%RSI

(276) 0x2466db ADD	%RDX,%RSI

(276) 0x2466de VMULSD	%XMM1,%XMM0,%XMM0

(276) 0x2466e2 MOV	-0x88(%RBP),%RAX

(276) 0x2466e9 VMOVSD	%XMM0,(%RAX,%RSI,8)

(276) 0x2466ee CMP	-0x80(%RBP),%R10

(276) 0x2466f2 LEA	0x1(%R10),%R10

(276) 0x2466f6 JGE	246587

(276) 0x2466fc MOV	%R10,%RAX

(276) 0x2466ff SHR	$0x20,%RAX

(276) 0x246703 JNE	2465c0

(276) 0x246709 MOV	%R10D,%EAX

(276) 0x24670c XOR	%EDX,%EDX

(276) 0x24670e DIV	%R12D

(276) 0x246711 JMP	2465c8

0x246716 INT	$0x3

0x246717 INT	$0x3

0x246718 INT	$0x3

0x246719 INT	$0x3

0x24671a INT	$0x3

0x24671b INT	$0x3

0x24671c INT	$0x3

0x24671d INT	$0x3

0x24671e INT	$0x3

0x24671f INT	$0x3

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	flux_calc.cpp:36-40
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h:69
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/flux_calc.cpp:36-40

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.00 to 3.33 cycles (7.50x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is probably not vectorized. Only 11% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 25.00 to 4.56 cycles (5.48x speedup).

Details

Store and arithmetical SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 25.00 to 22.67 cycles (1.10x speedup).

Workaround

Read less array elements
Write less array elements

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 328 bytes. The binary function is storing 220 bytes.

General properties

nb instructions	148
nb uops	136
loop length	600
used x86 registers	16
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	36

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	22.67 cycles
front end	22.67 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.75	8.75	8.50	8.50	5.50	25.00	25.00	25.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.75	8.75	8.50	8.50	5.50	25.00	25.00	25.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	22.67
Dispatch	25.00
Overall L1	25.00

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	14%

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Vector efficiency ratios

INT

all	11%
load	11%
store	11%
mul	12%
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	11%
store	11%
mul	12%
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.00 cycles. At this rate:

13% of peak load performance is reached (13.12 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (8.80 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 245e60

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB $0x118,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RDX),%EBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
INC %EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RCX),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x3,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
SUB %EBX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 246597 <.omp_outlined..362+0x737>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%R8),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
INC %ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%R9),%R12D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x3,%R12D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %ECX,%R12D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 246597 <.omp_outlined..362+0x737>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %ECX,-0x2c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
SUB %ECX,%R12D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R12,%R14	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
DEC %R14	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVQ $0,-0xe0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R14,-0x50(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVQ $0x1,-0x140(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVL $0,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDI),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x140(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x58(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0xe0(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x50(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x212408,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %ESI,-0x54(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CALL 261360 <@plt_start@+0x4f0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R14,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMOVL %RAX,%R8	1	0.50	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R8,-0x50(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0xe0(%RBP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R8,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JG 246587 <.omp_outlined..362+0x727>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x48(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x40(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x30(%RBP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R8,-0x80(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x20(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RBP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%R8),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%R8),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDI),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R13,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RDI),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RSI),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDI,-0x38(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RSI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0xd8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%R9),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0xd0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%R9),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDX),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0xc0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDX,-0xb8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RCX),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDX,-0xb0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RCX),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RCX,-0xa8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RAX),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RCX,-0xa0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RAX),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RCX,-0x90(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0x80(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SUB %R10,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x4,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JAE 245ff5 <.omp_outlined..362+0x195>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R11,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JMP 2466fc <.omp_outlined..362+0x89c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %R13,-0x60(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R11,-0x70(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RBX,-0x78(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
AND $-0x4,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD -0x43398(%RIP),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R12,-0x100(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R10,-0xf8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JMP 2464ac <.omp_outlined..362+0x64c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV -0xe8(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %RAX,-0xf0(%RBP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x78(%RBP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x70(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x68(%RBP),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x60(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JNE 2465a9 <.omp_outlined..362+0x749>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV $0x212420,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x54(%RBP),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1
CALL 261370 <@plt_start@+0x500>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
ADD $0x118,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD %RAX,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 2466fc <.omp_outlined..362+0x89c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3

Source file and lines	flux_calc.cpp:36-40
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h:69
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/flux_calc.cpp:36-40

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.00 to 3.33 cycles (7.50x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by:

reading data from caches/RAM (load units are a bottleneck)
writing data to caches/RAM (the store unit is a bottleneck)

By removing all these bottlenecks, you can lower the cost of an iteration from 25.00 to 22.67 cycles (1.10x speedup).

Workaround

Read less array elements
Write less array elements

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 328 bytes. The binary function is storing 220 bytes.

General properties

nb instructions	148
nb uops	136
loop length	600
used x86 registers	16
used mmx registers	0
used xmm registers	1
used ymm registers	0
used zmm registers	0
nb stack references	36

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	22.67 cycles
front end	22.67 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.75	8.75	8.50	8.50	5.50	25.00	25.00	25.00	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.75	8.75	8.50	8.50	5.50	25.00	25.00	25.00	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	22.67
Dispatch	25.00
Overall L1	25.00

Vectorization ratios

INT

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
other	14%

all	0%
load	0%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	1%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	14%

Vector efficiency ratios

INT

all	11%
load	11%
store	11%
mul	12%
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
other	13%

all	12%
load	12%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	NA (no other vectorizable/vectorized instructions)

INT+FP

all	11%
load	11%
store	11%
mul	12%
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	13%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.00 cycles. At this rate:

13% of peak load performance is reached (13.12 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
13% of peak store performance is reached (8.80 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 245e60

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB $0x118,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RDX),%EBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
INC %EBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RCX),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x3,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
SUB %EBX,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 246597 <.omp_outlined..362+0x737>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%R8),%ECX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
INC %ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%R9),%R12D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x3,%R12D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %ECX,%R12D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 246597 <.omp_outlined..362+0x737>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %ECX,-0x2c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
SUB %ECX,%R12D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R12,%R14	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
DEC %R14	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVQ $0,-0xe0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R14,-0x50(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVQ $0x1,-0x140(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVL $0,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDI),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x140(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x58(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0xe0(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x50(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x212408,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %ESI,-0x54(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CALL 261360 <@plt_start@+0x4f0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV %R14,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x50(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R14,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMOVL %RAX,%R8	1	0.50	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R8,-0x50(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0xe0(%RBP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R8,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JG 246587 <.omp_outlined..362+0x727>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x50(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x48(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x40(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x30(%RBP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x28(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R8,-0x80(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x20(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RBP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%R8),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%R8),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDI),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R13,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RDI),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RSI),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDI,-0x38(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RSI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0xd8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%R9),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0xd0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%R9),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0xc8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDX),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0xc0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RDX),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDX,-0xb8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RCX),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDX,-0xb0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RCX),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RCX,-0xa8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RAX),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RCX,-0xa0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x98(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x38(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RAX),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RCX,-0x90(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x88(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0x80(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SUB %R10,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x4,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JAE 245ff5 <.omp_outlined..362+0x195>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R11,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JMP 2466fc <.omp_outlined..362+0x89c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %R13,-0x60(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R11,-0x70(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RBX,-0x78(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,-0xf0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
AND $-0x4,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD -0x43398(%RIP),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RAX,-0xe8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R12,-0x100(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R10,-0xf8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JMP 2464ac <.omp_outlined..362+0x64c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV -0xe8(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %RAX,-0xf0(%RBP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x78(%RBP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x70(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x68(%RBP),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x40(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x60(%RBP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JNE 2465a9 <.omp_outlined..362+0x749>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV $0x212420,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x54(%RBP),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VZEROUPPER	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1
CALL 261370 <@plt_start@+0x500>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
ADD $0x118,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD %RAX,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 2466fc <.omp_outlined..362+0x89c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3

▶Scalability Runs Description

Run 2x1	Number processes: 2Number nodes: 1Number processes per node: 2Run Command: <executable> MPI Command: mpirun -np <number_processes>Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/run/oneview_runs/compilers/aocc_15/oneview_run_1708555871I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spreadOMP_NUM_THREADS: 1
Run 2x2	OMP_NUM_THREADS: 2I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x4	OMP_NUM_THREADS: 4I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x8	OMP_NUM_THREADS: 8I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x16	OMP_NUM_THREADS: 16I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x32	OMP_NUM_THREADS: 32I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x64	OMP_NUM_THREADS: 64I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x96	OMP_NUM_THREADS: 96I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread

(2x1) Efficiency	(2x1) Potential Speed-Up (%)	(2x2) Efficiency	(2x2) Potential Speed-Up (%)	(2x4) Efficiency	(2x4) Potential Speed-Up (%)	(2x8) Efficiency	(2x8) Potential Speed-Up (%)	(2x16) Efficiency	(2x16) Potential Speed-Up (%)	(2x32) Efficiency	(2x32) Potential Speed-Up (%)	(2x64) Efficiency	(2x64) Potential Speed-Up (%)	(2x96) Efficiency	(2x96) Potential Speed-Up (%)
1	0	0.99	0.03	0.99	0.04	0.99	0.04	0.96	0.11	0.71	0.96	0.36	2.33	0.24	3.1

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
2x1	2	1	1	1	50.38	2.93
2x2	4	0.99	1.98	2	25.61	2.95
2x4	8	0.99	3.95	4	12.82	2.96
2x8	16	0.99	7.9	8	6.43	2.95
2x16	32	0.96	15.38	16	3.38	2.87
2x32	64	0.71	22.76	32	2.49	3.31
2x64	128	0.36	23.18	64	2.6	3.66
2x96	192	0.24	23.4	96	2.26	4.1

Name	Coverage (%)	Time (s)
▼.omp_outlined..362–	2.93	50.3
○Loop 277 - flux_calc.cpp:37-40 - exec	2.93	50.29
○Loop 276 - flux_calc.cpp:37-40 - exec	0	0

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Colums Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency