OV - - Function .omp_outlined..485

	Function: .omp_outlined..485	Module: exec	Source: revert.cpp:34-38 [...]	Coverage: 1.44%

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/revert.cpp: 34 - 38

--------------------------------------------------------------------------------

34: #pragma omp parallel for simd collapse(2)

35:   for (int j = (y_min + 1); j < (y_max + 2); j++) {

36:     for (int i = (x_min + 1); i < (x_max + 2); i++) {

37:       density1(i, j) = density0(i, j);

38:       energy1(i, j) = energy0(i, j);

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x24cb80 PUSH	%RBP

0x24cb81 MOV	%RSP,%RBP

0x24cb84 PUSH	%R15

0x24cb86 PUSH	%R14

0x24cb88 PUSH	%R13

0x24cb8a PUSH	%R12

0x24cb8c PUSH	%RBX

0x24cb8d SUB	$0x68,%RSP

0x24cb91 MOV	(%RDX),%R15D

0x24cb94 INC	%R15D

0x24cb97 MOV	(%RCX),%EAX

0x24cb99 ADD	$0x2,%EAX

0x24cb9c SUB	%R15D,%EAX

0x24cb9f JLE	24cded

0x24cba5 MOV	(%R8),%EDX

0x24cba8 INC	%EDX

0x24cbaa MOV	(%R9),%R13D

0x24cbad ADD	$0x2,%R13D

0x24cbb1 CMP	%EDX,%R13D

0x24cbb4 JLE	24cded

0x24cbba SUB	%EDX,%R13D

0x24cbbd MOV	%RAX,%RBX

0x24cbc0 IMUL	%R13,%RBX

0x24cbc4 DEC	%RBX

0x24cbc7 MOVQ	$0,-0x68(%RBP)

0x24cbcf MOV	%RBX,-0x40(%RBP)

0x24cbd3 MOVQ	$0x1,-0x90(%RBP)

0x24cbde MOVL	$0,-0x48(%RBP)

0x24cbe5 MOV	(%RDI),%ESI

0x24cbe7 SUB	$0x8,%RSP

0x24cbeb LEA	-0x90(%RBP),%RAX

0x24cbf2 LEA	-0x48(%RBP),%RCX

0x24cbf6 LEA	-0x68(%RBP),%R8

0x24cbfa MOV	%EDX,-0x2c(%RBP)

0x24cbfd LEA	-0x40(%RBP),%R9

0x24cc01 MOV	$0x212a60,%EDI

0x24cc06 MOV	%ESI,-0x44(%RBP)

0x24cc09 MOV	$0x22,%EDX

0x24cc0e PUSH	$0x1

0x24cc10 PUSH	$0x1

0x24cc12 PUSH	%RAX

0x24cc13 CALL	261360 <@plt_start@+0x4f0>

0x24cc18 MOV	-0x2c(%RBP),%R9D

0x24cc1c MOV	%RBX,%R8

0x24cc1f ADD	$0x20,%RSP

0x24cc23 MOV	-0x40(%RBP),%RAX

0x24cc27 CMP	%RBX,%RAX

0x24cc2a CMOVL	%RAX,%R8

0x24cc2e MOV	%R8,-0x40(%RBP)

0x24cc32 MOV	-0x68(%RBP),%RCX

0x24cc36 CMP	%R8,%RCX

0x24cc39 JG	24cde0

0x24cc3f MOV	0x28(%RBP),%RAX

0x24cc43 MOV	0x20(%RBP),%RDX

0x24cc47 MOV	0x18(%RBP),%RSI

0x24cc4b MOV	0x10(%RBP),%RDI

0x24cc4f MOV	(%RSI),%R10

0x24cc52 MOV	%R10,-0x38(%RBP)

0x24cc56 MOV	0x10(%RSI),%RSI

0x24cc5a MOV	%RSI,-0x60(%RBP)

0x24cc5e MOV	(%RDI),%R11

0x24cc61 MOV	0x10(%RDI),%RSI

0x24cc65 MOV	%RSI,-0x58(%RBP)

0x24cc69 MOV	(%RAX),%R14

0x24cc6c MOV	0x10(%RAX),%RAX

0x24cc70 MOV	%RAX,-0x50(%RBP)

0x24cc74 MOV	(%RDX),%R12

0x24cc77 MOV	0x10(%RDX),%R10

0x24cc7b MOV	%R8,%RAX

0x24cc7e SUB	%RCX,%RAX

0x24cc81 INC	%RAX

0x24cc84 CMP	$0x2,%RAX

0x24cc88 JAE	24cc93

0x24cc8a MOV	-0x38(%RBP),%RDI

0x24cc8e JMP	24ce76

0x24cc93 MOV	%R8,-0x80(%RBP)

0x24cc97 MOV	%R15D,-0x30(%RBP)

0x24cc9b MOV	%RAX,-0x78(%RBP)

0x24cc9f MOV	%RAX,%R15

0x24cca2 AND	$-0x2,%R15

0x24cca6 MOV	%RCX,%RSI

0x24cca9 MOV	%R15,-0x70(%RBP)

0x24ccad MOV	%R11,-0x88(%RBP)

0x24ccb4 JMP	24cd7f

0x24ccb9 NOPL	(%RAX)

(326) 0x24ccc0 MOV	%R9,%RAX

(326) 0x24ccc3 CQTO

(326) 0x24ccc5 IDIV	%R13

(326) 0x24ccc8 MOV	-0x30(%RBP),%R9D

(326) 0x24cccc ADD	%R9D,%EDI

(326) 0x24cccf ADD	%R9D,%EAX

(326) 0x24ccd2 MOV	-0x2c(%RBP),%R9D

(326) 0x24ccd6 ADD	%R9D,%R8D

(326) 0x24ccd9 ADD	%R9D,%EDX

(326) 0x24ccdc MOVSXD	%R8D,%R8

(326) 0x24ccdf MOVSXD	%EDX,%RDX

(326) 0x24cce2 MOVSXD	%EDI,%RDI

(326) 0x24cce5 CLTQ

(326) 0x24cce7 MOV	-0x38(%RBP),%RBX

(326) 0x24cceb MOV	%RBX,%R9

(326) 0x24ccee IMUL	%RDI,%R9

(326) 0x24ccf2 ADD	%R8,%R9

(326) 0x24ccf5 MOV	-0x60(%RBP),%R11

(326) 0x24ccf9 VMOVSD	(%R11,%R9,8),%XMM0

(326) 0x24ccff IMUL	%RAX,%RBX

(326) 0x24cd03 ADD	%RDX,%RBX

(326) 0x24cd06 VMOVSD	(%R11,%RBX,8),%XMM1

(326) 0x24cd0c MOV	-0x88(%RBP),%R11

(326) 0x24cd13 MOV	%R11,%R9

(326) 0x24cd16 IMUL	%RDI,%R9

(326) 0x24cd1a ADD	%R8,%R9

(326) 0x24cd1d MOV	-0x58(%RBP),%RBX

(326) 0x24cd21 VMOVSD	%XMM0,(%RBX,%R9,8)

(326) 0x24cd27 MOV	%R11,%R9

(326) 0x24cd2a IMUL	%RAX,%R9

(326) 0x24cd2e ADD	%RDX,%R9

(326) 0x24cd31 VMOVSD	%XMM1,(%RBX,%R9,8)

(326) 0x24cd37 MOV	%R14,%R9

(326) 0x24cd3a IMUL	%RDI,%R9

(326) 0x24cd3e ADD	%R8,%R9

(326) 0x24cd41 MOV	-0x50(%RBP),%RBX

(326) 0x24cd45 VMOVSD	(%RBX,%R9,8),%XMM0

(326) 0x24cd4b MOV	%R14,%R9

(326) 0x24cd4e IMUL	%RAX,%R9

(326) 0x24cd52 ADD	%RDX,%R9

(326) 0x24cd55 VMOVSD	(%RBX,%R9,8),%XMM1

(326) 0x24cd5b IMUL	%R12,%RDI

(326) 0x24cd5f ADD	%R8,%RDI

(326) 0x24cd62 IMUL	%R12,%RAX

(326) 0x24cd66 ADD	%RDX,%RAX

(326) 0x24cd69 VMOVSD	%XMM0,(%R10,%RDI,8)

(326) 0x24cd6f VMOVSD	%XMM1,(%R10,%RAX,8)

(326) 0x24cd75 ADD	$0x2,%RSI

(326) 0x24cd79 ADD	$-0x2,%R15

(326) 0x24cd7d JE	24cdc6

(326) 0x24cd7f LEA	0x1(%RSI),%R9

(326) 0x24cd83 MOV	%RSI,%RAX

(326) 0x24cd86 SHR	$0x20,%RAX

(326) 0x24cd8a JE	24cda0

(326) 0x24cd8c MOV	%RSI,%RAX

(326) 0x24cd8f CQTO

(326) 0x24cd91 IDIV	%R13

(326) 0x24cd94 MOV	%RDX,%R8

(326) 0x24cd97 MOV	%RAX,%RDI

(326) 0x24cd9a JMP	24cdac

0x24cd9c NOPL	(%RAX)

(326) 0x24cda0 MOV	%ESI,%EAX

(326) 0x24cda2 XOR	%EDX,%EDX

(326) 0x24cda4 DIV	%R13D

(326) 0x24cda7 MOV	%EDX,%R8D

(326) 0x24cdaa MOV	%EAX,%EDI

(326) 0x24cdac MOV	%R9,%RAX

(326) 0x24cdaf SHR	$0x20,%RAX

(326) 0x24cdb3 JNE	24ccc0

(326) 0x24cdb9 MOV	%R9D,%EAX

(326) 0x24cdbc XOR	%EDX,%EDX

(326) 0x24cdbe DIV	%R13D

(326) 0x24cdc1 JMP	24ccc8

0x24cdc6 MOV	-0x70(%RBP),%RAX

0x24cdca CMP	%RAX,-0x78(%RBP)

0x24cdce MOV	-0x30(%RBP),%R15D

0x24cdd2 MOV	-0x80(%RBP),%R8

0x24cdd6 MOV	-0x2c(%RBP),%R9D

0x24cdda MOV	-0x38(%RBP),%RDI

0x24cdde JNE	24cdfc

0x24cde0 MOV	$0x212a78,%EDI

0x24cde5 MOV	-0x44(%RBP),%ESI

0x24cde8 CALL	261370 <@plt_start@+0x500>

0x24cded ADD	$0x68,%RSP

0x24cdf1 POP	%RBX

0x24cdf2 POP	%R12

0x24cdf4 POP	%R13

0x24cdf6 POP	%R14

0x24cdf8 POP	%R15

0x24cdfa POP	%RBP

0x24cdfb RET

0x24cdfc ADD	%RAX,%RCX

0x24cdff JMP	24ce76

0x24ce01 NOPW	%CS:(%RAX,%RAX,1)

(325) 0x24ce10 MOV	%RCX,%RAX

(325) 0x24ce13 CQTO

(325) 0x24ce15 IDIV	%R13

(325) 0x24ce18 ADD	%R15D,%EAX

(325) 0x24ce1b ADD	%R9D,%EDX

(325) 0x24ce1e MOVSXD	%EDX,%RDX

(325) 0x24ce21 CLTQ

(325) 0x24ce23 MOV	%RDI,%RSI

(325) 0x24ce26 IMUL	%RAX,%RSI

(325) 0x24ce2a ADD	%RDX,%RSI

(325) 0x24ce2d MOV	-0x60(%RBP),%RBX

(325) 0x24ce31 VMOVSD	(%RBX,%RSI,8),%XMM0

(325) 0x24ce36 MOV	%R11,%RSI

(325) 0x24ce39 IMUL	%RAX,%RSI

(325) 0x24ce3d ADD	%RDX,%RSI

(325) 0x24ce40 MOV	-0x58(%RBP),%RBX

(325) 0x24ce44 VMOVSD	%XMM0,(%RBX,%RSI,8)

(325) 0x24ce49 MOV	%R14,%RSI

(325) 0x24ce4c IMUL	%RAX,%RSI

(325) 0x24ce50 ADD	%RDX,%RSI

(325) 0x24ce53 MOV	-0x50(%RBP),%RBX

(325) 0x24ce57 VMOVSD	(%RBX,%RSI,8),%XMM0

(325) 0x24ce5c IMUL	%R12,%RAX

(325) 0x24ce60 ADD	%RDX,%RAX

(325) 0x24ce63 VMOVSD	%XMM0,(%R10,%RAX,8)

(325) 0x24ce69 CMP	%R8,%RCX

(325) 0x24ce6c LEA	0x1(%RCX),%RCX

(325) 0x24ce70 JGE	24cde0

(325) 0x24ce76 MOV	%RCX,%RAX

(325) 0x24ce79 SHR	$0x20,%RAX

(325) 0x24ce7d JNE	24ce10

(325) 0x24ce7f MOV	%ECX,%EAX

(325) 0x24ce81 XOR	%EDX,%EDX

(325) 0x24ce83 DIV	%R13D

(325) 0x24ce86 JMP	24ce18

0x24ce88 INT	$0x3

0x24ce89 INT	$0x3

0x24ce8a INT	$0x3

0x24ce8b INT	$0x3

0x24ce8c INT	$0x3

0x24ce8d INT	$0x3

0x24ce8e INT	$0x3

0x24ce8f INT	$0x3

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	revert.cpp:34-38
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/revert.cpp:34-38
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 17.67 to 2.54 cycles (6.95x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 188 bytes. The binary function is storing 112 bytes.

General properties

nb instructions	115
nb uops	106
loop length	406
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	19

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	17.67 cycles
front end	17.67 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.75	8.75	8.50	8.50	5.50	15.33	15.33	15.33	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.75	8.75	8.50	8.50	5.50	15.33	15.33	15.33	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	17.67
Dispatch	15.33
Overall L1	17.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	10%
store	10%
mul	12%
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 17.67 cycles. At this rate:

11% of peak load performance is reached (10.64 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (6.34 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 17.67 to 15.33 cycles (1.15x speedup).

ASM code

In the binary file, the address of the function is: 24cb80

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB $0x68,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RDX),%R15D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
INC %R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RCX),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
SUB %R15D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 24cded <.omp_outlined..485+0x26d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%R8),%EDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
INC %EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%R9),%R13D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x2,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %EDX,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 24cded <.omp_outlined..485+0x26d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
SUB %EDX,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R13,%RBX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
DEC %RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVQ $0,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RBX,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVQ $0x1,-0x90(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVL $0,-0x48(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDI),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x90(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x48(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x68(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %EDX,-0x2c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA -0x40(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x212a60,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CALL 261360 <@plt_start@+0x4f0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV -0x2c(%RBP),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMOVL %RAX,%R8	1	0.50	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R8,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0x68(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R8,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JG 24cde0 <.omp_outlined..485+0x260>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x20(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RSI),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RSI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0x60(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDI),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RDI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RAX),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDX),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RDX),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SUB %RCX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x2,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JAE 24cc93 <.omp_outlined..485+0x113>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0x38(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JMP 24ce76 <.omp_outlined..485+0x2f6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %R8,-0x80(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15D,-0x30(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $-0x2,%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R15,-0x70(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R11,-0x88(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JMP 24cd7f <.omp_outlined..485+0x1ff>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %RAX,-0x78(%RBP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x30(%RBP),%R15D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x80(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x2c(%RBP),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JNE 24cdfc <.omp_outlined..485+0x27c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV $0x212a78,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CALL 261370 <@plt_start@+0x500>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
ADD $0x68,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 24ce76 <.omp_outlined..485+0x2f6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3

Source file and lines	revert.cpp:34-38
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/revert.cpp:34-38
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 188 bytes. The binary function is storing 112 bytes.

General properties

nb instructions	115
nb uops	106
loop length	406
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	19

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	17.67 cycles
front end	17.67 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.75	8.75	8.50	8.50	5.50	15.33	15.33	15.33	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.75	8.75	8.50	8.50	5.50	15.33	15.33	15.33	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	17.67
Dispatch	15.33
Overall L1	17.67

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	10%
store	10%
mul	12%
add-sub	10%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 17.67 cycles. At this rate:

11% of peak load performance is reached (10.64 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
9% of peak store performance is reached (6.34 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 24cb80

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB $0x68,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RDX),%R15D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
INC %R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RCX),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x2,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
SUB %R15D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 24cded <.omp_outlined..485+0x26d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%R8),%EDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
INC %EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%R9),%R13D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x2,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %EDX,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JLE 24cded <.omp_outlined..485+0x26d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
SUB %EDX,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R13,%RBX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
DEC %RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVQ $0,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RBX,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVQ $0x1,-0x90(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVL $0,-0x48(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDI),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x90(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x48(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x68(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %EDX,-0x2c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA -0x40(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x212a60,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %ESI,-0x44(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CALL 261360 <@plt_start@+0x4f0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV -0x2c(%RBP),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x40(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMOVL %RAX,%R8	1	0.50	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R8,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0x68(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R8,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JG 24cde0 <.omp_outlined..485+0x260>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x20(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RSI),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R10,-0x38(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RSI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0x60(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDI),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RDI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RAX),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RAX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x50(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDX),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RDX),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SUB %RCX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x2,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JAE 24cc93 <.omp_outlined..485+0x113>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0x38(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JMP 24ce76 <.omp_outlined..485+0x2f6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %R8,-0x80(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15D,-0x30(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,-0x78(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $-0x2,%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R15,-0x70(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R11,-0x88(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JMP 24cd7f <.omp_outlined..485+0x1ff>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV -0x70(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %RAX,-0x78(%RBP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x30(%RBP),%R15D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x80(%RBP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x2c(%RBP),%R9D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JNE 24cdfc <.omp_outlined..485+0x27c>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV $0x212a78,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x44(%RBP),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CALL 261370 <@plt_start@+0x500>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
ADD $0x68,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 24ce76 <.omp_outlined..485+0x2f6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPW %CS:(%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3

▶Scalability Runs Description

Run 2x1	Number processes: 2Number nodes: 1Number processes per node: 2Run Command: <executable> MPI Command: mpirun -np <number_processes>Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/run/oneview_runs/compilers/aocc_15/oneview_run_1708555871I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spreadOMP_NUM_THREADS: 1
Run 2x2	OMP_NUM_THREADS: 2I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x4	OMP_NUM_THREADS: 4I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x8	OMP_NUM_THREADS: 8I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x16	OMP_NUM_THREADS: 16I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x32	OMP_NUM_THREADS: 32I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x64	OMP_NUM_THREADS: 64I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x96	OMP_NUM_THREADS: 96I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread

(2x1) Efficiency	(2x1) Potential Speed-Up (%)	(2x2) Efficiency	(2x2) Potential Speed-Up (%)	(2x4) Efficiency	(2x4) Potential Speed-Up (%)	(2x8) Efficiency	(2x8) Potential Speed-Up (%)	(2x16) Efficiency	(2x16) Potential Speed-Up (%)	(2x32) Efficiency	(2x32) Potential Speed-Up (%)	(2x64) Efficiency	(2x64) Potential Speed-Up (%)	(2x96) Efficiency	(2x96) Potential Speed-Up (%)
1	0	1	0	1	0	1	-0	0.89	0.17	0.58	0.84	0.29	1.6	0.19	2.06

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
2x1	2	1	1	1	24.68	1.44
2x2	4	1	2	2	12.4	1.44
2x4	8	1	4	4	6.2	1.43
2x8	16	1	8	8	3.12	1.43
2x16	32	0.89	14.25	16	2.07	1.51
2x32	64	0.58	18.53	32	1.52	1.99
2x64	128	0.29	18.53	64	1.56	2.25
2x96	192	0.19	18.4	96	1.38	2.55

Name	Coverage (%)	Time (s)
▼.omp_outlined..485–	1.44	24.65
○Loop 326 - revert.cpp:35-38 - exec	1.44	24.65
○Loop 325 - revert.cpp:35-38 - exec	0	0

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Matching between your function (in the source code) and the binary function

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Cycles and memory resources usage

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ASM code

Vectorization

Details

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Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Colums Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency