OV - - Function .omp_outlined..4.312

	Function: .omp_outlined..4.312	Module: exec	Source: advec_mom.cpp:62-66 [...]	Coverage: 1.51%

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_mom.cpp: 62 - 66

--------------------------------------------------------------------------------

62: #pragma omp parallel for simd collapse(2)

63:     for (int j = (y_min - 2 + 1); j < (y_max + 2 + 2); j++) {

64:       for (int i = (x_min - 2 + 1); i < (x_max + 2 + 2); i++) {

65:         post_vol(i, j) = volume(i, j);

66:         pre_vol(i, j) = post_vol(i, j) + vol_flux_y(i + 0, j + 1) - vol_flux_y(i, j);

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

0x2378d0 PUSH	%RBP

0x2378d1 MOV	%RSP,%RBP

0x2378d4 PUSH	%R15

0x2378d6 PUSH	%R14

0x2378d8 PUSH	%R13

0x2378da PUSH	%R12

0x2378dc PUSH	%RBX

0x2378dd SUB	$0x98,%RSP

0x2378e4 MOV	(%RDX),%EAX

0x2378e6 MOV	(%RCX),%R15D

0x2378e9 ADD	$0x4,%R15D

0x2378ed MOV	%RAX,-0x40(%RBP)

0x2378f1 CMP	%EAX,%R15D

0x2378f4 JL	237bb6

0x2378fa MOV	(%R8),%EAX

0x2378fd MOV	(%R9),%R13D

0x237900 ADD	$0x4,%R13D

0x237904 CMP	%EAX,%R13D

0x237907 JL	237bb6

0x23790d MOV	-0x40(%RBP),%RCX

0x237911 LEA	-0x1(%RCX),%R14D

0x237915 DEC	%EAX

0x237917 MOV	%EAX,-0x2c(%RBP)

0x23791a SUB	%EAX,%R13D

0x23791d SUB	%R14D,%R15D

0x237920 IMUL	%R13,%R15

0x237924 DEC	%R15

0x237927 MOVQ	$0,-0x80(%RBP)

0x23792f MOV	%R15,-0x48(%RBP)

0x237933 MOVQ	$0x1,-0xb8(%RBP)

0x23793e MOVL	$0,-0x50(%RBP)

0x237945 MOV	(%RDI),%ESI

0x237947 SUB	$0x8,%RSP

0x23794b LEA	-0xb8(%RBP),%RAX

0x237952 LEA	-0x50(%RBP),%RCX

0x237956 LEA	-0x80(%RBP),%R8

0x23795a LEA	-0x48(%RBP),%R9

0x23795e MOV	$0x211e38,%EDI

0x237963 MOV	%ESI,-0x4c(%RBP)

0x237966 MOV	$0x22,%EDX

0x23796b PUSH	$0x1

0x23796d PUSH	$0x1

0x23796f PUSH	%RAX

0x237970 CALL	261360 <@plt_start@+0x4f0>

0x237975 MOV	-0x2c(%RBP),%R8D

0x237979 ADD	$0x20,%RSP

0x23797d MOV	-0x48(%RBP),%RAX

0x237981 CMP	%R15,%RAX

0x237984 CMOVL	%RAX,%R15

0x237988 MOV	%R15,-0x48(%RBP)

0x23798c MOV	-0x80(%RBP),%RCX

0x237990 CMP	%R15,%RCX

0x237993 JG	237ba9

0x237999 MOV	%R14,%R9

0x23799c MOV	0x28(%RBP),%RAX

0x2379a0 MOV	0x20(%RBP),%RDX

0x2379a4 MOV	0x18(%RBP),%RSI

0x2379a8 MOV	0x10(%RBP),%RDI

0x2379ac MOV	(%RSI),%R11

0x2379af MOV	0x10(%RSI),%R10

0x2379b3 MOV	(%RDI),%RSI

0x2379b6 MOV	%RSI,-0x78(%RBP)

0x2379ba MOV	0x10(%RDI),%RSI

0x2379be MOV	%RSI,-0x70(%RBP)

0x2379c2 MOV	(%RAX),%R14

0x2379c5 MOV	0x10(%RAX),%R12

0x2379c9 MOV	(%RDX),%RAX

0x2379cc MOV	%RAX,-0x68(%RBP)

0x2379d0 MOV	0x10(%RDX),%RAX

0x2379d4 MOV	%RAX,-0x60(%RBP)

0x2379d8 MOV	%R15,%RAX

0x2379db SUB	%RCX,%RAX

0x2379de INC	%RAX

0x2379e1 CMP	$0x2,%RAX

0x2379e5 JB	237c49

0x2379eb MOV	%R10,-0x58(%RBP)

0x2379ef MOV	%R9,-0x38(%RBP)

0x2379f3 MOV	%R15,-0x98(%RBP)

0x2379fa MOV	%RAX,-0x90(%RBP)

0x237a01 MOV	%RAX,%R15

0x237a04 AND	$-0x2,%R15

0x237a08 MOV	%RCX,%RSI

0x237a0b MOV	%R15,-0x88(%RBP)

0x237a12 MOV	%R11,-0xb0(%RBP)

0x237a19 MOV	%R13,-0xa8(%RBP)

0x237a20 MOV	%R12,-0xa0(%RBP)

0x237a27 JMP	237b3d

0x237a2c NOPL	(%RAX)

(161) 0x237a30 MOV	%R9,%RAX

(161) 0x237a33 CQTO

(161) 0x237a35 IDIV	%R13

(161) 0x237a38 MOV	-0x38(%RBP),%R9

(161) 0x237a3c LEA	(%R9,%RDI,1),%R11D

(161) 0x237a40 LEA	(%R9,%RAX,1),%R10D

(161) 0x237a44 MOV	-0x2c(%RBP),%R9D

(161) 0x237a48 ADD	%R9D,%R8D

(161) 0x237a4b ADD	%R9D,%EDX

(161) 0x237a4e MOVSXD	%R8D,%RBX

(161) 0x237a51 MOVSXD	%EDX,%R9

(161) 0x237a54 MOVSXD	%R11D,%RDX

(161) 0x237a57 MOVSXD	%R10D,%R8

(161) 0x237a5a MOV	-0xb0(%RBP),%R11

(161) 0x237a61 MOV	%R11,%R10

(161) 0x237a64 IMUL	%RDX,%R10

(161) 0x237a68 ADD	%RBX,%R10

(161) 0x237a6b MOV	-0x58(%RBP),%R13

(161) 0x237a6f VMOVSD	(%R13,%R10,8),%XMM0

(161) 0x237a76 MOV	%R11,%R10

(161) 0x237a79 IMUL	%R8,%R10

(161) 0x237a7d ADD	%R9,%R10

(161) 0x237a80 VMOVSD	(%R13,%R10,8),%XMM1

(161) 0x237a87 MOV	-0x78(%RBP),%R13

(161) 0x237a8b MOV	%R13,%R10

(161) 0x237a8e IMUL	%RDX,%R10

(161) 0x237a92 ADD	%RBX,%R10

(161) 0x237a95 MOV	-0x70(%RBP),%R12

(161) 0x237a99 VMOVSD	%XMM0,(%R12,%R10,8)

(161) 0x237a9f MOV	%R13,%R10

(161) 0x237aa2 IMUL	%R8,%R10

(161) 0x237aa6 ADD	%R9,%R10

(161) 0x237aa9 VMOVSD	%XMM1,(%R12,%R10,8)

(161) 0x237aaf MOV	-0x40(%RBP),%R10

(161) 0x237ab3 ADD	%R10D,%EDI

(161) 0x237ab6 MOVSXD	%EDI,%RDI

(161) 0x237ab9 IMUL	%R14,%RDI

(161) 0x237abd ADD	%RBX,%RDI

(161) 0x237ac0 MOV	-0xa0(%RBP),%R12

(161) 0x237ac7 VMOVSD	(%R12,%RDI,8),%XMM2

(161) 0x237acd ADD	%R10D,%EAX

(161) 0x237ad0 CLTQ

(161) 0x237ad2 IMUL	%R14,%RAX

(161) 0x237ad6 ADD	%R9,%RAX

(161) 0x237ad9 VMOVHPD	(%R12,%RAX,8),%XMM2,%XMM2

(161) 0x237adf MOV	%R14,%RAX

(161) 0x237ae2 IMUL	%RDX,%RAX

(161) 0x237ae6 ADD	%RBX,%RAX

(161) 0x237ae9 VMOVSD	(%R12,%RAX,8),%XMM3

(161) 0x237aef MOV	%R14,%RAX

(161) 0x237af2 IMUL	%R8,%RAX

(161) 0x237af6 ADD	%R9,%RAX

(161) 0x237af9 VMOVHPD	(%R12,%RAX,8),%XMM3,%XMM3

(161) 0x237aff MOV	-0x68(%RBP),%RAX

(161) 0x237b03 IMUL	%RAX,%RDX

(161) 0x237b07 ADD	%RBX,%RDX

(161) 0x237b0a IMUL	%RAX,%R8

(161) 0x237b0e ADD	%R9,%R8

(161) 0x237b11 VUNPCKLPD	%XMM1,%XMM0,%XMM0

(161) 0x237b15 VADDPD	%XMM2,%XMM0,%XMM0

(161) 0x237b19 VSUBPD	%XMM3,%XMM0,%XMM0

(161) 0x237b1d MOV	-0x60(%RBP),%RAX

(161) 0x237b21 VMOVLPD	%XMM0,(%RAX,%RDX,8)

(161) 0x237b26 VMOVHPD	%XMM0,(%RAX,%R8,8)

(161) 0x237b2c ADD	$0x2,%RSI

(161) 0x237b30 ADD	$-0x2,%R15

(161) 0x237b34 MOV	-0xa8(%RBP),%R13

(161) 0x237b3b JE	237b86

(161) 0x237b3d LEA	0x1(%RSI),%R9

(161) 0x237b41 MOV	%RSI,%RAX

(161) 0x237b44 SHR	$0x20,%RAX

(161) 0x237b48 JE	237b60

(161) 0x237b4a MOV	%RSI,%RAX

(161) 0x237b4d CQTO

(161) 0x237b4f IDIV	%R13

(161) 0x237b52 MOV	%RDX,%R8

(161) 0x237b55 MOV	%RAX,%RDI

(161) 0x237b58 JMP	237b6c

0x237b5a NOPW	(%RAX,%RAX,1)

(161) 0x237b60 MOV	%ESI,%EAX

(161) 0x237b62 XOR	%EDX,%EDX

(161) 0x237b64 DIV	%R13D

(161) 0x237b67 MOV	%EDX,%R8D

(161) 0x237b6a MOV	%EAX,%EDI

(161) 0x237b6c MOV	%R9,%RAX

(161) 0x237b6f SHR	$0x20,%RAX

(161) 0x237b73 JNE	237a30

(161) 0x237b79 MOV	%R9D,%EAX

(161) 0x237b7c XOR	%EDX,%EDX

(161) 0x237b7e DIV	%R13D

(161) 0x237b81 JMP	237a38

0x237b86 MOV	-0x88(%RBP),%RAX

0x237b8d CMP	%RAX,-0x90(%RBP)

0x237b94 MOV	-0x98(%RBP),%R15

0x237b9b MOV	-0x2c(%RBP),%R8D

0x237b9f MOV	-0x38(%RBP),%R9

0x237ba3 MOV	-0x58(%RBP),%R10

0x237ba7 JNE	237bc8

0x237ba9 MOV	$0x211e50,%EDI

0x237bae MOV	-0x4c(%RBP),%ESI

0x237bb1 CALL	261370 <@plt_start@+0x500>

0x237bb6 ADD	$0x98,%RSP

0x237bbd POP	%RBX

0x237bbe POP	%R12

0x237bc0 POP	%R13

0x237bc2 POP	%R14

0x237bc4 POP	%R15

0x237bc6 POP	%RBP

0x237bc7 RET

0x237bc8 ADD	%RAX,%RCX

0x237bcb JMP	237c49

0x237bcd NOPL	(%RAX)

(160) 0x237bd0 MOV	%RCX,%RAX

(160) 0x237bd3 CQTO

(160) 0x237bd5 IDIV	%R13

(160) 0x237bd8 LEA	(%R9,%RAX,1),%ESI

(160) 0x237bdc ADD	%R8D,%EDX

(160) 0x237bdf MOVSXD	%EDX,%RDX

(160) 0x237be2 MOVSXD	%ESI,%RSI

(160) 0x237be5 MOV	%R11,%RDI

(160) 0x237be8 IMUL	%RSI,%RDI

(160) 0x237bec ADD	%RDX,%RDI

(160) 0x237bef VMOVSD	(%R10,%RDI,8),%XMM0

(160) 0x237bf5 MOV	-0x78(%RBP),%RDI

(160) 0x237bf9 IMUL	%RSI,%RDI

(160) 0x237bfd ADD	%RDX,%RDI

(160) 0x237c00 MOV	-0x70(%RBP),%RBX

(160) 0x237c04 VMOVSD	%XMM0,(%RBX,%RDI,8)

(160) 0x237c09 ADD	-0x40(%RBP),%EAX

(160) 0x237c0c CLTQ

(160) 0x237c0e IMUL	%R14,%RAX

(160) 0x237c12 ADD	%RDX,%RAX

(160) 0x237c15 VADDSD	(%R12,%RAX,8),%XMM0,%XMM0

(160) 0x237c1b MOV	%R14,%RAX

(160) 0x237c1e IMUL	%RSI,%RAX

(160) 0x237c22 ADD	%RDX,%RAX

(160) 0x237c25 VSUBSD	(%R12,%RAX,8),%XMM0,%XMM0

(160) 0x237c2b IMUL	-0x68(%RBP),%RSI

(160) 0x237c30 ADD	%RDX,%RSI

(160) 0x237c33 MOV	-0x60(%RBP),%RAX

(160) 0x237c37 VMOVSD	%XMM0,(%RAX,%RSI,8)

(160) 0x237c3c CMP	%R15,%RCX

(160) 0x237c3f LEA	0x1(%RCX),%RCX

(160) 0x237c43 JGE	237ba9

(160) 0x237c49 MOV	%RCX,%RAX

(160) 0x237c4c SHR	$0x20,%RAX

(160) 0x237c50 JNE	237bd0

(160) 0x237c56 MOV	%ECX,%EAX

(160) 0x237c58 XOR	%EDX,%EDX

(160) 0x237c5a DIV	%R13D

(160) 0x237c5d JMP	237bd8

0x237c62 INT	$0x3

0x237c63 INT	$0x3

0x237c64 INT	$0x3

0x237c65 INT	$0x3

0x237c66 INT	$0x3

0x237c67 INT	$0x3

0x237c68 INT	$0x3

0x237c69 INT	$0x3

0x237c6a INT	$0x3

0x237c6b INT	$0x3

0x237c6c INT	$0x3

0x237c6d INT	$0x3

0x237c6e INT	$0x3

0x237c6f INT	$0x3

Path /

Average path: Display a virtual path defined by average values of all real paths

Source file and lines	advec_mom.cpp:62-66
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_mom.cpp:62-66
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 10% of vector register length is used (average across all SSE/AVX instructions). By vectorizing your function, you can lower the cost of an iteration from 18.17 to 2.77 cycles (6.56x speedup).

Details

All SSE/AVX instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 192 bytes. The binary function is storing 148 bytes.

General properties

nb instructions	124
nb uops	109
loop length	446
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	23

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.17 cycles
front end	18.17 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.75	8.75	8.75	8.75	5.00	16.67	16.67	16.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.75	8.75	8.75	8.75	5.00	16.67	16.67	16.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.17
Dispatch	16.67
Overall L1	18.17

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	11%
store	10%
mul	12%
add-sub	9%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.17 cycles. At this rate:

11% of peak load performance is reached (10.57 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
12% of peak store performance is reached (8.15 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Performance is limited by instruction throughput (loading/decoding program instructions to execution core) (front-end is a bottleneck). By removing all these bottlenecks, you can lower the cost of an iteration from 18.17 to 16.67 cycles (1.09x speedup).

ASM code

In the binary file, the address of the function is: 2378d0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB $0x98,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RDX),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RCX),%R15D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x4,%R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
CMP %EAX,%R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JL 237bb6 <.omp_outlined..4.312+0x2e6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%R8),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%R9),%R13D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x4,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %EAX,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JL 237bb6 <.omp_outlined..4.312+0x2e6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0x40(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA -0x1(%RCX),%R14D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
DEC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %EAX,-0x2c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
SUB %EAX,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
SUB %R14D,%R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %R13,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
DEC %R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVQ $0,-0x80(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,-0x48(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVQ $0x1,-0xb8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVL $0,-0x50(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDI),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0xb8(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x50(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x80(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x48(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x211e38,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %ESI,-0x4c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CALL 261360 <@plt_start@+0x4f0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV -0x2c(%RBP),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x48(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R15,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMOVL %RAX,%R15	1	0.50	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R15,-0x48(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0x80(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R15,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JG 237ba9 <.omp_outlined..4.312+0x2d9>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R14,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x20(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RSI),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RSI),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0x78(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RDI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0x70(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RAX),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RAX),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RDX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SUB %RCX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x2,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JB 237c49 <.omp_outlined..4.312+0x379>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R10,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R9,-0x38(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,-0x98(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $-0x2,%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R15,-0x88(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R11,-0xb0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R13,-0xa8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R12,-0xa0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JMP 237b3d <.omp_outlined..4.312+0x26d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV -0x88(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %RAX,-0x90(%RBP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x98(%RBP),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x2c(%RBP),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x58(%RBP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JNE 237bc8 <.omp_outlined..4.312+0x2f8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV $0x211e50,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x4c(%RBP),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CALL 261370 <@plt_start@+0x500>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
ADD $0x98,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 237c49 <.omp_outlined..4.312+0x379>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3

Source file and lines	advec_mom.cpp:62-66
Module	exec

The function is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/advec_mom.cpp:62-66
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h:69

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Found no such bottlenecks but see expert reports for more complex bottlenecks.

No data for this section

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences

Type of elements and instruction set

No instructions are processing arithmetic or math operations on FP elements. This function is probably writing/copying data or processing integer elements.

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 192 bytes. The binary function is storing 148 bytes.

General properties

nb instructions	124
nb uops	109
loop length	446
used x86 registers	16
used mmx registers	0
used xmm registers	0
used ymm registers	0
used zmm registers	0
nb stack references	23

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	18.17 cycles
front end	18.17 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	8.75	8.75	8.75	8.75	5.00	16.67	16.67	16.67	0.00	0.00	0.00	0.00	0.00	0.00
cycles	8.75	8.75	8.75	8.75	5.00	16.67	16.67	16.67	0.00	0.00	0.00	0.00	0.00	0.00

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	18.17
Dispatch	16.67
Overall L1	18.17

Vectorization ratios

all	0%
load	0%
store	0%
mul	0%
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	10%
load	11%
store	10%
mul	12%
add-sub	9%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	11%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 18.17 cycles. At this rate:

11% of peak load performance is reached (10.57 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
12% of peak store performance is reached (8.15 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

ASM code

In the binary file, the address of the function is: 2378d0

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
PUSH %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSP,%RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
PUSH %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
SUB $0x98,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV (%RDX),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RCX),%R15D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x4,%R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,-0x40(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
CMP %EAX,%R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JL 237bb6 <.omp_outlined..4.312+0x2e6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV (%R8),%EAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%R9),%R13D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x4,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP %EAX,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JL 237bb6 <.omp_outlined..4.312+0x2e6>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV -0x40(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA -0x1(%RCX),%R14D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
DEC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %EAX,-0x2c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
SUB %EAX,%R13D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
SUB %R14D,%R15D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %R13,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
DEC %R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVQ $0,-0x80(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,-0x48(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVQ $0x1,-0xb8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVL $0,-0x50(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RDI),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
SUB $0x8,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0xb8(%RBP),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x50(%RBP),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x80(%RBP),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
LEA -0x48(%RBP),%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV $0x211e38,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %ESI,-0x4c(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV $0x22,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH $0x1	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
PUSH %RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50
CALL 261360 <@plt_start@+0x4f0>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
MOV -0x2c(%RBP),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x20,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x48(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R15,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMOVL %RAX,%R15	1	0.50	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %R15,-0x48(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV -0x80(%RBP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %R15,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JG 237ba9 <.omp_outlined..4.312+0x2d9>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R14,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x28(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x20(%RBP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x18(%RBP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RBP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RSI),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RSI),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0x78(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RDI),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,-0x70(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV (%RAX),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x10(%RAX),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV (%RDX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x68(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RDX),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,-0x60(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SUB %RCX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CMP $0x2,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JB 237c49 <.omp_outlined..4.312+0x379>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R10,-0x58(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R9,-0x38(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,-0x98(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,-0x90(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
AND $-0x2,%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R15,-0x88(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R11,-0xb0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R13,-0xa8(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R12,-0xa0(%RBP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JMP 237b3d <.omp_outlined..4.312+0x26d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
NOPW (%RAX,%RAX,1)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
MOV -0x88(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CMP %RAX,-0x90(%RBP)	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV -0x98(%RBP),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x2c(%RBP),%R8D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x38(%RBP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV -0x58(%RBP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JNE 237bc8 <.omp_outlined..4.312+0x2f8>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV $0x211e50,%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV -0x4c(%RBP),%ESI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
CALL 261370 <@plt_start@+0x500>	2	0.50	0	0	0	0.50	0.33	0.33	0.33	0	0	0	0	0	0	0	0.50
ADD $0x98,%RSP	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
POP %RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
POP %RBP	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.33
RET	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
JMP 237c49 <.omp_outlined..4.312+0x379>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
NOPL (%RAX)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.09
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3
INT $0x3

▶Scalability Runs Description

Run 2x1	Number processes: 2Number nodes: 1Number processes per node: 2Run Command: <executable> MPI Command: mpirun -np <number_processes>Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/run/oneview_runs/compilers/aocc_15/oneview_run_1708555871I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spreadOMP_NUM_THREADS: 1
Run 2x2	OMP_NUM_THREADS: 2I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x4	OMP_NUM_THREADS: 4I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x8	OMP_NUM_THREADS: 8I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x16	OMP_NUM_THREADS: 16I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x32	OMP_NUM_THREADS: 32I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x64	OMP_NUM_THREADS: 64I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x96	OMP_NUM_THREADS: 96I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread

(2x1) Efficiency	(2x1) Potential Speed-Up (%)	(2x2) Efficiency	(2x2) Potential Speed-Up (%)	(2x4) Efficiency	(2x4) Potential Speed-Up (%)	(2x8) Efficiency	(2x8) Potential Speed-Up (%)	(2x16) Efficiency	(2x16) Potential Speed-Up (%)	(2x32) Efficiency	(2x32) Potential Speed-Up (%)	(2x64) Efficiency	(2x64) Potential Speed-Up (%)	(2x96) Efficiency	(2x96) Potential Speed-Up (%)
1	0	1	0	1	0	0.99	0.01	0.92	0.13	0.61	0.78	0.31	1.53	0.21	1.99

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
2x1	2	1	1	1	25.85	1.51
2x2	4	1	2	2	12.95	1.5
2x4	8	1	3.99	4	6.51	1.5
2x8	16	0.99	7.94	8	3.28	1.5
2x16	32	0.92	14.67	16	2.01	1.54
2x32	64	0.61	19.41	32	1.49	1.98
2x64	128	0.31	19.71	64	1.5	2.21
2x96	192	0.21	19.71	96	1.36	2.5

Name	Coverage (%)	Time (s)
▼.omp_outlined..4.312–	1.51	25.82
○Loop 161 - advec_mom.cpp:63-66 - exec	1.51	25.82
○Loop 160 - advec_mom.cpp:63-66 - exec	0	0

Report Configuration

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Execution units bottlenecks

CALL instructions

Details

Type of elements and instruction set

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Colums Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency