OV - - Loop 318

	Loop Id: 318	Module: exec	Source: PdV.cpp:49-63 [...]	Coverage: 4.49%

0x24a760 MOV	%R15,%RAX

0x24a763 CQTO

0x24a765 IDIV	%R12

0x24a768 MOV	0xc(%RSP),%R11D    [54]

0x24a76d MOV	%RAX,0x38(%RSP)    [54]

0x24a772 LEA	(%R9,%R8,1),%EDI

0x24a776 MOV	%R8,0x40(%RSP)    [54]

0x24a77b LEA	(%R9,%RAX,1),%R8D

0x24a77f ADD	%R11D,%R14D

0x24a782 ADD	%R11D,%EDX

0x24a785 MOVSXD	%R14D,%RAX

0x24a788 MOV	%RAX,0x48(%RSP)    [54]

0x24a78d MOVSXD	%EDX,%R15

0x24a790 MOVSXD	%EDI,%R13

0x24a793 MOVSXD	%R8D,%RSI

0x24a796 MOV	%R10,%R12

0x24a799 IMUL	%R13,%R12

0x24a79d MOV	%R13,0x50(%RSP)    [54]

0x24a7a2 MOV	%R10,%R14

0x24a7a5 IMUL	%RSI,%R14

0x24a7a9 MOV	%R10,%R8

0x24a7ac MOV	%RSI,%R10

0x24a7af MOV	%RSI,0x130(%RSP)    [54]

0x24a7b7 LEA	(%R12,%RAX,1),%RDX

0x24a7bb MOV	0x70(%RSP),%RSI    [54]

0x24a7c0 VMOVSD	(%RSI,%RDX,8),%XMM2    [60]

0x24a7c5 LEA	(%R14,%R15,1),%RDX

0x24a7c9 VMOVHPD	(%RSI,%RDX,8),%XMM2,%XMM3    [31]

0x24a7ce MOV	0x20(%RSP),%RAX    [54]

0x24a7d3 LEA	(%R9,%RAX,1),%EDX

0x24a7d7 ADD	%R11D,%ECX

0x24a7da MOVSXD	%ECX,%RDI

0x24a7dd MOVSXD	%EDX,%RBX

0x24a7e0 MOV	%R8,%RAX

0x24a7e3 IMUL	%RBX,%RAX

0x24a7e7 MOV	%RAX,0x180(%RSP)    [54]

0x24a7ef MOV	%RBX,0x128(%RSP)    [54]

0x24a7f7 LEA	(%RAX,%RDI,1),%RCX

0x24a7fb VMOVSD	(%RSI,%RCX,8),%XMM2    [80]

0x24a800 MOV	0x18(%RSP),%RAX    [54]

0x24a805 ADD	%R11D,%EAX

0x24a808 MOVSXD	%EAX,%R11

0x24a80b MOV	%R11,0x110(%RSP)    [54]

0x24a813 MOV	0x10(%RSP),%RAX    [54]

0x24a818 LEA	(%R9,%RAX,1),%ECX

0x24a81c MOVSXD	%ECX,%RDX

0x24a81f IMUL	%RDX,%R8

0x24a823 MOV	%R8,0x190(%RSP)    [54]

0x24a82b MOV	%RDX,0x18(%RSP)    [54]

0x24a830 LEA	(%R8,%R11,1),%RCX

0x24a834 VMOVHPD	(%RSI,%RCX,8),%XMM2,%XMM4    [41]

0x24a839 MOV	0x68(%RSP),%R8    [54]

0x24a83e MOV	%R8,%RCX

0x24a841 IMUL	%R13,%RCX

0x24a845 MOV	%RCX,0x188(%RSP)    [54]

0x24a84d MOV	0x48(%RSP),%R13    [54]

0x24a852 ADD	%R13,%RCX

0x24a855 MOV	0x108(%RSP),%R11    [54]

0x24a85d VMOVSD	(%R11,%RCX,8),%XMM2    [19]

0x24a863 MOV	%R8,%RCX

0x24a866 IMUL	%R10,%RCX

0x24a86a MOV	%RCX,0x178(%RSP)    [54]

0x24a872 MOV	%R15,%R10

0x24a875 ADD	%R15,%RCX

0x24a878 VMOVHPS	(%R11,%RCX,8),%XMM2,%XMM0    [10]

0x24a87e VMOVAPS	%XMM0,0x1b0(%RSP)    [54]

0x24a887 MOV	%R8,%RAX

0x24a88a IMUL	%RBX,%RAX

0x24a88e MOV	%RAX,0x170(%RSP)    [54]

0x24a896 LEA	(%RAX,%RDI,1),%RCX

0x24a89a VMOVSD	(%R11,%RCX,8),%XMM2    [62]

0x24a8a0 MOV	%R8,%RAX

0x24a8a3 IMUL	%RDX,%RAX

0x24a8a7 MOV	%RAX,0x168(%RSP)    [54]

0x24a8af MOV	0x110(%RSP),%RBX    [54]

0x24a8b7 LEA	(%RAX,%RBX,1),%RCX

0x24a8bb VMOVHPD	(%R11,%RCX,8),%XMM2,%XMM6    [68]

0x24a8c1 MOV	0x40(%RSP),%RAX    [54]

0x24a8c6 LEA	0x1(%R9,%RAX,1),%ECX

0x24a8cb MOVSXD	%ECX,%RCX

0x24a8ce MOV	%RCX,0x40(%RSP)    [54]

0x24a8d3 MOV	%R8,%R15

0x24a8d6 IMUL	%RCX,%R15

0x24a8da LEA	(%R15,%R13,1),%RCX

0x24a8de VMOVSD	(%R11,%RCX,8),%XMM2    [36]

0x24a8e4 MOV	0x38(%RSP),%RAX    [54]

0x24a8e9 ADD	%R9D,%EAX

0x24a8ec INC	%EAX

0x24a8ee CLTQ

0x24a8f0 MOV	%RAX,0x38(%RSP)    [54]

0x24a8f5 MOV	%R8,%RDX

0x24a8f8 IMUL	%RAX,%RDX

0x24a8fc LEA	(%RDX,%R10,1),%RAX

0x24a900 VMOVHPD	(%R11,%RAX,8),%XMM2,%XMM7    [45]

0x24a906 MOV	0x20(%RSP),%RAX    [54]

0x24a90b ADD	%R9D,%EAX

0x24a90e INC	%EAX

0x24a910 CLTQ

0x24a912 MOV	%RAX,0x20(%RSP)    [54]

0x24a917 MOV	%R8,%RCX

0x24a91a IMUL	%RAX,%RCX

0x24a91e LEA	(%RCX,%RDI,1),%RAX

0x24a922 VMOVSD	(%R11,%RAX,8),%XMM2    [34]

0x24a928 MOV	0x10(%RSP),%RAX    [54]

0x24a92d ADD	%R9D,%EAX

0x24a930 INC	%EAX

0x24a932 MOVSXD	%EAX,%R9

0x24a935 MOV	%R9,0x10(%RSP)    [54]

0x24a93a MOV	%R8,%RAX

0x24a93d IMUL	%R9,%RAX

0x24a941 MOV	%RBX,%R8

0x24a944 LEA	(%RAX,%RBX,1),%R13

0x24a948 VMOVHPD	(%R11,%R13,8),%XMM2,%XMM8    [42]

0x24a94e MOV	0x48(%RSP),%R13    [54]

0x24a953 LEA	0x1(%R12,%R13,1),%R12

0x24a958 VMOVSD	(%RSI,%R12,8),%XMM2    [16]

0x24a95e MOV	%R10,%R12

0x24a961 LEA	0x1(%R14,%R10,1),%R14

0x24a966 VMOVHPD	(%RSI,%R14,8),%XMM2,%XMM9    [50]

0x24a96c MOV	%RDI,%R14

0x24a96f MOV	0x180(%RSP),%R9    [54]

0x24a977 LEA	0x1(%R9,%RDI,1),%RBX

0x24a97c VMOVSD	(%RSI,%RBX,8),%XMM2    [39]

0x24a981 MOV	%R8,%RBX

0x24a984 MOV	0x190(%RSP),%R8    [54]

0x24a98c LEA	0x1(%R8,%RBX,1),%R10

0x24a991 VMOVHPD	(%RSI,%R10,8),%XMM2,%XMM10    [40]

0x24a997 MOV	0x188(%RSP),%RSI    [54]

0x24a99f LEA	0x1(%RSI,%R13,1),%R10

0x24a9a4 VMOVSD	(%R11,%R10,8),%XMM2    [11]

0x24a9aa MOV	0x178(%RSP),%RSI    [54]

0x24a9b2 LEA	0x1(%RSI,%R12,1),%R9

0x24a9b7 VMOVHPD	(%R11,%R9,8),%XMM2,%XMM11    [32]

0x24a9bd MOV	0x170(%RSP),%RSI    [54]

0x24a9c5 LEA	0x1(%RSI,%RDI,1),%R8

0x24a9ca VMOVSD	(%R11,%R8,8),%XMM2    [15]

0x24a9d0 MOV	0x168(%RSP),%RSI    [54]

0x24a9d8 LEA	0x1(%RSI,%RBX,1),%RDI

0x24a9dd VMOVHPD	(%R11,%RDI,8),%XMM2,%XMM12    [78]

0x24a9e3 LEA	0x1(%R15,%R13,1),%RSI

0x24a9e8 VMOVSD	(%R11,%RSI,8),%XMM2    [46]

0x24a9ee LEA	0x1(%RDX,%R12,1),%RDX

0x24a9f3 VMOVHPD	(%R11,%RDX,8),%XMM2,%XMM13    [71]

0x24a9f9 LEA	0x1(%RCX,%R14,1),%RCX

0x24a9fe VMOVSD	(%R11,%RCX,8),%XMM2    [21]

0x24aa04 LEA	0x1(%RAX,%RBX,1),%RAX

0x24aa09 VMOVHPD	(%R11,%RAX,8),%XMM2,%XMM14    [3]

0x24aa0f MOV	0x100(%RSP),%R8    [54]

0x24aa17 MOV	%R8,%RAX

0x24aa1a MOV	0x50(%RSP),%RCX    [54]

0x24aa1f IMUL	%RCX,%RAX

0x24aa23 ADD	%R13,%RAX

0x24aa26 MOV	0xf8(%RSP),%R9    [54]

0x24aa2e VMOVSD	(%R9,%RAX,8),%XMM2    [27]

0x24aa34 MOV	%R8,%RAX

0x24aa37 MOV	0x130(%RSP),%RDX    [54]

0x24aa3f IMUL	%RDX,%RAX

0x24aa43 ADD	%R12,%RAX

0x24aa46 VMOVHPD	(%R9,%RAX,8),%XMM2,%XMM15    [44]

0x24aa4c MOV	%R8,%RAX

0x24aa4f MOV	0x128(%RSP),%R15    [54]

0x24aa57 IMUL	%R15,%RAX

0x24aa5b ADD	%R14,%RAX

0x24aa5e VMOVSD	(%R9,%RAX,8),%XMM2    [8]

0x24aa64 MOV	%R8,%RAX

0x24aa67 MOV	0x18(%RSP),%RDI    [54]

0x24aa6c IMUL	%RDI,%RAX

0x24aa70 ADD	%RBX,%RAX

0x24aa73 VMOVHPD	(%R9,%RAX,8),%XMM2,%XMM5    [22]

0x24aa79 MOV	0xf0(%RSP),%R10    [54]

0x24aa81 MOV	%R10,%RAX

0x24aa84 IMUL	%RCX,%RAX

0x24aa88 LEA	(%RAX,%R13,1),%RCX

0x24aa8c MOV	0xe8(%RSP),%R11    [54]

0x24aa94 VMOVSD	(%R11,%RCX,8),%XMM0    [1]

0x24aa9a MOV	%R10,%RCX

0x24aa9d IMUL	%RDX,%RCX

0x24aaa1 LEA	(%RCX,%R12,1),%RDX

0x24aaa5 VMOVHPD	(%R11,%RDX,8),%XMM0,%XMM2    [72]

0x24aaab MOV	%R10,%RDX

0x24aaae IMUL	%R15,%RDX

0x24aab2 LEA	(%RDX,%R14,1),%RSI

0x24aab6 VMOVSD	(%R11,%RSI,8),%XMM1    [28]

0x24aabc MOV	%R10,%RSI

0x24aabf IMUL	%RDI,%RSI

0x24aac3 LEA	(%RSI,%RBX,1),%RDI

0x24aac7 VMOVHPD	(%R11,%RDI,8),%XMM1,%XMM1    [53]

0x24aacd VINSERTF128	$0x1,%XMM3,%YMM4,%YMM3

0x24aad3 ADD	%R13,%RAX

0x24aad6 INC	%RAX

0x24aad9 VMOVSD	(%R11,%RAX,8),%XMM4    [64]

0x24aadf LEA	0x1(%RCX,%R12,1),%RAX

0x24aae4 VMOVHPD	(%R11,%RAX,8),%XMM4,%XMM0    [4]

0x24aaea VINSERTF128	$0x1,0x1b0(%RSP),%YMM6,%YMM4    [54]

0x24aaf5 LEA	0x1(%RDX,%R14,1),%RAX

0x24aafa VMOVSD	(%R11,%RAX,8),%XMM6    [48]

0x24ab00 VINSERTF128	$0x1,%XMM7,%YMM8,%YMM7

0x24ab06 VADDPD	%YMM7,%YMM4,%YMM8

0x24ab0a VADDPD	%YMM4,%YMM8,%YMM4

0x24ab0e VADDPD	%YMM4,%YMM7,%YMM4

0x24ab12 VMULPD	%YMM4,%YMM3,%YMM3

0x24ab16 VINSERTF128	$0x1,%XMM9,%YMM10,%YMM4

0x24ab1c VINSERTF128	$0x1,%XMM11,%YMM12,%YMM7

0x24ab22 VINSERTF128	$0x1,%XMM13,%YMM14,%YMM8

0x24ab28 VADDPD	%YMM7,%YMM8,%YMM9

0x24ab2c VADDPD	%YMM7,%YMM9,%YMM7

0x24ab30 VADDPD	%YMM7,%YMM8,%YMM7

0x24ab34 VMOVAPD	0x200(%RSP),%YMM8    [54]

0x24ab3d VMULPD	%YMM3,%YMM8,%YMM3

0x24ab41 VMULPD	%YMM7,%YMM4,%YMM7

0x24ab45 MOV	0x20(%RBP),%RAX    [66]

0x24ab49 VBROADCASTSD	(%RAX),%YMM4    [24]

0x24ab4e VMULPD	%YMM3,%YMM4,%YMM3

0x24ab52 VMOVAPD	0x1e0(%RSP),%YMM9    [54]

0x24ab5b VMULPD	%YMM3,%YMM9,%YMM3

0x24ab5f VMULPD	%YMM7,%YMM8,%YMM7

0x24ab63 VMULPD	%YMM7,%YMM4,%YMM7

0x24ab67 VMULPD	%YMM7,%YMM9,%YMM7

0x24ab6b VSUBPD	%YMM3,%YMM7,%YMM7

0x24ab6f VINSERTF128	$0x1,%XMM15,%YMM5,%YMM3

0x24ab75 VINSERTF128	$0x1,%XMM2,%YMM1,%YMM1

0x24ab7b LEA	0x1(%RSI,%RBX,1),%RAX

0x24ab80 VMOVHPD	(%R11,%RAX,8),%XMM6,%XMM2    [63]

0x24ab86 VINSERTF128	$0x1,%XMM0,%YMM2,%YMM0

0x24ab8c VADDPD	%YMM0,%YMM1,%YMM2

0x24ab90 VADDPD	%YMM2,%YMM1,%YMM1

0x24ab94 VADDPD	%YMM1,%YMM0,%YMM0

0x24ab98 VMULPD	%YMM0,%YMM3,%YMM0

0x24ab9c VMULPD	%YMM0,%YMM8,%YMM0

0x24aba0 VMULPD	%YMM0,%YMM4,%YMM3

0x24aba4 MOV	%R8,%RAX

0x24aba7 MOV	0x40(%RSP),%RDX    [54]

0x24abac IMUL	%RDX,%RAX

0x24abb0 ADD	%R13,%RAX

0x24abb3 VMOVSD	(%R9,%RAX,8),%XMM0    [77]

0x24abb9 MOV	%R8,%RAX

0x24abbc MOV	0x38(%RSP),%RDI    [54]

0x24abc1 IMUL	%RDI,%RAX

0x24abc5 ADD	%R12,%RAX

0x24abc8 VMOVHPD	(%R9,%RAX,8),%XMM0,%XMM0    [18]

0x24abce MOV	%R8,%RAX

0x24abd1 MOV	0x20(%RSP),%RCX    [54]

0x24abd6 IMUL	%RCX,%RAX

0x24abda ADD	%R14,%RAX

0x24abdd VMOVSD	(%R9,%RAX,8),%XMM1    [59]

0x24abe3 MOV	%R8,%RAX

0x24abe6 MOV	0x10(%RSP),%R8    [54]

0x24abeb IMUL	%R8,%RAX

0x24abef ADD	%RBX,%RAX

0x24abf2 VMOVHPD	(%R9,%RAX,8),%XMM1,%XMM1    [52]

0x24abf8 VINSERTF128	$0x1,%XMM0,%YMM1,%YMM0

0x24abfe IMUL	%R10,%RCX

0x24ac02 MOV	%RCX,%R9

0x24ac05 MOV	%RDX,%RCX

0x24ac08 IMUL	%R10,%RCX

0x24ac0c IMUL	%R10,%RDI

0x24ac10 LEA	(%RCX,%R13,1),%RAX

0x24ac14 VMOVSD	(%R11,%RAX,8),%XMM1    [43]

0x24ac1a MOV	%R12,%RSI

0x24ac1d LEA	(%RDI,%R12,1),%RAX

0x24ac21 VMOVHPD	(%R11,%RAX,8),%XMM1,%XMM1    [58]

0x24ac27 IMUL	%R10,%R8

0x24ac2b LEA	(%R9,%R14,1),%RAX

0x24ac2f VMOVSD	(%R11,%RAX,8),%XMM2    [26]

0x24ac35 LEA	(%R8,%RBX,1),%RAX

0x24ac39 VMOVHPD	(%R11,%RAX,8),%XMM2,%XMM2    [5]

0x24ac3f LEA	0x1(%R9,%R14,1),%RAX

0x24ac44 MOV	%R14,%R12

0x24ac47 MOV	%R14,0x120(%RSP)    [54]

0x24ac4f LEA	0x1(%RCX,%R13,1),%RCX

0x24ac54 MOV	%R13,%R9

0x24ac57 LEA	0x1(%RDI,%RSI,1),%RDX

0x24ac5c MOV	%RSI,%RDI

0x24ac5f VMOVSD	(%R11,%RCX,8),%XMM5    [25]

0x24ac65 VMOVHPD	(%R11,%RDX,8),%XMM5,%XMM5    [79]

0x24ac6b LEA	0x1(%R8,%RBX,1),%RCX

0x24ac70 MOV	%RBX,%R13

0x24ac73 VMOVSD	(%R11,%RAX,8),%XMM6    [76]

0x24ac79 VMOVHPD	(%R11,%RCX,8),%XMM6,%XMM6    [67]

0x24ac7f VINSERTF128	$0x1,%XMM1,%YMM2,%YMM1

0x24ac85 VINSERTF128	$0x1,%XMM5,%YMM6,%YMM2

0x24ac8b VADDPD	%YMM2,%YMM1,%YMM5

0x24ac8f VADDPD	%YMM5,%YMM1,%YMM1

0x24ac93 VADDPD	%YMM1,%YMM2,%YMM1

0x24ac97 VMULPD	%YMM1,%YMM0,%YMM0

0x24ac9b VMULPD	%YMM0,%YMM8,%YMM0

0x24ac9f VMULPD	%YMM0,%YMM4,%YMM0

0x24aca3 VMULPD	%YMM0,%YMM9,%YMM0

0x24aca7 VADDPD	%YMM0,%YMM7,%YMM5

0x24acab MOV	0xe0(%RSP),%RSI    [54]

0x24acb3 MOV	%RSI,%RAX

0x24acb6 MOV	%R15,%R10

0x24acb9 IMUL	%R15,%RAX

0x24acbd MOV	%RSI,%RCX

0x24acc0 MOV	0x18(%RSP),%R8    [54]

0x24acc5 IMUL	%R8,%RCX

0x24acc9 MOV	%RSI,%RDX

0x24accc MOV	0x50(%RSP),%R14    [54]

0x24acd1 IMUL	%R14,%RDX

0x24acd5 MOV	0x130(%RSP),%R15    [54]

0x24acdd IMUL	%R15,%RSI

0x24ace1 ADD	%R12,%RAX

0x24ace4 ADD	%R9,%RDX

0x24ace7 MOV	%RDI,%RBX

0x24acea MOV	%RDI,0x118(%RSP)    [54]

0x24acf2 ADD	%RDI,%RSI

0x24acf5 MOV	0xd8(%RSP),%RDI    [54]

0x24acfd VMOVSD	(%RDI,%RDX,8),%XMM0    [49]

0x24ad02 VMOVHPD	(%RDI,%RSI,8),%XMM0,%XMM0    [74]

0x24ad07 MOV	%R13,%R11

0x24ad0a ADD	%R13,%RCX

0x24ad0d VMOVSD	(%RDI,%RAX,8),%XMM1    [33]

0x24ad12 VMOVHPD	(%RDI,%RCX,8),%XMM1,%XMM1    [7]

0x24ad17 VINSERTF128	$0x1,%XMM0,%YMM1,%YMM4

0x24ad1d VMOVAPD	0x1c0(%RSP),%YMM0    [54]

0x24ad26 VDIVPD	%YMM4,%YMM0,%YMM6

0x24ad2a MOV	0xd0(%RSP),%RSI    [54]

0x24ad32 MOV	%RSI,%RAX

0x24ad35 IMUL	%R10,%RAX

0x24ad39 MOV	%R10,%R13

0x24ad3c MOV	%RSI,%RCX

0x24ad3f IMUL	%R8,%RCX

0x24ad43 MOV	%RSI,%RDX

0x24ad46 IMUL	%R14,%RDX

0x24ad4a IMUL	%R15,%RSI

0x24ad4e MOV	%R15,%R12

0x24ad51 MOV	0x120(%RSP),%R10    [54]

0x24ad59 ADD	%R10,%RAX

0x24ad5c ADD	%R11,%RCX

0x24ad5f ADD	%R9,%RDX

0x24ad62 ADD	%RBX,%RSI

0x24ad65 MOV	0xc8(%RSP),%RDI    [54]

0x24ad6d VMOVSD	(%RDI,%RDX,8),%XMM0    [75]

0x24ad72 VMOVHPD	(%RDI,%RSI,8),%XMM0,%XMM0    [56]

0x24ad77 VMOVSD	(%RDI,%RAX,8),%XMM1    [37]

0x24ad7c VMOVHPD	(%RDI,%RCX,8),%XMM1,%XMM1    [12]

0x24ad81 MOV	0xc0(%RSP),%R11    [54]

0x24ad89 MOV	%R11,%RCX

0x24ad8c IMUL	%R13,%RCX

0x24ad90 MOV	%R11,%R15

0x24ad93 IMUL	%R8,%R15

0x24ad97 MOV	%R11,%R8

0x24ad9a IMUL	%R14,%R8

0x24ad9e MOV	%R12,%RBX

0x24ada1 IMUL	%R12,%R11

0x24ada5 ADD	%R10,%RCX

0x24ada8 MOV	%RCX,0x10(%RSP)    [54]

0x24adad MOV	%R10,%R13

0x24adb0 ADD	%R9,%R8

0x24adb3 MOV	0x118(%RSP),%RAX    [54]

0x24adbb ADD	%RAX,%R11

0x24adbe MOV	0xb8(%RSP),%RDX    [54]

0x24adc6 VMOVSD	(%RDX,%R8,8),%XMM2    [51]

0x24adcc VMOVHPD	(%RDX,%R11,8),%XMM2,%XMM2    [9]

0x24add2 MOV	0x110(%RSP),%R12    [54]

0x24adda ADD	%R12,%R15

0x24addd VMOVSD	(%RDX,%RCX,8),%XMM7    [69]

0x24ade2 VMOVHPD	(%RDX,%R15,8),%XMM7,%XMM7    [57]

0x24ade8 VINSERTF128	$0x1,%XMM0,%YMM1,%YMM0

0x24adee VINSERTF128	$0x1,%XMM2,%YMM7,%YMM1

0x24adf4 MOV	0xb0(%RSP),%RDI    [54]

0x24adfc MOV	%RDI,%RCX

0x24adff IMUL	%R14,%RCX

0x24ae03 MOV	%R14,%R10

0x24ae06 ADD	%R9,%RCX

0x24ae09 MOV	%R9,%RSI

0x24ae0c MOV	0xa8(%RSP),%R9    [54]

0x24ae14 VMOVSD	(%R9,%RCX,8),%XMM2    [13]

0x24ae1a MOV	%RDI,%RCX

0x24ae1d MOV	%RBX,%R14

0x24ae20 IMUL	%RBX,%RCX

0x24ae24 ADD	%RAX,%RCX

0x24ae27 VMOVHPD	(%R9,%RCX,8),%XMM2,%XMM2    [55]

0x24ae2d MOV	%RDI,%RCX

0x24ae30 MOV	0x128(%RSP),%RBX    [54]

0x24ae38 IMUL	%RBX,%RCX

0x24ae3c ADD	%R13,%RCX

0x24ae3f VMOVSD	(%R9,%RCX,8),%XMM7    [35]

0x24ae45 MOV	%RDI,%RCX

0x24ae48 IMUL	0x18(%RSP),%RCX    [54]

0x24ae4e ADD	%R12,%RCX

0x24ae51 VMOVHPD	(%R9,%RCX,8),%XMM7,%XMM7    [61]

0x24ae57 VINSERTF128	$0x1,%XMM2,%YMM7,%YMM2

0x24ae5d VDIVPD	%YMM1,%YMM0,%YMM0

0x24ae61 VMULPD	%YMM3,%YMM9,%YMM3

0x24ae65 VDIVPD	%YMM1,%YMM2,%YMM1

0x24ae69 VSUBPD	%YMM3,%YMM5,%YMM3

0x24ae6d VADDPD	%YMM1,%YMM0,%YMM0

0x24ae71 VMULPD	%YMM3,%YMM0,%YMM0

0x24ae75 MOV	0xa0(%RSP),%RDI    [54]

0x24ae7d MOV	%RDI,%RCX

0x24ae80 IMUL	%R10,%RCX

0x24ae84 ADD	%RSI,%RCX

0x24ae87 MOV	0x98(%RSP),%R9    [54]

0x24ae8f VMOVSD	(%R9,%RCX,8),%XMM1    [38]

0x24ae95 MOV	%RDI,%RCX

0x24ae98 IMUL	%R14,%RCX

0x24ae9c ADD	%RAX,%RCX

0x24ae9f VMOVHPD	(%R9,%RCX,8),%XMM1,%XMM1    [23]

0x24aea5 VMULPD	%YMM0,%YMM6,%YMM0

0x24aea9 MOV	%RDI,%RCX

0x24aeac IMUL	%RBX,%RCX

0x24aeb0 MOV	%R13,%R10

0x24aeb3 ADD	%R13,%RCX

0x24aeb6 VMOVSD	(%R9,%RCX,8),%XMM2    [20]

0x24aebc MOV	%RDI,%RCX

0x24aebf MOV	0x18(%RSP),%RAX    [54]

0x24aec4 IMUL	%RAX,%RCX

0x24aec8 ADD	%R12,%RCX

0x24aecb VMOVHPD	(%R9,%RCX,8),%XMM2,%XMM2    [65]

0x24aed1 VINSERTF128	$0x1,%XMM1,%YMM2,%YMM1

0x24aed7 VADDPD	%YMM0,%YMM1,%YMM0

0x24aedb MOV	0x90(%RSP),%RDI    [54]

0x24aee3 MOV	%RDI,%RCX

0x24aee6 IMUL	%RBX,%RCX

0x24aeea MOV	%RBX,%R13

0x24aeed ADD	%R10,%RCX

0x24aef0 MOV	0x88(%RSP),%R9    [54]

0x24aef8 VMOVLPD	%XMM0,(%R9,%RCX,8)    [17]

0x24aefe MOV	%RDI,%RCX

0x24af01 IMUL	%RAX,%RCX

0x24af05 MOV	%RAX,%R10

0x24af08 ADD	%R12,%RCX

0x24af0b VMOVHPD	%XMM0,(%R9,%RCX,8)    [30]

0x24af11 MOV	%RDI,%RCX

0x24af14 MOV	0x50(%RSP),%RSI    [54]

0x24af19 IMUL	%RSI,%RCX

0x24af1d MOV	0x48(%RSP),%RBX    [54]

0x24af22 ADD	%RBX,%RCX

0x24af25 VEXTRACTF128	$0x1,%YMM0,%XMM0

0x24af2b VMOVLPD	%XMM0,(%R9,%RCX,8)    [29]

0x24af31 MOV	%RDI,%RCX

0x24af34 IMUL	%R14,%RCX

0x24af38 MOV	0x118(%RSP),%RDI    [54]

0x24af40 ADD	%RDI,%RCX

0x24af43 VMOVHPD	%XMM0,(%R9,%RCX,8)    [6]

0x24af49 VMOVSD	(%RDX,%R8,8),%XMM0    [51]

0x24af4f VMOVHPD	(%RDX,%R11,8),%XMM0,%XMM0    [9]

0x24af55 MOV	0x10(%RSP),%RAX    [54]

0x24af5a VMOVSD	(%RDX,%RAX,8),%XMM1    [47]

0x24af5f VMOVHPD	(%RDX,%R15,8),%XMM1,%XMM1    [57]

0x24af65 MOV	0x80(%RSP),%RAX    [54]

0x24af6d MOV	%R13,%RCX

0x24af70 IMUL	%RAX,%RCX

0x24af74 ADD	0x120(%RSP),%RCX    [54]

0x24af7c MOV	%RCX,%R8

0x24af7f IMUL	%RAX,%R10

0x24af83 ADD	%R12,%R10

0x24af86 IMUL	%RAX,%RSI

0x24af8a ADD	%RBX,%RSI

0x24af8d MOV	%R14,%RDX

0x24af90 IMUL	%RAX,%RDX

0x24af94 ADD	%RDI,%RDX

0x24af97 VADDPD	%YMM3,%YMM4,%YMM2

0x24af9b VDIVPD	%YMM2,%YMM4,%YMM2

0x24af9f VINSERTF128	$0x1,%XMM0,%YMM1,%YMM0

0x24afa5 VMULPD	%YMM2,%YMM0,%YMM0

0x24afa9 MOV	0x78(%RSP),%RAX    [54]

0x24afae VMOVLPD	%XMM0,(%RAX,%RCX,8)    [70]

0x24afb3 VMOVHPD	%XMM0,(%RAX,%R10,8)    [73]

0x24afb9 VEXTRACTF128	$0x1,%YMM0,%XMM0

0x24afbf VMOVLPD	%XMM0,(%RAX,%RSI,8)    [14]

0x24afc4 VMOVHPD	%XMM0,(%RAX,%RDX,8)    [2]

0x24afc9 MOV	0x1a0(%RSP),%RSI    [54]

0x24afd1 ADD	$0x4,%RSI

0x24afd5 MOV	0x198(%RSP),%RCX    [54]

0x24afdd ADD	$-0x4,%RCX

0x24afe1 MOV	0x160(%RSP),%R14    [54]

0x24afe9 MOV	0x158(%RSP),%R12    [54]

0x24aff1 MOV	0x150(%RSP),%R10    [54]

0x24aff9 JE	24b0c5

0x24afff LEA	0x1(%RSI),%R8

0x24b003 MOV	%RSI,%RAX

0x24b006 SHR	$0x20,%RAX

0x24b00a MOV	%RCX,0x198(%RSP)    [54]

0x24b012 JE	24b030

0x24b014 MOV	%RSI,%RAX

0x24b017 CQTO

0x24b019 IDIV	%R12

0x24b01c MOV	%RDX,%RCX

0x24b01f JMP	24b039

0x24b030 MOV	%ESI,%EAX

0x24b032 XOR	%EDX,%EDX

0x24b034 DIV	%R12D

0x24b037 MOV	%EDX,%ECX

0x24b039 MOV	%RAX,0x20(%RSP)    [54]

0x24b03e MOV	0x30(%RSP),%R9    [54]

0x24b043 LEA	0x2(%RSI),%R11

0x24b047 MOV	%R8,%RAX

0x24b04a SHR	$0x20,%RAX

0x24b04e JE	24b060

0x24b050 MOV	%R8,%RAX

0x24b053 CQTO

0x24b055 IDIV	%R12

0x24b058 MOV	%RDX,0x18(%RSP)    [54]

0x24b05d JMP	24b06d

0x24b060 MOV	%R8D,%EAX

0x24b063 XOR	%EDX,%EDX

0x24b065 DIV	%R12D

0x24b068 MOV	%RDX,0x18(%RSP)    [54]

0x24b06d MOV	%RAX,0x10(%RSP)    [54]

0x24b072 LEA	0x3(%RSI),%R15

0x24b076 MOV	%R11,%RAX

0x24b079 SHR	$0x20,%RAX

0x24b07d JE	24b090

0x24b07f MOV	%R11,%RAX

0x24b082 CQTO

0x24b084 IDIV	%R12

0x24b087 MOV	%RDX,%R14

0x24b08a MOV	%RAX,%R8

0x24b08d JMP	24b09e

0x24b090 MOV	%R11D,%EAX

0x24b093 XOR	%EDX,%EDX

0x24b095 DIV	%R12D

0x24b098 MOV	%EDX,%R14D

0x24b09b MOV	%EAX,%R8D

0x24b09e MOV	0x28(%RSP),%R10    [54]

0x24b0a3 MOV	%R15,%RAX

0x24b0a6 SHR	$0x20,%RAX

0x24b0aa MOV	%RSI,0x1a0(%RSP)    [54]

0x24b0b2 JNE	24a760

0x24b0b8 MOV	%R15D,%EAX

0x24b0bb XOR	%EDX,%EDX

0x24b0bd DIV	%R12D

0x24b0c0 JMP	24a768

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h: 69 - 69

--------------------------------------------------------------------------------

69:   T &operator()(size_t i, size_t j) const { return data[i + j * sizeX]; }

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/PdV.cpp: 49 - 63

--------------------------------------------------------------------------------

49:     for (int j = (y_min + 1); j < (y_max + 2); j++) {

50:       for (int i = (x_min + 1); i < (x_max + 2); i++) {

51:         double left_flux = (xarea(i, j) * (xvel0(i, j) + xvel0(i + 0, j + 1) + xvel0(i, j) + xvel0(i + 0, j + 1))) * 0.25 * dt * 0.5;

52:         double right_flux =

53:             (xarea(i + 1, j + 0) * (xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1) + xvel0(i + 1, j + 0) + xvel0(i + 1, j + 1))) * 0.25 * dt *

54:             0.5;

55:         double bottom_flux = (yarea(i, j) * (yvel0(i, j) + yvel0(i + 1, j + 0) + yvel0(i, j) + yvel0(i + 1, j + 0))) * 0.25 * dt * 0.5;

56:         double top_flux = (yarea(i + 0, j + 1) * (yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1) + yvel0(i + 0, j + 1) + yvel0(i + 1, j + 1))) *

57:                           0.25 * dt * 0.5;

58:         double total_flux = right_flux - left_flux + top_flux - bottom_flux;

59:         double volume_change_s = volume(i, j) / (volume(i, j) + total_flux);

60:         double recip_volume = 1.0 / volume(i, j);

61:         double energy_change = (pressure(i, j) / density0(i, j) + viscosity(i, j) / density0(i, j)) * total_flux * recip_volume;

62:         energy1(i, j) = energy0(i, j) - energy_change;

63:         density1(i, j) = density0(i, j) * volume_change_s;

Path /

Metric	Value
CQA speedup if no scalar integer	2.27 - 2.27
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	3.06 - 2.63
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.00
Bottlenecks	P8, P9,
Function	.omp_outlined..471
Source	context.h:69-69,PdV.cpp:49-63
Source loop unroll info	unrolled by 4
Source loop unroll confidence level	high
Unroll/vectorization loop type	main
Unroll factor	4
CQA cycles	91.83 - 92.00
CQA cycles if no scalar integer	40.50
CQA cycles if FP arith vectorized	72.00 - 92.00
CQA cycles if fully vectorized	30.00 - 35.00
Front-end cycles	91.83
DIV/SQRT cycles	42.50
P0 cycles	56.00
P1 cycles	42.25
P2 cycles	42.25
P3 cycles	9.00
P4 cycles	67.00
P5 cycles	67.00
P6 cycles	67.00
P7 cycles	17.50
P8 cycles	27.83
P9 cycles	27.83
P10 cycles	27.83
P11 cycles	4.50
P12 cycles	4.50
P13 cycles	72.00 - 92.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	525.00
Nb uops	551.00
Nb loads	145.00
Nb stores	36.00
Nb stack references	52.00
FLOP/cycle	1.79 - 1.78
Nb FLOP add-sub	72.00
Nb FLOP mul	76.00
Nb FLOP fma	0.00
Nb FLOP div	16.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	16.65 - 16.68
Bytes prefetched	0.00
Bytes loaded	1236.00
Bytes stored	296.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	35.29
Vectorization ratio load	6.49
Vectorization ratio store	2.78
Vectorization ratio mul	100.00
Vectorization ratio add_sub	100.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	33.33
Vectorization ratio other	74.07
Vector-efficiency ratio all	22.59
Vector-efficiency ratio load	14.12
Vector-efficiency ratio store	12.85
Vector-efficiency ratio mul	50.00
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	22.92
Vector-efficiency ratio other	21.76

Metric	Value
CQA speedup if no scalar integer	2.27 - 2.27
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	3.06 - 2.63
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.00
Bottlenecks	P8, P9,
Function	.omp_outlined..471
Source	context.h:69-69,PdV.cpp:49-63
Source loop unroll info	unrolled by 4
Source loop unroll confidence level	high
Unroll/vectorization loop type	main
Unroll factor	4
CQA cycles	91.83 - 92.00
CQA cycles if no scalar integer	40.50
CQA cycles if FP arith vectorized	72.00 - 92.00
CQA cycles if fully vectorized	30.00 - 35.00
Front-end cycles	91.83
DIV/SQRT cycles	42.50
P0 cycles	56.00
P1 cycles	42.25
P2 cycles	42.25
P3 cycles	9.00
P4 cycles	67.00
P5 cycles	67.00
P6 cycles	67.00
P7 cycles	17.50
P8 cycles	27.83
P9 cycles	27.83
P10 cycles	27.83
P11 cycles	4.50
P12 cycles	4.50
P13 cycles	72.00 - 92.00
Inter-iter dependencies cycles	NA
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	525.00
Nb uops	551.00
Nb loads	145.00
Nb stores	36.00
Nb stack references	52.00
FLOP/cycle	1.79 - 1.78
Nb FLOP add-sub	72.00
Nb FLOP mul	76.00
Nb FLOP fma	0.00
Nb FLOP div	16.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	16.65 - 16.68
Bytes prefetched	0.00
Bytes loaded	1236.00
Bytes stored	296.00
Stride 0	NA
Stride 1	NA
Stride n	NA
Stride unknown	NA
Stride indirect	NA
Vectorization ratio all	35.29
Vectorization ratio load	6.49
Vectorization ratio store	2.78
Vectorization ratio mul	100.00
Vectorization ratio add_sub	100.00
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	33.33
Vectorization ratio other	74.07
Vector-efficiency ratio all	22.59
Vector-efficiency ratio load	14.12
Vector-efficiency ratio store	12.85
Vector-efficiency ratio mul	50.00
Vector-efficiency ratio add_sub	50.00
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	22.92
Vector-efficiency ratio other	21.76

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	.omp_outlined..471
Source file and lines	PdV.cpp:49-63
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h:69
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/PdV.cpp:49-63

It is main loop of related source loop which is unrolled by 4 (including vectorization).
Warnings:

Ignoring paths for analysis
Too many paths. Rerun with max-paths=16
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

Try to simplify control and/or increase the maximum number of paths per function/loop through the 'max-paths-nb' option.

This loop has 16 execution paths.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 92.00 to 40.50 cycles (2.27x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 22% of vector register length is used (average across all SSE/AVX instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 92.00 to 35.00 cycles (2.63x speedup).

Details

35% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
2% of SSE/AVX stores are used in vector version.
33% of SSE/AVX divide and square root instructions are used in vector version.
74% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

Workaround

Reduce the number of division or square root instructions:
- If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
Check whether you really need double precision. If not, switch to single precision to speedup execution

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

DIV: 4 occurrences
IDIV: 4 occurrences
LEA: 20 occurrences
VMOVHPD: 4 occurrences

Vector unaligned load/store instructions

Detected 20 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 2 occurrences
VINSERTF128: 18 occurrences

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 2 occurrences
CQTO: 4 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

41 AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (four at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 164 FP arithmetical operations:

72: addition or subtraction
76: multiply
16: divide

The binary loop is loading 1236 bytes (154 double precision FP elements). The binary loop is storing 296 bytes (37 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.11 FP operations per loaded or stored byte.

General properties

nb instructions	525
nb uops	551
loop length	2388
used x86 registers	16
used mmx registers	0
used xmm registers	16
used ymm registers	13
used zmm registers	0
nb stack references	52
ADD-SUB / MUL ratio	0.95

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	91.83 cycles
front end	91.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	42.50	56.00	42.25	42.25	9.00	67.00	67.00	67.00	17.50	27.83	27.83	27.83	4.50	4.50
cycles	42.50	56.00	42.25	42.25	9.00	67.00	67.00	67.00	17.50	27.83	27.83	27.83	4.50	4.50

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

72.00-92.00

Cycles summary

Front-end	91.83
Dispatch	67.00
DIV/SQRT	72.00-92.00
Overall L1	91.83-92.00

Vectorization ratios

INT

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	45%
load	6%
store	11%
mul	100%
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	100%
other	95%

INT+FP

all	35%
load	6%
store	2%
mul	100%
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	33%
other	74%

Vector efficiency ratios

INT

all	11%
load	NA (no load vectorizable/vectorized instructions)
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	25%
load	14%
store	13%
mul	50%
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	50%
other	24%

INT+FP

all	22%
load	14%
store	12%
mul	50%
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	22%
other	21%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 92.00 cycles. At this rate:

13% of peak load performance is reached (13.43 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (3.22 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 24afff

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
IDIV %R12	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV 0xc(%RSP),%R11D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,0x38(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R9,%R8,1),%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R8,0x40(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R9,%RAX,1),%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R11D,%R14D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R11D,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %R14D,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,0x48(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVSXD %EDX,%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %EDI,%R13	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %R8D,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R10,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R13,%R12	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R13,0x50(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R10,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RSI,%R14	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R10,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RSI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RSI,0x130(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R12,%RAX,1),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x70(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RSI,%RDX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA (%R14,%R15,1),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%RSI,%RDX,8),%XMM2,%XMM3	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x20(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R9,%RAX,1),%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R11D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %ECX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %EDX,%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RAX,0x180(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RBX,0x128(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%RAX,%RDI,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%RSI,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R11D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %EAX,%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R11,0x110(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R9,%RAX,1),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %ECX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %RDX,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R8,0x190(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R8,%R11,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%RSI,%RCX,8),%XMM2,%XMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x68(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R13,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RCX,0x188(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x48(%RSP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R13,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x108(%RSP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R11,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R10,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RCX,0x178(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R15,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPS (%R11,%RCX,8),%XMM2,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VMOVAPS %XMM0,0x1b0(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	4	1
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RAX,0x170(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%RAX,%RDI,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RAX,0x168(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x110(%RSP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%RAX,%RBX,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RCX,8),%XMM2,%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x40(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%R9,%RAX,1),%ECX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOVSXD %ECX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,0x40(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R8,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RCX,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%R15,%R13,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x38(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R9D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CLTQ
MOV %RAX,0x38(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R8,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RDX,%R10,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RAX,8),%XMM2,%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x20(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R9D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CLTQ
MOV %RAX,0x20(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RCX,%RDI,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RAX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R9D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %EAX,%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R9,0x10(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R9,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
LEA (%RAX,%RBX,1),%R13	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%R13,8),%XMM2,%XMM8	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x48(%RSP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%R12,%R13,1),%R12	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%RSI,%R12,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
LEA 0x1(%R14,%R10,1),%R14	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%RSI,%R14,8),%XMM2,%XMM9	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x180(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%R9,%RDI,1),%RBX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%RSI,%RBX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x190(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%R8,%RBX,1),%R10	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%RSI,%R10,8),%XMM2,%XMM10	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x188(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RSI,%R13,1),%R10	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%R10,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x178(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RSI,%R12,1),%R9	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%R9,8),%XMM2,%XMM11	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x170(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RSI,%RDI,1),%R8	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%R8,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x168(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RSI,%RBX,1),%RDI	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RDI,8),%XMM2,%XMM12	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
LEA 0x1(%R15,%R13,1),%RSI	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%RSI,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA 0x1(%RDX,%R12,1),%RDX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RDX,8),%XMM2,%XMM13	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
LEA 0x1(%RCX,%R14,1),%RCX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA 0x1(%RAX,%RBX,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RAX,8),%XMM2,%XMM14	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x100(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x50(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RCX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R13,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xf8(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R9,%RAX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x130(%RSP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RAX,8),%XMM2,%XMM15	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x128(%RSP),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R15,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R14,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RAX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x18(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RDI,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RAX,8),%XMM2,%XMM5	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0xf0(%RSP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R10,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RCX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RAX,%R13,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xe8(%RSP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R11,%RCX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RDX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RCX,%R12,1),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RDX,8),%XMM0,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %R10,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R15,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RDX,%R14,1),%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RSI,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RDI,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RSI,%RBX,1),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RDI,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM3,%YMM4,%YMM3	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
ADD %R13,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RAX,8),%XMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA 0x1(%RCX,%R12,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RAX,8),%XMM4,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,0x1b0(%RSP),%YMM6,%YMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0.50	0.50	0	0	0	1	0.50
LEA 0x1(%RDX,%R14,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%RAX,8),%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM7,%YMM8,%YMM7	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM7,%YMM4,%YMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM4,%YMM8,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM4,%YMM7,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMULPD %YMM4,%YMM3,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VINSERTF128 $0x1,%XMM9,%YMM10,%YMM4	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM11,%YMM12,%YMM7	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM13,%YMM14,%YMM8	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM7,%YMM8,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM7,%YMM9,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM7,%YMM8,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMOVAPD 0x200(%RSP),%YMM8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VMULPD %YMM3,%YMM8,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM7,%YMM4,%YMM7	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV 0x20(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VBROADCASTSD (%RAX),%YMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
VMULPD %YMM3,%YMM4,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMOVAPD 0x1e0(%RSP),%YMM9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VMULPD %YMM3,%YMM9,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM7,%YMM8,%YMM7	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM7,%YMM4,%YMM7	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM7,%YMM9,%YMM7	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VSUBPD %YMM3,%YMM7,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VINSERTF128 $0x1,%XMM15,%YMM5,%YMM3	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM2,%YMM1,%YMM1	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
LEA 0x1(%RSI,%RBX,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RAX,8),%XMM6,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM0,%YMM2,%YMM0	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM0,%YMM1,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM2,%YMM1,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM1,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMULPD %YMM0,%YMM3,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM8,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM4,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x40(%RSP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R13,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RAX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x38(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RDI,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RAX,8),%XMM0,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x20(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RCX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R14,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x10(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R8,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RAX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM0,%YMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
IMUL %R10,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RCX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RDX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R10,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
IMUL %R10,%RDI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RCX,%R13,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
LEA (%RDI,%R12,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RAX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
IMUL %R10,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%R9,%R14,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RAX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA (%R8,%RBX,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RAX,8),%XMM2,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
LEA 0x1(%R9,%R14,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %R14,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R14,0x120(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA 0x1(%RCX,%R13,1),%RCX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %R13,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
LEA 0x1(%RDI,%RSI,1),%RDX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
VMOVSD (%R11,%RCX,8),%XMM5	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%R11,%RDX,8),%XMM5,%XMM5	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
LEA 0x1(%R8,%RBX,1),%RCX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %RBX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
VMOVSD (%R11,%RAX,8),%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%R11,%RCX,8),%XMM6,%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM5,%YMM6,%YMM2	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM2,%YMM1,%YMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM5,%YMM1,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMULPD %YMM1,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM8,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM4,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM9,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VADDPD %YMM0,%YMM7,%YMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
MOV 0xe0(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R15,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R8,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x50(%RSP),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R14,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV 0x130(%RSP),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R15,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R9,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RDI,0x118(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
ADD %RDI,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xd8(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RDI,%RDX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDI,%RSI,8),%XMM0,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %R13,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R13,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%RDI,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDI,%RCX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM0,%YMM1,%YMM4	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VMOVAPD 0x1c0(%RSP),%YMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VDIVPD %YMM4,%YMM0,%YMM6	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	5
MOV 0xd0(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R8,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
IMUL %R15,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R15,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x120(%RSP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R10,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R11,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R9,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RBX,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xc8(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RDI,%RDX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDI,%RSI,8),%XMM0,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VMOVSD (%RDI,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDI,%RCX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0xc0(%RSP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R11,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R13,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R11,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R8,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R11,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R12,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R12,%R11	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R10,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R9,%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x118(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RAX,%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xb8(%RSP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RDX,%R8,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDX,%R11,8),%XMM2,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x110(%RSP),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R12,%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%RDX,%RCX,8),%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDX,%R15,8),%XMM7,%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM0,%YMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM2,%YMM7,%YMM1	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
MOV 0xb0(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R9,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R9,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0xa8(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R9,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RBX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RCX,8),%XMM2,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x128(%RSP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R13,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RCX,8),%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL 0x18(%RSP),%RCX	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
ADD %R12,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RCX,8),%XMM7,%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM2,%YMM7,%YMM2	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VDIVPD %YMM1,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	5
VMULPD %YMM3,%YMM9,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VDIVPD %YMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	5
VSUBPD %YMM3,%YMM5,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM1,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMULPD %YMM3,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV 0xa0(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R10,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RSI,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x98(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R9,%RCX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RCX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VMULPD %YMM0,%YMM6,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R13,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R13,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RCX,8),%XMM2,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM0,%YMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
MOV 0x90(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RBX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R10,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x88(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVLPD %XMM0,(%R9,%RCX,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RAX,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R12,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD %XMM0,(%R9,%RCX,8)	2	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0.50	0.50	9-11	1
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x50(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RSI,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV 0x48(%RSP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RBX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25
VMOVLPD %XMM0,(%R9,%RCX,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV 0x118(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RDI,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD %XMM0,(%R9,%RCX,8)	2	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0.50	0.50	9-11	1
VMOVSD (%RDX,%R8,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDX,%R11,8),%XMM0,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RDX,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDX,%R15,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x80(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R13,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD 0x120(%RSP),%RCX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%R10	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %RAX,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RBX,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RDI,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VADDPD %YMM3,%YMM4,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VDIVPD %YMM2,%YMM4,%YMM2	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	5
VINSERTF128 $0x1,%XMM0,%YMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VMULPD %YMM2,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV 0x78(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVLPD %XMM0,(%RAX,%RCX,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
VMOVHPD %XMM0,(%RAX,%R10,8)	2	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0.50	0.50	9-11	1
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25
VMOVLPD %XMM0,(%RAX,%RSI,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
VMOVHPD %XMM0,(%RAX,%RDX,8)	2	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0.50	0.50	9-11	1
MOV 0x1a0(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x4,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x198(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $-0x4,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x160(%RSP),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x158(%RSP),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x150(%RSP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JE 24b0c5 <.omp_outlined..471+0xbe5>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
LEA 0x1(%RSI),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x20,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RCX,0x198(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JE 24b030 <.omp_outlined..471+0xb50>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
IDIV %R12	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV %RDX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
JMP 24b039 <.omp_outlined..471+0xb59>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %ESI,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
DIV %R12D	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6
MOV %EDX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RAX,0x20(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x30(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x2(%RSI),%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x20,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
JE 24b060 <.omp_outlined..471+0xb80>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
IDIV %R12	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JMP 24b06d <.omp_outlined..471+0xb8d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %R8D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
DIV %R12D	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,0x10(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA 0x3(%RSI),%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R11,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x20,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
JE 24b090 <.omp_outlined..471+0xbb0>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R11,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
IDIV %R12	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RAX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
JMP 24b09e <.omp_outlined..471+0xbbe>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %R11D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
DIV %R12D	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6
MOV %EDX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %EAX,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x28(%RSP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x20,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSI,0x1a0(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JNE 24a760 <.omp_outlined..471+0x280>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R15D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
DIV %R12D	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6
JMP 24a768 <.omp_outlined..471+0x288>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1

Function	.omp_outlined..471
Source file and lines	PdV.cpp:49-63
Module	exec

The loop is defined in:

/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/context.h:69
/beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/build/CloverLeafCXX/src/omp/PdV.cpp:49-63

It is main loop of related source loop which is unrolled by 4 (including vectorization).
Warnings:

Ignoring paths for analysis
Too many paths. Rerun with max-paths=16
RecMII not computed since number of paths is unknown or > max_paths
Streams not analyzed since number of paths is unknown or > max_paths

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

35% of SSE/AVX instructions are used in vector version (process two or more data elements in vector registers):

6% of SSE/AVX loads are used in vector version.
2% of SSE/AVX stores are used in vector version.
33% of SSE/AVX divide and square root instructions are used in vector version.
74% of SSE/AVX instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one:
- recompile with ffast-math (included in Ofast) to extend loop vectorization to FP reductions.
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Execution units bottlenecks

Performance is limited by execution of divide and square root operations (the divide/square root unit is a bottleneck).

Workaround

Reduce the number of division or square root instructions:
- If denominator is constant over iterations, use reciprocal (replace x/y with x*(1/y)). Check precision impact. This will be done by your compiler with ffast-math or Ofast
Check whether you really need double precision. If not, switch to single precision to speedup execution

FMA

Presence of both ADD/SUB and MUL operations.

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Try to change order in which elements are evaluated (using parentheses) in arithmetic expressions containing both ADD/SUB and MUL operations to enable your compiler to generate FMA instructions wherever possible. For instance a + b*c is a valid FMA (MUL then ADD). However (a+b)* c cannot be translated into an FMA (ADD then MUL).

Complex instructions

Detected COMPLEX INSTRUCTIONS.

Details

These instructions generate more than one micro-operation and only one of them can be decoded during a cycle and the extra micro-operations increase pressure on execution units.

DIV: 4 occurrences
IDIV: 4 occurrences
LEA: 20 occurrences
VMOVHPD: 4 occurrences

Vector unaligned load/store instructions

Detected 20 suboptimal vector unaligned load/store instructions.

Details

VEXTRACTF128: 2 occurrences
VINSERTF128: 18 occurrences

Workaround

Pass to your compiler a micro-architecture specialization option:
- use march=native
Use vector aligned instructions:
1. align your arrays on 64 bytes boundaries: replace { void *p = malloc (size); } with { void *p; posix_memalign (&p, 64, size); }.
2. inform your compiler that your arrays are vector aligned: if array 'foo' is 64 bytes-aligned, define a pointer 'p_foo' as __builtin_assume_aligned (foo, 64) and use it instead of 'foo' in the loop.

Conversion instructions

Detected expensive conversion instructions.

Details

CLTQ: 2 occurrences
CQTO: 4 occurrences

Workaround

Avoid mixing data with different types. In particular, check if the type of constants is the same as array elements.

Type of elements and instruction set

41 AVX instructions are processing arithmetic or math operations on double precision FP elements in vector mode (four at a time).

Matching between your loop (in the source code) and the binary loop

The binary loop is composed of 164 FP arithmetical operations:

72: addition or subtraction
76: multiply
16: divide

The binary loop is loading 1236 bytes (154 double precision FP elements). The binary loop is storing 296 bytes (37 double precision FP elements).

Arithmetic intensity

Arithmetic intensity is 0.11 FP operations per loaded or stored byte.

General properties

nb instructions	525
nb uops	551
loop length	2388
used x86 registers	16
used mmx registers	0
used xmm registers	16
used ymm registers	13
used zmm registers	0
nb stack references	52
ADD-SUB / MUL ratio	0.95

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	91.83 cycles
front end	91.83 cycles

Back-end

	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5
uops	42.50	56.00	42.25	42.25	9.00	67.00	67.00	67.00	17.50	27.83	27.83	27.83	4.50	4.50
cycles	42.50	56.00	42.25	42.25	9.00	67.00	67.00	67.00	17.50	27.83	27.83	27.83	4.50	4.50

Execution ports to units layout:

ALU0/BRU0: ALU
ALU1: ALU
ALU2: ALU
ALU3: ALU
BRU1:
AGU0 (256 bits): store address, load
AGU1 (256 bits): store address, load
AGU2 (256 bits): store address, load
FP0 (256 bits): VPU, DIV/SQRT
FP1 (256 bits): VPU, DIV/SQRT
FP2 (256 bits): VPU
FP3 (256 bits): VPU
FP4 (256 bits): FP store data
FP5 (256 bits): FP store data

Cycles executing div or sqrt instructions

72.00-92.00

Cycles summary

Front-end	91.83
Dispatch	67.00
DIV/SQRT	72.00-92.00
Overall L1	91.83-92.00

Vectorization ratios

INT

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

all	45%
load	6%
store	11%
mul	100%
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	100%
other	95%

INT+FP

all	35%
load	6%
store	2%
mul	100%
add-sub	100%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	33%
other	74%

Vector efficiency ratios

INT

all	11%
load	NA (no load vectorizable/vectorized instructions)
store	12%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	10%

all	25%
load	14%
store	13%
mul	50%
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	50%
other	24%

INT+FP

all	22%
load	14%
store	12%
mul	50%
add-sub	50%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	22%
other	21%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 92.00 cycles. At this rate:

13% of peak load performance is reached (13.43 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
5% of peak store performance is reached (3.22 out of 64.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 24afff

Instruction	Nb FU	ALU0/BRU0	ALU1	ALU2	ALU3	BRU1	AGU0	AGU1	AGU2	FP0	FP1	FP2	FP3	FP4	FP5	Latency	Recip. throughput
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
IDIV %R12	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV 0xc(%RSP),%R11D	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RAX,0x38(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R9,%R8,1),%EDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R8,0x40(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R9,%RAX,1),%R8D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R11D,%R14D	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R11D,%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %R14D,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RAX,0x48(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOVSXD %EDX,%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %EDI,%R13	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %R8D,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R10,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R13,%R12	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R13,0x50(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R10,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RSI,%R14	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R10,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RSI,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RSI,0x130(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R12,%RAX,1),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x70(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RSI,%RDX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA (%R14,%R15,1),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%RSI,%RDX,8),%XMM2,%XMM3	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x20(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R9,%RAX,1),%EDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R11D,%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %ECX,%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %EDX,%RBX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RAX,0x180(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RBX,0x128(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%RAX,%RDI,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%RSI,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R11D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %EAX,%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R11,0x110(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%R9,%RAX,1),%ECX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %ECX,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %RDX,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R8,0x190(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%R8,%R11,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%RSI,%RCX,8),%XMM2,%XMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x68(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R13,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RCX,0x188(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x48(%RSP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R13,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x108(%RSP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R11,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R10,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RCX,0x178(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R15,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPS (%R11,%RCX,8),%XMM2,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VMOVAPS %XMM0,0x1b0(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	4	1
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RAX,0x170(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA (%RAX,%RDI,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RAX,0x168(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x110(%RSP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA (%RAX,%RBX,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RCX,8),%XMM2,%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x40(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%R9,%RAX,1),%ECX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOVSXD %ECX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,0x40(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R8,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RCX,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%R15,%R13,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x38(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R9D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CLTQ
MOV %RAX,0x38(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R8,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RDX,%R10,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RAX,8),%XMM2,%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x20(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R9D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
CLTQ
MOV %RAX,0x20(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R8,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RCX,%RDI,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RAX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R9D,%EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %EAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOVSXD %EAX,%R9	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R9,0x10(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R9,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RBX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
LEA (%RAX,%RBX,1),%R13	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%R13,8),%XMM2,%XMM8	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x48(%RSP),%R13	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%R12,%R13,1),%R12	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%RSI,%R12,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
LEA 0x1(%R14,%R10,1),%R14	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%RSI,%R14,8),%XMM2,%XMM9	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %RDI,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x180(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%R9,%RDI,1),%RBX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%RSI,%RBX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x190(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%R8,%RBX,1),%R10	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%RSI,%R10,8),%XMM2,%XMM10	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x188(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RSI,%R13,1),%R10	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%R10,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x178(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RSI,%R12,1),%R9	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%R9,8),%XMM2,%XMM11	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x170(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RSI,%RDI,1),%R8	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%R8,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV 0x168(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x1(%RSI,%RBX,1),%RDI	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RDI,8),%XMM2,%XMM12	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
LEA 0x1(%R15,%R13,1),%RSI	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%RSI,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA 0x1(%RDX,%R12,1),%RDX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RDX,8),%XMM2,%XMM13	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
LEA 0x1(%RCX,%R14,1),%RCX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA 0x1(%RAX,%RBX,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RAX,8),%XMM2,%XMM14	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x100(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x50(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RCX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R13,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xf8(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R9,%RAX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x130(%RSP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RAX,8),%XMM2,%XMM15	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x128(%RSP),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R15,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R14,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RAX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x18(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RDI,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RAX,8),%XMM2,%XMM5	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0xf0(%RSP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R10,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RCX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RAX,%R13,1),%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xe8(%RSP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R11,%RCX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RDX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RCX,%R12,1),%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RDX,8),%XMM0,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %R10,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R15,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RDX,%R14,1),%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RSI,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R10,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RDI,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RSI,%RBX,1),%RDI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RDI,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM3,%YMM4,%YMM3	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
ADD %R13,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
INC %RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RAX,8),%XMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA 0x1(%RCX,%R12,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RAX,8),%XMM4,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,0x1b0(%RSP),%YMM6,%YMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0.50	0.50	0	0	0	1	0.50
LEA 0x1(%RDX,%R14,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVSD (%R11,%RAX,8),%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM7,%YMM8,%YMM7	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM7,%YMM4,%YMM8	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM4,%YMM8,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM4,%YMM7,%YMM4	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMULPD %YMM4,%YMM3,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VINSERTF128 $0x1,%XMM9,%YMM10,%YMM4	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM11,%YMM12,%YMM7	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM13,%YMM14,%YMM8	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM7,%YMM8,%YMM9	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM7,%YMM9,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM7,%YMM8,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMOVAPD 0x200(%RSP),%YMM8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VMULPD %YMM3,%YMM8,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM7,%YMM4,%YMM7	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV 0x20(%RBP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VBROADCASTSD (%RAX),%YMM4	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
VMULPD %YMM3,%YMM4,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMOVAPD 0x1e0(%RSP),%YMM9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VMULPD %YMM3,%YMM9,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM7,%YMM8,%YMM7	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM7,%YMM4,%YMM7	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM7,%YMM9,%YMM7	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VSUBPD %YMM3,%YMM7,%YMM7	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VINSERTF128 $0x1,%XMM15,%YMM5,%YMM3	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM2,%YMM1,%YMM1	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
LEA 0x1(%RSI,%RBX,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
VMOVHPD (%R11,%RAX,8),%XMM6,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM0,%YMM2,%YMM0	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM0,%YMM1,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM2,%YMM1,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM1,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMULPD %YMM0,%YMM3,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM8,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM4,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x40(%RSP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RDX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R13,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RAX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x38(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RDI,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RAX,8),%XMM0,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x20(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RCX,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R14,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x10(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R8,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RBX,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RAX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM0,%YMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
IMUL %R10,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RCX,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RDX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R10,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
IMUL %R10,%RDI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%RCX,%R13,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %R12,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
LEA (%RDI,%R12,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RAX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
IMUL %R10,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
LEA (%R9,%R14,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R11,%RAX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
LEA (%R8,%RBX,1),%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R11,%RAX,8),%XMM2,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
LEA 0x1(%R9,%R14,1),%RAX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %R14,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R14,0x120(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA 0x1(%RCX,%R13,1),%RCX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %R13,%R9	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
LEA 0x1(%RDI,%RSI,1),%RDX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %RSI,%RDI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
VMOVSD (%R11,%RCX,8),%XMM5	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%R11,%RDX,8),%XMM5,%XMM5	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
LEA 0x1(%R8,%RBX,1),%RCX	2	0	0	0.50	0.50	0	0.33	0.33	0.33	0	0	0	0	0	0	2	0.50
MOV %RBX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
VMOVSD (%R11,%RAX,8),%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%R11,%RCX,8),%XMM6,%XMM6	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM5,%YMM6,%YMM2	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM2,%YMM1,%YMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM5,%YMM1,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMULPD %YMM1,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM8,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM4,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VMULPD %YMM0,%YMM9,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VADDPD %YMM0,%YMM7,%YMM5	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
MOV 0xe0(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %R15,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R15,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x18(%RSP),%R8	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R8,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x50(%RSP),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R14,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV 0x130(%RSP),%R15	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %R15,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R9,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RDI,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RDI,0x118(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
ADD %RDI,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xd8(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RDI,%RDX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDI,%RSI,8),%XMM0,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %R13,%R11	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R13,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%RDI,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDI,%RCX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM0,%YMM1,%YMM4	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VMOVAPD 0x1c0(%RSP),%YMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.50
VDIVPD %YMM4,%YMM0,%YMM6	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	5
MOV 0xd0(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R10,%RAX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RSI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R8,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RSI,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
IMUL %R15,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R15,%R12	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x120(%RSP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R10,%RAX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R11,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %R9,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
ADD %RBX,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xc8(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RDI,%RDX,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDI,%RSI,8),%XMM0,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VMOVSD (%RDI,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDI,%RCX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0xc0(%RSP),%R11	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R11,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R13,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R11,%R15	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R8,%R15	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R11,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%R8	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R12,%RBX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R12,%R11	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R10,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RCX,0x10(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %R10,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R9,%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x118(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RAX,%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0xb8(%RSP),%RDX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RDX,%R8,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDX,%R11,8),%XMM2,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x110(%RSP),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %R12,%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%RDX,%RCX,8),%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDX,%R15,8),%XMM7,%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM0,%YMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VINSERTF128 $0x1,%XMM2,%YMM7,%YMM1	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
MOV 0xb0(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R14,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R9,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R9,%RSI	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0xa8(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R9,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RBX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RCX,8),%XMM2,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x128(%RSP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R13,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RCX,8),%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL 0x18(%RSP),%RCX	1	0	1	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	1
ADD %R12,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RCX,8),%XMM7,%XMM7	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM2,%YMM7,%YMM2	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VDIVPD %YMM1,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	5
VMULPD %YMM3,%YMM9,%YMM3	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
VDIVPD %YMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	5
VSUBPD %YMM3,%YMM5,%YMM3	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VADDPD %YMM1,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VMULPD %YMM3,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV 0xa0(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R10,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RSI,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x98(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%R9,%RCX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RAX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RCX,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VMULPD %YMM0,%YMM6,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %R13,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R13,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVSD (%R9,%RCX,8),%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x18(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD (%R9,%RCX,8),%XMM2,%XMM2	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
VINSERTF128 $0x1,%XMM1,%YMM2,%YMM1	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VADDPD %YMM0,%YMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
MOV 0x90(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RBX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RBX,%R13	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R10,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x88(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVLPD %XMM0,(%R9,%RCX,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV %RAX,%R10	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
ADD %R12,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD %XMM0,(%R9,%RCX,8)	2	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0.50	0.50	9-11	1
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x50(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
IMUL %RSI,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV 0x48(%RSP),%RBX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RBX,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25
VMOVLPD %XMM0,(%R9,%RCX,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
MOV %RDI,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %R14,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
MOV 0x118(%RSP),%RDI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD %RDI,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VMOVHPD %XMM0,(%R9,%RCX,8)	2	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0.50	0.50	9-11	1
VMOVSD (%RDX,%R8,8),%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDX,%R11,8),%XMM0,%XMM0	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x10(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVSD (%RDX,%RAX,8),%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.50
VMOVHPD (%RDX,%R15,8),%XMM1,%XMM1	1	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0	0	9	0.50
MOV 0x80(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R13,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RCX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD 0x120(%RSP),%RCX	1	0.25	0.25	0.25	0.25	0	0.33	0.33	0.33	0	0	0	0	0	0	1	0.33
MOV %RCX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%R10	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %R12,%R10	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
IMUL %RAX,%RSI	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RBX,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R14,%RDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
IMUL %RAX,%RDX	1	0	1	0	0	0	0	0	0	0	0	0	0	0	0	3	1
ADD %RDI,%RDX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
VADDPD %YMM3,%YMM4,%YMM2	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	3	0.50
VDIVPD %YMM2,%YMM4,%YMM2	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	13	5
VINSERTF128 $0x1,%XMM0,%YMM1,%YMM0	1	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	1	0.50
VMULPD %YMM2,%YMM0,%YMM0	1	0	0	0	0	0	0	0	0	0.50	0.50	0	0	0	0	3	0.50
MOV 0x78(%RSP),%RAX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
VMOVLPD %XMM0,(%RAX,%RCX,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
VMOVHPD %XMM0,(%RAX,%R10,8)	2	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0.50	0.50	9-11	1
VEXTRACTF128 $0x1,%YMM0,%XMM0	1	0	0	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	1	0.25
VMOVLPD %XMM0,(%RAX,%RSI,8)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0.50	0.50	1	1
VMOVHPD %XMM0,(%RAX,%RDX,8)	2	0	0	0	0	0	0.33	0.33	0.33	0	0.33	0.33	0.33	0.50	0.50	9-11	1
MOV 0x1a0(%RSP),%RSI	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $0x4,%RSI	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x198(%RSP),%RCX	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
ADD $-0x4,%RCX	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV 0x160(%RSP),%R14	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x158(%RSP),%R12	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV 0x150(%RSP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
JE 24b0c5 <.omp_outlined..471+0xbe5>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
LEA 0x1(%RSI),%R8	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x20,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RCX,0x198(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JE 24b030 <.omp_outlined..471+0xb50>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %RSI,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
IDIV %R12	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV %RDX,%RCX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
JMP 24b039 <.omp_outlined..471+0xb59>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %ESI,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
DIV %R12D	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6
MOV %EDX,%ECX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RAX,0x20(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV 0x30(%RSP),%R9	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
LEA 0x2(%RSI),%R11	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x20,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
JE 24b060 <.omp_outlined..471+0xb80>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R8,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
IDIV %R12	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JMP 24b06d <.omp_outlined..471+0xb8d>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %R8D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
DIV %R12D	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6
MOV %RDX,0x18(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
MOV %RAX,0x10(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
LEA 0x3(%RSI),%R15	1	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	0	1	0.25
MOV %R11,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x20,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
JE 24b090 <.omp_outlined..471+0xbb0>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R11,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
CQTO
IDIV %R12	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	9-19	7-12
MOV %RDX,%R14	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %RAX,%R8	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
JMP 24b09e <.omp_outlined..471+0xbbe>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1
MOV %R11D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
DIV %R12D	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6
MOV %EDX,%R14D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV %EAX,%R8D	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
MOV 0x28(%RSP),%R10	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	3	0.33
MOV %R15,%RAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
SHR $0x20,%RAX	1	0	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50
MOV %RSI,0x1a0(%RSP)	1	0	0	0	0	0	0.33	0.33	0.33	0	0	0	0	0	0	4	0.50
JNE 24a760 <.omp_outlined..471+0x280>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	1	0.50-1
MOV %R15D,%EAX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.17
XOR %EDX,%EDX	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0.25
DIV %R12D	2	2	0	0	0	0	0	0	0	0	0	0	0	0	0	10-17	6
JMP 24a768 <.omp_outlined..471+0x288>	1	0.50	0	0	0	0.50	0	0	0	0	0	0	0	0	0	0	1

▶Scalability Runs Description

Run 2x1	Number processes: 2Number nodes: 1Number processes per node: 2Run Command: <executable> MPI Command: mpirun -np <number_processes>Dataset: Run Directory: /beegfs/hackathon/users/eoseret/qaas_runs/170-854-8685/intel/CloverLeafCXX/run/oneview_runs/compilers/aocc_15/oneview_run_1708555871I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spreadOMP_NUM_THREADS: 1
Run 2x2	OMP_NUM_THREADS: 2I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x4	OMP_NUM_THREADS: 4I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x8	OMP_NUM_THREADS: 8I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x16	OMP_NUM_THREADS: 16I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x32	OMP_NUM_THREADS: 32I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x64	OMP_NUM_THREADS: 64I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread
Run 2x96	OMP_NUM_THREADS: 96I_MPI_PIN_DOMAIN: auto:scatterOMP_PLACES: threadsOMP_PROC_BIND: spread

(2x1) Efficiency	(2x1) Potential Speed-Up (%)	(2x2) Efficiency	(2x2) Potential Speed-Up (%)	(2x4) Efficiency	(2x4) Potential Speed-Up (%)	(2x8) Efficiency	(2x8) Potential Speed-Up (%)	(2x16) Efficiency	(2x16) Potential Speed-Up (%)	(2x32) Efficiency	(2x32) Potential Speed-Up (%)	(2x64) Efficiency	(2x64) Potential Speed-Up (%)	(2x96) Efficiency	(2x96) Potential Speed-Up (%)
1	0	1	0	1	0.01	1	0	1	0.02	0.81	0.82	0.43	2.73	0.29	3.81

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
2x1	2	1	1	1	77.14	4.49
2x2	4	1	2	2	38.66	4.49
2x4	8	1	3.99	4	19.35	4.48
2x8	16	1	8	8	9.68	4.46
2x16	32	1	15.93	16	5.21	4.25
2x32	64	0.81	26.05	32	3.26	4.42
2x64	128	0.43	27.34	64	3.46	4.76
2x96	192	0.29	27.54	96	2.93	5.34

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

FMA

Workaround

Complex instructions

Details

Vector unaligned load/store instructions

Details

Workaround

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Execution units bottlenecks

Workaround

FMA

Workaround

Complex instructions

Details

Vector unaligned load/store instructions

Details

Workaround

Conversion instructions

Details

Workaround

Type of elements and instruction set

Matching between your loop (in the source code) and the binary loop

Arithmetic intensity

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Colums Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency