Loop Id: 83 | Module: exec | Source: ljForce.c:172-216 [...] | Coverage: 0.01% |
---|
Loop Id: 83 | Module: exec | Source: ljForce.c:172-216 [...] | Coverage: 0.01% |
---|
0x40d540 MOV -0x78(%RBP),%RCX |
0x40d544 INC %RCX |
0x40d547 ADD $0x40,%EDI |
0x40d54a CMP -0x50(%RBP),%RCX |
0x40d54e JE 40d424 |
0x40d554 MOV %EDI,%EDI |
0x40d556 MOV -0x60(%RBP),%RAX |
0x40d55a MOV (%RAX,%RCX,4),%EAX |
0x40d55d MOV -0x70(%RBP),%RDX |
0x40d561 MOV (%RDX,%RCX,8),%RDX |
0x40d565 TEST %EAX,%EAX |
0x40d567 MOV %RCX,-0x78(%RBP) |
0x40d56b JLE 40d740 |
0x40d571 SAL $0x6,%ECX |
0x40d574 ADD %ECX,%EAX |
0x40d576 LEA 0x1(%RDI),%ECX |
0x40d579 CMP %ECX,%EAX |
0x40d57b CMOVLE %ECX,%EAX |
0x40d57e MOV %EDI,%R9D |
0x40d581 NOT %R9D |
0x40d584 ADD %EAX,%R9D |
0x40d587 XOR %R10D,%R10D |
0x40d58a MOV %RDX,-0x80(%RBP) |
0x40d58e JMP 40d5d1 |
(84) 0x40d5c0 INC %R10 |
(84) 0x40d5c3 CMP $0x1b,%R10 |
(84) 0x40d5c7 MOV -0x80(%RBP),%RDX |
(84) 0x40d5cb JE 40d540 |
(84) 0x40d5d1 MOV (%RDX,%R10,4),%EAX |
(84) 0x40d5d5 TEST %EAX,%EAX |
(84) 0x40d5d7 JS 40d7fd |
(84) 0x40d5dd MOV -0x60(%RBP),%RCX |
(84) 0x40d5e1 MOVSXD (%RCX,%RAX,4),%RDX |
(84) 0x40d5e5 TEST %RDX,%RDX |
(84) 0x40d5e8 JLE 40d5c0 |
(84) 0x40d5ea SAL $0x6,%EAX |
(84) 0x40d5ed MOV -0x58(%RBP),%RCX |
(84) 0x40d5f1 MOV 0x20(%RCX),%R14 |
(84) 0x40d5f5 MOV 0x18(%R14),%R12 |
(84) 0x40d5f9 CLTQ |
(84) 0x40d5fb ADD %RAX,%RDX |
(84) 0x40d5fe LEA 0x1(%RAX),%RCX |
(84) 0x40d602 CMP %RCX,%RDX |
(84) 0x40d605 CMOVLE %RCX,%RDX |
(84) 0x40d609 SUB %RAX,%RDX |
(84) 0x40d60c LEA (%RAX,%RAX,2),%RAX |
(84) 0x40d610 LEA 0x10(%R12,%RAX,8),%R15 |
(84) 0x40d615 XOR %EBX,%EBX |
(84) 0x40d617 JMP 40d64d |
(85) 0x40d640 CMP %R9,%RBX |
(85) 0x40d643 LEA 0x1(%RBX),%RBX |
(85) 0x40d647 JE 40d5c0 |
(85) 0x40d64d LEA (%RBX,%RDI,1),%RSI |
(85) 0x40d651 LEA (%RSI,%RSI,2),%RCX |
(85) 0x40d655 LEA (%R12,%RCX,8),%RAX |
(85) 0x40d659 MOV %R15,%R13 |
(85) 0x40d65c MOV %RDX,%R11 |
(85) 0x40d65f JMP 40d689 |
(86) 0x40d680 ADD $0x18,%R13 |
(86) 0x40d684 DEC %R11 |
(86) 0x40d687 JE 40d640 |
(86) 0x40d689 VMOVUPD (%RAX),%XMM11 |
(86) 0x40d68d VSUBPD -0x10(%R13),%XMM11,%XMM11 |
(86) 0x40d693 VMULPD %XMM11,%XMM11,%XMM12 |
(86) 0x40d698 VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 |
(86) 0x40d69e VADDSD %XMM12,%XMM13,%XMM13 |
(86) 0x40d6a3 VMOVSD 0x10(%RAX),%XMM12 |
(86) 0x40d6a8 VSUBSD (%R13),%XMM12,%XMM12 |
(86) 0x40d6ae VFMADD231SD %XMM12,%XMM12,%XMM13 |
(86) 0x40d6b3 VUCOMISD %XMM2,%XMM13 |
(86) 0x40d6b7 JA 40d680 |
(86) 0x40d6b9 VUCOMISD %XMM4,%XMM13 |
(86) 0x40d6bd JBE 40d680 |
(86) 0x40d6bf VDIVSD %XMM13,%XMM6,%XMM13 |
(86) 0x40d6c4 VMULSD %XMM13,%XMM13,%XMM14 |
(86) 0x40d6c9 VMULSD %XMM1,%XMM13,%XMM15 |
(86) 0x40d6cd VMULSD %XMM15,%XMM14,%XMM14 |
(86) 0x40d6d2 VADDSD %XMM7,%XMM14,%XMM15 |
(86) 0x40d6d6 VFNMADD213SD %XMM0,%XMM14,%XMM15 |
(86) 0x40d6db VMULSD %XMM8,%XMM15,%XMM15 |
(86) 0x40d6e0 MOV 0x30(%R14),%R8 |
(86) 0x40d6e4 VADDSD (%R8,%RSI,8),%XMM15,%XMM16 |
(86) 0x40d6eb VMOVSD %XMM16,(%R8,%RSI,8) |
(86) 0x40d6f2 VMOVAPD %XMM9,%XMM16 |
(86) 0x40d6f8 VFMADD213SD %XMM10,%XMM14,%XMM16 |
(86) 0x40d6fe VMULSD %XMM3,%XMM13,%XMM13 |
(86) 0x40d702 VMULSD %XMM14,%XMM16,%XMM14 |
(86) 0x40d708 VMULSD %XMM13,%XMM14,%XMM13 |
(86) 0x40d70d MOV 0x28(%R14),%R8 |
(86) 0x40d711 VMOVDDUP %XMM13,%XMM14 |
(86) 0x40d716 VFMADD213PD (%R8,%RCX,8),%XMM14,%XMM11 |
(86) 0x40d71c VMOVUPD %XMM11,(%R8,%RCX,8) |
(86) 0x40d722 VFMADD213SD 0x10(%R8,%RCX,8),%XMM13,%XMM12 |
(86) 0x40d729 VMOVSD %XMM12,0x10(%R8,%RCX,8) |
(86) 0x40d730 VADDSD %XMM5,%XMM15,%XMM5 |
(86) 0x40d734 JMP 40d680 |
0x40d740 CMPL $0,(%RDX) |
0x40d743 JS 40d7fd |
0x40d749 CMPL $0,0x4(%RDX) |
0x40d74d JS 40d7fd |
0x40d753 CMPL $0,0x8(%RDX) |
0x40d757 JS 40d7fd |
0x40d75d CMPL $0,0xc(%RDX) |
0x40d761 JS 40d7fd |
0x40d767 CMPL $0,0x10(%RDX) |
0x40d76b JS 40d7fd |
0x40d771 CMPL $0,0x14(%RDX) |
0x40d775 JS 40d7fd |
0x40d77b CMPL $0,0x18(%RDX) |
0x40d77f JS 40d7fd |
0x40d781 CMPL $0,0x1c(%RDX) |
0x40d785 JS 40d7fd |
0x40d787 CMPL $0,0x20(%RDX) |
0x40d78b JS 40d7fd |
0x40d78d CMPL $0,0x24(%RDX) |
0x40d791 JS 40d7fd |
0x40d793 CMPL $0,0x28(%RDX) |
0x40d797 JS 40d7fd |
0x40d799 CMPL $0,0x2c(%RDX) |
0x40d79d JS 40d7fd |
0x40d79f CMPL $0,0x30(%RDX) |
0x40d7a3 JS 40d7fd |
0x40d7a5 CMPL $0,0x34(%RDX) |
0x40d7a9 JS 40d7fd |
0x40d7ab CMPL $0,0x38(%RDX) |
0x40d7af JS 40d7fd |
0x40d7b1 CMPL $0,0x3c(%RDX) |
0x40d7b5 JS 40d7fd |
0x40d7b7 CMPL $0,0x40(%RDX) |
0x40d7bb JS 40d7fd |
0x40d7bd CMPL $0,0x44(%RDX) |
0x40d7c1 JS 40d7fd |
0x40d7c3 CMPL $0,0x48(%RDX) |
0x40d7c7 JS 40d7fd |
0x40d7c9 CMPL $0,0x4c(%RDX) |
0x40d7cd JS 40d7fd |
0x40d7cf CMPL $0,0x50(%RDX) |
0x40d7d3 JS 40d7fd |
0x40d7d5 CMPL $0,0x54(%RDX) |
0x40d7d9 JS 40d7fd |
0x40d7db CMPL $0,0x58(%RDX) |
0x40d7df JS 40d7fd |
0x40d7e1 CMPL $0,0x5c(%RDX) |
0x40d7e5 JS 40d7fd |
0x40d7e7 CMPL $0,0x60(%RDX) |
0x40d7eb JS 40d7fd |
0x40d7ed CMPL $0,0x64(%RDX) |
0x40d7f1 JS 40d7fd |
0x40d7f3 CMPL $0,0x68(%RDX) |
0x40d7f7 JNS 40d540 |
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 172 - 216 |
-------------------------------------------------------------------------------- |
172: #pragma omp parallel for reduction(+:ePot) |
173: for (int iBox=0; iBox<s->boxes->nLocalBoxes; iBox++) |
174: { |
175: int nIBox = s->boxes->nAtoms[iBox]; |
176: |
177: // loop over neighbors of iBox |
178: for (int jTmp=0; jTmp<nNbrBoxes; jTmp++) |
179: { |
180: int jBox = s->boxes->nbrBoxes[iBox][jTmp]; |
181: |
182: assert(jBox>=0); |
183: |
184: int nJBox = s->boxes->nAtoms[jBox]; |
185: |
186: // loop over atoms in iBox |
187: for (int iOff=MAXATOMS*iBox; iOff<(iBox*MAXATOMS+nIBox); iOff++) |
188: { |
189: |
190: // loop over atoms in jBox |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 15.70 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.35 |
Bottlenecks | |
Function | ljForce.extracted |
Source | ljForce.c:172-175,ljForce.c:180-182,ljForce.c:187-187 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.83 |
CQA cycles if no scalar integer | 8.83 |
CQA cycles if FP arith vectorized | 8.83 |
CQA cycles if fully vectorized | 0.56 |
Front-end cycles | 7.17 |
DIV/SQRT cycles | 8.20 |
P0 cycles | 5.90 |
P1 cycles | 6.17 |
P2 cycles | 6.17 |
P3 cycles | 0.75 |
P4 cycles | 5.90 |
P5 cycles | 8.10 |
P6 cycles | 0.75 |
P7 cycles | 0.75 |
P8 cycles | 0.75 |
P9 cycles | 5.90 |
P10 cycles | 6.17 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 11.24 - 11.24 |
Stall cycles (UFS) | 3.94 |
Nb insns | 43.00 |
Nb uops | 43.00 |
Nb loads | 18.50 |
Nb stores | 1.50 |
Nb stack references | 4.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.46 |
Bytes prefetched | 0.00 |
Bytes loaded | 90.00 |
Bytes stored | 12.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 7.70 |
Vector-efficiency ratio load | 6.48 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 6.25 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.36 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.48 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.67 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:172-175,ljForce.c:180-182,ljForce.c:187-187 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.17 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.22 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 1.90 |
P0 cycles | 1.80 |
P1 cycles | 1.33 |
P2 cycles | 1.33 |
P3 cycles | 1.00 |
P4 cycles | 1.80 |
P5 cycles | 1.70 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.80 |
P10 cycles | 1.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 3.31 - 3.32 |
Stall cycles (UFS) | 0.00 |
Nb insns | 19.00 |
Nb uops | 19.00 |
Nb loads | 4.00 |
Nb stores | 2.00 |
Nb stack references | 4.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 13.89 |
Bytes prefetched | 0.00 |
Bytes loaded | 28.00 |
Bytes stored | 16.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 8.75 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.25 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 16.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.30 |
Bottlenecks | P0, P6, |
Function | ljForce.extracted |
Source | ljForce.c:172-175,ljForce.c:180-182,ljForce.c:187-187 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 14.50 |
CQA cycles if no scalar integer | 14.50 |
CQA cycles if FP arith vectorized | 14.50 |
CQA cycles if fully vectorized | 0.91 |
Front-end cycles | 11.17 |
DIV/SQRT cycles | 14.50 |
P0 cycles | 10.00 |
P1 cycles | 11.00 |
P2 cycles | 11.00 |
P3 cycles | 0.50 |
P4 cycles | 10.00 |
P5 cycles | 14.50 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 10.00 |
P10 cycles | 11.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 19.17 |
Stall cycles (UFS) | 7.88 |
Nb insns | 67.00 |
Nb uops | 67.00 |
Nb loads | 33.00 |
Nb stores | 1.00 |
Nb stack references | 4.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 11.03 |
Bytes prefetched | 0.00 |
Bytes loaded | 152.00 |
Bytes stored | 8.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 6.65 |
Vector-efficiency ratio load | 6.48 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 6.25 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.47 |
Path / |
Function | ljForce.extracted |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 43 |
nb uops | 43 |
loop length | 149 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 7.17 cycles |
front end | 7.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 5.90 | 6.17 | 6.17 | 0.75 | 5.90 | 8.10 | 0.75 | 0.75 | 0.75 | 5.90 | 6.17 |
cycles | 8.20 | 5.90 | 6.17 | 6.17 | 0.75 | 5.90 | 8.10 | 0.75 | 0.75 | 0.75 | 5.90 | 6.17 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 11.24-11.25 |
Stall cycles | 3.94 |
LM full (events) | 4.53 |
Front-end | 7.17 |
Dispatch | 8.20 |
Data deps. | 2.00 |
Overall L1 | 8.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 7% |
load | 6% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Function | ljForce.extracted |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 19 |
nb uops | 19 |
loop length | 60 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.90 | 1.80 | 1.33 | 1.33 | 1.00 | 1.80 | 1.70 | 1.00 | 1.00 | 1.00 | 1.80 | 1.33 |
cycles | 1.90 | 1.80 | 1.33 | 1.33 | 1.00 | 1.80 | 1.70 | 1.00 | 1.00 | 1.00 | 1.80 | 1.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 3.31-3.32 |
Stall cycles | 0.00 |
Front-end | 3.17 |
Dispatch | 1.90 |
Data deps. | 2.00 |
Overall L1 | 3.17 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 8% |
load | NA (no load vectorizable/vectorized instructions) |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,4),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RCX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JLE 40d740 <ljForce.extracted+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x6,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RDI),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %ECX,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 40d5d1 <ljForce.extracted+0x231> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | ljForce.extracted |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 67 |
nb uops | 67 |
loop length | 238 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.50 | 10.00 | 11.00 | 11.00 | 0.50 | 10.00 | 14.50 | 0.50 | 0.50 | 0.50 | 10.00 | 11.00 |
cycles | 14.50 | 10.00 | 11.00 | 11.00 | 0.50 | 10.00 | 14.50 | 0.50 | 0.50 | 0.50 | 10.00 | 11.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 19.17 |
Stall cycles | 7.88 |
LM full (events) | 9.06 |
Front-end | 11.17 |
Dispatch | 14.50 |
Data deps. | 2.00 |
Overall L1 | 14.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 6% |
load | 6% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x40,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP -0x50(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 40d424 <ljForce.extracted+0x84> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,4),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RCX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JLE 40d740 <ljForce.extracted+0x3a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x4(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x8(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0xc(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x10(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x14(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x18(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x1c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x20(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x24(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x28(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x2c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x30(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x34(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x38(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x3c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x40(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x44(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x48(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x4c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x50(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x54(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x58(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x5c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x60(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x64(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40d7fd <ljForce.extracted+0x45d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x68(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNS 40d540 <ljForce.extracted+0x1a0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |