Loop Id: 85 | Module: exec | Source: ljForce.c:172-216 [...] | Coverage: 0.02% |
---|
Loop Id: 85 | Module: exec | Source: ljForce.c:172-216 [...] | Coverage: 0.02% |
---|
0x40b5a0 MOV -0x78(%RBP),%RCX |
0x40b5a4 INC %RCX |
0x40b5a7 ADD $0x40,%EDI |
0x40b5aa CMP -0x50(%RBP),%RCX |
0x40b5ae JE 40b4b0 |
0x40b5b4 MOV %EDI,%EDI |
0x40b5b6 MOV -0x60(%RBP),%RAX |
0x40b5ba MOV (%RAX,%RCX,4),%EAX |
0x40b5bd MOV -0x70(%RBP),%RDX |
0x40b5c1 MOV (%RDX,%RCX,8),%RDX |
0x40b5c5 TEST %EAX,%EAX |
0x40b5c7 MOV %RCX,-0x78(%RBP) |
0x40b5cb JLE 40b730 |
0x40b5d1 SAL $0x6,%ECX |
0x40b5d4 ADD %ECX,%EAX |
0x40b5d6 LEA 0x1(%RDI),%ECX |
0x40b5d9 CMP %ECX,%EAX |
0x40b5db CMOVLE %ECX,%EAX |
0x40b5de MOV %EDI,%R9D |
0x40b5e1 NOT %R9D |
0x40b5e4 ADD %EAX,%R9D |
0x40b5e7 XOR %R10D,%R10D |
0x40b5ea MOV %RDX,-0x80(%RBP) |
0x40b5ee JMP 40b5fd |
(86) 0x40b5f0 INC %R10 |
(86) 0x40b5f3 CMP $0x1b,%R10 |
(86) 0x40b5f7 MOV -0x80(%RBP),%RDX |
(86) 0x40b5fb JE 40b5a0 |
(86) 0x40b5fd MOV (%RDX,%R10,4),%EAX |
(86) 0x40b601 TEST %EAX,%EAX |
(86) 0x40b603 JS 40b7ed |
(86) 0x40b609 MOV -0x60(%RBP),%RCX |
(86) 0x40b60d MOVSXD (%RCX,%RAX,4),%RDX |
(86) 0x40b611 TEST %RDX,%RDX |
(86) 0x40b614 JLE 40b5f0 |
(86) 0x40b616 SAL $0x6,%EAX |
(86) 0x40b619 MOV -0x58(%RBP),%RCX |
(86) 0x40b61d MOV 0x20(%RCX),%R14 |
(86) 0x40b621 MOV 0x18(%R14),%R12 |
(86) 0x40b625 CLTQ |
(86) 0x40b627 ADD %RAX,%RDX |
(86) 0x40b62a LEA 0x1(%RAX),%RCX |
(86) 0x40b62e CMP %RCX,%RDX |
(86) 0x40b631 CMOVLE %RCX,%RDX |
(86) 0x40b635 SUB %RAX,%RDX |
(86) 0x40b638 LEA (%RAX,%RAX,2),%RAX |
(86) 0x40b63c LEA 0x10(%R12,%RAX,8),%R15 |
(86) 0x40b641 XOR %EBX,%EBX |
(86) 0x40b643 JMP 40b65c |
(87) 0x40b650 LEA 0x1(%RBX),%RAX |
(87) 0x40b654 CMP %R9,%RBX |
(87) 0x40b657 MOV %RAX,%RBX |
(87) 0x40b65a JE 40b5f0 |
(87) 0x40b65c LEA (%RBX,%RDI,1),%RSI |
(87) 0x40b660 LEA (%RSI,%RSI,2),%RCX |
(87) 0x40b664 LEA (%R12,%RCX,8),%RAX |
(87) 0x40b668 MOV %R15,%R13 |
(87) 0x40b66b MOV %RDX,%R11 |
(87) 0x40b66e JMP 40b679 |
(88) 0x40b670 ADD $0x18,%R13 |
(88) 0x40b674 DEC %R11 |
(88) 0x40b677 JE 40b650 |
(88) 0x40b679 VMOVUPD (%RAX),%XMM11 |
(88) 0x40b67d VSUBPD -0x10(%R13),%XMM11,%XMM11 |
(88) 0x40b683 VMULPD %XMM11,%XMM11,%XMM12 |
(88) 0x40b688 VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 |
(88) 0x40b68e VADDSD %XMM12,%XMM13,%XMM13 |
(88) 0x40b693 VMOVSD 0x10(%RAX),%XMM12 |
(88) 0x40b698 VSUBSD (%R13),%XMM12,%XMM12 |
(88) 0x40b69e VFMADD231SD %XMM12,%XMM12,%XMM13 |
(88) 0x40b6a3 VUCOMISD %XMM2,%XMM13 |
(88) 0x40b6a7 JA 40b670 |
(88) 0x40b6a9 VUCOMISD %XMM4,%XMM13 |
(88) 0x40b6ad JBE 40b670 |
(88) 0x40b6af VDIVSD %XMM13,%XMM6,%XMM13 |
(88) 0x40b6b4 VMULSD %XMM13,%XMM13,%XMM14 |
(88) 0x40b6b9 VMULSD %XMM1,%XMM13,%XMM15 |
(88) 0x40b6bd VMULSD %XMM15,%XMM14,%XMM14 |
(88) 0x40b6c2 VADDSD %XMM7,%XMM14,%XMM15 |
(88) 0x40b6c6 VFNMADD213SD %XMM0,%XMM14,%XMM15 |
(88) 0x40b6cb VMULSD %XMM8,%XMM15,%XMM15 |
(88) 0x40b6d0 MOV 0x30(%R14),%R8 |
(88) 0x40b6d4 VADDSD (%R8,%RSI,8),%XMM15,%XMM16 |
(88) 0x40b6db VMOVSD %XMM16,(%R8,%RSI,8) |
(88) 0x40b6e2 VMOVAPD %XMM9,%XMM16 |
(88) 0x40b6e8 VFMADD213SD %XMM10,%XMM14,%XMM16 |
(88) 0x40b6ee VMULSD %XMM3,%XMM13,%XMM13 |
(88) 0x40b6f2 VMULSD %XMM14,%XMM16,%XMM14 |
(88) 0x40b6f8 VMULSD %XMM13,%XMM14,%XMM13 |
(88) 0x40b6fd MOV 0x28(%R14),%R8 |
(88) 0x40b701 VMOVDDUP %XMM13,%XMM14 |
(88) 0x40b706 VFMADD213PD (%R8,%RCX,8),%XMM14,%XMM11 |
(88) 0x40b70c VMOVUPD %XMM11,(%R8,%RCX,8) |
(88) 0x40b712 VFMADD213SD 0x10(%R8,%RCX,8),%XMM13,%XMM12 |
(88) 0x40b719 VMOVSD %XMM12,0x10(%R8,%RCX,8) |
(88) 0x40b720 VADDSD %XMM5,%XMM15,%XMM5 |
(88) 0x40b724 JMP 40b670 |
0x40b730 CMPL $0,(%RDX) |
0x40b733 JS 40b7ed |
0x40b739 CMPL $0,0x4(%RDX) |
0x40b73d JS 40b7ed |
0x40b743 CMPL $0,0x8(%RDX) |
0x40b747 JS 40b7ed |
0x40b74d CMPL $0,0xc(%RDX) |
0x40b751 JS 40b7ed |
0x40b757 CMPL $0,0x10(%RDX) |
0x40b75b JS 40b7ed |
0x40b761 CMPL $0,0x14(%RDX) |
0x40b765 JS 40b7ed |
0x40b76b CMPL $0,0x18(%RDX) |
0x40b76f JS 40b7ed |
0x40b771 CMPL $0,0x1c(%RDX) |
0x40b775 JS 40b7ed |
0x40b777 CMPL $0,0x20(%RDX) |
0x40b77b JS 40b7ed |
0x40b77d CMPL $0,0x24(%RDX) |
0x40b781 JS 40b7ed |
0x40b783 CMPL $0,0x28(%RDX) |
0x40b787 JS 40b7ed |
0x40b789 CMPL $0,0x2c(%RDX) |
0x40b78d JS 40b7ed |
0x40b78f CMPL $0,0x30(%RDX) |
0x40b793 JS 40b7ed |
0x40b795 CMPL $0,0x34(%RDX) |
0x40b799 JS 40b7ed |
0x40b79b CMPL $0,0x38(%RDX) |
0x40b79f JS 40b7ed |
0x40b7a1 CMPL $0,0x3c(%RDX) |
0x40b7a5 JS 40b7ed |
0x40b7a7 CMPL $0,0x40(%RDX) |
0x40b7ab JS 40b7ed |
0x40b7ad CMPL $0,0x44(%RDX) |
0x40b7b1 JS 40b7ed |
0x40b7b3 CMPL $0,0x48(%RDX) |
0x40b7b7 JS 40b7ed |
0x40b7b9 CMPL $0,0x4c(%RDX) |
0x40b7bd JS 40b7ed |
0x40b7bf CMPL $0,0x50(%RDX) |
0x40b7c3 JS 40b7ed |
0x40b7c5 CMPL $0,0x54(%RDX) |
0x40b7c9 JS 40b7ed |
0x40b7cb CMPL $0,0x58(%RDX) |
0x40b7cf JS 40b7ed |
0x40b7d1 CMPL $0,0x5c(%RDX) |
0x40b7d5 JS 40b7ed |
0x40b7d7 CMPL $0,0x60(%RDX) |
0x40b7db JS 40b7ed |
0x40b7dd CMPL $0,0x64(%RDX) |
0x40b7e1 JS 40b7ed |
0x40b7e3 CMPL $0,0x68(%RDX) |
0x40b7e7 JNS 40b5a0 |
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 172 - 216 |
-------------------------------------------------------------------------------- |
172: #pragma omp parallel for reduction(+:ePot) |
173: for (int iBox=0; iBox<s->boxes->nLocalBoxes; iBox++) |
174: { |
175: int nIBox = s->boxes->nAtoms[iBox]; |
176: |
177: // loop over neighbors of iBox |
178: for (int jTmp=0; jTmp<nNbrBoxes; jTmp++) |
179: { |
180: int jBox = s->boxes->nbrBoxes[iBox][jTmp]; |
181: |
182: assert(jBox>=0); |
183: |
184: int nJBox = s->boxes->nAtoms[jBox]; |
185: |
186: // loop over atoms in iBox |
187: for (int iOff=MAXATOMS*iBox; iOff<(iBox*MAXATOMS+nIBox); iOff++) |
188: { |
189: |
190: // loop over atoms in jBox |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 15.70 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.35 |
Bottlenecks | |
Function | ljForce.extracted |
Source | ljForce.c:172-175,ljForce.c:180-182,ljForce.c:187-187 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.83 |
CQA cycles if no scalar integer | 8.83 |
CQA cycles if FP arith vectorized | 8.83 |
CQA cycles if fully vectorized | 0.56 |
Front-end cycles | 7.17 |
DIV/SQRT cycles | 8.20 |
P0 cycles | 5.90 |
P1 cycles | 6.17 |
P2 cycles | 6.17 |
P3 cycles | 0.75 |
P4 cycles | 5.90 |
P5 cycles | 8.10 |
P6 cycles | 0.75 |
P7 cycles | 0.75 |
P8 cycles | 0.75 |
P9 cycles | 5.90 |
P10 cycles | 6.17 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 11.24 - 11.24 |
Stall cycles (UFS) | 3.94 |
Nb insns | 43.00 |
Nb uops | 43.00 |
Nb loads | 18.50 |
Nb stores | 1.50 |
Nb stack references | 4.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.46 |
Bytes prefetched | 0.00 |
Bytes loaded | 90.00 |
Bytes stored | 12.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 7.70 |
Vector-efficiency ratio load | 6.48 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 6.25 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.36 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.48 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.67 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:172-175,ljForce.c:180-182,ljForce.c:187-187 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.17 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.22 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 1.90 |
P0 cycles | 1.80 |
P1 cycles | 1.33 |
P2 cycles | 1.33 |
P3 cycles | 1.00 |
P4 cycles | 1.80 |
P5 cycles | 1.70 |
P6 cycles | 1.00 |
P7 cycles | 1.00 |
P8 cycles | 1.00 |
P9 cycles | 1.80 |
P10 cycles | 1.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 3.31 - 3.32 |
Stall cycles (UFS) | 0.00 |
Nb insns | 19.00 |
Nb uops | 19.00 |
Nb loads | 4.00 |
Nb stores | 2.00 |
Nb stack references | 4.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 13.89 |
Bytes prefetched | 0.00 |
Bytes loaded | 28.00 |
Bytes stored | 16.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 8.75 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.25 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 16.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.30 |
Bottlenecks | P0, P6, |
Function | ljForce.extracted |
Source | ljForce.c:172-175,ljForce.c:180-182,ljForce.c:187-187 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 14.50 |
CQA cycles if no scalar integer | 14.50 |
CQA cycles if FP arith vectorized | 14.50 |
CQA cycles if fully vectorized | 0.91 |
Front-end cycles | 11.17 |
DIV/SQRT cycles | 14.50 |
P0 cycles | 10.00 |
P1 cycles | 11.00 |
P2 cycles | 11.00 |
P3 cycles | 0.50 |
P4 cycles | 10.00 |
P5 cycles | 14.50 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 10.00 |
P10 cycles | 11.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 2 |
FE+BE cycles (UFS) | 19.17 |
Stall cycles (UFS) | 7.88 |
Nb insns | 67.00 |
Nb uops | 67.00 |
Nb loads | 33.00 |
Nb stores | 1.00 |
Nb stack references | 4.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 11.03 |
Bytes prefetched | 0.00 |
Bytes loaded | 152.00 |
Bytes stored | 8.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 6.65 |
Vector-efficiency ratio load | 6.48 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 6.25 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.47 |
Path / |
Function | ljForce.extracted |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 43 |
nb uops | 43 |
loop length | 149 |
used x86 registers | 6 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 7.17 cycles |
front end | 7.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 5.90 | 6.17 | 6.17 | 0.75 | 5.90 | 8.10 | 0.75 | 0.75 | 0.75 | 5.90 | 6.17 |
cycles | 8.20 | 5.90 | 6.17 | 6.17 | 0.75 | 5.90 | 8.10 | 0.75 | 0.75 | 0.75 | 5.90 | 6.17 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 11.24-11.25 |
Stall cycles | 3.94 |
LM full (events) | 4.53 |
Front-end | 7.17 |
Dispatch | 8.20 |
Data deps. | 2.00 |
Overall L1 | 8.83 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 7% |
load | 6% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Function | ljForce.extracted |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 19 |
nb uops | 19 |
loop length | 60 |
used x86 registers | 7 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.90 | 1.80 | 1.33 | 1.33 | 1.00 | 1.80 | 1.70 | 1.00 | 1.00 | 1.00 | 1.80 | 1.33 |
cycles | 1.90 | 1.80 | 1.33 | 1.33 | 1.00 | 1.80 | 1.70 | 1.00 | 1.00 | 1.00 | 1.80 | 1.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 3.31-3.32 |
Stall cycles | 0.00 |
Front-end | 3.17 |
Dispatch | 1.90 |
Data deps. | 2.00 |
Overall L1 | 3.17 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 8% |
load | NA (no load vectorizable/vectorized instructions) |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,4),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RCX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JLE 40b730 <ljForce.extracted+0x300> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x6,%ECX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x1(%RDI),%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVLE %ECX,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %EDI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
NOT %R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %EAX,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RDX,-0x80(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 40b5fd <ljForce.extracted+0x1cd> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
Function | ljForce.extracted |
Source file and lines | ljForce.c:172-216 |
Module | exec |
nb instructions | 67 |
nb uops | 67 |
loop length | 238 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 14.50 | 10.00 | 11.00 | 11.00 | 0.50 | 10.00 | 14.50 | 0.50 | 0.50 | 0.50 | 10.00 | 11.00 |
cycles | 14.50 | 10.00 | 11.00 | 11.00 | 0.50 | 10.00 | 14.50 | 0.50 | 0.50 | 0.50 | 10.00 | 11.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 2.00 |
FE+BE cycles | 19.17 |
Stall cycles | 7.88 |
LM full (events) | 9.06 |
Front-end | 11.17 |
Dispatch | 14.50 |
Data deps. | 2.00 |
Overall L1 | 14.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 6% |
load | 6% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x78(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x40,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP -0x50(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 40b4b0 <ljForce.extracted+0x80> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RAX,%RCX,4),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x70(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDX,%RCX,8),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
MOV %RCX,-0x78(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JLE 40b730 <ljForce.extracted+0x300> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x4(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x8(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0xc(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x10(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x14(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x18(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x1c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x20(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x24(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x28(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x2c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x30(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x34(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x38(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x3c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x40(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x44(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x48(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x4c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x50(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x54(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x58(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x5c(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x60(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x64(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JS 40b7ed <ljForce.extracted+0x3bd> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMPL $0,0x68(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNS 40b5a0 <ljForce.extracted+0x170> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |