Function: advancePosition.extracted | Module: exec | Source: timestep.c:85-94 | Coverage: 1.5% |
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Function: advancePosition.extracted | Module: exec | Source: timestep.c:85-94 | Coverage: 1.5% |
---|
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 85 - 94 |
-------------------------------------------------------------------------------- |
85: #pragma omp parallel for |
86: for (int iBox=0; iBox<nBoxes; iBox++) |
87: { |
88: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
89: { |
90: int iSpecies = s->atoms->iSpecies[iOff]; |
91: real_t invMass = 1.0/s->species[iSpecies].mass; |
92: s->atoms->r[iOff][0] += dt*s->atoms->p[iOff][0]*invMass; |
93: s->atoms->r[iOff][1] += dt*s->atoms->p[iOff][1]*invMass; |
94: s->atoms->r[iOff][2] += dt*s->atoms->p[iOff][2]*invMass; |
0x40f2b0 PUSH %RBP |
0x40f2b1 MOV %RSP,%RBP |
0x40f2b4 PUSH %R15 |
0x40f2b6 PUSH %R14 |
0x40f2b8 PUSH %R13 |
0x40f2ba PUSH %R12 |
0x40f2bc PUSH %RBX |
0x40f2bd SUB $0x38,%RSP |
0x40f2c1 MOV %RCX,%R15 |
0x40f2c4 MOV %RDX,-0x50(%RBP) |
0x40f2c8 MOVL $0,-0x44(%RBP) |
0x40f2cf MOV (%RDI),%ESI |
0x40f2d1 MOVL $0,-0x30(%RBP) |
0x40f2d8 MOV %R9D,-0x2c(%RBP) |
0x40f2dc MOVL $0x1,-0x40(%RBP) |
0x40f2e3 SUB $0x8,%RSP |
0x40f2e7 LEA -0x40(%RBP),%RAX |
0x40f2eb LEA -0x44(%RBP),%RCX |
0x40f2ef LEA -0x30(%RBP),%R8 |
0x40f2f3 LEA -0x2c(%RBP),%R9 |
0x40f2f7 MOV $0x42e950,%EDI |
0x40f2fc MOV %ESI,-0x3c(%RBP) |
0x40f2ff MOV $0x22,%EDX |
0x40f304 PUSH $0x1 |
0x40f306 PUSH $0x1 |
0x40f308 PUSH %RAX |
0x40f309 CALL 403230 <__kmpc_for_static_init_4@plt> |
0x40f30e ADD $0x20,%RSP |
0x40f312 MOV -0x30(%RBP),%EAX |
0x40f315 MOV -0x2c(%RBP),%ECX |
0x40f318 MOV %RCX,-0x38(%RBP) |
0x40f31c CMP %ECX,%EAX |
0x40f31e JBE 40f33e |
0x40f320 MOV $0x42e970,%EDI |
0x40f325 MOV -0x3c(%RBP),%ESI |
0x40f328 ADD $0x38,%RSP |
0x40f32c POP %RBX |
0x40f32d POP %R12 |
0x40f32f POP %R13 |
0x40f331 POP %R14 |
0x40f333 POP %R15 |
0x40f335 POP %RBP |
0x40f336 VZEROUPPER |
0x40f339 JMP 4030f0 |
0x40f33e VMOVQ %R15,%XMM0 |
0x40f343 MOV -0x50(%RBP),%RCX |
0x40f347 MOV 0x18(%RCX),%RCX |
0x40f34b MOV 0x78(%RCX),%RCX |
0x40f34f MOV %RCX,-0x58(%RBP) |
0x40f353 MOV -0x38(%RBP),%RCX |
0x40f357 SUB %RAX,%RCX |
0x40f35a MOV %RCX,-0x38(%RBP) |
0x40f35e VPBROADCASTQ %XMM0,%YMM1 |
0x40f363 MOV %EAX,%ESI |
0x40f365 SAL $0x6,%ESI |
0x40f368 XOR %EDI,%EDI |
0x40f36a VMOVUPD 0x13f8e(%RIP),%YMM2 |
0x40f372 VMOVUPD 0x13fa6(%RIP),%YMM3 |
0x40f37a VBROADCASTF128 0x1401d(%RIP),%YMM4 |
0x40f383 VMOVUPD 0x13fd5(%RIP),%YMM5 |
0x40f38b VMOVUPD 0x13fad(%RIP),%YMM6 |
0x40f393 JMP 40f3b4 |
0x40f395 NOPW %CS:(%RAX,%RAX,1) |
(97) 0x40f3a0 LEA 0x1(%RDI),%RCX |
(97) 0x40f3a4 ADD $0x40,%ESI |
(97) 0x40f3a7 CMP -0x38(%RBP),%RDI |
(97) 0x40f3ab MOV %RCX,%RDI |
(97) 0x40f3ae JE 40f320 |
(97) 0x40f3b4 MOV %ESI,%ESI |
(97) 0x40f3b6 LEA (%RDI,%RAX,1),%RCX |
(97) 0x40f3ba MOV -0x58(%RBP),%RDX |
(97) 0x40f3be MOV (%RDX,%RCX,4),%R8D |
(97) 0x40f3c2 TEST %R8D,%R8D |
(97) 0x40f3c5 JLE 40f3a0 |
(97) 0x40f3c7 LEA (,%RSI,8),%RCX |
(97) 0x40f3cf LEA (,%RSI,4),%R12 |
(97) 0x40f3d7 LEA (%RDI,%RAX,1),%EBX |
(97) 0x40f3da SAL $0x6,%EBX |
(97) 0x40f3dd MOV -0x50(%RBP),%R9 |
(97) 0x40f3e1 MOV 0x20(%R9),%RDX |
(97) 0x40f3e5 MOV 0x28(%R9),%R9 |
(97) 0x40f3e9 MOV 0x10(%RDX),%R15 |
(97) 0x40f3ed MOV 0x18(%RDX),%R10 |
(97) 0x40f3f1 MOV 0x20(%RDX),%R11 |
(97) 0x40f3f5 LEA -0x1(%R8),%EDX |
(97) 0x40f3f9 MOVSXD %EDX,%RDX |
(97) 0x40f3fc ADD %RBX,%RDX |
(97) 0x40f3ff SAL $0x3,%RDX |
(97) 0x40f403 LEA (%RDX,%RDX,2),%RDX |
(97) 0x40f407 LEA 0x10(%R11,%RDX,1),%R14 |
(97) 0x40f40c SAL $0x3,%RBX |
(97) 0x40f410 LEA (%RBX,%RBX,2),%RBX |
(97) 0x40f414 LEA (%R10,%RBX,1),%R13 |
(97) 0x40f418 CMP %R13,%R14 |
(97) 0x40f41b JB 40f4a0 |
(97) 0x40f421 ADD %R11,%RBX |
(97) 0x40f424 LEA 0x10(%R10,%RDX,1),%RDX |
(97) 0x40f429 CMP %RBX,%RDX |
(97) 0x40f42c JB 40f4a0 |
(97) 0x40f42e LEA 0x10(%RCX,%RCX,2),%RCX |
(97) 0x40f433 ADD %R12,%R15 |
(97) 0x40f436 XOR %EDX,%EDX |
(97) 0x40f438 NOPL (%RAX,%RAX,1) |
(100) 0x40f440 MOVSXD (%R15,%RDX,4),%RBX |
(100) 0x40f444 SAL $0x4,%RBX |
(100) 0x40f448 VDIVSD 0x8(%R9,%RBX,1),%XMM0,%XMM7 |
(100) 0x40f44f VMOVSD -0x10(%R11,%RCX,1),%XMM8 |
(100) 0x40f456 VFMADD213SD -0x10(%R10,%RCX,1),%XMM7,%XMM8 |
(100) 0x40f45d VMOVSD %XMM8,-0x10(%R10,%RCX,1) |
(100) 0x40f464 VMOVSD -0x8(%R11,%RCX,1),%XMM8 |
(100) 0x40f46b VFMADD213SD -0x8(%R10,%RCX,1),%XMM7,%XMM8 |
(100) 0x40f472 VMOVSD %XMM8,-0x8(%R10,%RCX,1) |
(100) 0x40f479 VMOVSD (%R11,%RCX,1),%XMM8 |
(100) 0x40f47f VFMADD213SD (%R10,%RCX,1),%XMM7,%XMM8 |
(100) 0x40f485 VMOVSD %XMM8,(%R10,%RCX,1) |
(100) 0x40f48b ADD $0x18,%RCX |
(100) 0x40f48f INC %RDX |
(100) 0x40f492 CMP %EDX,%R8D |
(100) 0x40f495 JNE 40f440 |
(97) 0x40f497 JMP 40f3a0 |
0x40f49c NOPL (%RAX) |
(97) 0x40f4a0 LEA (%RCX,%RCX,2),%RCX |
(97) 0x40f4a4 MOV %R8D,%R14D |
(97) 0x40f4a7 AND $-0x4,%R14D |
(97) 0x40f4ab JE 40f5e2 |
(97) 0x40f4b1 LEA -0x1(%R14),%EDX |
(97) 0x40f4b5 ADD %R15,%R12 |
(97) 0x40f4b8 MOV %RCX,%R13 |
(97) 0x40f4bb XOR %EBX,%EBX |
(97) 0x40f4bd NOPL (%RAX) |
(99) 0x40f4c0 VPMOVSXDQ (%R12,%RBX,4),%YMM7 |
(99) 0x40f4c6 KXNORW %K0,%K0,%K1 |
(99) 0x40f4ca VXORPD %XMM8,%XMM8,%XMM8 |
(99) 0x40f4cf VPSLLQ $0x4,%YMM7,%YMM7 |
(99) 0x40f4d4 VGATHERQPD 0x8(%R9,%YMM7,1),%YMM8{%K1} |
(99) 0x40f4dc VDIVPD %YMM8,%YMM1,%YMM7 |
(99) 0x40f4e1 VMOVUPD 0x20(%R11,%R13,1),%YMM8 |
(99) 0x40f4e8 VMOVUPD 0x20(%R10,%R13,1),%YMM9 |
(99) 0x40f4ef VMOVUPD 0x10(%R11,%R13,1),%XMM10 |
(99) 0x40f4f6 VMOVUPD 0x10(%R10,%R13,1),%XMM11 |
(99) 0x40f4fd VBLENDPD $0x3,(%R11,%R13,1),%YMM8,%YMM12 |
(99) 0x40f504 VBLENDPD $0x3,(%R10,%R13,1),%YMM9,%YMM13 |
(99) 0x40f50b VINSERTF128 $0x1,0x40(%R11,%R13,1),%YMM10,%YMM10 |
(99) 0x40f513 VINSERTF128 $0x1,0x40(%R10,%R13,1),%YMM11,%YMM11 |
(99) 0x40f51b VBROADCASTSD 0x50(%R11,%R13,1),%YMM14 |
(99) 0x40f522 VBROADCASTSD 0x50(%R10,%R13,1),%YMM15 |
(99) 0x40f529 VSHUFPD $0x5,%YMM8,%YMM12,%YMM8 |
(99) 0x40f52f VBLENDPD $0x8,%YMM14,%YMM8,%YMM8 |
(99) 0x40f535 VMOVUPD 0x20(%R11,%R13,1),%XMM14 |
(99) 0x40f53c VSHUFPD $0x5,%YMM9,%YMM13,%YMM9 |
(99) 0x40f542 VBLENDPD $0x8,%YMM15,%YMM9,%YMM9 |
(99) 0x40f548 VMOVUPD 0x20(%R10,%R13,1),%XMM15 |
(99) 0x40f54f VBLENDPD $0xc,0x40(%R11,%R13,1),%YMM14,%YMM14 |
(99) 0x40f557 VBLENDPD $0xc,0x40(%R10,%R13,1),%YMM15,%YMM15 |
(99) 0x40f55f VBLENDPD $0xa,%YMM10,%YMM12,%YMM12 |
(99) 0x40f565 VBLENDPD $0xa,%YMM11,%YMM13,%YMM13 |
(99) 0x40f56b VFMADD231PD %YMM12,%YMM7,%YMM13 |
(99) 0x40f570 VFMADD231PD %YMM8,%YMM7,%YMM9 |
(99) 0x40f575 VBLENDPD $0xa,%YMM14,%YMM10,%YMM8 |
(99) 0x40f57b VBLENDPD $0xa,%YMM15,%YMM11,%YMM10 |
(99) 0x40f581 VFMADD231PD %YMM8,%YMM7,%YMM10 |
(99) 0x40f586 VMOVAPD %YMM9,%YMM7 |
(99) 0x40f58a VPERMT2PD %YMM13,%YMM2,%YMM7 |
(99) 0x40f590 VMOVAPD %YMM13,%YMM8 |
(99) 0x40f595 VPERMT2PD %YMM9,%YMM3,%YMM8 |
(99) 0x40f59b VPERMT2PD %YMM13,%YMM4,%YMM9 |
(99) 0x40f5a1 VPERMT2PD %YMM10,%YMM6,%YMM8 |
(99) 0x40f5a7 VBLENDPD $0x2,%YMM10,%YMM7,%YMM7 |
(99) 0x40f5ad VMOVUPD %YMM7,0x20(%R10,%R13,1) |
(99) 0x40f5b4 VMOVUPD %YMM8,(%R10,%R13,1) |
(99) 0x40f5ba VPERMT2PD %YMM9,%YMM5,%YMM10 |
(99) 0x40f5c0 VMOVUPD %YMM10,0x40(%R10,%R13,1) |
(99) 0x40f5c7 ADD $0x4,%RBX |
(99) 0x40f5cb ADD $0x60,%R13 |
(99) 0x40f5cf CMP %EDX,%EBX |
(99) 0x40f5d1 JLE 40f4c0 |
(97) 0x40f5d7 CMP %R14D,%R8D |
(97) 0x40f5da JE 40f3a0 |
(97) 0x40f5e0 JMP 40f5e5 |
(97) 0x40f5e2 XOR %R14D,%R14D |
(97) 0x40f5e5 SUB %R14D,%R8D |
(97) 0x40f5e8 MOVSXD %R14D,%RDX |
(97) 0x40f5eb LEA (%RDX,%RDX,2),%RBX |
(97) 0x40f5ef LEA (%RCX,%RBX,8),%RCX |
(97) 0x40f5f3 ADD %RCX,%R10 |
(97) 0x40f5f6 ADD %RCX,%R11 |
(97) 0x40f5f9 ADD %RSI,%RDX |
(97) 0x40f5fc LEA (%R15,%RDX,4),%RCX |
(97) 0x40f600 XOR %EDX,%EDX |
(97) 0x40f602 XOR %EBX,%EBX |
(97) 0x40f604 NOPW %CS:(%RAX,%RAX,1) |
(98) 0x40f610 MOVSXD (%RCX,%RBX,4),%R14 |
(98) 0x40f614 SAL $0x4,%R14 |
(98) 0x40f618 VDIVSD 0x8(%R9,%R14,1),%XMM0,%XMM7 |
(98) 0x40f61f VMOVUPD (%R11,%RDX,1),%XMM8 |
(98) 0x40f625 VMOVDDUP %XMM7,%XMM9 |
(98) 0x40f629 VFMADD213PD (%R10,%RDX,1),%XMM8,%XMM9 |
(98) 0x40f62f VMOVUPD %XMM9,(%R10,%RDX,1) |
(98) 0x40f635 VMOVSD 0x10(%R11,%RDX,1),%XMM8 |
(98) 0x40f63c VFMADD213SD 0x10(%R10,%RDX,1),%XMM7,%XMM8 |
(98) 0x40f643 VMOVSD %XMM8,0x10(%R10,%RDX,1) |
(98) 0x40f64a INC %RBX |
(98) 0x40f64d ADD $0x18,%RDX |
(98) 0x40f651 CMP %EBX,%R8D |
(98) 0x40f654 JNE 40f610 |
(97) 0x40f656 JMP 40f3a0 |
0x40f65b NOPL (%RAX,%RAX,1) |
Path / |
Source file and lines | timestep.c:85-94 |
Module | exec |
nb instructions | 65 |
nb uops | 67 |
loop length | 249 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.80 | 1.80 | 6.33 | 6.33 | 9.50 | 2.00 | 1.80 | 9.50 | 9.50 | 9.50 | 1.60 | 6.33 |
cycles | 1.80 | 1.80 | 6.33 | 6.33 | 9.50 | 2.00 | 1.80 | 9.50 | 9.50 | 9.50 | 1.60 | 6.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.04-11.11 |
Stall cycles | 0.00 |
Front-end | 11.17 |
Dispatch | 9.50 |
Overall L1 | 11.17 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 21% |
load | 71% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 22% |
all | 10% |
load | 6% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 45% |
load | 45% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 16% |
load | 33% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x38,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x40(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x44(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x42e950,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403230 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40f33e <advancePosition.extracted+0x8e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x42e970,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x3c(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x38,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4030f0 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %XMM0,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVUPD 0x13f8e(%RIP),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x13fa6(%RIP),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBROADCASTF128 0x1401d(%RIP),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 5-8 | 0.33 |
VMOVUPD 0x13fd5(%RIP),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x13fad(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 40f3b4 <advancePosition.extracted+0x104> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | timestep.c:85-94 |
Module | exec |
nb instructions | 65 |
nb uops | 67 |
loop length | 249 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 11.17 cycles |
front end | 11.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.80 | 1.80 | 6.33 | 6.33 | 9.50 | 2.00 | 1.80 | 9.50 | 9.50 | 9.50 | 1.60 | 6.33 |
cycles | 1.80 | 1.80 | 6.33 | 6.33 | 9.50 | 2.00 | 1.80 | 9.50 | 9.50 | 9.50 | 1.60 | 6.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.04-11.11 |
Stall cycles | 0.00 |
Front-end | 11.17 |
Dispatch | 9.50 |
Overall L1 | 11.17 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 21% |
load | 71% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 22% |
all | 10% |
load | 6% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 45% |
load | 45% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 16% |
load | 33% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x38,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x40(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x44(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x42e950,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403230 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40f33e <advancePosition.extracted+0x8e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x42e970,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x3c(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x38,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4030f0 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RCX),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RCX,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x38(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RCX,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VPBROADCASTQ %XMM0,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVUPD 0x13f8e(%RIP),%YMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x13fa6(%RIP),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VBROADCASTF128 0x1401d(%RIP),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 5-8 | 0.33 |
VMOVUPD 0x13fd5(%RIP),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x13fad(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 40f3b4 <advancePosition.extracted+0x104> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼advancePosition.extracted– | 1.5 | 0.21 |
▼Loop 97 - timestep.c:85-94 - exec– | 0.02 | 0 |
○Loop 99 - timestep.c:88-94 - exec | 1.4 | 0.2 |
○Loop 98 - timestep.c:88-94 - exec | 0.08 | 0.01 |
○Loop 100 - timestep.c:88-94 - exec | 0 | 0 |