Function: advanceVelocity.extracted | Module: exec | Source: timestep.c:71-78 | Coverage: 1.4% |
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Function: advanceVelocity.extracted | Module: exec | Source: timestep.c:71-78 | Coverage: 1.4% |
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/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 71 - 78 |
-------------------------------------------------------------------------------- |
71: #pragma omp parallel for |
72: for (int iBox=0; iBox<nBoxes; iBox++) |
73: { |
74: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
75: { |
76: s->atoms->p[iOff][0] += dt*s->atoms->f[iOff][0]; |
77: s->atoms->p[iOff][1] += dt*s->atoms->f[iOff][1]; |
78: s->atoms->p[iOff][2] += dt*s->atoms->f[iOff][2]; |
0x40ee70 PUSH %RBP |
0x40ee71 MOV %RSP,%RBP |
0x40ee74 PUSH %R15 |
0x40ee76 PUSH %R14 |
0x40ee78 PUSH %R13 |
0x40ee7a PUSH %R12 |
0x40ee7c PUSH %RBX |
0x40ee7d SUB $0x18,%RSP |
0x40ee81 MOV %RCX,%R15 |
0x40ee84 MOV %RDX,%RBX |
0x40ee87 MOVL $0,-0x3c(%RBP) |
0x40ee8e MOV (%RDI),%ESI |
0x40ee90 MOVL $0,-0x30(%RBP) |
0x40ee97 MOV %R9D,-0x2c(%RBP) |
0x40ee9b MOVL $0x1,-0x38(%RBP) |
0x40eea2 SUB $0x8,%RSP |
0x40eea6 LEA -0x38(%RBP),%RAX |
0x40eeaa LEA -0x3c(%RBP),%RCX |
0x40eeae LEA -0x30(%RBP),%R8 |
0x40eeb2 LEA -0x2c(%RBP),%R9 |
0x40eeb6 MOV $0x42e8f0,%EDI |
0x40eebb MOV %ESI,-0x34(%RBP) |
0x40eebe MOV $0x22,%EDX |
0x40eec3 PUSH $0x1 |
0x40eec5 PUSH $0x1 |
0x40eec7 PUSH %RAX |
0x40eec8 CALL 403230 <__kmpc_for_static_init_4@plt> |
0x40eecd ADD $0x20,%RSP |
0x40eed1 MOV -0x30(%RBP),%EAX |
0x40eed4 MOV -0x2c(%RBP),%ECX |
0x40eed7 CMP %ECX,%EAX |
0x40eed9 JBE 40eef9 |
0x40eedb MOV $0x42e910,%EDI |
0x40eee0 MOV -0x34(%RBP),%ESI |
0x40eee3 ADD $0x18,%RSP |
0x40eee7 POP %RBX |
0x40eee8 POP %R12 |
0x40eeea POP %R13 |
0x40eeec POP %R14 |
0x40eeee POP %R15 |
0x40eef0 POP %RBP |
0x40eef1 VZEROUPPER |
0x40eef4 JMP 4030f0 |
0x40eef9 VMOVQ %R15,%XMM0 |
0x40eefe MOV 0x18(%RBX),%RDX |
0x40ef02 MOV 0x78(%RDX),%RDX |
0x40ef06 SUB %RAX,%RCX |
0x40ef09 VPBROADCASTQ %XMM0,%YMM1 |
0x40ef0e MOV %EAX,%ESI |
0x40ef10 SAL $0x6,%ESI |
0x40ef13 XOR %EDI,%EDI |
0x40ef15 VMOVUPD 0x14461(%RIP),%YMM17 |
0x40ef1f VMOVUPD 0x143b7(%RIP),%YMM18 |
0x40ef29 VMOVUPD 0x143cd(%RIP),%YMM19 |
0x40ef33 VMOVUPD 0x14403(%RIP),%YMM20 |
0x40ef3d VMOVUPD 0x1441b(%RIP),%YMM6 |
0x40ef45 JMP 40ef63 |
0x40ef47 NOPW (%RAX,%RAX,1) |
(93) 0x40ef50 LEA 0x1(%RDI),%R8 |
(93) 0x40ef54 ADD $0x40,%ESI |
(93) 0x40ef57 CMP %RCX,%RDI |
(93) 0x40ef5a MOV %R8,%RDI |
(93) 0x40ef5d JE 40eedb |
(93) 0x40ef63 LEA (%RDI,%RAX,1),%R8 |
(93) 0x40ef67 MOV (%RDX,%R8,4),%R8D |
(93) 0x40ef6b TEST %R8D,%R8D |
(93) 0x40ef6e JLE 40ef50 |
(93) 0x40ef70 MOV %ESI,%R11D |
(93) 0x40ef73 SAL $0x3,%R11 |
(93) 0x40ef77 LEA (%RDI,%RAX,1),%R15D |
(93) 0x40ef7b SAL $0x6,%R15D |
(93) 0x40ef7f MOV 0x20(%RBX),%R10 |
(93) 0x40ef83 MOV 0x20(%R10),%R9 |
(93) 0x40ef87 MOV 0x28(%R10),%R10 |
(93) 0x40ef8b LEA -0x1(%R8),%R14D |
(93) 0x40ef8f MOVSXD %R14D,%R14 |
(93) 0x40ef92 ADD %R15,%R14 |
(93) 0x40ef95 SAL $0x3,%R14 |
(93) 0x40ef99 LEA (%R14,%R14,2),%R14 |
(93) 0x40ef9d LEA 0x10(%R10,%R14,1),%R12 |
(93) 0x40efa2 SAL $0x3,%R15 |
(93) 0x40efa6 LEA (%R15,%R15,2),%R15 |
(93) 0x40efaa LEA (%R9,%R15,1),%R13 |
(93) 0x40efae CMP %R13,%R12 |
(93) 0x40efb1 JB 40f020 |
(93) 0x40efb3 ADD %R10,%R15 |
(93) 0x40efb6 LEA 0x10(%R9,%R14,1),%R14 |
(93) 0x40efbb CMP %R15,%R14 |
(93) 0x40efbe JB 40f020 |
(93) 0x40efc0 LEA 0x10(%R11,%R11,2),%R11 |
(93) 0x40efc5 NOPW %CS:(%RAX,%RAX,1) |
(96) 0x40efd0 VMOVSD -0x10(%R10,%R11,1),%XMM2 |
(96) 0x40efd7 VFMADD213SD -0x10(%R9,%R11,1),%XMM0,%XMM2 |
(96) 0x40efde VMOVSD %XMM2,-0x10(%R9,%R11,1) |
(96) 0x40efe5 VMOVSD -0x8(%R10,%R11,1),%XMM2 |
(96) 0x40efec VFMADD213SD -0x8(%R9,%R11,1),%XMM0,%XMM2 |
(96) 0x40eff3 VMOVSD %XMM2,-0x8(%R9,%R11,1) |
(96) 0x40effa VMOVSD (%R10,%R11,1),%XMM2 |
(96) 0x40f000 VFMADD213SD (%R9,%R11,1),%XMM0,%XMM2 |
(96) 0x40f006 VMOVSD %XMM2,(%R9,%R11,1) |
(96) 0x40f00c ADD $0x18,%R11 |
(96) 0x40f010 DEC %R8D |
(96) 0x40f013 JNE 40efd0 |
(93) 0x40f015 JMP 40ef50 |
0x40f01a NOPW (%RAX,%RAX,1) |
(93) 0x40f020 LEA (%R11,%R11,2),%R14 |
(93) 0x40f024 MOV %R8D,%R15D |
(93) 0x40f027 AND $-0x8,%R15D |
(93) 0x40f02b JE 40f252 |
(93) 0x40f031 LEA -0x1(%R15),%R12D |
(93) 0x40f035 XOR %R13D,%R13D |
(93) 0x40f038 MOV %R14,%R11 |
(93) 0x40f03b NOPL (%RAX,%RAX,1) |
(95) 0x40f040 VMOVUPD 0x80(%R10,%R11,1),%YMM7 |
(95) 0x40f04a VMOVUPD 0x20(%R10,%R11,1),%YMM8 |
(95) 0x40f051 VMOVUPD 0x80(%R9,%R11,1),%YMM9 |
(95) 0x40f05b VMOVUPD 0x20(%R9,%R11,1),%YMM10 |
(95) 0x40f062 VMOVUPD 0x10(%R10,%R11,1),%XMM11 |
(95) 0x40f069 VMOVUPD 0x70(%R10,%R11,1),%XMM12 |
(95) 0x40f070 VBLENDPD $0x3,(%R10,%R11,1),%YMM8,%YMM13 |
(95) 0x40f077 VBLENDPD $0x3,0x60(%R10,%R11,1),%YMM7,%YMM14 |
(95) 0x40f07f VBLENDPD $0x3,(%R9,%R11,1),%YMM10,%YMM15 |
(95) 0x40f086 VMOVUPD 0x10(%R9,%R11,1),%XMM16 |
(95) 0x40f08e VBLENDPD $0x3,0x60(%R9,%R11,1),%YMM9,%YMM2 |
(95) 0x40f096 VMOVUPD 0x20(%R10,%R11,1),%XMM3 |
(95) 0x40f09d VMOVUPD 0x80(%R10,%R11,1),%XMM4 |
(95) 0x40f0a7 VMOVUPD 0x20(%R9,%R11,1),%XMM5 |
(95) 0x40f0ae VINSERTF128 $0x1,0x40(%R10,%R11,1),%YMM11,%YMM11 |
(95) 0x40f0b6 VBLENDPD $0xc,0x40(%R10,%R11,1),%YMM3,%YMM3 |
(95) 0x40f0be VBLENDPD $0xa,%YMM3,%YMM11,%YMM3 |
(95) 0x40f0c4 VBLENDPD $0xa,%YMM11,%YMM13,%YMM11 |
(95) 0x40f0ca VSHUFPD $0x5,%YMM8,%YMM13,%YMM8 |
(95) 0x40f0d0 VINSERTF128 $0x1,0xa0(%R10,%R11,1),%YMM12,%YMM12 |
(95) 0x40f0db VBLENDPD $0xc,0xa0(%R10,%R11,1),%YMM4,%YMM4 |
(95) 0x40f0e6 VBLENDPD $0xa,%YMM4,%YMM12,%YMM4 |
(95) 0x40f0ec VBLENDPD $0xa,%YMM12,%YMM14,%YMM12 |
(95) 0x40f0f2 VSHUFPD $0x5,%YMM7,%YMM14,%YMM13 |
(95) 0x40f0f7 VINSERTF32X4 $0x1,0x40(%R9,%R11,1),%YMM16,%YMM14 |
(95) 0x40f100 VBLENDPD $0xc,0x40(%R9,%R11,1),%YMM5,%YMM5 |
(95) 0x40f108 VMOVUPD 0x70(%R9,%R11,1),%XMM16 |
(95) 0x40f110 VBLENDPD $0xa,%YMM5,%YMM14,%YMM7 |
(95) 0x40f116 VBLENDPD $0xa,%YMM14,%YMM15,%YMM5 |
(95) 0x40f11c VSHUFPD $0x5,%YMM10,%YMM15,%YMM10 |
(95) 0x40f122 VBROADCASTSD 0x50(%R10,%R11,1),%YMM14 |
(95) 0x40f129 VBLENDPD $0x8,%YMM14,%YMM8,%YMM14 |
(95) 0x40f12f VBROADCASTSD 0xb0(%R10,%R11,1),%YMM8 |
(95) 0x40f139 VBLENDPD $0x8,%YMM8,%YMM13,%YMM13 |
(95) 0x40f13f VBROADCASTSD 0x50(%R9,%R11,1),%YMM8 |
(95) 0x40f146 VBLENDPD $0x8,%YMM8,%YMM10,%YMM10 |
(95) 0x40f14c VBROADCASTSD 0xb0(%R9,%R11,1),%YMM8 |
(95) 0x40f156 VSHUFPD $0x5,%YMM9,%YMM2,%YMM9 |
(95) 0x40f15c VBLENDPD $0x8,%YMM8,%YMM9,%YMM9 |
(95) 0x40f162 VINSERTF32X4 $0x1,0xa0(%R9,%R11,1),%YMM16,%YMM15 |
(95) 0x40f16b VBLENDPD $0xa,%YMM15,%YMM2,%YMM8 |
(95) 0x40f171 VFMADD231PD %YMM12,%YMM1,%YMM8 |
(95) 0x40f176 VFMADD231PD %YMM11,%YMM1,%YMM5 |
(95) 0x40f17b VFMADD231PD %YMM13,%YMM1,%YMM9 |
(95) 0x40f180 VFMADD231PD %YMM14,%YMM1,%YMM10 |
(95) 0x40f185 VMOVUPD 0x80(%R9,%R11,1),%XMM2 |
(95) 0x40f18f VBLENDPD $0xc,0xa0(%R9,%R11,1),%YMM2,%YMM2 |
(95) 0x40f19a VBLENDPD $0xa,%YMM2,%YMM15,%YMM2 |
(95) 0x40f1a0 VFMADD231PD %YMM4,%YMM1,%YMM2 |
(95) 0x40f1a5 VFMADD231PD %YMM3,%YMM1,%YMM7 |
(95) 0x40f1aa VMOVAPD %YMM5,%YMM3 |
(95) 0x40f1ae VPERMT2PD %YMM10,%YMM17,%YMM3 |
(95) 0x40f1b4 VMOVAPD %YMM9,%YMM4 |
(95) 0x40f1b8 VPERMT2PD %YMM8,%YMM18,%YMM4 |
(95) 0x40f1be VMOVAPD %YMM9,%YMM11 |
(95) 0x40f1c3 VPERMT2PD %YMM8,%YMM19,%YMM11 |
(95) 0x40f1c9 VPERMT2PD %YMM9,%YMM17,%YMM8 |
(95) 0x40f1cf VMOVAPD %YMM10,%YMM9 |
(95) 0x40f1d4 VPERMT2PD %YMM5,%YMM18,%YMM9 |
(95) 0x40f1da VPERMT2PD %YMM5,%YMM19,%YMM10 |
(95) 0x40f1e0 VPERMT2PD %YMM2,%YMM20,%YMM8 |
(95) 0x40f1e6 VBLENDPD $0x2,%YMM2,%YMM11,%YMM5 |
(95) 0x40f1ec VPERMT2PD %YMM4,%YMM6,%YMM2 |
(95) 0x40f1f2 VBLENDPD $0x2,%YMM7,%YMM10,%YMM4 |
(95) 0x40f1f8 VPERMT2PD %YMM7,%YMM20,%YMM3 |
(95) 0x40f1fe VPERMT2PD %YMM9,%YMM6,%YMM7 |
(95) 0x40f204 VMOVUPD %YMM5,0x80(%R9,%R11,1) |
(95) 0x40f20e VMOVUPD %YMM4,0x20(%R9,%R11,1) |
(95) 0x40f215 VMOVUPD %YMM7,0x40(%R9,%R11,1) |
(95) 0x40f21c VMOVUPD %YMM2,0xa0(%R9,%R11,1) |
(95) 0x40f226 VMOVUPD %YMM8,0x60(%R9,%R11,1) |
(95) 0x40f22d VMOVUPD %YMM3,(%R9,%R11,1) |
(95) 0x40f233 ADD $0x8,%R13D |
(95) 0x40f237 ADD $0xc0,%R11 |
(95) 0x40f23e CMP %R12D,%R13D |
(95) 0x40f241 JLE 40f040 |
(93) 0x40f247 CMP %R15D,%R8D |
(93) 0x40f24a JE 40ef50 |
(93) 0x40f250 JMP 40f255 |
(93) 0x40f252 XOR %R15D,%R15D |
(93) 0x40f255 SUB %R15D,%R8D |
(93) 0x40f258 MOVSXD %R15D,%R11 |
(93) 0x40f25b SAL $0x3,%R11 |
(93) 0x40f25f LEA (%R11,%R11,2),%R11 |
(93) 0x40f263 ADD %R11,%R9 |
(93) 0x40f266 ADD %R11,%R10 |
(93) 0x40f269 NOPL (%RAX) |
(94) 0x40f270 VMOVUPD (%R10,%R14,1),%XMM2 |
(94) 0x40f276 VFMADD213PD (%R9,%R14,1),%XMM1,%XMM2 |
(94) 0x40f27c VMOVUPD %XMM2,(%R9,%R14,1) |
(94) 0x40f282 VMOVSD 0x10(%R10,%R14,1),%XMM2 |
(94) 0x40f289 VFMADD213SD 0x10(%R9,%R14,1),%XMM0,%XMM2 |
(94) 0x40f290 VMOVSD %XMM2,0x10(%R9,%R14,1) |
(94) 0x40f297 ADD $0x18,%R14 |
(94) 0x40f29b DEC %R8D |
(94) 0x40f29e JNE 40f270 |
(93) 0x40f2a0 JMP 40ef50 |
0x40f2a5 NOPW %CS:(%RAX,%RAX,1) |
Path / |
Source file and lines | timestep.c:71-78 |
Module | exec |
nb instructions | 60 |
nb uops | 62 |
loop length | 241 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 10.33 cycles |
front end | 10.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.80 | 1.80 | 5.67 | 5.67 | 7.50 | 2.00 | 1.80 | 7.50 | 7.50 | 7.50 | 1.60 | 5.67 |
cycles | 1.80 | 1.80 | 5.67 | 5.67 | 7.50 | 2.00 | 1.80 | 7.50 | 7.50 | 7.50 | 1.60 | 5.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 10.12-10.16 |
Stall cycles | 0.00 |
Front-end | 10.33 |
Dispatch | 7.50 |
Overall L1 | 10.33 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 26% |
load | 71% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
all | 9% |
load | 6% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 37% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVL $0,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x3c(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x42e8f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403230 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40eef9 <advanceVelocity.extracted+0x89> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x42e910,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x34(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4030f0 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x18(%RBX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTQ %XMM0,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVUPD 0x14461(%RIP),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x143b7(%RIP),%YMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x143cd(%RIP),%YMM19 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x14403(%RIP),%YMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x1441b(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 40ef63 <advanceVelocity.extracted+0xf3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | timestep.c:71-78 |
Module | exec |
nb instructions | 60 |
nb uops | 62 |
loop length | 241 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 6 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 10.33 cycles |
front end | 10.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.80 | 1.80 | 5.67 | 5.67 | 7.50 | 2.00 | 1.80 | 7.50 | 7.50 | 7.50 | 1.60 | 5.67 |
cycles | 1.80 | 1.80 | 5.67 | 5.67 | 7.50 | 2.00 | 1.80 | 7.50 | 7.50 | 7.50 | 1.60 | 5.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 10.12-10.16 |
Stall cycles | 0.00 |
Front-end | 10.33 |
Dispatch | 7.50 |
Overall L1 | 10.33 |
all | 5% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 14% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 26% |
load | 71% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 14% |
all | 9% |
load | 6% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 18% |
load | 37% |
store | 6% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOVL $0,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x3c(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x42e8f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 403230 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %ECX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40eef9 <advanceVelocity.extracted+0x89> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x42e910,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x34(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x18,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
VZEROUPPER | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
JMP 4030f0 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV 0x18(%RBX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RDX),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VPBROADCASTQ %XMM0,%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%ESI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %EDI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVUPD 0x14461(%RIP),%YMM17 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x143b7(%RIP),%YMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x143cd(%RIP),%YMM19 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x14403(%RIP),%YMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VMOVUPD 0x1441b(%RIP),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JMP 40ef63 <advanceVelocity.extracted+0xf3> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼advanceVelocity.extracted– | 1.4 | 0.2 |
▼Loop 93 - timestep.c:71-78 - exec– | 0.01 | 0 |
○Loop 95 - timestep.c:74-78 - exec | 1.21 | 0.17 |
○Loop 94 - timestep.c:74-78 - exec | 0.18 | 0.03 |
○Loop 96 - timestep.c:74-78 - exec | 0 | 0 |