Function: setTemperature.extracted.30 | Module: exec | Source: initAtoms.c:151-164 [...] | Coverage: 0.01% |
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Function: setTemperature.extracted.30 | Module: exec | Source: initAtoms.c:151-164 [...] | Coverage: 0.01% |
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/scratch_na/users/xoserete/qaas_runs/171-416-7289/intel/CoMD/build/CoMD/CoMD/src-openmp/random.c: 27 - 70 |
-------------------------------------------------------------------------------- |
27: v2 = 2.0*lcg61(seed)-1.0; |
28: rsq = v1*v1+v2*v2; |
29: } while (rsq >= 1.0 || rsq == 0.0); |
30: |
31: return v2 * sqrt(-2.0*log(rsq)/rsq); |
[...] |
45: *seed *= UINT64_C(437799614237992725); |
46: *seed %= UINT64_C(2305843009213693951); |
47: |
48: return *seed*convertToDouble; |
[...] |
70: uint64_t iSeed = (UINT64_C(0x100000000) * s1) + s2; |
/scratch_na/users/xoserete/qaas_runs/171-416-7289/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 151 - 164 |
-------------------------------------------------------------------------------- |
151: #pragma omp parallel for |
152: for (int iBox=0; iBox<s->boxes->nLocalBoxes; ++iBox) |
153: { |
154: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
155: { |
156: int iType = s->atoms->iSpecies[iOff]; |
157: real_t mass = s->species[iType].mass; |
158: real_t sigma = sqrt(kB_eV * temperature/mass); |
159: uint64_t seed = mkSeed(s->atoms->gid[iOff], 123); |
160: s->atoms->p[iOff][0] = mass * sigma * gasdev(&seed); |
161: s->atoms->p[iOff][1] = mass * sigma * gasdev(&seed); |
162: s->atoms->p[iOff][2] = mass * sigma * gasdev(&seed); |
163: } |
164: } |
0x40ba00 PUSH %RBP |
0x40ba01 MOV %RSP,%RBP |
0x40ba04 PUSH %R15 |
0x40ba06 PUSH %R14 |
0x40ba08 PUSH %R13 |
0x40ba0a PUSH %R12 |
0x40ba0c PUSH %RBX |
0x40ba0d SUB $0x68,%RSP |
0x40ba11 MOV %RCX,%R15 |
0x40ba14 MOV %RDX,-0x60(%RBP) |
0x40ba18 MOVL $0,-0x54(%RBP) |
0x40ba1f MOV (%RDI),%ESI |
0x40ba21 MOVL $0,-0x34(%RBP) |
0x40ba28 MOV %R9D,-0x30(%RBP) |
0x40ba2c MOVL $0x1,-0x50(%RBP) |
0x40ba33 SUB $0x8,%RSP |
0x40ba37 LEA -0x50(%RBP),%RAX |
0x40ba3b LEA -0x54(%RBP),%RCX |
0x40ba3f LEA -0x34(%RBP),%R8 |
0x40ba43 LEA -0x30(%RBP),%R9 |
0x40ba47 MOV $0x625690,%EDI |
0x40ba4c MOV %ESI,-0x44(%RBP) |
0x40ba4f MOV $0x22,%EDX |
0x40ba54 PUSH $0x1 |
0x40ba56 PUSH $0x1 |
0x40ba58 PUSH %RAX |
0x40ba59 CALL 402e50 <__kmpc_for_static_init_4@plt> |
0x40ba5e ADD $0x20,%RSP |
0x40ba62 MOV -0x34(%RBP),%ECX |
0x40ba65 MOV -0x30(%RBP),%EAX |
0x40ba68 MOV %RAX,-0x68(%RBP) |
0x40ba6c CMP %EAX,%ECX |
0x40ba6e JBE 40bac0 |
0x40ba70 MOV $0x6256b0,%EDI |
0x40ba75 MOV -0x44(%RBP),%ESI |
0x40ba78 ADD $0x68,%RSP |
0x40ba7c POP %RBX |
0x40ba7d POP %R12 |
0x40ba7f POP %R13 |
0x40ba81 POP %R14 |
0x40ba83 POP %R15 |
0x40ba85 POP %RBP |
0x40ba86 JMP 402d00 |
0x40ba8b NOPW %CS:(%RAX,%RAX,1) |
0x40ba9a NOPW %CS:(%RAX,%RAX,1) |
0x40baa9 NOPW %CS:(%RAX,%RAX,1) |
0x40bab8 NOPL (%RAX,%RAX,1) |
0x40bac0 VMOVQ %R15,%XMM0 |
0x40bac5 MOV -0x60(%RBP),%RAX |
0x40bac9 MOV 0x18(%RAX),%RAX |
0x40bacd VMULSD 0xedd1(%RIP),%XMM0,%XMM17 |
0x40bad7 MOV %ECX,%EDX |
0x40bad9 SAL $0x6,%EDX |
0x40badc MOV %EDX,-0x2c(%RBP) |
0x40badf INCQ -0x68(%RBP) |
0x40bae3 MOV 0x78(%RAX),%RAX |
0x40bae7 MOV %RAX,-0x70(%RBP) |
0x40baeb MOV $0x613606df9756715,%R13 |
0x40baf5 MOV $0x9,%EBX |
0x40bafa VMOVSD 0x13afc(%RIP),%XMM18 |
0x40bb04 VMOVSD 0xeda2(%RIP),%XMM19 |
0x40bb0e VMOVSD 0x13af0(%RIP),%XMM20 |
0x40bb18 VXORPD %XMM21,%XMM21,%XMM21 |
0x40bb1e VMOVSD 0xed90(%RIP),%XMM22 |
0x40bb28 JMP 40bb55 |
0x40bb2a NOPW %CS:(%RAX,%RAX,1) |
0x40bb39 NOPL (%RAX) |
(72) 0x40bb40 MOV -0x78(%RBP),%RCX |
(72) 0x40bb44 INC %RCX |
(72) 0x40bb47 ADDL $0x40,-0x2c(%RBP) |
(72) 0x40bb4b CMP -0x68(%RBP),%RCX |
(72) 0x40bb4f JE 40ba70 |
(72) 0x40bb55 MOV %RCX,-0x78(%RBP) |
(72) 0x40bb59 MOV -0x70(%RBP),%RAX |
(72) 0x40bb5d MOV (%RAX,%RCX,4),%EAX |
(72) 0x40bb60 MOV %EAX,-0x48(%RBP) |
(72) 0x40bb63 TEST %EAX,%EAX |
(72) 0x40bb65 JLE 40bb40 |
(72) 0x40bb67 MOV -0x2c(%RBP),%R12D |
(72) 0x40bb6b MOV -0x60(%RBP),%RCX |
(72) 0x40bb6f MOV 0x20(%RCX),%RAX |
(72) 0x40bb73 MOV 0x28(%RCX),%RCX |
(72) 0x40bb77 MOV %RCX,-0x90(%RBP) |
(72) 0x40bb7e MOV 0x8(%RAX),%RCX |
(72) 0x40bb82 MOV %RCX,-0x88(%RBP) |
(72) 0x40bb89 MOV 0x10(%RAX),%RCX |
(72) 0x40bb8d MOV %RCX,-0x80(%RBP) |
(72) 0x40bb91 MOV 0x20(%RAX),%RAX |
(72) 0x40bb95 MOV %RAX,-0x40(%RBP) |
(72) 0x40bb99 XOR %EAX,%EAX |
(72) 0x40bb9b NOPL (%RAX,%RAX,1) |
(76) 0x40bba0 MOV %EAX,-0x4c(%RBP) |
(76) 0x40bba3 MOV -0x80(%RBP),%RAX |
(76) 0x40bba7 MOVSXD (%RAX,%R12,4),%RAX |
(76) 0x40bbab SAL $0x4,%RAX |
(76) 0x40bbaf MOV -0x90(%RBP),%RCX |
(76) 0x40bbb6 VMOVSD 0x8(%RCX,%RAX,1),%XMM0 |
(76) 0x40bbbc VDIVSD %XMM0,%XMM17,%XMM1 |
(76) 0x40bbc2 VSQRTSD %XMM1,%XMM1,%XMM1 |
(76) 0x40bbc6 MOV -0x88(%RBP),%RAX |
(76) 0x40bbcd IMUL $-0x61c8864f,(%RAX,%R12,4),%EAX |
(76) 0x40bbd5 LEA 0x4a7780b(%RAX),%ECX |
(76) 0x40bbdb SAL $0x20,%RAX |
(76) 0x40bbdf OR %RCX,%RAX |
(76) 0x40bbe2 IMUL %R13,%RAX |
(76) 0x40bbe6 MOV %RAX,%RDX |
(76) 0x40bbe9 MULX %RBX,%RCX,%RCX |
(76) 0x40bbee SUB %RCX,%RDX |
(76) 0x40bbf1 SHR $0x1,%RDX |
(76) 0x40bbf4 ADD %RCX,%RDX |
(76) 0x40bbf7 SHR $0x3c,%RDX |
(76) 0x40bbfb MOV %RDX,%RCX |
(76) 0x40bbfe SAL $0x3d,%RCX |
(76) 0x40bc02 SUB %RCX,%RDX |
(76) 0x40bc05 ADD %RAX,%RDX |
(76) 0x40bc08 IMUL %R13,%RDX |
(76) 0x40bc0c MULX %RBX,%RCX,%RCX |
(76) 0x40bc11 MOV %RDX,%RAX |
(76) 0x40bc14 SUB %RCX,%RAX |
(76) 0x40bc17 SHR $0x1,%RAX |
(76) 0x40bc1a ADD %RCX,%RAX |
(76) 0x40bc1d SHR $0x3c,%RAX |
(76) 0x40bc21 MOV %RAX,%RCX |
(76) 0x40bc24 SAL $0x3d,%RCX |
(76) 0x40bc28 SUB %RCX,%RAX |
(76) 0x40bc2b ADD %RDX,%RAX |
(76) 0x40bc2e IMUL %R13,%RAX |
(76) 0x40bc32 MOV %RAX,%RDX |
(76) 0x40bc35 MULX %RBX,%RCX,%RCX |
(76) 0x40bc3a SUB %RCX,%RDX |
(76) 0x40bc3d SHR $0x1,%RDX |
(76) 0x40bc40 ADD %RCX,%RDX |
(76) 0x40bc43 SHR $0x3c,%RDX |
(76) 0x40bc47 MOV %RDX,%RCX |
(76) 0x40bc4a SAL $0x3d,%RCX |
(76) 0x40bc4e SUB %RCX,%RDX |
(76) 0x40bc51 ADD %RAX,%RDX |
(76) 0x40bc54 IMUL %R13,%RDX |
(76) 0x40bc58 MULX %RBX,%RCX,%RCX |
(76) 0x40bc5d MOV %RDX,%RAX |
(76) 0x40bc60 SUB %RCX,%RAX |
(76) 0x40bc63 SHR $0x1,%RAX |
(76) 0x40bc66 ADD %RCX,%RAX |
(76) 0x40bc69 SHR $0x3c,%RAX |
(76) 0x40bc6d MOV %RAX,%RCX |
(76) 0x40bc70 SAL $0x3d,%RCX |
(76) 0x40bc74 SUB %RCX,%RAX |
(76) 0x40bc77 ADD %RDX,%RAX |
(76) 0x40bc7a IMUL %R13,%RAX |
(76) 0x40bc7e MOV %RAX,%RDX |
(76) 0x40bc81 MULX %RBX,%RCX,%RCX |
(76) 0x40bc86 SUB %RCX,%RDX |
(76) 0x40bc89 SHR $0x1,%RDX |
(76) 0x40bc8c ADD %RCX,%RDX |
(76) 0x40bc8f SHR $0x3c,%RDX |
(76) 0x40bc93 MOV %RDX,%RCX |
(76) 0x40bc96 SAL $0x3d,%RCX |
(76) 0x40bc9a SUB %RCX,%RDX |
(76) 0x40bc9d ADD %RAX,%RDX |
(76) 0x40bca0 IMUL %R13,%RDX |
(76) 0x40bca4 MULX %RBX,%RCX,%RCX |
(76) 0x40bca9 MOV %RDX,%RAX |
(76) 0x40bcac SUB %RCX,%RAX |
(76) 0x40bcaf SHR $0x1,%RAX |
(76) 0x40bcb2 ADD %RCX,%RAX |
(76) 0x40bcb5 SHR $0x3c,%RAX |
(76) 0x40bcb9 MOV %RAX,%RCX |
(76) 0x40bcbc SAL $0x3d,%RCX |
(76) 0x40bcc0 SUB %RCX,%RAX |
(76) 0x40bcc3 ADD %RDX,%RAX |
(76) 0x40bcc6 IMUL %R13,%RAX |
(76) 0x40bcca MOV %RAX,%RDX |
(76) 0x40bccd MULX %RBX,%RCX,%RCX |
(76) 0x40bcd2 SUB %RCX,%RDX |
(76) 0x40bcd5 SHR $0x1,%RDX |
(76) 0x40bcd8 ADD %RCX,%RDX |
(76) 0x40bcdb SHR $0x3c,%RDX |
(76) 0x40bcdf MOV %RDX,%RCX |
(76) 0x40bce2 SAL $0x3d,%RCX |
(76) 0x40bce6 SUB %RCX,%RDX |
(76) 0x40bce9 ADD %RAX,%RDX |
(76) 0x40bcec IMUL %R13,%RDX |
(76) 0x40bcf0 MULX %RBX,%RCX,%RCX |
(76) 0x40bcf5 MOV %RDX,%RAX |
(76) 0x40bcf8 SUB %RCX,%RAX |
(76) 0x40bcfb SHR $0x1,%RAX |
(76) 0x40bcfe ADD %RCX,%RAX |
(76) 0x40bd01 SHR $0x3c,%RAX |
(76) 0x40bd05 MOV %RAX,%RCX |
(76) 0x40bd08 SAL $0x3d,%RCX |
(76) 0x40bd0c SUB %RCX,%RAX |
(76) 0x40bd0f ADD %RDX,%RAX |
(76) 0x40bd12 IMUL %R13,%RAX |
(76) 0x40bd16 MOV %RAX,%RDX |
(76) 0x40bd19 MULX %RBX,%RCX,%RCX |
(76) 0x40bd1e SUB %RCX,%RDX |
(76) 0x40bd21 SHR $0x1,%RDX |
(76) 0x40bd24 ADD %RCX,%RDX |
(76) 0x40bd27 SHR $0x3c,%RDX |
(76) 0x40bd2b MOV %RDX,%RCX |
(76) 0x40bd2e SAL $0x3d,%RCX |
(76) 0x40bd32 SUB %RCX,%RDX |
(76) 0x40bd35 ADD %RAX,%RDX |
(76) 0x40bd38 IMUL %R13,%RDX |
(76) 0x40bd3c MULX %RBX,%RAX,%RAX |
(76) 0x40bd41 MOV %RDX,%R15 |
(76) 0x40bd44 SUB %RAX,%R15 |
(76) 0x40bd47 SHR $0x1,%R15 |
(76) 0x40bd4a ADD %RAX,%R15 |
(76) 0x40bd4d SHR $0x3c,%R15 |
(76) 0x40bd51 MOV %R15,%RAX |
(76) 0x40bd54 SAL $0x3d,%RAX |
(76) 0x40bd58 SUB %RAX,%R15 |
(76) 0x40bd5b ADD %RDX,%R15 |
(76) 0x40bd5e XCHG %AX,%AX |
(73) 0x40bd60 IMUL %R13,%R15 |
(73) 0x40bd64 MOV %R15,%RDX |
(73) 0x40bd67 MULX %RBX,%RAX,%RAX |
(73) 0x40bd6c SUB %RAX,%RDX |
(73) 0x40bd6f SHR $0x1,%RDX |
(73) 0x40bd72 ADD %RAX,%RDX |
(73) 0x40bd75 SHR $0x3c,%RDX |
(73) 0x40bd79 MOV %RDX,%RAX |
(73) 0x40bd7c SAL $0x3d,%RAX |
(73) 0x40bd80 SUB %RAX,%RDX |
(73) 0x40bd83 ADD %R15,%RDX |
(73) 0x40bd86 VCVTSI2SD %RDX,%XMM0,%XMM16 |
(73) 0x40bd8c IMUL %R13,%RDX |
(73) 0x40bd90 MULX %RBX,%RAX,%RAX |
(73) 0x40bd95 MOV %RDX,%R15 |
(73) 0x40bd98 SUB %RAX,%R15 |
(73) 0x40bd9b SHR $0x1,%R15 |
(73) 0x40bd9e ADD %RAX,%R15 |
(73) 0x40bda1 SHR $0x3c,%R15 |
(73) 0x40bda5 MOV %R15,%RAX |
(73) 0x40bda8 SAL $0x3d,%RAX |
(73) 0x40bdac SUB %RAX,%R15 |
(73) 0x40bdaf ADD %RDX,%R15 |
(73) 0x40bdb2 VCVTSI2SD %R15,%XMM0,%XMM24 |
(73) 0x40bdb8 VFMADD213SD %XMM18,%XMM19,%XMM24 |
(73) 0x40bdbe VMULSD %XMM24,%XMM24,%XMM2 |
(73) 0x40bdc4 VFMADD213SD %XMM18,%XMM19,%XMM16 |
(73) 0x40bdca VFMADD213SD %XMM2,%XMM16,%XMM16 |
(73) 0x40bdd0 VUCOMISD %XMM20,%XMM16 |
(73) 0x40bdd6 JAE 40bd60 |
(73) 0x40bdd8 VUCOMISD %XMM21,%XMM16 |
(73) 0x40bdde JE 40bd60 |
(76) 0x40bde0 VMULSD %XMM0,%XMM1,%XMM23 |
(76) 0x40bde6 VMOVAPD %XMM16,%XMM0 |
(76) 0x40bdec CALL 414f70 <__libm_log_l9> |
(76) 0x40bdf1 VMULSD %XMM22,%XMM0,%XMM0 |
(76) 0x40bdf7 VDIVSD %XMM16,%XMM0,%XMM0 |
(76) 0x40bdfd VSQRTSD %XMM0,%XMM0,%XMM0 |
(76) 0x40be01 VMULSD %XMM23,%XMM24,%XMM1 |
(76) 0x40be07 VMULSD %XMM1,%XMM0,%XMM0 |
(76) 0x40be0b LEA (%R12,%R12,2),%R14 |
(76) 0x40be0f MOV -0x40(%RBP),%RAX |
(76) 0x40be13 VMOVSD %XMM0,(%RAX,%R14,8) |
(76) 0x40be19 NOPL (%RAX) |
(74) 0x40be20 IMUL %R13,%R15 |
(74) 0x40be24 MOV %R15,%RDX |
(74) 0x40be27 MULX %RBX,%RAX,%RAX |
(74) 0x40be2c SUB %RAX,%RDX |
(74) 0x40be2f SHR $0x1,%RDX |
(74) 0x40be32 ADD %RAX,%RDX |
(74) 0x40be35 SHR $0x3c,%RDX |
(74) 0x40be39 MOV %RDX,%RAX |
(74) 0x40be3c SAL $0x3d,%RAX |
(74) 0x40be40 SUB %RAX,%RDX |
(74) 0x40be43 ADD %R15,%RDX |
(74) 0x40be46 VCVTSI2SD %RDX,%XMM3,%XMM16 |
(74) 0x40be4c IMUL %R13,%RDX |
(74) 0x40be50 MULX %RBX,%RAX,%RAX |
(74) 0x40be55 MOV %RDX,%R15 |
(74) 0x40be58 SUB %RAX,%R15 |
(74) 0x40be5b SHR $0x1,%R15 |
(74) 0x40be5e ADD %RAX,%R15 |
(74) 0x40be61 SHR $0x3c,%R15 |
(74) 0x40be65 MOV %R15,%RAX |
(74) 0x40be68 SAL $0x3d,%RAX |
(74) 0x40be6c SUB %RAX,%R15 |
(74) 0x40be6f ADD %RDX,%R15 |
(74) 0x40be72 VCVTSI2SD %R15,%XMM3,%XMM24 |
(74) 0x40be78 VFMADD213SD %XMM18,%XMM19,%XMM24 |
(74) 0x40be7e VMULSD %XMM24,%XMM24,%XMM0 |
(74) 0x40be84 VFMADD213SD %XMM18,%XMM19,%XMM16 |
(74) 0x40be8a VFMADD213SD %XMM0,%XMM16,%XMM16 |
(74) 0x40be90 VUCOMISD %XMM20,%XMM16 |
(74) 0x40be96 JAE 40be20 |
(74) 0x40be98 VUCOMISD %XMM21,%XMM16 |
(74) 0x40be9e JE 40be20 |
(76) 0x40bea0 VMOVAPD %XMM16,%XMM0 |
(76) 0x40bea6 CALL 414f70 <__libm_log_l9> |
(76) 0x40beab VMULSD %XMM22,%XMM0,%XMM0 |
(76) 0x40beb1 VDIVSD %XMM16,%XMM0,%XMM0 |
(76) 0x40beb7 VSQRTSD %XMM0,%XMM0,%XMM0 |
(76) 0x40bebb VMULSD %XMM23,%XMM24,%XMM1 |
(76) 0x40bec1 VMULSD %XMM1,%XMM0,%XMM0 |
(76) 0x40bec5 MOV -0x40(%RBP),%RAX |
(76) 0x40bec9 VMOVSD %XMM0,0x8(%RAX,%R14,8) |
(75) 0x40bed0 IMUL %R13,%R15 |
(75) 0x40bed4 MOV %R15,%RDX |
(75) 0x40bed7 MULX %RBX,%RAX,%RAX |
(75) 0x40bedc SUB %RAX,%RDX |
(75) 0x40bedf SHR $0x1,%RDX |
(75) 0x40bee2 ADD %RAX,%RDX |
(75) 0x40bee5 SHR $0x3c,%RDX |
(75) 0x40bee9 MOV %RDX,%RAX |
(75) 0x40beec SAL $0x3d,%RAX |
(75) 0x40bef0 SUB %RAX,%RDX |
(75) 0x40bef3 ADD %R15,%RDX |
(75) 0x40bef6 VCVTSI2SD %RDX,%XMM3,%XMM16 |
(75) 0x40befc IMUL %R13,%RDX |
(75) 0x40bf00 MULX %RBX,%RAX,%RAX |
(75) 0x40bf05 MOV %RDX,%R15 |
(75) 0x40bf08 SUB %RAX,%R15 |
(75) 0x40bf0b SHR $0x1,%R15 |
(75) 0x40bf0e ADD %RAX,%R15 |
(75) 0x40bf11 SHR $0x3c,%R15 |
(75) 0x40bf15 MOV %R15,%RAX |
(75) 0x40bf18 SAL $0x3d,%RAX |
(75) 0x40bf1c SUB %RAX,%R15 |
(75) 0x40bf1f ADD %RDX,%R15 |
(75) 0x40bf22 VCVTSI2SD %R15,%XMM3,%XMM24 |
(75) 0x40bf28 VFMADD213SD %XMM18,%XMM19,%XMM24 |
(75) 0x40bf2e VMULSD %XMM24,%XMM24,%XMM0 |
(75) 0x40bf34 VFMADD213SD %XMM18,%XMM19,%XMM16 |
(75) 0x40bf3a VFMADD213SD %XMM0,%XMM16,%XMM16 |
(75) 0x40bf40 VUCOMISD %XMM20,%XMM16 |
(75) 0x40bf46 JAE 40bed0 |
(75) 0x40bf48 VUCOMISD %XMM21,%XMM16 |
(75) 0x40bf4e JE 40bed0 |
(76) 0x40bf50 VMOVAPD %XMM16,%XMM0 |
(76) 0x40bf56 CALL 414f70 <__libm_log_l9> |
(76) 0x40bf5b VMULSD %XMM22,%XMM0,%XMM0 |
(76) 0x40bf61 VDIVSD %XMM16,%XMM0,%XMM0 |
(76) 0x40bf67 VSQRTSD %XMM0,%XMM0,%XMM0 |
(76) 0x40bf6b VMULSD %XMM23,%XMM24,%XMM1 |
(76) 0x40bf71 VMULSD %XMM1,%XMM0,%XMM0 |
(76) 0x40bf75 MOV -0x40(%RBP),%RAX |
(76) 0x40bf79 VMOVSD %XMM0,0x10(%RAX,%R14,8) |
(76) 0x40bf80 MOV -0x4c(%RBP),%EAX |
(76) 0x40bf83 INC %EAX |
(76) 0x40bf85 INC %R12 |
(76) 0x40bf88 CMP -0x48(%RBP),%EAX |
(76) 0x40bf8b JNE 40bba0 |
(72) 0x40bf91 JMP 40bb40 |
0x40bf96 NOPW %CS:(%RAX,%RAX,1) |
0x40bfa0 NOPW %CS:(%RAX,%RAX,1) |
0x40bfaa NOPW %CS:(%RAX,%RAX,1) |
0x40bfb4 NOPW %CS:(%RAX,%RAX,1) |
0x40bfbe XCHG %AX,%AX |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | initAtoms.c:151-164 |
Module | exec |
nb instructions | 72 |
nb uops | 75 |
loop length | 362 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 12.50 cycles |
front end | 12.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.10 | 2.30 | 6.33 | 6.33 | 10.00 | 2.20 | 2.20 | 10.00 | 10.00 | 10.00 | 2.20 | 6.33 |
cycles | 2.10 | 2.30 | 6.33 | 6.33 | 10.00 | 2.20 | 2.20 | 10.00 | 10.00 | 10.00 | 2.20 | 6.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 12.53-12.57 |
Stall cycles | 0.00 |
Front-end | 12.50 |
Dispatch | 10.00 |
Overall L1 | 12.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 16% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
all | 8% |
load | 6% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 14% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 10% |
store | 8% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x68,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,-0x54(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x54(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x34(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x625690,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402e50 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x34(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40bac0 <setTemperature.extracted.30+0xc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x6256b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x44(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x68,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 402d00 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD 0xedd1(%RIP),%XMM0,%XMM17 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDX,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INCQ -0x68(%RBP) | 3 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV 0x78(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x613606df9756715,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV $0x9,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x13afc(%RIP),%XMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xeda2(%RIP),%XMM19 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x13af0(%RIP),%XMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD 0xed90(%RIP),%XMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 40bb55 <setTemperature.extracted.30+0x155> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | initAtoms.c:151-164 |
Module | exec |
nb instructions | 72 |
nb uops | 75 |
loop length | 362 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 7 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 12.50 cycles |
front end | 12.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.10 | 2.30 | 6.33 | 6.33 | 10.00 | 2.20 | 2.20 | 10.00 | 10.00 | 10.00 | 2.20 | 6.33 |
cycles | 2.10 | 2.30 | 6.33 | 6.33 | 10.00 | 2.20 | 2.20 | 10.00 | 10.00 | 10.00 | 2.20 | 6.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 12.53-12.57 |
Stall cycles | 0.00 |
Front-end | 12.50 |
Dispatch | 10.00 |
Overall L1 | 12.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 16% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 3% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
all | 8% |
load | 6% |
store | 8% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 14% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 25% |
all | 10% |
load | 10% |
store | 8% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x68,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,-0x54(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x50(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x54(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x34(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x625690,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402e50 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x34(%RBP),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40bac0 <setTemperature.extracted.30+0xc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x6256b0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x44(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x68,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 402d00 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV -0x60(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMULSD 0xedd1(%RIP),%XMM0,%XMM17 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV %ECX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%EDX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV %EDX,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
INCQ -0x68(%RBP) | 3 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
MOV 0x78(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x613606df9756715,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV $0x9,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD 0x13afc(%RIP),%XMM18 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xeda2(%RIP),%XMM19 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x13af0(%RIP),%XMM20 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VXORPD %XMM21,%XMM21,%XMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD 0xed90(%RIP),%XMM22 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 40bb55 <setTemperature.extracted.30+0x155> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼setTemperature.extracted.30– | 0.01 | 0 |
▼Loop 72 - initAtoms.c:152-164 - exec– | 0 | 0 |
▼Loop 76 - initAtoms.c:154-162 - exec– | 0 | 0 |
○Loop 74 - random.c:27-48 - exec | 0 | 0 |
○Loop 75 - random.c:27-48 - exec | 0 | 0 |
○Loop 73 - random.c:27-48 - exec | 0 | 0 |