Function: randomDisplacements.extracted | Module: exec | Source: initAtoms.c:194-204 [...] | Coverage: 0.02% |
---|
Function: randomDisplacements.extracted | Module: exec | Source: initAtoms.c:194-204 [...] | Coverage: 0.02% |
---|
/scratch_na/users/xoserete/qaas_runs/171-416-7289/intel/CoMD/build/CoMD/CoMD/src-openmp/random.c: 45 - 70 |
-------------------------------------------------------------------------------- |
45: *seed *= UINT64_C(437799614237992725); |
46: *seed %= UINT64_C(2305843009213693951); |
47: |
48: return *seed*convertToDouble; |
[...] |
68: uint32_t s2 = (id+callSite) * UINT32_C(2654435761); |
69: |
70: uint64_t iSeed = (UINT64_C(0x100000000) * s1) + s2; |
/scratch_na/users/xoserete/qaas_runs/171-416-7289/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 194 - 204 |
-------------------------------------------------------------------------------- |
194: #pragma omp parallel for |
195: for (int iBox=0; iBox<s->boxes->nLocalBoxes; ++iBox) |
196: { |
197: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
198: { |
199: uint64_t seed = mkSeed(s->atoms->gid[iOff], 457); |
200: s->atoms->r[iOff][0] += (2.0*lcg61(&seed)-1.0) * delta; |
201: s->atoms->r[iOff][1] += (2.0*lcg61(&seed)-1.0) * delta; |
202: s->atoms->r[iOff][2] += (2.0*lcg61(&seed)-1.0) * delta; |
203: } |
204: } |
0x40c380 PUSH %RBP |
0x40c381 MOV %RSP,%RBP |
0x40c384 PUSH %R15 |
0x40c386 PUSH %R14 |
0x40c388 PUSH %R13 |
0x40c38a PUSH %R12 |
0x40c38c PUSH %RBX |
0x40c38d SUB $0x28,%RSP |
0x40c391 MOV %RCX,%R15 |
0x40c394 MOV %RDX,-0x48(%RBP) |
0x40c398 MOVL $0,-0x3c(%RBP) |
0x40c39f MOV (%RDI),%ESI |
0x40c3a1 MOVL $0,-0x30(%RBP) |
0x40c3a8 MOV %R9D,-0x2c(%RBP) |
0x40c3ac MOVL $0x1,-0x38(%RBP) |
0x40c3b3 SUB $0x8,%RSP |
0x40c3b7 LEA -0x38(%RBP),%RAX |
0x40c3bb LEA -0x3c(%RBP),%RCX |
0x40c3bf LEA -0x30(%RBP),%R8 |
0x40c3c3 LEA -0x2c(%RBP),%R9 |
0x40c3c7 MOV $0x6256f0,%EDI |
0x40c3cc MOV %ESI,-0x34(%RBP) |
0x40c3cf MOV $0x22,%EDX |
0x40c3d4 PUSH $0x1 |
0x40c3d6 PUSH $0x1 |
0x40c3d8 PUSH %RAX |
0x40c3d9 CALL 402e50 <__kmpc_for_static_init_4@plt> |
0x40c3de ADD $0x20,%RSP |
0x40c3e2 MOV -0x30(%RBP),%ESI |
0x40c3e5 MOV -0x2c(%RBP),%EDI |
0x40c3e8 CMP %EDI,%ESI |
0x40c3ea JBE 40c440 |
0x40c3ec MOV $0x625710,%EDI |
0x40c3f1 MOV -0x34(%RBP),%ESI |
0x40c3f4 ADD $0x28,%RSP |
0x40c3f8 POP %RBX |
0x40c3f9 POP %R12 |
0x40c3fb POP %R13 |
0x40c3fd POP %R14 |
0x40c3ff POP %R15 |
0x40c401 POP %RBP |
0x40c402 JMP 402d00 |
0x40c407 NOPW %CS:(%RAX,%RAX,1) |
0x40c416 NOPW %CS:(%RAX,%RAX,1) |
0x40c425 NOPW %CS:(%RAX,%RAX,1) |
0x40c434 NOPW %CS:(%RAX,%RAX,1) |
0x40c440 VMOVQ %R15,%XMM0 |
0x40c445 MOV -0x48(%RBP),%RAX |
0x40c449 MOV 0x18(%RAX),%RAX |
0x40c44d MOV 0x78(%RAX),%R8 |
0x40c451 SUB %RSI,%RDI |
0x40c454 MOV %ESI,%R9D |
0x40c457 SAL $0x6,%R9D |
0x40c45b XOR %R10D,%R10D |
0x40c45e VPBROADCASTQ %XMM0,%XMM1 |
0x40c463 MOV $0x613606df9756715,%R11 |
0x40c46d MOV $0x9,%R15D |
0x40c473 VMOVDDUP 0xe435(%RIP),%XMM2 |
0x40c47b VMOVDDUP 0x1317d(%RIP),%XMM3 |
0x40c483 VMOVSD 0xe425(%RIP),%XMM4 |
0x40c48b VMOVSD 0x1316d(%RIP),%XMM5 |
0x40c493 JMP 40c4d1 |
0x40c495 NOPW %CS:(%RAX,%RAX,1) |
0x40c4a4 NOPW %CS:(%RAX,%RAX,1) |
0x40c4b3 NOPW %CS:(%RAX,%RAX,1) |
(80) 0x40c4c0 ADD $0x40,%R9D |
(80) 0x40c4c4 CMP %RDI,%R10 |
(80) 0x40c4c7 LEA 0x1(%R10),%R10 |
(80) 0x40c4cb JE 40c3ec |
(80) 0x40c4d1 LEA (%R10,%RSI,1),%RAX |
(80) 0x40c4d5 MOV (%R8,%RAX,4),%R12D |
(80) 0x40c4d9 TEST %R12D,%R12D |
(80) 0x40c4dc JLE 40c4c0 |
(80) 0x40c4de MOV %R9D,%R13D |
(80) 0x40c4e1 LEA (,%R13,8),%RAX |
(80) 0x40c4e9 LEA (%RAX,%RAX,2),%RAX |
(80) 0x40c4ed SAL $0x2,%R13 |
(80) 0x40c4f1 MOV -0x48(%RBP),%RCX |
(80) 0x40c4f5 MOV 0x20(%RCX),%RCX |
(80) 0x40c4f9 MOV 0x18(%RCX),%RDX |
(80) 0x40c4fd LEA 0x10(%RDX,%RAX,1),%R14 |
(80) 0x40c502 ADD 0x8(%RCX),%R13 |
(80) 0x40c506 XOR %EBX,%EBX |
(80) 0x40c508 NOPL (%RAX,%RAX,1) |
(81) 0x40c510 IMUL $-0x61c8864f,(%R13,%RBX,4),%EAX |
(81) 0x40c519 LEA 0x71083cf9(%RAX),%ECX |
(81) 0x40c51f SAL $0x20,%RAX |
(81) 0x40c523 OR %RCX,%RAX |
(81) 0x40c526 IMUL %R11,%RAX |
(81) 0x40c52a MOV %RAX,%RDX |
(81) 0x40c52d MULX %R15,%RCX,%RCX |
(81) 0x40c532 SUB %RCX,%RDX |
(81) 0x40c535 SHR $0x1,%RDX |
(81) 0x40c538 ADD %RCX,%RDX |
(81) 0x40c53b SHR $0x3c,%RDX |
(81) 0x40c53f MOV %RDX,%RCX |
(81) 0x40c542 SAL $0x3d,%RCX |
(81) 0x40c546 SUB %RCX,%RDX |
(81) 0x40c549 ADD %RAX,%RDX |
(81) 0x40c54c IMUL %R11,%RDX |
(81) 0x40c550 MULX %R15,%RCX,%RCX |
(81) 0x40c555 MOV %RDX,%RAX |
(81) 0x40c558 SUB %RCX,%RAX |
(81) 0x40c55b SHR $0x1,%RAX |
(81) 0x40c55e ADD %RCX,%RAX |
(81) 0x40c561 SHR $0x3c,%RAX |
(81) 0x40c565 MOV %RAX,%RCX |
(81) 0x40c568 SAL $0x3d,%RCX |
(81) 0x40c56c SUB %RCX,%RAX |
(81) 0x40c56f ADD %RDX,%RAX |
(81) 0x40c572 IMUL %R11,%RAX |
(81) 0x40c576 MOV %RAX,%RDX |
(81) 0x40c579 MULX %R15,%RCX,%RCX |
(81) 0x40c57e SUB %RCX,%RDX |
(81) 0x40c581 SHR $0x1,%RDX |
(81) 0x40c584 ADD %RCX,%RDX |
(81) 0x40c587 SHR $0x3c,%RDX |
(81) 0x40c58b MOV %RDX,%RCX |
(81) 0x40c58e SAL $0x3d,%RCX |
(81) 0x40c592 SUB %RCX,%RDX |
(81) 0x40c595 ADD %RAX,%RDX |
(81) 0x40c598 IMUL %R11,%RDX |
(81) 0x40c59c MULX %R15,%RCX,%RCX |
(81) 0x40c5a1 MOV %RDX,%RAX |
(81) 0x40c5a4 SUB %RCX,%RAX |
(81) 0x40c5a7 SHR $0x1,%RAX |
(81) 0x40c5aa ADD %RCX,%RAX |
(81) 0x40c5ad SHR $0x3c,%RAX |
(81) 0x40c5b1 MOV %RAX,%RCX |
(81) 0x40c5b4 SAL $0x3d,%RCX |
(81) 0x40c5b8 SUB %RCX,%RAX |
(81) 0x40c5bb ADD %RDX,%RAX |
(81) 0x40c5be IMUL %R11,%RAX |
(81) 0x40c5c2 MOV %RAX,%RDX |
(81) 0x40c5c5 MULX %R15,%RCX,%RCX |
(81) 0x40c5ca SUB %RCX,%RDX |
(81) 0x40c5cd SHR $0x1,%RDX |
(81) 0x40c5d0 ADD %RCX,%RDX |
(81) 0x40c5d3 SHR $0x3c,%RDX |
(81) 0x40c5d7 MOV %RDX,%RCX |
(81) 0x40c5da SAL $0x3d,%RCX |
(81) 0x40c5de SUB %RCX,%RDX |
(81) 0x40c5e1 ADD %RAX,%RDX |
(81) 0x40c5e4 IMUL %R11,%RDX |
(81) 0x40c5e8 MULX %R15,%RCX,%RCX |
(81) 0x40c5ed MOV %RDX,%RAX |
(81) 0x40c5f0 SUB %RCX,%RAX |
(81) 0x40c5f3 SHR $0x1,%RAX |
(81) 0x40c5f6 ADD %RCX,%RAX |
(81) 0x40c5f9 SHR $0x3c,%RAX |
(81) 0x40c5fd MOV %RAX,%RCX |
(81) 0x40c600 SAL $0x3d,%RCX |
(81) 0x40c604 SUB %RCX,%RAX |
(81) 0x40c607 ADD %RDX,%RAX |
(81) 0x40c60a IMUL %R11,%RAX |
(81) 0x40c60e MOV %RAX,%RDX |
(81) 0x40c611 MULX %R15,%RCX,%RCX |
(81) 0x40c616 SUB %RCX,%RDX |
(81) 0x40c619 SHR $0x1,%RDX |
(81) 0x40c61c ADD %RCX,%RDX |
(81) 0x40c61f SHR $0x3c,%RDX |
(81) 0x40c623 MOV %RDX,%RCX |
(81) 0x40c626 SAL $0x3d,%RCX |
(81) 0x40c62a SUB %RCX,%RDX |
(81) 0x40c62d ADD %RAX,%RDX |
(81) 0x40c630 IMUL %R11,%RDX |
(81) 0x40c634 MULX %R15,%RCX,%RCX |
(81) 0x40c639 MOV %RDX,%RAX |
(81) 0x40c63c SUB %RCX,%RAX |
(81) 0x40c63f SHR $0x1,%RAX |
(81) 0x40c642 ADD %RCX,%RAX |
(81) 0x40c645 SHR $0x3c,%RAX |
(81) 0x40c649 MOV %RAX,%RCX |
(81) 0x40c64c SAL $0x3d,%RCX |
(81) 0x40c650 SUB %RCX,%RAX |
(81) 0x40c653 ADD %RDX,%RAX |
(81) 0x40c656 IMUL %R11,%RAX |
(81) 0x40c65a MOV %RAX,%RDX |
(81) 0x40c65d MULX %R15,%RCX,%RCX |
(81) 0x40c662 SUB %RCX,%RDX |
(81) 0x40c665 SHR $0x1,%RDX |
(81) 0x40c668 ADD %RCX,%RDX |
(81) 0x40c66b SHR $0x3c,%RDX |
(81) 0x40c66f MOV %RDX,%RCX |
(81) 0x40c672 SAL $0x3d,%RCX |
(81) 0x40c676 SUB %RCX,%RDX |
(81) 0x40c679 ADD %RAX,%RDX |
(81) 0x40c67c IMUL %R11,%RDX |
(81) 0x40c680 MULX %R15,%RAX,%RAX |
(81) 0x40c685 MOV %RDX,%RCX |
(81) 0x40c688 SUB %RAX,%RCX |
(81) 0x40c68b SHR $0x1,%RCX |
(81) 0x40c68e ADD %RAX,%RCX |
(81) 0x40c691 SHR $0x3c,%RCX |
(81) 0x40c695 MOV %RCX,%RAX |
(81) 0x40c698 SAL $0x3d,%RAX |
(81) 0x40c69c SUB %RAX,%RCX |
(81) 0x40c69f ADD %RDX,%RCX |
(81) 0x40c6a2 IMUL %R11,%RCX |
(81) 0x40c6a6 MOV %RCX,%RDX |
(81) 0x40c6a9 MULX %R15,%RDX,%RDX |
(81) 0x40c6ae MOV %RCX,%RAX |
(81) 0x40c6b1 SUB %RDX,%RAX |
(81) 0x40c6b4 SHR $0x1,%RAX |
(81) 0x40c6b7 ADD %RDX,%RAX |
(81) 0x40c6ba SHR $0x3c,%RAX |
(81) 0x40c6be MOV %RAX,%RDX |
(81) 0x40c6c1 SAL $0x3d,%RDX |
(81) 0x40c6c5 SUB %RDX,%RAX |
(81) 0x40c6c8 ADD %RCX,%RAX |
(81) 0x40c6cb VMOVQ %RAX,%XMM6 |
(81) 0x40c6d0 IMUL %R11,%RAX |
(81) 0x40c6d4 MOV %RAX,%RDX |
(81) 0x40c6d7 MULX %R15,%RCX,%RCX |
(81) 0x40c6dc MOV %RAX,%RDX |
(81) 0x40c6df SUB %RCX,%RDX |
(81) 0x40c6e2 SHR $0x1,%RDX |
(81) 0x40c6e5 ADD %RCX,%RDX |
(81) 0x40c6e8 SHR $0x3c,%RDX |
(81) 0x40c6ec MOV %RDX,%RCX |
(81) 0x40c6ef SAL $0x3d,%RCX |
(81) 0x40c6f3 SUB %RCX,%RDX |
(81) 0x40c6f6 ADD %RAX,%RDX |
(81) 0x40c6f9 VMOVQ %RDX,%XMM7 |
(81) 0x40c6fe VPUNPCKLQDQ %XMM7,%XMM6,%XMM6 |
(81) 0x40c702 VCVTQQ2PD %XMM6,%XMM6 |
(81) 0x40c708 VFMADD213PD %XMM3,%XMM2,%XMM6 |
(81) 0x40c70d IMUL %R11,%RDX |
(81) 0x40c711 MULX %R15,%RAX,%RAX |
(81) 0x40c716 MOV %RDX,%RCX |
(81) 0x40c719 VFMADD213PD -0x10(%R14),%XMM1,%XMM6 |
(81) 0x40c71f SUB %RAX,%RCX |
(81) 0x40c722 SHR $0x1,%RCX |
(81) 0x40c725 ADD %RAX,%RCX |
(81) 0x40c728 SHR $0x3c,%RCX |
(81) 0x40c72c MOV %RCX,%RAX |
(81) 0x40c72f VMOVUPD %XMM6,-0x10(%R14) |
(81) 0x40c735 SAL $0x3d,%RAX |
(81) 0x40c739 SUB %RAX,%RCX |
(81) 0x40c73c ADD %RDX,%RCX |
(81) 0x40c73f VCVTSI2SD %RCX,%XMM0,%XMM6 |
(81) 0x40c744 VFMADD213SD %XMM5,%XMM4,%XMM6 |
(81) 0x40c749 VFMADD213SD (%R14),%XMM0,%XMM6 |
(81) 0x40c74e VMOVSD %XMM6,(%R14) |
(81) 0x40c753 ADD $0x18,%R14 |
(81) 0x40c757 INC %RBX |
(81) 0x40c75a CMP %EBX,%R12D |
(81) 0x40c75d JNE 40c510 |
(80) 0x40c763 JMP 40c4c0 |
0x40c768 NOPW %CS:(%RAX,%RAX,1) |
0x40c772 NOPW %CS:(%RAX,%RAX,1) |
0x40c77c NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Source file and lines | initAtoms.c:194-204 |
Module | exec |
nb instructions | 68 |
nb uops | 69 |
loop length | 344 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 11.50 cycles |
front end | 11.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.20 | 2.20 | 5.67 | 5.67 | 8.00 | 2.20 | 2.20 | 8.00 | 8.00 | 8.00 | 2.20 | 5.67 |
cycles | 2.20 | 2.20 | 5.67 | 5.67 | 8.00 | 2.20 | 2.20 | 8.00 | 8.00 | 8.00 | 2.20 | 5.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.51-11.55 |
Stall cycles | 0.00 |
Front-end | 11.50 |
Dispatch | 8.00 |
Overall L1 | 11.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 9% |
load | 12% |
store | 7% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 9% |
load | 12% |
store | 7% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x28,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x3c(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x6256f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402e50 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %EDI,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40c440 <randomDisplacements.extracted+0xc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x625710,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x34(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x28,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 402d00 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%R9D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPBROADCASTQ %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV $0x613606df9756715,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV $0x9,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVDDUP 0xe435(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x1317d(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xe425(%RIP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x1316d(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 40c4d1 <randomDisplacements.extracted+0x151> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | initAtoms.c:194-204 |
Module | exec |
nb instructions | 68 |
nb uops | 69 |
loop length | 344 |
used x86 registers | 16 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 11.50 cycles |
front end | 11.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.20 | 2.20 | 5.67 | 5.67 | 8.00 | 2.20 | 2.20 | 8.00 | 8.00 | 8.00 | 2.20 | 5.67 |
cycles | 2.20 | 2.20 | 5.67 | 5.67 | 8.00 | 2.20 | 2.20 | 8.00 | 8.00 | 8.00 | 2.20 | 5.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 11.51-11.55 |
Stall cycles | 0.00 |
Front-end | 11.50 |
Dispatch | 8.00 |
Overall L1 | 11.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 9% |
load | 12% |
store | 7% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 9% |
load | 12% |
store | 7% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x28,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDX,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0,-0x3c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVL $0,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R9D,-0x2c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOVL $0x1,-0x38(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB $0x8,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA -0x38(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x3c(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x30(%RBP),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x2c(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV $0x6256f0,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV $0x22,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
CALL 402e50 <__kmpc_for_static_init_4@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
ADD $0x20,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x30(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2c(%RBP),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %EDI,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JBE 40c440 <randomDisplacements.extracted+0xc0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV $0x625710,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x34(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $0x28,%RSP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
JMP 402d00 <__kmpc_for_static_fini@plt> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVQ %R15,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RAX),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x78(%RAX),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%R9D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPBROADCASTQ %XMM0,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
MOV $0x613606df9756715,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
MOV $0x9,%R15D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVDDUP 0xe435(%RIP),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP 0x1317d(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0xe425(%RIP),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD 0x1316d(%RIP),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 40c4d1 <randomDisplacements.extracted+0x151> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼randomDisplacements.extracted– | 0.02 | 0 |
▼Loop 80 - initAtoms.c:195-204 - exec– | 0 | 0 |
○Loop 81 - initAtoms.c:197-202 - exec | 0.02 | 0 |