Function: createFccLattice | Module: exec | Source: initAtoms.c:67-109 [...] | Coverage: 0.01% |
---|
Function: createFccLattice | Module: exec | Source: initAtoms.c:67-109 [...] | Coverage: 0.01% |
---|
/scratch_na/users/xoserete/qaas_runs/171-416-7289/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 67 - 109 |
-------------------------------------------------------------------------------- |
67: { |
68: const real_t* localMin = s->domain->localMin; // alias |
[...] |
82: begin[ii] = floor(localMin[ii]/lat); |
83: end[ii] = ceil (localMax[ii]/lat); |
84: } |
85: |
86: real_t px,py,pz; |
87: px=py=pz=0.0; |
88: for (int ix=begin[0]; ix<end[0]; ++ix) |
89: for (int iy=begin[1]; iy<end[1]; ++iy) |
90: for (int iz=begin[2]; iz<end[2]; ++iz) |
91: for (int ib=0; ib<nb; ++ib) |
92: { |
93: real_t rx = (ix+basis[ib][0]) * lat; |
94: real_t ry = (iy+basis[ib][1]) * lat; |
95: real_t rz = (iz+basis[ib][2]) * lat; |
96: if (rx < localMin[0] || rx >= localMax[0]) continue; |
97: if (ry < localMin[1] || ry >= localMax[1]) continue; |
98: if (rz < localMin[2] || rz >= localMax[2]) continue; |
99: int id = ib+nb*(iz+nz*(iy+ny*(ix))); |
100: putAtomInBox(s->boxes, s->atoms, id, 0, rx, ry, rz, px, py, pz); |
101: } |
102: |
103: // set total atoms in simulation |
104: startTimer(commReduceTimer); |
105: addIntParallel(&s->atoms->nLocal, &s->atoms->nGlobal, 1); |
106: stopTimer(commReduceTimer); |
107: |
108: assert(s->atoms->nGlobal == nb*nx*ny*nz); |
109: } |
/scratch_na/users/xoserete/qaas_runs/171-416-7289/intel/CoMD/build/CoMD/CoMD/src-openmp/parallel.c: 116 - 116 |
-------------------------------------------------------------------------------- |
116: MPI_Allreduce(sendBuf, recvBuf, count, MPI_INT, MPI_SUM, MPI_COMM_WORLD); |
/scratch_na/users/xoserete/qaas_runs/171-416-7289/intel/CoMD/build/CoMD/CoMD/src-openmp/performanceTimers.c: 94 - 248 |
-------------------------------------------------------------------------------- |
94: perfTimer[handle].start = getTime(); |
[...] |
247: gettimeofday(&ptime, (struct timezone *)NULL); |
248: t = ((uint64_t)1000000)*(uint64_t)ptime.tv_sec + (uint64_t)ptime.tv_usec; |
0x40cfa0 PUSH %RBP |
0x40cfa1 VMOVSD %XMM0,%XMM0,%XMM12 |
0x40cfa5 MOV %RSP,%RBP |
0x40cfa8 PUSH %R15 |
0x40cfaa PUSH %R14 |
0x40cfac MOV %RCX,%R14 |
0x40cfaf PUSH %R13 |
0x40cfb1 PUSH %R12 |
0x40cfb3 MOV %ESI,%R12D |
0x40cfb6 PUSH %RBX |
0x40cfb7 SUB $0x88,%RSP |
0x40cfbe MOV %EDI,-0xa0(%RBP) |
0x40cfc4 VMOVSD 0x4cd4(%RIP),%XMM0 |
0x40cfcc MOV 0x10(%RCX),%RBX |
0x40cfd0 MOV %EDX,-0x50(%RBP) |
0x40cfd3 VDIVSD %XMM12,%XMM0,%XMM2 |
0x40cfd8 VMULSD 0x60(%RBX),%XMM2,%XMM1 |
0x40cfdd VMULSD 0x78(%RBX),%XMM2,%XMM4 |
0x40cfe2 VMULSD 0x80(%RBX),%XMM2,%XMM8 |
0x40cfea VMULSD 0x68(%RBX),%XMM2,%XMM6 |
0x40cfef VMULSD 0x70(%RBX),%XMM2,%XMM10 |
0x40cff4 VRNDSCALESD $0x9,%XMM1,%XMM1,%XMM3 |
0x40cffb VCVTTSD2SI %XMM3,%R13D |
0x40cfff VMULSD 0x88(%RBX),%XMM2,%XMM11 |
0x40d007 VRNDSCALESD $0xa,%XMM4,%XMM4,%XMM5 |
0x40d00e VCVTTSD2SI %XMM5,%R9D |
0x40d012 VRNDSCALESD $0xa,%XMM8,%XMM8,%XMM9 |
0x40d019 VCVTTSD2SI %XMM9,%EAX |
0x40d01e VRNDSCALESD $0x9,%XMM6,%XMM6,%XMM7 |
0x40d025 VCVTTSD2SI %XMM7,%R8D |
0x40d029 MOV %EAX,-0x4c(%RBP) |
0x40d02c CMP %R9D,%R13D |
0x40d02f JGE 40d479 |
0x40d035 MOV %R13D,%EDX |
0x40d038 VRNDSCALESD $0x9,%XMM10,%XMM10,%XMM13 |
0x40d03f VCVTTSD2SI %XMM13,%ECX |
0x40d044 MOV -0x50(%RBP),%ESI |
0x40d047 VRNDSCALESD $0xa,%XMM11,%XMM11,%XMM14 |
0x40d04e MOV %R12D,-0xa4(%RBP) |
0x40d055 IMUL %R12D,%EDX |
0x40d059 MOV %R9D,-0x90(%RBP) |
0x40d060 VXORPS %XMM11,%XMM11,%XMM11 |
0x40d065 MOV %R8D,%R9D |
0x40d068 MOV %ESI,%EDI |
0x40d06a VCVTTSD2SI %XMM14,%R15D |
0x40d06f IMUL %R12D,%EDI |
0x40d073 ADD %R8D,%EDX |
0x40d076 LEA 0x3(,%RCX,4),%R10D |
0x40d07e MOV %ECX,-0x84(%RBP) |
0x40d084 IMUL %EDX,%ESI |
0x40d087 MOV %R10D,-0x88(%RBP) |
0x40d08e MOV %EDI,-0x8c(%RBP) |
0x40d094 MOV %ESI,%EDI |
(86) 0x40d096 MOV -0x4c(%RBP),%R11D |
(86) 0x40d09a CMP %R11D,%R9D |
(86) 0x40d09d JGE 40d455 |
(86) 0x40d0a3 VCVTSI2SD %R13D,%XMM11,%XMM15 |
(86) 0x40d0a8 MOV %EDI,-0x94(%RBP) |
(86) 0x40d0ae MOV %R9D,%EDX |
(86) 0x40d0b1 MOV %EDI,%EAX |
(86) 0x40d0b3 MOV %R13D,-0x98(%RBP) |
(86) 0x40d0ba MOV %R14,%R10 |
(86) 0x40d0bd MOV %R15D,%R12D |
(86) 0x40d0c0 MOV %R9D,-0x9c(%RBP) |
(86) 0x40d0c7 VADDSD 0x4b51(%RIP),%XMM15,%XMM0 |
(86) 0x40d0cf VADDSD 0x4b51(%RIP),%XMM15,%XMM2 |
(86) 0x40d0d7 VMULSD %XMM12,%XMM0,%XMM8 |
(86) 0x40d0dc VMULSD %XMM12,%XMM2,%XMM7 |
(86) 0x40d0e1 NOPL (%RAX) |
(87) 0x40d0e8 MOV -0x84(%RBP),%R9D |
(87) 0x40d0ef CMP %R12D,%R9D |
(87) 0x40d0f2 JGE 40d429 |
(87) 0x40d0f8 VCVTSI2SD %EDX,%XMM11,%XMM1 |
(87) 0x40d0fc MOV -0x88(%RBP),%R15D |
(87) 0x40d103 MOV %EDX,-0x44(%RBP) |
(87) 0x40d106 MOV %R9D,%R13D |
(87) 0x40d109 MOV %EAX,-0x48(%RBP) |
(87) 0x40d10c LEA (%R15,%RAX,4),%R8D |
(87) 0x40d110 MOV %R10,%R15 |
(87) 0x40d113 MOV %R8D,%R14D |
(87) 0x40d116 VADDSD 0x4b02(%RIP),%XMM1,%XMM3 |
(87) 0x40d11e VADDSD 0x4b02(%RIP),%XMM1,%XMM4 |
(87) 0x40d126 VMULSD %XMM12,%XMM3,%XMM10 |
(87) 0x40d12b VMULSD %XMM12,%XMM4,%XMM9 |
(88) 0x40d130 VCVTSI2SD %R13D,%XMM11,%XMM6 |
(88) 0x40d135 VCOMISD 0x60(%RBX),%XMM8 |
(88) 0x40d13a VMOVSD %XMM6,%XMM6,%XMM15 |
(88) 0x40d13e JB 40d2b0 |
(88) 0x40d144 VCOMISD 0x78(%RBX),%XMM8 |
(88) 0x40d149 JAE 40d200 |
(88) 0x40d14f VCOMISD 0x68(%RBX),%XMM10 |
(88) 0x40d154 JB 40d200 |
(88) 0x40d15a VCOMISD 0x80(%RBX),%XMM10 |
(88) 0x40d162 JAE 40d200 |
(88) 0x40d168 VADDSD 0x4ab0(%RIP),%XMM6,%XMM5 |
(88) 0x40d170 VMULSD %XMM12,%XMM5,%XMM2 |
(88) 0x40d175 VCOMISD 0x70(%RBX),%XMM2 |
(88) 0x40d17a JB 40d200 |
(88) 0x40d180 VCOMISD 0x88(%RBX),%XMM2 |
(88) 0x40d188 JAE 40d200 |
(88) 0x40d18a VXORPD %XMM5,%XMM5,%XMM5 |
(88) 0x40d18e MOV 0x20(%R15),%RSI |
(88) 0x40d192 MOV 0x18(%R15),%RDI |
(88) 0x40d196 VMOVSD %XMM10,%XMM10,%XMM1 |
(88) 0x40d19a VMOVSD %XMM8,%XMM8,%XMM0 |
(88) 0x40d19e XOR %ECX,%ECX |
(88) 0x40d1a0 LEA -0x3(%R14),%EDX |
(88) 0x40d1a4 VMOVSD %XMM7,-0x80(%RBP) |
(88) 0x40d1a9 VMOVSD %XMM5,%XMM5,%XMM4 |
(88) 0x40d1ad VMOVSD %XMM5,%XMM5,%XMM3 |
(88) 0x40d1b1 VMOVSD %XMM9,-0x78(%RBP) |
(88) 0x40d1b6 VMOVSD %XMM12,-0x70(%RBP) |
(88) 0x40d1bb VMOVSD %XMM10,-0x60(%RBP) |
(88) 0x40d1c0 VMOVSD %XMM8,-0x58(%RBP) |
(88) 0x40d1c5 VMOVSD %XMM6,-0x68(%RBP) |
(88) 0x40d1ca CALL 40bdc0 <putAtomInBox> |
(88) 0x40d1cf VMOVSD -0x58(%RBP),%XMM8 |
(88) 0x40d1d4 VMOVSD -0x60(%RBP),%XMM10 |
(88) 0x40d1d9 VXORPS %XMM11,%XMM11,%XMM11 |
(88) 0x40d1de VMOVSD -0x68(%RBP),%XMM15 |
(88) 0x40d1e3 VMOVSD -0x70(%RBP),%XMM12 |
(88) 0x40d1e8 VCOMISD 0x60(%RBX),%XMM8 |
(88) 0x40d1ed VMOVSD -0x78(%RBP),%XMM9 |
(88) 0x40d1f2 VMOVSD -0x80(%RBP),%XMM7 |
(88) 0x40d1f7 JB 40d2b0 |
(88) 0x40d1fd NOPL (%RAX) |
(88) 0x40d200 VCOMISD 0x78(%RBX),%XMM8 |
(88) 0x40d205 JAE 40d2b0 |
(88) 0x40d20b VCOMISD 0x68(%RBX),%XMM9 |
(88) 0x40d210 JB 40d2b0 |
(88) 0x40d216 VCOMISD 0x80(%RBX),%XMM9 |
(88) 0x40d21e JAE 40d2b0 |
(88) 0x40d224 VADDSD 0x49fc(%RIP),%XMM15,%XMM13 |
(88) 0x40d22c VMULSD %XMM12,%XMM13,%XMM2 |
(88) 0x40d231 VCOMISD 0x70(%RBX),%XMM2 |
(88) 0x40d236 JB 40d2b0 |
(88) 0x40d238 VCOMISD 0x88(%RBX),%XMM2 |
(88) 0x40d240 JAE 40d2b0 |
(88) 0x40d242 VXORPD %XMM5,%XMM5,%XMM5 |
(88) 0x40d246 MOV 0x20(%R15),%RSI |
(88) 0x40d24a MOV 0x18(%R15),%RDI |
(88) 0x40d24e VMOVSD %XMM9,%XMM9,%XMM1 |
(88) 0x40d252 VMOVSD %XMM8,%XMM8,%XMM0 |
(88) 0x40d256 LEA -0x2(%R14),%EDX |
(88) 0x40d25a VMOVSD %XMM5,%XMM5,%XMM4 |
(88) 0x40d25e XOR %ECX,%ECX |
(88) 0x40d260 VMOVSD %XMM5,%XMM5,%XMM3 |
(88) 0x40d264 VMOVSD %XMM7,-0x80(%RBP) |
(88) 0x40d269 VMOVSD %XMM10,-0x78(%RBP) |
(88) 0x40d26e VMOVSD %XMM12,-0x70(%RBP) |
(88) 0x40d273 VMOVSD %XMM15,-0x68(%RBP) |
(88) 0x40d278 VMOVSD %XMM9,-0x60(%RBP) |
(88) 0x40d27d VMOVSD %XMM8,-0x58(%RBP) |
(88) 0x40d282 CALL 40bdc0 <putAtomInBox> |
(88) 0x40d287 VMOVSD -0x80(%RBP),%XMM7 |
(88) 0x40d28c VMOVSD -0x78(%RBP),%XMM10 |
(88) 0x40d291 VXORPS %XMM11,%XMM11,%XMM11 |
(88) 0x40d296 VMOVSD -0x70(%RBP),%XMM12 |
(88) 0x40d29b VMOVSD -0x68(%RBP),%XMM15 |
(88) 0x40d2a0 VMOVSD -0x60(%RBP),%XMM9 |
(88) 0x40d2a5 VMOVSD -0x58(%RBP),%XMM8 |
(88) 0x40d2aa NOPW (%RAX,%RAX,1) |
(88) 0x40d2b0 VCOMISD 0x60(%RBX),%XMM7 |
(88) 0x40d2b5 JB 40d410 |
(88) 0x40d2bb VCOMISD 0x78(%RBX),%XMM7 |
(88) 0x40d2c0 JAE 40d370 |
(88) 0x40d2c6 VCOMISD 0x68(%RBX),%XMM10 |
(88) 0x40d2cb JB 40d370 |
(88) 0x40d2d1 VCOMISD 0x80(%RBX),%XMM10 |
(88) 0x40d2d9 JAE 40d370 |
(88) 0x40d2df VADDSD 0x4941(%RIP),%XMM15,%XMM14 |
(88) 0x40d2e7 VMULSD %XMM12,%XMM14,%XMM2 |
(88) 0x40d2ec VCOMISD 0x70(%RBX),%XMM2 |
(88) 0x40d2f1 JB 40d370 |
(88) 0x40d2f3 VCOMISD 0x88(%RBX),%XMM2 |
(88) 0x40d2fb JAE 40d370 |
(88) 0x40d2fd VXORPD %XMM5,%XMM5,%XMM5 |
(88) 0x40d301 MOV 0x20(%R15),%RSI |
(88) 0x40d305 MOV 0x18(%R15),%RDI |
(88) 0x40d309 VMOVSD %XMM10,%XMM10,%XMM1 |
(88) 0x40d30d VMOVSD %XMM7,%XMM7,%XMM0 |
(88) 0x40d311 XOR %ECX,%ECX |
(88) 0x40d313 LEA -0x1(%R14),%EDX |
(88) 0x40d317 VMOVSD %XMM9,-0x80(%RBP) |
(88) 0x40d31c VMOVSD %XMM5,%XMM5,%XMM4 |
(88) 0x40d320 VMOVSD %XMM5,%XMM5,%XMM3 |
(88) 0x40d324 VMOVSD %XMM8,-0x78(%RBP) |
(88) 0x40d329 VMOVSD %XMM12,-0x70(%RBP) |
(88) 0x40d32e VMOVSD %XMM15,-0x68(%RBP) |
(88) 0x40d333 VMOVSD %XMM10,-0x60(%RBP) |
(88) 0x40d338 VMOVSD %XMM7,-0x58(%RBP) |
(88) 0x40d33d CALL 40bdc0 <putAtomInBox> |
(88) 0x40d342 VMOVSD -0x58(%RBP),%XMM7 |
(88) 0x40d347 VMOVSD -0x60(%RBP),%XMM10 |
(88) 0x40d34c VXORPS %XMM11,%XMM11,%XMM11 |
(88) 0x40d351 VMOVSD -0x68(%RBP),%XMM15 |
(88) 0x40d356 VMOVSD -0x70(%RBP),%XMM12 |
(88) 0x40d35b VCOMISD 0x60(%RBX),%XMM7 |
(88) 0x40d360 VMOVSD -0x78(%RBP),%XMM8 |
(88) 0x40d365 VMOVSD -0x80(%RBP),%XMM9 |
(88) 0x40d36a JB 40d410 |
(88) 0x40d370 VCOMISD 0x78(%RBX),%XMM7 |
(88) 0x40d375 JAE 40d410 |
(88) 0x40d37b VCOMISD 0x68(%RBX),%XMM9 |
(88) 0x40d380 JB 40d410 |
(88) 0x40d386 VCOMISD 0x80(%RBX),%XMM9 |
(88) 0x40d38e JAE 40d410 |
(88) 0x40d394 VADDSD 0x4884(%RIP),%XMM15,%XMM0 |
(88) 0x40d39c VMULSD %XMM12,%XMM0,%XMM2 |
(88) 0x40d3a1 VCOMISD 0x70(%RBX),%XMM2 |
(88) 0x40d3a6 JB 40d410 |
(88) 0x40d3a8 VCOMISD 0x88(%RBX),%XMM2 |
(88) 0x40d3b0 JAE 40d410 |
(88) 0x40d3b2 VXORPD %XMM5,%XMM5,%XMM5 |
(88) 0x40d3b6 MOV 0x20(%R15),%RSI |
(88) 0x40d3ba MOV 0x18(%R15),%RDI |
(88) 0x40d3be VMOVSD %XMM9,%XMM9,%XMM1 |
(88) 0x40d3c2 VMOVSD %XMM7,%XMM7,%XMM0 |
(88) 0x40d3c6 VMOVSD %XMM5,%XMM5,%XMM4 |
(88) 0x40d3ca VMOVSD %XMM5,%XMM5,%XMM3 |
(88) 0x40d3ce XOR %ECX,%ECX |
(88) 0x40d3d0 MOV %R14D,%EDX |
(88) 0x40d3d3 VMOVSD %XMM8,-0x78(%RBP) |
(88) 0x40d3d8 VMOVSD %XMM10,-0x70(%RBP) |
(88) 0x40d3dd VMOVSD %XMM12,-0x68(%RBP) |
(88) 0x40d3e2 VMOVSD %XMM9,-0x60(%RBP) |
(88) 0x40d3e7 VMOVSD %XMM7,-0x58(%RBP) |
(88) 0x40d3ec CALL 40bdc0 <putAtomInBox> |
(88) 0x40d3f1 VMOVSD -0x78(%RBP),%XMM8 |
(88) 0x40d3f6 VMOVSD -0x70(%RBP),%XMM10 |
(88) 0x40d3fb VXORPS %XMM11,%XMM11,%XMM11 |
(88) 0x40d400 VMOVSD -0x68(%RBP),%XMM12 |
(88) 0x40d405 VMOVSD -0x60(%RBP),%XMM9 |
(88) 0x40d40a VMOVSD -0x58(%RBP),%XMM7 |
(88) 0x40d40f NOP |
(88) 0x40d410 INC %R13D |
(88) 0x40d413 ADD $0x4,%R14D |
(88) 0x40d417 CMP %R13D,%R12D |
(88) 0x40d41a JNE 40d130 |
(87) 0x40d420 MOV -0x44(%RBP),%EDX |
(87) 0x40d423 MOV -0x48(%RBP),%EAX |
(87) 0x40d426 MOV %R15,%R10 |
(87) 0x40d429 MOV -0x50(%RBP),%ECX |
(87) 0x40d42c MOV -0x4c(%RBP),%ESI |
(87) 0x40d42f INC %EDX |
(87) 0x40d431 ADD %ECX,%EAX |
(87) 0x40d433 CMP %ESI,%EDX |
(87) 0x40d435 JNE 40d0e8 |
(86) 0x40d43b MOV -0x94(%RBP),%EDI |
(86) 0x40d441 MOV -0x98(%RBP),%R13D |
(86) 0x40d448 MOV %R12D,%R15D |
(86) 0x40d44b MOV %R10,%R14 |
(86) 0x40d44e MOV -0x9c(%RBP),%R9D |
(86) 0x40d455 MOV -0x8c(%RBP),%R11D |
(86) 0x40d45c MOV -0x90(%RBP),%R8D |
(86) 0x40d463 INC %R13D |
(86) 0x40d466 ADD %R11D,%EDI |
(86) 0x40d469 CMP %R8D,%R13D |
(86) 0x40d46c JNE 40d096 |
0x40d472 MOV -0xa4(%RBP),%R12D |
0x40d479 XOR %ESI,%ESI |
0x40d47b LEA -0x40(%RBP),%RDI |
0x40d47f CALL 4030e0 <gettimeofday@plt> |
0x40d484 IMUL $0xf4240,-0x40(%RBP),%RBX |
0x40d48c MOV 0x20(%R14),%RDI |
0x40d490 MOV $0x1,%EDX |
0x40d495 MOV $0x44000000,%R9D |
0x40d49b MOV $0x58000003,%R8D |
0x40d4a1 MOV $0x4c000405,%ECX |
0x40d4a6 LEA 0x4(%RDI),%RSI |
0x40d4aa ADD -0x38(%RBP),%RBX |
0x40d4ae MOV %RBX,0x809b(%RIP) |
0x40d4b5 CALL 403120 <MPI_Allreduce@plt> |
0x40d4ba MOV $0xa,%EDI |
0x40d4bf CALL 40c9e0 <profileStop> |
0x40d4c4 MOV -0xa0(%RBP),%EAX |
0x40d4ca MOV -0x50(%RBP),%R10D |
0x40d4ce MOV 0x20(%R14),%RDX |
0x40d4d2 IMUL %R12D,%EAX |
0x40d4d6 IMUL %R10D,%EAX |
0x40d4da SAL $0x2,%EAX |
0x40d4dd CMP %EAX,0x4(%RDX) |
0x40d4e0 JNE 40d4f4 |
0x40d4e2 ADD $0x88,%RSP |
0x40d4e9 POP %RBX |
0x40d4ea POP %R12 |
0x40d4ec POP %R13 |
0x40d4ee POP %R14 |
0x40d4f0 POP %R15 |
0x40d4f2 POP %RBP |
0x40d4f3 RET |
0x40d4f4 MOV $0x411a70,%ECX |
0x40d4f9 MOV $0x6c,%EDX |
0x40d4fe MOV $0x411090,%ESI |
0x40d503 MOV $0x4110f8,%EDI |
0x40d508 CALL 4030c0 <__assert_fail@plt> |
0x40d50d NOPL (%RAX) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | main | CoMD.c:199 | exec |
○ | __libc_start_main | libc-2.28.so |
Path / |
Source file and lines | initAtoms.c:67-109 |
Module | exec |
nb instructions | 91 |
nb uops | 107 |
loop length | 404 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 15 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 17.83 cycles |
front end | 17.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 18.50 | 18.50 | 8.00 | 8.00 | 9.50 | 7.00 | 7.00 | 9.50 | 9.50 | 9.50 | 7.00 | 8.00 |
cycles | 18.50 | 18.50 | 8.00 | 8.00 | 9.50 | 7.00 | 7.00 | 9.50 | 9.50 | 9.50 | 7.00 | 8.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 20.32-20.35 |
Stall cycles | 2.33-2.35 |
ROB full (events) | 3.02-3.12 |
Front-end | 17.83 |
Dispatch | 18.50 |
DIV/SQRT | 4.00 |
Overall L1 | 18.50 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 4% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 7% |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 4% |
all | 6% |
load | 6% |
store | 6% |
mul | 6% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 13% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
all | 9% |
load | 10% |
store | 6% |
mul | 11% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
VMOVSD %XMM0,%XMM0,%XMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %ESI,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x88,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x4cd4(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RCX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VDIVSD %XMM12,%XMM0,%XMM2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
VMULSD 0x60(%RBX),%XMM2,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD 0x78(%RBX),%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD 0x80(%RBX),%XMM2,%XMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD 0x68(%RBX),%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD 0x70(%RBX),%XMM2,%XMM10 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VRNDSCALESD $0x9,%XMM1,%XMM1,%XMM3 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM3,%R13D | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VMULSD 0x88(%RBX),%XMM2,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VRNDSCALESD $0xa,%XMM4,%XMM4,%XMM5 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM5,%R9D | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VRNDSCALESD $0xa,%XMM8,%XMM8,%XMM9 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM9,%EAX | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VRNDSCALESD $0x9,%XMM6,%XMM6,%XMM7 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM7,%R8D | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
MOV %EAX,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 40d479 <createFccLattice+0x4d9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VRNDSCALESD $0x9,%XMM10,%XMM10,%XMM13 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM13,%ECX | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
MOV -0x50(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VRNDSCALESD $0xa,%XMM11,%XMM11,%XMM14 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
MOV %R12D,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12D,%EDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9D,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPS %XMM11,%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VCVTTSD2SI %XMM14,%R15D | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
IMUL %R12D,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8D,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x3(,%RCX,4),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ECX,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %EDX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R10D,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa4(%RBP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x40(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4030e0 <gettimeofday@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL $0xf4240,-0x40(%RBP),%RBX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x20(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x44000000,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x58000003,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4c000405,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD -0x38(%RBP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,0x809b(%RIP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 403120 <MPI_Allreduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0xa,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 40c9e0 <profileStop> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa0(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R12D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %R10D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SAL $0x2,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %EAX,0x4(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 40d4f4 <createFccLattice+0x554> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x88,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV $0x411a70,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x6c,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x411090,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4110f8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4030c0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | initAtoms.c:67-109 |
Module | exec |
nb instructions | 91 |
nb uops | 107 |
loop length | 404 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 15 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 10 |
micro-operation queue | 17.83 cycles |
front end | 17.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 18.50 | 18.50 | 8.00 | 8.00 | 9.50 | 7.00 | 7.00 | 9.50 | 9.50 | 9.50 | 7.00 | 8.00 |
cycles | 18.50 | 18.50 | 8.00 | 8.00 | 9.50 | 7.00 | 7.00 | 9.50 | 9.50 | 9.50 | 7.00 | 8.00 |
Cycles executing div or sqrt instructions | 4.00 |
FE+BE cycles | 20.32-20.35 |
Stall cycles | 2.33-2.35 |
ROB full (events) | 3.02-3.12 |
Front-end | 17.83 |
Dispatch | 18.50 |
DIV/SQRT | 4.00 |
Overall L1 | 18.50 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 4% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 7% |
all | 2% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 4% |
all | 6% |
load | 6% |
store | 6% |
mul | 6% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 13% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 12% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 13% |
all | 9% |
load | 10% |
store | 6% |
mul | 11% |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
VMOVSD %XMM0,%XMM0,%XMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RCX,%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %ESI,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
SUB $0x88,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %EDI,-0xa0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVSD 0x4cd4(%RIP),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x10(%RCX),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %EDX,-0x50(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VDIVSD %XMM12,%XMM0,%XMM2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 4 |
VMULSD 0x60(%RBX),%XMM2,%XMM1 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD 0x78(%RBX),%XMM2,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD 0x80(%RBX),%XMM2,%XMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD 0x68(%RBX),%XMM2,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMULSD 0x70(%RBX),%XMM2,%XMM10 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VRNDSCALESD $0x9,%XMM1,%XMM1,%XMM3 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM3,%R13D | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VMULSD 0x88(%RBX),%XMM2,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VRNDSCALESD $0xa,%XMM4,%XMM4,%XMM5 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM5,%R9D | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VRNDSCALESD $0xa,%XMM8,%XMM8,%XMM9 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM9,%EAX | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
VRNDSCALESD $0x9,%XMM6,%XMM6,%XMM7 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM7,%R8D | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
MOV %EAX,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP %R9D,%R13D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 40d479 <createFccLattice+0x4d9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R13D,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VRNDSCALESD $0x9,%XMM10,%XMM10,%XMM13 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
VCVTTSD2SI %XMM13,%ECX | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
MOV -0x50(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VRNDSCALESD $0xa,%XMM11,%XMM11,%XMM14 | 2 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 1 |
MOV %R12D,-0xa4(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %R12D,%EDX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R9D,-0x90(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VXORPS %XMM11,%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R8D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VCVTTSD2SI %XMM14,%R15D | 2 | 1.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 7 | 1 |
IMUL %R12D,%EDI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %R8D,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x3(,%RCX,4),%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %ECX,-0x84(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
IMUL %EDX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %R10D,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %EDI,-0x8c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %ESI,%EDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0xa4(%RBP),%R12D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA -0x40(%RBP),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CALL 4030e0 <gettimeofday@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
IMUL $0xf4240,-0x40(%RBP),%RBX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
MOV 0x20(%R14),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV $0x1,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x44000000,%R9D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x58000003,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4c000405,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA 0x4(%RDI),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD -0x38(%RBP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RBX,0x809b(%RIP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CALL 403120 <MPI_Allreduce@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV $0xa,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 40c9e0 <profileStop> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0xa0(%RBP),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x50(%RBP),%R10D | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%R14),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %R12D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL %R10D,%EAX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
SAL $0x2,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
CMP %EAX,0x4(%RDX) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 40d4f4 <createFccLattice+0x554> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x88,%RSP | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
MOV $0x411a70,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x6c,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x411090,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x4110f8,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CALL 4030c0 <__assert_fail@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼createFccLattice– | 0.01 | 0 |
▼Loop 86 - initAtoms.c:88-100 - exec– | 0 | 0 |
▼Loop 87 - initAtoms.c:89-100 - exec– | 0 | 0 |
○Loop 88 - initAtoms.c:90-100 - exec | 0.01 | 0.04 |