Loop Id: 95 | Module: exec | Source: ljForce.c:178-216 [...] | Coverage: 0.15% |
---|
Loop Id: 95 | Module: exec | Source: ljForce.c:178-216 [...] | Coverage: 0.15% |
---|
0x40eb40 INC %R14 |
0x40eb43 CMP $0x1b,%R14 |
0x40eb47 MOV -0x88(%RBP),%RDX |
0x40eb4e JE 40eac0 |
0x40eb54 MOV (%RDX,%R14,4),%EAX |
0x40eb58 TEST %EAX,%EAX |
0x40eb5a JS 40ed7d |
0x40eb60 MOV -0x68(%RBP),%RCX |
0x40eb64 MOV (%RCX,%RAX,4),%ECX |
0x40eb67 TEST %ECX,%ECX |
0x40eb69 JLE 40eb40 |
0x40eb6b SAL $0x6,%EAX |
0x40eb6e ADD %EAX,%ECX |
0x40eb70 MOV -0x60(%RBP),%RDX |
0x40eb74 MOV 0x20(%RDX),%R12 |
0x40eb78 MOV 0x18(%R12),%R13 |
0x40eb7d CLTQ |
0x40eb7f MOVSXD %ECX,%RCX |
0x40eb82 MOV -0x48(%RBP),%EDX |
0x40eb85 MOV -0x44(%RBP),%ESI |
0x40eb88 CMP %ESI,%EDX |
0x40eb8a MOV %ESI,%EBX |
0x40eb8c CMOVG %EDX,%EBX |
0x40eb8f ADD -0x40(%RBP),%EBX |
0x40eb92 LEA 0x1(%RAX),%R10 |
0x40eb96 CMP %R10,%RCX |
0x40eb99 CMOVG %RCX,%R10 |
0x40eb9d SUB %RAX,%R10 |
0x40eba0 LEA (%RAX,%RAX,2),%RAX |
0x40eba4 LEA 0x10(%R13,%RAX,8),%R8 |
0x40eba9 XOR %EAX,%EAX |
0x40ebab JMP 40ebcd |
(96) 0x40ebc0 CMP %RBX,%RAX |
(96) 0x40ebc3 LEA 0x1(%RAX),%RAX |
(96) 0x40ebc7 JE 40eb40 |
(96) 0x40ebcd LEA (%RAX,%RDI,1),%R15 |
(96) 0x40ebd1 LEA (%R15,%R15,2),%RDX |
(96) 0x40ebd5 LEA (%R13,%RDX,8),%R11 |
(96) 0x40ebda MOV %R8,%RCX |
(96) 0x40ebdd MOV %R10,%RSI |
(96) 0x40ebe0 JMP 40ec09 |
(97) 0x40ec00 ADD $0x18,%RCX |
(97) 0x40ec04 DEC %RSI |
(97) 0x40ec07 JE 40ebc0 |
(97) 0x40ec09 VMOVUPD (%R11),%XMM11 |
(97) 0x40ec0e VSUBPD -0x10(%RCX),%XMM11,%XMM11 |
(97) 0x40ec13 VMULPD %XMM11,%XMM11,%XMM12 |
(97) 0x40ec18 VSHUFPD $0x1,%XMM12,%XMM12,%XMM13 |
(97) 0x40ec1e VADDSD %XMM12,%XMM13,%XMM13 |
(97) 0x40ec23 VMOVSD 0x10(%R11),%XMM12 |
(97) 0x40ec29 VSUBSD (%RCX),%XMM12,%XMM12 |
(97) 0x40ec2d VFMADD231SD %XMM12,%XMM12,%XMM13 |
(97) 0x40ec32 VUCOMISD %XMM2,%XMM13 |
(97) 0x40ec36 JA 40ec00 |
(97) 0x40ec38 VUCOMISD %XMM4,%XMM13 |
(97) 0x40ec3c JBE 40ec00 |
(97) 0x40ec3e VDIVSD %XMM13,%XMM6,%XMM13 |
(97) 0x40ec43 VMULSD %XMM13,%XMM13,%XMM14 |
(97) 0x40ec48 VMULSD %XMM1,%XMM13,%XMM15 |
(97) 0x40ec4c VMULSD %XMM15,%XMM14,%XMM14 |
(97) 0x40ec51 VADDSD %XMM7,%XMM14,%XMM15 |
(97) 0x40ec55 VFNMADD213SD %XMM0,%XMM14,%XMM15 |
(97) 0x40ec5a VMULSD %XMM8,%XMM15,%XMM15 |
(97) 0x40ec5f MOV 0x30(%R12),%R9 |
(97) 0x40ec64 VADDSD (%R9,%R15,8),%XMM15,%XMM16 |
(97) 0x40ec6b VMOVSD %XMM16,(%R9,%R15,8) |
(97) 0x40ec72 VMOVAPD %XMM9,%XMM16 |
(97) 0x40ec78 VFMADD213SD %XMM10,%XMM14,%XMM16 |
(97) 0x40ec7e VMULSD %XMM3,%XMM13,%XMM13 |
(97) 0x40ec82 VMULSD %XMM14,%XMM16,%XMM14 |
(97) 0x40ec88 VMULSD %XMM13,%XMM14,%XMM13 |
(97) 0x40ec8d MOV 0x28(%R12),%R9 |
(97) 0x40ec92 VMOVDDUP %XMM13,%XMM14 |
(97) 0x40ec97 VFMADD213PD (%R9,%RDX,8),%XMM14,%XMM11 |
(97) 0x40ec9d VMOVUPD %XMM11,(%R9,%RDX,8) |
(97) 0x40eca3 VFMADD213SD 0x10(%R9,%RDX,8),%XMM13,%XMM12 |
(97) 0x40ecaa VMOVSD %XMM12,0x10(%R9,%RDX,8) |
(97) 0x40ecb1 VADDSD %XMM5,%XMM15,%XMM5 |
(97) 0x40ecb5 JMP 40ec00 |
/scratch_na/users/xoserete/qaas_runs/171-416-7289/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 178 - 216 |
-------------------------------------------------------------------------------- |
178: for (int jTmp=0; jTmp<nNbrBoxes; jTmp++) |
179: { |
180: int jBox = s->boxes->nbrBoxes[iBox][jTmp]; |
181: |
182: assert(jBox>=0); |
183: |
184: int nJBox = s->boxes->nAtoms[jBox]; |
185: |
186: // loop over atoms in iBox |
187: for (int iOff=MAXATOMS*iBox; iOff<(iBox*MAXATOMS+nIBox); iOff++) |
188: { |
189: |
190: // loop over atoms in jBox |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.63 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.50 |
Bottlenecks | |
Function | ljForce.extracted |
Source | ljForce.c:178-184,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 4.42 |
CQA cycles if no scalar integer | 4.42 |
CQA cycles if FP arith vectorized | 4.42 |
CQA cycles if fully vectorized | 0.30 |
Front-end cycles | 4.42 |
DIV/SQRT cycles | 2.92 |
P0 cycles | 2.77 |
P1 cycles | 2.83 |
P2 cycles | 2.83 |
P3 cycles | 0.00 |
P4 cycles | 2.70 |
P5 cycles | 2.92 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 2.70 |
P10 cycles | 2.83 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 4.62 |
Stall cycles (UFS) | 0.00 |
Nb insns | 26.75 |
Nb uops | 26.50 |
Nb loads | 8.50 |
Nb stores | 0.00 |
Nb stack references | 5.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 12.04 |
Bytes prefetched | 0.00 |
Bytes loaded | 51.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 1.00 |
Stride n | 0.00 |
Stride unknown | 3.25 |
Stride indirect | 0.75 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 8.44 |
Vector-efficiency ratio load | 6.25 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 6.25 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 8.79 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.67 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:178-184,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 1.67 |
CQA cycles if no scalar integer | 1.67 |
CQA cycles if FP arith vectorized | 1.67 |
CQA cycles if fully vectorized | 0.11 |
Front-end cycles | 1.67 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 0.80 |
P1 cycles | 1.33 |
P2 cycles | 1.33 |
P3 cycles | 0.00 |
P4 cycles | 0.60 |
P5 cycles | 1.50 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.60 |
P10 cycles | 1.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 1.89 |
Stall cycles (UFS) | 0.02 |
Nb insns | 11.00 |
Nb uops | 10.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 2.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.40 |
Bytes prefetched | 0.00 |
Bytes loaded | 24.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 1.00 |
Stride n | 0.00 |
Stride unknown | 1.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | NA |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 9.38 |
Vector-efficiency ratio load | NA |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 9.38 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 14.63 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.55 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:178-184,ljForce.c:187-187,ljForce.c:191-191,ljForce.c:197-197 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.33 |
CQA cycles if no scalar integer | 5.33 |
CQA cycles if FP arith vectorized | 5.33 |
CQA cycles if fully vectorized | 0.36 |
Front-end cycles | 5.33 |
DIV/SQRT cycles | 3.40 |
P0 cycles | 3.43 |
P1 cycles | 3.33 |
P2 cycles | 3.33 |
P3 cycles | 0.00 |
P4 cycles | 3.40 |
P5 cycles | 3.40 |
P6 cycles | 0.00 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 3.40 |
P10 cycles | 3.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 5.53 |
Stall cycles (UFS) | 0.00 |
Nb insns | 32.00 |
Nb uops | 32.00 |
Nb loads | 10.00 |
Nb stores | 0.00 |
Nb stack references | 6.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 11.25 |
Bytes prefetched | 0.00 |
Bytes loaded | 60.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 1.00 |
Stride n | 0.00 |
Stride unknown | 4.00 |
Stride indirect | 1.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 8.13 |
Vector-efficiency ratio load | 6.25 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 6.25 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 8.59 |
Path / |
Function | ljForce.extracted |
Source file and lines | ljForce.c:178-216 |
Module | exec |
nb instructions | 26.75 |
nb uops | 26.50 |
loop length | 92.50 |
used x86 registers | 9.50 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 5 |
micro-operation queue | 4.42 cycles |
front end | 4.42 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.93 | 2.75 | 2.83 | 2.83 | 0.00 | 2.70 | 2.93 | 0.00 | 0.00 | 0.00 | 2.70 | 2.83 |
cycles | 2.93 | 2.78 | 2.83 | 2.83 | 0.00 | 2.70 | 2.93 | 0.00 | 0.00 | 0.00 | 2.70 | 2.83 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 4.62 |
Stall cycles | 0.00 |
LM full (events) | 0.02 |
Front-end | 4.42 |
Dispatch | 2.95 |
Data deps. | 0.00 |
Overall L1 | 4.42 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 8% |
load | 6% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Function | ljForce.extracted |
Source file and lines | ljForce.c:178-216 |
Module | exec |
nb instructions | 11 |
nb uops | 10 |
loop length | 43 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 2 |
micro-operation queue | 1.67 cycles |
front end | 1.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 0.80 | 1.33 | 1.33 | 0.00 | 0.60 | 1.50 | 0.00 | 0.00 | 0.00 | 0.60 | 1.33 |
cycles | 1.50 | 0.80 | 1.33 | 1.33 | 0.00 | 0.60 | 1.50 | 0.00 | 0.00 | 0.00 | 0.60 | 1.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 1.89 |
Stall cycles | 0.02 |
LM full (events) | 0.08 |
Front-end | 1.67 |
Dispatch | 1.50 |
Data deps. | 0.00 |
Overall L1 | 1.67 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 9% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 9% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1b,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 40eac0 <ljForce.extracted+0x180> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDX,%R14,4),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 40ed7d <ljForce.extracted+0x43d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,4),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %ECX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40eb40 <ljForce.extracted+0x200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | ljForce.extracted |
Source file and lines | ljForce.c:178-216 |
Module | exec |
nb instructions | 32 |
nb uops | 32 |
loop length | 109 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 6 |
micro-operation queue | 5.33 cycles |
front end | 5.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.40 | 3.40 | 3.33 | 3.33 | 0.00 | 3.40 | 3.40 | 0.00 | 0.00 | 0.00 | 3.40 | 3.33 |
cycles | 3.40 | 3.43 | 3.33 | 3.33 | 0.00 | 3.40 | 3.40 | 0.00 | 0.00 | 0.00 | 3.40 | 3.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 5.53 |
Stall cycles | 0.00 |
Front-end | 5.33 |
Dispatch | 3.43 |
Data deps. | 0.00 |
Overall L1 | 5.33 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 8% |
load | 6% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP $0x1b,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x88(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 40eac0 <ljForce.extracted+0x180> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV (%RDX,%R14,4),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %EAX,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JS 40ed7d <ljForce.extracted+0x43d> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x68(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RCX,%RAX,4),%ECX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
TEST %ECX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40eb40 <ljForce.extracted+0x200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
SAL $0x6,%EAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
ADD %EAX,%ECX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x60(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x20(%RDX),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R12),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTQ | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOVSXD %ECX,%RCX | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV -0x48(%RBP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x44(%RBP),%ESI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %ESI,%EDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %ESI,%EBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMOVG %EDX,%EBX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADD -0x40(%RBP),%EBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%RAX),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R10,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVG %RCX,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB %RAX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RAX,%RAX,2),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA 0x10(%R13,%RAX,8),%R8 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40ebcd <ljForce.extracted+0x28d> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |