Function: setVcm._omp_fn.0 | Module: exec | Source: initAtoms.c:123-133 | Coverage: 0.01% |
---|
Function: setVcm._omp_fn.0 | Module: exec | Source: initAtoms.c:123-133 | Coverage: 0.01% |
---|
/scratch_na/users/xoserete/qaas_runs/171-416-1926/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 123 - 133 |
-------------------------------------------------------------------------------- |
123: #pragma omp parallel for |
124: for (int iBox=0; iBox<s->boxes->nLocalBoxes; ++iBox) |
125: { |
126: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
127: { |
128: int iSpecies = s->atoms->iSpecies[iOff]; |
129: real_t mass = s->species[iSpecies].mass; |
130: |
131: s->atoms->p[iOff][0] += mass * vShift[0]; |
132: s->atoms->p[iOff][1] += mass * vShift[1]; |
133: s->atoms->p[iOff][2] += mass * vShift[2]; |
0x408a50 PUSH %RBP |
0x408a51 MOV %RSP,%RBP |
0x408a54 PUSH %R14 |
0x408a56 PUSH %R13 |
0x408a58 MOV %RDI,%R13 |
0x408a5b PUSH %R12 |
0x408a5d PUSH %RBX |
0x408a5e MOV (%RDI),%RBX |
0x408a61 MOV 0x18(%RBX),%R14 |
0x408a65 CALL 403070 <omp_get_num_threads@plt> |
0x408a6a MOV %EAX,%R12D |
0x408a6d CALL 403160 <omp_get_thread_num@plt> |
0x408a72 MOV %EAX,%R8D |
0x408a75 MOV 0xc(%R14),%EAX |
0x408a79 CLTD |
0x408a7a IDIV %R12D |
0x408a7d CMP %EDX,%R8D |
0x408a80 JL 408d12 |
0x408a86 IMUL %EAX,%R8D |
0x408a8a ADD %EDX,%R8D |
0x408a8d ADD %R8D,%EAX |
0x408a90 CMP %EAX,%R8D |
0x408a93 JGE 408d09 |
0x408a99 MOVSXD %R8D,%R9 |
0x408a9c MOV 0x78(%R14),%R12 |
0x408aa0 MOV 0x8(%R13),%RCX |
0x408aa4 SAL $0x6,%R8D |
0x408aa8 LEA (%R9,%R9,2),%R11 |
0x408aac SAL $0x9,%R11 |
(56) 0x408ab0 MOVSXD (%R12,%R9,4),%R10 |
(56) 0x408ab4 TEST %R10D,%R10D |
(56) 0x408ab7 JLE 408cf2 |
(56) 0x408abd MOV 0x20(%RBX),%R14 |
(56) 0x408ac1 MOVSXD %R8D,%RSI |
(56) 0x408ac4 MOV 0x28(%RBX),%RDI |
(56) 0x408ac8 MOV 0x10(%R14),%R13 |
(56) 0x408acc MOV 0x20(%R14),%RDX |
(56) 0x408ad0 MOV %R9,%R14 |
(56) 0x408ad3 SAL $0x6,%R14 |
(56) 0x408ad7 ADD %R14,%R10 |
(56) 0x408ada LEA (%R13,%RSI,4),%RSI |
(56) 0x408adf ADD %R11,%RDX |
(56) 0x408ae2 LEA (%R13,%R10,4),%R10 |
(56) 0x408ae7 MOV %R10,%R13 |
(56) 0x408aea SUB %RSI,%R13 |
(56) 0x408aed SUB $0x4,%R13 |
(56) 0x408af1 SHR $0x2,%R13 |
(56) 0x408af5 INC %R13 |
(56) 0x408af8 AND $0x3,%R13D |
(56) 0x408afc JE 408bea |
(56) 0x408b02 CMP $0x1,%R13 |
(56) 0x408b06 JE 408b9c |
(56) 0x408b0c CMP $0x2,%R13 |
(56) 0x408b10 JE 408b57 |
(56) 0x408b12 MOVSXD (%RSI),%R14 |
(56) 0x408b15 VMOVSD (%RCX),%XMM1 |
(56) 0x408b19 ADD $0x4,%RSI |
(56) 0x408b1d ADD $0x18,%RDX |
(56) 0x408b21 VMOVSD -0x8(%RDX),%XMM7 |
(56) 0x408b26 SAL $0x4,%R14 |
(56) 0x408b2a VMOVSD 0x8(%RDI,%R14,1),%XMM0 |
(56) 0x408b31 VFMADD213SD -0x18(%RDX),%XMM0,%XMM1 |
(56) 0x408b37 VMOVSD %XMM1,-0x18(%RDX) |
(56) 0x408b3c VMOVSD 0x8(%RCX),%XMM2 |
(56) 0x408b41 VFMADD213SD -0x10(%RDX),%XMM0,%XMM2 |
(56) 0x408b47 VMOVSD %XMM2,-0x10(%RDX) |
(56) 0x408b4c VFMADD132SD 0x10(%RCX),%XMM7,%XMM0 |
(56) 0x408b52 VMOVSD %XMM0,-0x8(%RDX) |
(56) 0x408b57 MOVSXD (%RSI),%R13 |
(56) 0x408b5a VMOVSD (%RCX),%XMM4 |
(56) 0x408b5e ADD $0x4,%RSI |
(56) 0x408b62 ADD $0x18,%RDX |
(56) 0x408b66 VMOVSD -0x8(%RDX),%XMM6 |
(56) 0x408b6b SAL $0x4,%R13 |
(56) 0x408b6f VMOVSD 0x8(%RDI,%R13,1),%XMM3 |
(56) 0x408b76 VFMADD213SD -0x18(%RDX),%XMM3,%XMM4 |
(56) 0x408b7c VMOVSD %XMM4,-0x18(%RDX) |
(56) 0x408b81 VMOVSD 0x8(%RCX),%XMM5 |
(56) 0x408b86 VFMADD213SD -0x10(%RDX),%XMM3,%XMM5 |
(56) 0x408b8c VMOVSD %XMM5,-0x10(%RDX) |
(56) 0x408b91 VFMADD132SD 0x10(%RCX),%XMM6,%XMM3 |
(56) 0x408b97 VMOVSD %XMM3,-0x8(%RDX) |
(56) 0x408b9c MOVSXD (%RSI),%R14 |
(56) 0x408b9f VMOVSD (%RCX),%XMM9 |
(56) 0x408ba3 ADD $0x4,%RSI |
(56) 0x408ba7 ADD $0x18,%RDX |
(56) 0x408bab VMOVSD -0x8(%RDX),%XMM11 |
(56) 0x408bb0 SAL $0x4,%R14 |
(56) 0x408bb4 VMOVSD 0x8(%RDI,%R14,1),%XMM8 |
(56) 0x408bbb VFMADD213SD -0x18(%RDX),%XMM8,%XMM9 |
(56) 0x408bc1 VMOVSD %XMM9,-0x18(%RDX) |
(56) 0x408bc6 VMOVSD 0x8(%RCX),%XMM10 |
(56) 0x408bcb VFMADD213SD -0x10(%RDX),%XMM8,%XMM10 |
(56) 0x408bd1 VMOVSD %XMM10,-0x10(%RDX) |
(56) 0x408bd6 VFMADD132SD 0x10(%RCX),%XMM11,%XMM8 |
(56) 0x408bdc VMOVSD %XMM8,-0x8(%RDX) |
(56) 0x408be1 CMP %RSI,%R10 |
(56) 0x408be4 JE 408cf2 |
(57) 0x408bea MOVSXD (%RSI),%R13 |
(57) 0x408bed VMOVSD (%RCX),%XMM13 |
(57) 0x408bf1 ADD $0x10,%RSI |
(57) 0x408bf5 ADD $0x60,%RDX |
(57) 0x408bf9 VMOVSD -0x50(%RDX),%XMM15 |
(57) 0x408bfe MOVSXD -0xc(%RSI),%R14 |
(57) 0x408c02 SAL $0x4,%R13 |
(57) 0x408c06 VMOVSD -0x38(%RDX),%XMM7 |
(57) 0x408c0b VMOVSD -0x20(%RDX),%XMM6 |
(57) 0x408c10 VMOVSD 0x8(%RDI,%R13,1),%XMM12 |
(57) 0x408c17 SAL $0x4,%R14 |
(57) 0x408c1b MOVSXD -0x8(%RSI),%R13 |
(57) 0x408c1f VFMADD213SD -0x60(%RDX),%XMM12,%XMM13 |
(57) 0x408c25 SAL $0x4,%R13 |
(57) 0x408c29 VMOVSD %XMM13,-0x60(%RDX) |
(57) 0x408c2e VMOVSD 0x8(%RCX),%XMM14 |
(57) 0x408c33 VFMADD213SD -0x58(%RDX),%XMM12,%XMM14 |
(57) 0x408c39 VMOVSD %XMM14,-0x58(%RDX) |
(57) 0x408c3e VFMADD132SD 0x10(%RCX),%XMM15,%XMM12 |
(57) 0x408c44 VMOVSD %XMM12,-0x50(%RDX) |
(57) 0x408c49 VMOVSD 0x8(%RDI,%R14,1),%XMM0 |
(57) 0x408c50 VMOVSD (%RCX),%XMM1 |
(57) 0x408c54 VFMADD213SD -0x48(%RDX),%XMM0,%XMM1 |
(57) 0x408c5a VMOVSD %XMM1,-0x48(%RDX) |
(57) 0x408c5f VMOVSD 0x8(%RCX),%XMM2 |
(57) 0x408c64 VFMADD213SD -0x40(%RDX),%XMM0,%XMM2 |
(57) 0x408c6a VMOVSD %XMM2,-0x40(%RDX) |
(57) 0x408c6f VFMADD132SD 0x10(%RCX),%XMM7,%XMM0 |
(57) 0x408c75 VMOVSD %XMM0,-0x38(%RDX) |
(57) 0x408c7a VMOVSD 0x8(%RDI,%R13,1),%XMM3 |
(57) 0x408c81 VMOVSD (%RCX),%XMM4 |
(57) 0x408c85 VFMADD213SD -0x30(%RDX),%XMM3,%XMM4 |
(57) 0x408c8b VMOVSD %XMM4,-0x30(%RDX) |
(57) 0x408c90 VMOVSD 0x8(%RCX),%XMM5 |
(57) 0x408c95 VFMADD213SD -0x28(%RDX),%XMM3,%XMM5 |
(57) 0x408c9b VMOVSD %XMM5,-0x28(%RDX) |
(57) 0x408ca0 VFMADD132SD 0x10(%RCX),%XMM6,%XMM3 |
(57) 0x408ca6 VMOVSD %XMM3,-0x20(%RDX) |
(57) 0x408cab MOVSXD -0x4(%RSI),%R14 |
(57) 0x408caf VMOVSD (%RCX),%XMM9 |
(57) 0x408cb3 VMOVSD -0x8(%RDX),%XMM11 |
(57) 0x408cb8 SAL $0x4,%R14 |
(57) 0x408cbc VMOVSD 0x8(%RDI,%R14,1),%XMM8 |
(57) 0x408cc3 VFMADD213SD -0x18(%RDX),%XMM8,%XMM9 |
(57) 0x408cc9 VMOVSD %XMM9,-0x18(%RDX) |
(57) 0x408cce VMOVSD 0x8(%RCX),%XMM10 |
(57) 0x408cd3 VFMADD213SD -0x10(%RDX),%XMM8,%XMM10 |
(57) 0x408cd9 VMOVSD %XMM10,-0x10(%RDX) |
(57) 0x408cde VFMADD132SD 0x10(%RCX),%XMM11,%XMM8 |
(57) 0x408ce4 VMOVSD %XMM8,-0x8(%RDX) |
(57) 0x408ce9 CMP %RSI,%R10 |
(57) 0x408cec JNE 408bea |
(56) 0x408cf2 INC %R9 |
(56) 0x408cf5 ADD $0x40,%R8D |
(56) 0x408cf9 ADD $0x600,%R11 |
(56) 0x408d00 CMP %R9D,%EAX |
(56) 0x408d03 JG 408ab0 |
0x408d09 POP %RBX |
0x408d0a POP %R12 |
0x408d0c POP %R13 |
0x408d0e POP %R14 |
0x408d10 POP %RBP |
0x408d11 RET |
0x408d12 INC %EAX |
0x408d14 XOR %EDX,%EDX |
0x408d16 JMP 408a86 |
0x408d1b NOPL (%RAX,%RAX,1) |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
○100.00 | gomp_thread_start | team.c:130 | libgomp.so.1.0.0 |
Path / |
Source file and lines | initAtoms.c:123-133 |
Module | exec |
nb instructions | 39 |
nb uops | 44 |
loop length | 119 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 7.33 cycles |
front end | 7.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 4.00 | 3.67 | 3.67 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 3.67 |
cycles | 3.00 | 5.33 | 3.67 | 3.67 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 3.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 7.09-7.14 |
Stall cycles | 0.00 |
Front-end | 7.33 |
Dispatch | 5.33 |
DIV/SQRT | 6.00 |
Overall L1 | 7.33 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 8% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV (%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 403070 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 403160 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 408d12 <setVcm._omp_fn.0+0x2c2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 408d09 <setVcm._omp_fn.0+0x2b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD %R8D,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x78(%R14),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R13),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x6,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%R9,%R9,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x9,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 408a86 <setVcm._omp_fn.0+0x36> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | initAtoms.c:123-133 |
Module | exec |
nb instructions | 39 |
nb uops | 44 |
loop length | 119 |
used x86 registers | 13 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 7.33 cycles |
front end | 7.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 4.00 | 3.67 | 3.67 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 3.67 |
cycles | 3.00 | 5.33 | 3.67 | 3.67 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 3.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 7.09-7.14 |
Stall cycles | 0.00 |
Front-end | 7.33 |
Dispatch | 5.33 |
DIV/SQRT | 6.00 |
Overall L1 | 7.33 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 8% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV (%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 403070 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 403160 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 408d12 <setVcm._omp_fn.0+0x2c2> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 408d09 <setVcm._omp_fn.0+0x2b9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOVSXD %R8D,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x78(%R14),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x8(%R13),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SAL $0x6,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
LEA (%R9,%R9,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x9,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 408a86 <setVcm._omp_fn.0+0x36> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼setVcm._omp_fn.0– | 0.01 | 0 |
▼Loop 56 - initAtoms.c:126-133 - exec– | 0 | 0 |
○Loop 57 - initAtoms.c:126-133 - exec | 0.01 | 0 |