Loop Id: 145 | Module: exec | Source: ljForce.c:191-216 [...] | Coverage: 29.79% |
---|
Loop Id: 145 | Module: exec | Source: ljForce.c:191-216 [...] | Coverage: 29.79% |
---|
0x4110b0 ADD $0x18,%RSI |
0x4110b4 DEC %R12 |
0x4110b7 JE 411090 |
0x4110b9 MOVUPD (%R15),%XMM11 [1] |
0x4110be MOVUPD -0x10(%RSI),%XMM12 [4] |
0x4110c4 SUBPD %XMM12,%XMM11 |
0x4110c9 MOVAPD %XMM11,%XMM12 |
0x4110ce MULPD %XMM11,%XMM12 |
0x4110d3 MOVAPD %XMM12,%XMM13 |
0x4110d8 UNPCKHPD %XMM12,%XMM13 |
0x4110dd ADDSD %XMM12,%XMM13 |
0x4110e2 MOVSD 0x10(%R15),%XMM12 [1] |
0x4110e8 SUBSD (%RSI),%XMM12 [4] |
0x4110ed MOVAPD %XMM12,%XMM14 |
0x4110f2 MULSD %XMM12,%XMM14 |
0x4110f7 ADDSD %XMM13,%XMM14 |
0x4110fc UCOMISD %XMM2,%XMM14 |
0x411101 JA 4110b0 |
0x411103 UCOMISD %XMM4,%XMM14 |
0x411108 JBE 4110b0 |
0x41110a MOVAPD %XMM6,%XMM13 |
0x41110f DIVSD %XMM14,%XMM13 |
0x411114 MOVAPD %XMM13,%XMM14 |
0x411119 MULSD %XMM13,%XMM14 |
0x41111e MOVDQA %XMM1,%XMM15 |
0x411123 MULSD %XMM13,%XMM15 |
0x411128 MULSD %XMM14,%XMM15 |
0x41112d MOVAPD %XMM15,%XMM14 |
0x411132 ADDSD %XMM7,%XMM14 |
0x411137 MULSD %XMM15,%XMM14 |
0x41113c SUBSD 0x10(%RBP),%XMM14 [6] |
0x411142 MULSD %XMM8,%XMM14 |
0x411147 MOV 0x30(%R13),%R10 [3] |
0x41114b MOVSD (%R10,%RAX,8),%XMM0 [5] |
0x411151 ADDSD %XMM14,%XMM0 |
0x411156 MOVSD %XMM0,(%R10,%RAX,8) [5] |
0x41115c MULSD %XMM3,%XMM13 |
0x411161 MULSD %XMM15,%XMM13 |
0x411166 MULSD %XMM9,%XMM15 |
0x41116b ADDSD %XMM10,%XMM15 |
0x411170 MULSD %XMM15,%XMM13 |
0x411175 MOV 0x28(%R13),%R10 [3] |
0x411179 MOVAPD %XMM13,%XMM0 |
0x41117e UNPCKLPD %XMM13,%XMM0 |
0x411183 MULPD %XMM11,%XMM0 |
0x411188 MOVUPD (%R10,%RDI,8),%XMM11 [2] |
0x41118e ADDPD %XMM0,%XMM11 |
0x411193 MOVUPD %XMM11,(%R10,%RDI,8) [2] |
0x411199 MULSD %XMM12,%XMM13 |
0x41119e ADDSD 0x10(%R10,%RDI,8),%XMM13 [2] |
0x4111a5 MOVSD %XMM13,0x10(%R10,%RDI,8) [2] |
0x4111ac ADDSD %XMM14,%XMM5 |
0x4111b1 JMP 4110b0 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/ljForce.c: 191 - 216 |
-------------------------------------------------------------------------------- |
191: for (int jOff=jBox*MAXATOMS; jOff<(jBox*MAXATOMS+nJBox); jOff++) |
[...] |
197: dr[m] = s->atoms->r[iOff][m]-s->atoms->r[jOff][m]; |
198: r2+=dr[m]*dr[m]; |
199: } |
200: |
201: if ( r2 <= rCut2 && r2 > 0.0) |
202: { |
203: |
204: // Important note: |
205: // from this point on r actually refers to 1.0/r |
206: r2 = 1.0/r2; |
207: real_t r6 = s6 * (r2*r2*r2); |
208: real_t eLocal = r6 * (r6 - 1.0) - eShift; |
209: s->atoms->U[iOff] += 0.5*eLocal; |
210: ePot += 0.5*eLocal; |
211: |
212: // different formulation to avoid sqrt computation |
213: real_t fr = - 4.0*epsilon*r6*r2*(12.0*r6 - 6.0); |
214: for (int m=0; m<3; m++) |
215: { |
216: s->atoms->f[iOff][m] -= dr[m]*fr; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.07 |
CQA speedup if FP arith vectorized | 2.31 |
CQA speedup if fully vectorized | 4.60 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.23 |
Bottlenecks | |
Function | ljForce.extracted |
Source | ljForce.c:191-191,ljForce.c:197-216 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 5.33 |
CQA cycles if no scalar integer | 5.00 |
CQA cycles if FP arith vectorized | 2.31 |
CQA cycles if fully vectorized | 1.16 |
Front-end cycles | 5.33 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 0.75 |
P1 cycles | 0.75 |
P2 cycles | 0.50 |
P3 cycles | 1.50 |
P4 cycles | 2.33 |
P5 cycles | 2.33 |
P6 cycles | 2.33 |
P7 cycles | 3.00 |
P8 cycles | 3.78 |
P9 cycles | 4.33 |
P10 cycles | 4.22 |
P11 cycles | 1.33 |
P12 cycles | 1.33 |
P13 cycles | 1.67 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 30.33 |
Nb uops | 32.00 |
Nb loads | 6.00 |
Nb stores | 1.00 |
Nb stack references | 0.33 |
FLOP/cycle | 2.81 |
Nb FLOP add-sub | 7.67 |
Nb FLOP mul | 7.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.33 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.36 |
Bytes prefetched | 0.00 |
Bytes loaded | 66.67 |
Bytes stored | 10.67 |
Stride 0 | 1.67 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.67 |
Vectorization ratio all | 44.07 |
Vectorization ratio load | 45.83 |
Vectorization ratio store | 33.33 |
Vectorization ratio mul | 38.46 |
Vectorization ratio add_sub | 22.73 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 58.89 |
Vector-efficiency ratio all | 18.01 |
Vector-efficiency ratio load | 18.23 |
Vector-efficiency ratio store | 16.67 |
Vector-efficiency ratio mul | 17.31 |
Vector-efficiency ratio add_sub | 15.34 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 19.86 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.06 |
CQA speedup if FP arith vectorized | 2.17 |
CQA speedup if fully vectorized | 4.61 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.27 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:191-191,ljForce.c:197-216 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.00 |
CQA cycles if FP arith vectorized | 1.46 |
CQA cycles if fully vectorized | 0.69 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 0.75 |
P1 cycles | 0.75 |
P2 cycles | 0.50 |
P3 cycles | 1.00 |
P4 cycles | 1.33 |
P5 cycles | 1.33 |
P6 cycles | 1.33 |
P7 cycles | 1.00 |
P8 cycles | 2.00 |
P9 cycles | 2.50 |
P10 cycles | 2.50 |
P11 cycles | 0.50 |
P12 cycles | 0.50 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 18.00 |
Nb uops | 19.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.53 |
Nb FLOP add-sub | 5.00 |
Nb FLOP mul | 3.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 15.16 |
Bytes prefetched | 0.00 |
Bytes loaded | 48.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 50.00 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 50.00 |
Vectorization ratio add_sub | 25.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 60.00 |
Vector-efficiency ratio all | 18.75 |
Vector-efficiency ratio load | 18.75 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 18.75 |
Vector-efficiency ratio add_sub | 15.63 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 20.00 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.08 |
CQA speedup if FP arith vectorized | 2.39 |
CQA speedup if fully vectorized | 4.49 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.22 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:191-191,ljForce.c:197-216 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.17 |
CQA cycles if no scalar integer | 8.50 |
CQA cycles if FP arith vectorized | 3.83 |
CQA cycles if fully vectorized | 2.04 |
Front-end cycles | 9.17 |
DIV/SQRT cycles | 2.00 |
P0 cycles | 0.75 |
P1 cycles | 0.75 |
P2 cycles | 0.50 |
P3 cycles | 2.00 |
P4 cycles | 4.33 |
P5 cycles | 4.33 |
P6 cycles | 4.33 |
P7 cycles | 7.00 |
P8 cycles | 7.33 |
P9 cycles | 7.50 |
P10 cycles | 7.17 |
P11 cycles | 2.50 |
P12 cycles | 2.50 |
P13 cycles | 5.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 53.00 |
Nb uops | 55.00 |
Nb loads | 10.00 |
Nb stores | 3.00 |
Nb stack references | 1.00 |
FLOP/cycle | 3.16 |
Nb FLOP add-sub | 13.00 |
Nb FLOP mul | 15.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 1.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 14.84 |
Bytes prefetched | 0.00 |
Bytes loaded | 104.00 |
Bytes stored | 32.00 |
Stride 0 | 3.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 2.00 |
Vectorization ratio all | 35.56 |
Vectorization ratio load | 37.50 |
Vectorization ratio store | 33.33 |
Vectorization ratio mul | 15.38 |
Vectorization ratio add_sub | 18.18 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 66.67 |
Vector-efficiency ratio all | 16.94 |
Vector-efficiency ratio load | 17.19 |
Vector-efficiency ratio store | 16.67 |
Vector-efficiency ratio mul | 14.42 |
Vector-efficiency ratio add_sub | 14.77 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 20.83 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.05 |
CQA speedup if FP arith vectorized | 2.26 |
CQA speedup if fully vectorized | 4.89 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.22 |
Bottlenecks | micro-operation queue, |
Function | ljForce.extracted |
Source | ljForce.c:191-191,ljForce.c:197-216 |
Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
Source loop unroll confidence level | max |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.67 |
CQA cycles if no scalar integer | 3.50 |
CQA cycles if FP arith vectorized | 1.63 |
CQA cycles if fully vectorized | 0.75 |
Front-end cycles | 3.67 |
DIV/SQRT cycles | 1.50 |
P0 cycles | 0.75 |
P1 cycles | 0.75 |
P2 cycles | 0.50 |
P3 cycles | 1.50 |
P4 cycles | 1.33 |
P5 cycles | 1.33 |
P6 cycles | 1.33 |
P7 cycles | 1.00 |
P8 cycles | 2.00 |
P9 cycles | 3.00 |
P10 cycles | 3.00 |
P11 cycles | 1.00 |
P12 cycles | 1.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 3 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 20.00 |
Nb uops | 22.00 |
Nb loads | 4.00 |
Nb stores | 0.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.18 |
Nb FLOP add-sub | 5.00 |
Nb FLOP mul | 3.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 13.09 |
Bytes prefetched | 0.00 |
Bytes loaded | 48.00 |
Bytes stored | 0.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 1.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 46.67 |
Vectorization ratio load | 50.00 |
Vectorization ratio store | NA |
Vectorization ratio mul | 50.00 |
Vectorization ratio add_sub | 25.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 50.00 |
Vector-efficiency ratio all | 18.33 |
Vector-efficiency ratio load | 18.75 |
Vector-efficiency ratio store | NA |
Vector-efficiency ratio mul | 18.75 |
Vector-efficiency ratio add_sub | 15.63 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 18.75 |
Path / |
Function | ljForce.extracted |
Source file and lines | ljForce.c:191-216 |
Module | exec |
nb instructions | 30.33 |
nb uops | 32 |
loop length | 145 |
used x86 registers | 4.67 |
used mmx registers | 0 |
used xmm registers | 9 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0.33 |
ADD-SUB / MUL ratio | 1.62 |
micro-operation queue | 5.33 cycles |
front end | 5.33 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 0.75 | 0.75 | 0.50 | 1.50 | 2.33 | 2.33 | 2.33 | 3.00 | 3.78 | 4.33 | 4.22 | 1.33 | 1.33 |
cycles | 1.50 | 0.75 | 0.75 | 0.50 | 1.50 | 2.33 | 2.33 | 2.33 | 3.00 | 3.78 | 4.33 | 4.22 | 1.33 | 1.33 |
Cycles executing div or sqrt instructions | 1.67 |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 5.33 |
Dispatch | 4.33 |
DIV/SQRT | 1.67 |
Data deps. | 3.00 |
Overall L1 | 5.33 |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 100% |
all | 43% |
load | 45% |
store | 33% |
mul | 38% |
add-sub | 22% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 57% |
all | 44% |
load | 45% |
store | 33% |
mul | 38% |
add-sub | 22% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 58% |
all | 25% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 25% |
all | 17% |
load | 18% |
store | 16% |
mul | 17% |
add-sub | 15% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 19% |
all | 18% |
load | 18% |
store | 16% |
mul | 17% |
add-sub | 15% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 19% |
Function | ljForce.extracted |
Source file and lines | ljForce.c:191-216 |
Module | exec |
nb instructions | 18 |
nb uops | 19 |
loop length | 83 |
used x86 registers | 3 |
used mmx registers | 0 |
used xmm registers | 5 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 2.00 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 0.75 | 0.75 | 0.50 | 1.00 | 1.33 | 1.33 | 1.33 | 1.00 | 2.00 | 2.50 | 2.50 | 0.50 | 0.50 |
cycles | 1.00 | 0.75 | 0.75 | 0.50 | 1.00 | 1.33 | 1.33 | 1.33 | 1.00 | 2.00 | 2.50 | 2.50 | 0.50 | 0.50 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 3.17 |
Dispatch | 2.50 |
Data deps. | 3.00 |
Overall L1 | 3.17 |
all | 50% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 60% |
all | 18% |
load | 18% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 18% |
add-sub | 15% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 20% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x18,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 411090 <ljForce.extracted+0x260> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOVUPD (%R15),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVUPD -0x10(%RSI),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
SUBPD %XMM12,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM11,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MULPD %XMM11,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKHPD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
ADDSD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVSD 0x10(%R15),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUBSD (%RSI),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MULSD %XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADDSD %XMM13,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
UCOMISD %XMM2,%XMM14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 |
JA 4110b0 <ljForce.extracted+0x280> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | ljForce.extracted |
Source file and lines | ljForce.c:191-216 |
Module | exec |
nb instructions | 53 |
nb uops | 55 |
loop length | 262 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 1 |
ADD-SUB / MUL ratio | 0.85 |
micro-operation queue | 9.17 cycles |
front end | 9.17 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.00 | 0.75 | 0.75 | 0.50 | 2.00 | 4.33 | 4.33 | 4.33 | 7.00 | 7.33 | 7.50 | 7.17 | 2.50 | 2.50 |
cycles | 2.00 | 0.75 | 0.75 | 0.50 | 2.00 | 4.33 | 4.33 | 4.33 | 7.00 | 7.33 | 7.50 | 7.17 | 2.50 | 2.50 |
Cycles executing div or sqrt instructions | 5.00 |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 9.17 |
Dispatch | 7.50 |
DIV/SQRT | 5.00 |
Data deps. | 3.00 |
Overall L1 | 9.17 |
all | 100% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 100% |
all | 34% |
load | 37% |
store | 33% |
mul | 15% |
add-sub | 18% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 63% |
all | 35% |
load | 37% |
store | 33% |
mul | 15% |
add-sub | 18% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 66% |
all | 25% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 25% |
all | 16% |
load | 17% |
store | 16% |
mul | 14% |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
all | 16% |
load | 17% |
store | 16% |
mul | 14% |
add-sub | 14% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 20% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x18,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 411090 <ljForce.extracted+0x260> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOVUPD (%R15),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVUPD -0x10(%RSI),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
SUBPD %XMM12,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM11,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MULPD %XMM11,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKHPD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
ADDSD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVSD 0x10(%R15),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUBSD (%RSI),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MULSD %XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADDSD %XMM13,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
UCOMISD %XMM2,%XMM14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 |
JA 4110b0 <ljForce.extracted+0x280> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
UCOMISD %XMM4,%XMM14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 |
JBE 4110b0 <ljForce.extracted+0x280> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOVAPD %XMM6,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
DIVSD %XMM14,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 13 | 5 |
MOVAPD %XMM13,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MULSD %XMM13,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVDQA %XMM1,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MULSD %XMM13,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MULSD %XMM14,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM15,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADDSD %XMM7,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MULSD %XMM15,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
SUBSD 0x10(%RBP),%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MULSD %XMM8,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV 0x30(%R13),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVSD (%R10,%RAX,8),%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
ADDSD %XMM14,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVSD %XMM0,(%R10,%RAX,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
MULSD %XMM3,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MULSD %XMM15,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MULSD %XMM9,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADDSD %XMM10,%XMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MULSD %XMM15,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOV 0x28(%R13),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVAPD %XMM13,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKLPD %XMM13,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
MULPD %XMM11,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVUPD (%R10,%RDI,8),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADDPD %XMM0,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVUPD %XMM11,(%R10,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
MULSD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADDSD 0x10(%R10,%RDI,8),%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVSD %XMM13,0x10(%R10,%RDI,8) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADDSD %XMM14,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
JMP 4110b0 <ljForce.extracted+0x280> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Function | ljForce.extracted |
Source file and lines | ljForce.c:191-216 |
Module | exec |
nb instructions | 20 |
nb uops | 22 |
loop length | 90 |
used x86 registers | 3 |
used mmx registers | 0 |
used xmm registers | 6 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
ADD-SUB / MUL ratio | 2.00 |
micro-operation queue | 3.67 cycles |
front end | 3.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.50 | 0.75 | 0.75 | 0.50 | 1.50 | 1.33 | 1.33 | 1.33 | 1.00 | 2.00 | 3.00 | 3.00 | 1.00 | 1.00 |
cycles | 1.50 | 0.75 | 0.75 | 0.50 | 1.50 | 1.33 | 1.33 | 1.33 | 1.00 | 2.00 | 3.00 | 3.00 | 1.00 | 1.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 3.00 |
Front-end | 3.67 |
Dispatch | 3.00 |
Data deps. | 3.00 |
Overall L1 | 3.67 |
all | 46% |
load | 50% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 50% |
add-sub | 25% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 50% |
all | 18% |
load | 18% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 18% |
add-sub | 15% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 18% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x18,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
DEC %R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JE 411090 <ljForce.extracted+0x260> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOVUPD (%R15),%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVUPD -0x10(%RSI),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
SUBPD %XMM12,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM11,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MULPD %XMM11,%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
UNPCKHPD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.40 |
ADDSD %XMM12,%XMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVSD 0x10(%R15),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUBSD (%RSI),%XMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
MOVAPD %XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MULSD %XMM12,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 3 | 0.50 |
ADDSD %XMM13,%XMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 3 | 0.50 |
UCOMISD %XMM2,%XMM14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 |
JA 4110b0 <ljForce.extracted+0x280> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
UCOMISD %XMM4,%XMM14 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0.50 | 7 | 1 |
JBE 4110b0 <ljForce.extracted+0x280> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |