Loop Id: 29 | Module: exec | Source: timestep.c:74-78 | Coverage: 1.26% |
---|
Loop Id: 29 | Module: exec | Source: timestep.c:74-78 | Coverage: 1.26% |
---|
0x211bf0 VMOVUPD (%R12,%R14,1),%ZMM18 [3] |
0x211bf7 VMOVUPD 0x40(%R12,%R14,1),%ZMM19 [3] |
0x211bff VMOVUPD 0x40(%R15,%R14,1),%ZMM26 [2] |
0x211c07 VMOVUPD 0x80(%R12,%R14,1),%ZMM20 [3] |
0x211c0f VMOVUPD 0x80(%R15,%R14,1),%ZMM23 [2] |
0x211c17 VBROADCASTSD (%RBX),%ZMM17 [1] |
0x211c1d VMOVAPD %ZMM18,%ZMM21 |
0x211c23 VPERMT2PD %ZMM19,%ZMM5,%ZMM21 |
0x211c29 VMOVAPD %ZMM18,%ZMM22 |
0x211c2f VPERMT2PD %ZMM19,%ZMM7,%ZMM22 |
0x211c35 VPERMT2PD %ZMM18,%ZMM9,%ZMM19 |
0x211c3b VMOVUPD (%R15,%R14,1),%ZMM18 [2] |
0x211c42 VPERMT2PD %ZMM20,%ZMM6,%ZMM21 |
0x211c48 VPERMT2PD %ZMM20,%ZMM8,%ZMM22 |
0x211c4e VPERMT2PD %ZMM20,%ZMM10,%ZMM19 |
0x211c54 VMOVAPD %ZMM18,%ZMM24 |
0x211c5a VPERMT2PD %ZMM26,%ZMM5,%ZMM24 |
0x211c60 VMOVAPD %ZMM18,%ZMM25 |
0x211c66 VPERMT2PD %ZMM26,%ZMM7,%ZMM25 |
0x211c6c VPERMT2PD %ZMM18,%ZMM9,%ZMM26 |
0x211c72 VPERMT2PD %ZMM23,%ZMM6,%ZMM24 |
0x211c78 VPERMT2PD %ZMM23,%ZMM8,%ZMM25 |
0x211c7e VPERMT2PD %ZMM23,%ZMM10,%ZMM26 |
0x211c84 VFMADD231PD %ZMM21,%ZMM17,%ZMM24 |
0x211c8a VFMADD231PD %ZMM22,%ZMM17,%ZMM25 |
0x211c90 VFMADD231PD %ZMM19,%ZMM17,%ZMM26 |
0x211c96 VMOVAPD %ZMM25,%ZMM17 |
0x211c9c VPERMT2PD %ZMM24,%ZMM11,%ZMM17 |
0x211ca2 VMOVAPD %ZMM24,%ZMM18 |
0x211ca8 VPERMT2PD %ZMM25,%ZMM13,%ZMM18 |
0x211cae VPERMT2PD %ZMM25,%ZMM15,%ZMM24 |
0x211cb4 VPERMT2PD %ZMM26,%ZMM12,%ZMM17 |
0x211cba VPERMT2PD %ZMM26,%ZMM14,%ZMM18 |
0x211cc0 VPERMT2PD %ZMM26,%ZMM16,%ZMM24 |
0x211cc6 VMOVUPD %ZMM24,(%R15,%R14,1) [2] |
0x211ccd VMOVUPD %ZMM18,0x40(%R15,%R14,1) [2] |
0x211cd5 VMOVUPD %ZMM17,0x80(%R15,%R14,1) [2] |
0x211cdd ADD $0xc0,%R14 |
0x211ce4 ADD $-0x8,%R8 |
0x211ce8 JNE 211bf0 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 74 - 78 |
-------------------------------------------------------------------------------- |
74: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
75: { |
76: s->atoms->p[iOff][0] += dt*s->atoms->f[iOff][0]; |
77: s->atoms->p[iOff][1] += dt*s->atoms->f[iOff][1]; |
78: s->atoms->p[iOff][2] += dt*s->atoms->f[iOff][2]; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.02 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.64 |
Bottlenecks | P9, P10, |
Function | .omp_outlined.#0x211980 |
Source | timestep.c:74-78 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 18.50 |
CQA cycles if no scalar integer | 18.50 |
CQA cycles if FP arith vectorized | 18.50 |
CQA cycles if fully vectorized | 18.06 |
Front-end cycles | 7.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.25 |
P2 cycles | 0.25 |
P3 cycles | 0.50 |
P4 cycles | 5.33 |
P5 cycles | 5.33 |
P6 cycles | 5.33 |
P7 cycles | 6.00 |
P8 cycles | 18.50 |
P9 cycles | 18.50 |
P10 cycles | 0.00 |
P11 cycles | 3.00 |
P12 cycles | 3.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 40.00 |
Nb uops | 42.00 |
Nb loads | 7.00 |
Nb stores | 3.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.59 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 31.57 |
Bytes prefetched | 0.00 |
Bytes loaded | 392.00 |
Bytes stored | 192.00 |
Stride 0 | 1.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 97.30 |
Vectorization ratio load | 85.71 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 96.00 |
Vector-efficiency ratio all | 97.64 |
Vector-efficiency ratio load | 87.50 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 96.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 1.02 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 2.64 |
Bottlenecks | P9, P10, |
Function | .omp_outlined.#0x211980 |
Source | timestep.c:74-78 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 8 |
CQA cycles | 18.50 |
CQA cycles if no scalar integer | 18.50 |
CQA cycles if FP arith vectorized | 18.50 |
CQA cycles if fully vectorized | 18.06 |
Front-end cycles | 7.00 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.50 |
P1 cycles | 0.25 |
P2 cycles | 0.25 |
P3 cycles | 0.50 |
P4 cycles | 5.33 |
P5 cycles | 5.33 |
P6 cycles | 5.33 |
P7 cycles | 6.00 |
P8 cycles | 18.50 |
P9 cycles | 18.50 |
P10 cycles | 0.00 |
P11 cycles | 3.00 |
P12 cycles | 3.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 40.00 |
Nb uops | 42.00 |
Nb loads | 7.00 |
Nb stores | 3.00 |
Nb stack references | 0.00 |
FLOP/cycle | 2.59 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 24.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 31.57 |
Bytes prefetched | 0.00 |
Bytes loaded | 392.00 |
Bytes stored | 192.00 |
Stride 0 | 1.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 97.30 |
Vectorization ratio load | 85.71 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 96.00 |
Vector-efficiency ratio all | 97.64 |
Vector-efficiency ratio load | 87.50 |
Vector-efficiency ratio store | 100.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 100.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 96.50 |
Path / |
Function | .omp_outlined.#0x211980 |
Source file and lines | timestep.c:74-78 |
Module | exec |
nb instructions | 40 |
nb uops | 42 |
loop length | 254 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 22 |
nb stack references | 0 |
micro-operation queue | 7.00 cycles |
front end | 7.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 3.33 | 3.33 | 3.33 | 3.00 | 18.50 | 18.50 | 0.00 | 3.00 | 3.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 5.33 | 5.33 | 5.33 | 6.00 | 18.50 | 18.50 | 0.00 | 3.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 7.00 |
Dispatch | 18.50 |
Data deps. | 1.00 |
Overall L1 | 18.50 |
all | 97% |
load | 85% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 96% |
all | 97% |
load | 87% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 96% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%R12,%R14,1),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x40(%R12,%R14,1),%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x40(%R15,%R14,1),%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x80(%R12,%R14,1),%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x80(%R15,%R14,1),%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD (%RBX),%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM18,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM19,%ZMM5,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM18,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM19,%ZMM7,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM18,%ZMM9,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVUPD (%R15,%R14,1),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %ZMM20,%ZMM6,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM20,%ZMM8,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM20,%ZMM10,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM18,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM26,%ZMM5,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM18,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM26,%ZMM7,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM18,%ZMM9,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM23,%ZMM6,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM23,%ZMM8,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM23,%ZMM10,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VFMADD231PD %ZMM21,%ZMM17,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 1 |
VFMADD231PD %ZMM22,%ZMM17,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 1 |
VFMADD231PD %ZMM19,%ZMM17,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 1 |
VMOVAPD %ZMM25,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM24,%ZMM11,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM24,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM25,%ZMM13,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM25,%ZMM15,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM26,%ZMM12,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM26,%ZMM14,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM26,%ZMM16,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVUPD %ZMM24,(%R15,%R14,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMOVUPD %ZMM18,0x40(%R15,%R14,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMOVUPD %ZMM17,0x80(%R15,%R14,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
ADD $0xc0,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $-0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 211bf0 <.omp_outlined.+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | .omp_outlined.#0x211980 |
Source file and lines | timestep.c:74-78 |
Module | exec |
nb instructions | 40 |
nb uops | 42 |
loop length | 254 |
used x86 registers | 5 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 22 |
nb stack references | 0 |
micro-operation queue | 7.00 cycles |
front end | 7.00 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 3.33 | 3.33 | 3.33 | 3.00 | 18.50 | 18.50 | 0.00 | 3.00 | 3.00 |
cycles | 0.50 | 0.50 | 0.25 | 0.25 | 0.50 | 5.33 | 5.33 | 5.33 | 6.00 | 18.50 | 18.50 | 0.00 | 3.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 7.00 |
Dispatch | 18.50 |
Data deps. | 1.00 |
Overall L1 | 18.50 |
all | 97% |
load | 85% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 96% |
all | 97% |
load | 87% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 96% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVUPD (%R12,%R14,1),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x40(%R12,%R14,1),%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x40(%R15,%R14,1),%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x80(%R12,%R14,1),%ZMM20 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x80(%R15,%R14,1),%ZMM23 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD (%RBX),%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM18,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM19,%ZMM5,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM18,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM19,%ZMM7,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM18,%ZMM9,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVUPD (%R15,%R14,1),%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VPERMT2PD %ZMM20,%ZMM6,%ZMM21 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM20,%ZMM8,%ZMM22 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM20,%ZMM10,%ZMM19 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM18,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM26,%ZMM5,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM18,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM26,%ZMM7,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM18,%ZMM9,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM23,%ZMM6,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM23,%ZMM8,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM23,%ZMM10,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VFMADD231PD %ZMM21,%ZMM17,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 1 |
VFMADD231PD %ZMM22,%ZMM17,%ZMM25 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 1 |
VFMADD231PD %ZMM19,%ZMM17,%ZMM26 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 1 |
VMOVAPD %ZMM25,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM24,%ZMM11,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVAPD %ZMM24,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VPERMT2PD %ZMM25,%ZMM13,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM25,%ZMM15,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM26,%ZMM12,%ZMM17 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM26,%ZMM14,%ZMM18 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VPERMT2PD %ZMM26,%ZMM16,%ZMM24 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVUPD %ZMM24,(%R15,%R14,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMOVUPD %ZMM18,0x40(%R15,%R14,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
VMOVUPD %ZMM17,0x80(%R15,%R14,1) | 2 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 1 | 1 | 5 | 2 |
ADD $0xc0,%R14 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD $-0x8,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 211bf0 <.omp_outlined.+0x270> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |