Loop Id: 72 | Module: exec | Source: haloExchange.c:633-642 | Coverage: 0.03% |
---|
Loop Id: 72 | Module: exec | Source: haloExchange.c:633-642 | Coverage: 0.03% |
---|
0x20c180 VMOVD (%R10),%XMM1 [1] |
0x20c185 VPINSRD $0x1,0x38(%R10),%XMM1,%XMM1 [1] |
0x20c18c VMOVQ %XMM1,(%RAX,%R8,4) [2] |
0x20c192 VMOVD 0x4(%R10),%XMM1 [1] |
0x20c198 VPINSRD $0x1,0x3c(%R10),%XMM1,%XMM1 [1] |
0x20c19f VMOVQ %XMM1,(%RCX,%R8,4) [5] |
0x20c1a5 ADD $0x2,%R8 |
0x20c1a9 VMOVUPD 0x8(%R10),%ZMM1 [1] |
0x20c1b3 VMOVUPD 0x48(%R10),%YMM3 [1] |
0x20c1b9 VMOVUPD 0x8(%R10),%YMM2 [1] |
0x20c1bf VMOVUPD 0x58(%R10),%XMM5 [1] |
0x20c1c5 VMOVUPD 0x48(%R10),%XMM4 [1] |
0x20c1cb VBLENDPD $0x8,0x28(%R10),%YMM2,%YMM2 [1] |
0x20c1d2 VSHUFPD $0x1,0x68(%R10),%XMM5,%XMM5 [1] |
0x20c1d9 ADD $0x70,%R10 |
0x20c1dd VPERMT2PD %ZMM3,%ZMM0,%ZMM1 |
0x20c1e3 VMOVUPD %XMM4,0x20(%RDX,%R11,1) [4] |
0x20c1ea VMOVUPD %YMM2,(%RDX,%R11,1) [4] |
0x20c1f0 VMOVUPD %XMM5,0x20(%RSI,%R11,1) [3] |
0x20c1f7 VMOVUPD %YMM1,(%RSI,%R11,1) [3] |
0x20c1fd ADD $0x30,%R11 |
0x20c201 CMP %R8,%R9 |
0x20c204 JNE 20c180 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 633 - 642 |
-------------------------------------------------------------------------------- |
633: for (int ii=begin, iTmp=0; ii<end; ++ii, ++iTmp) |
634: { |
635: atoms->gid[ii] = tmp[iTmp].gid; |
636: atoms->iSpecies[ii] = tmp[iTmp].type; |
637: atoms->r[ii][0] = tmp[iTmp].rx; |
638: atoms->r[ii][1] = tmp[iTmp].ry; |
639: atoms->r[ii][2] = tmp[iTmp].rz; |
640: atoms->p[ii][0] = tmp[iTmp].px; |
641: atoms->p[ii][1] = tmp[iTmp].py; |
642: atoms->p[ii][2] = tmp[iTmp].pz; |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 2.06 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.64 |
Bottlenecks | P5, P6, P7, |
Function | sortAtomsInCell |
Source | haloExchange.c:633-642 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | intermediate |
Unroll factor | 2 |
CQA cycles | 6.00 |
CQA cycles if no scalar integer | 6.00 |
CQA cycles if FP arith vectorized | 6.00 |
CQA cycles if fully vectorized | 2.92 |
Front-end cycles | 3.67 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 0.75 |
P2 cycles | 0.75 |
P3 cycles | 0.50 |
P4 cycles | 6.00 |
P5 cycles | 6.00 |
P6 cycles | 6.00 |
P7 cycles | 1.00 |
P8 cycles | 2.00 |
P9 cycles | 2.00 |
P10 cycles | 1.00 |
P11 cycles | 3.00 |
P12 cycles | 3.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 23.00 |
Nb uops | 22.00 |
Nb loads | 11.00 |
Nb stores | 6.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 56.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 224.00 |
Bytes stored | 112.00 |
Stride 0 | 0.00 |
Stride 1 | 2.00 |
Stride n | 3.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 66.67 |
Vectorization ratio load | 63.64 |
Vectorization ratio store | 66.67 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 60.00 |
Vector-efficiency ratio all | 34.72 |
Vector-efficiency ratio load | 31.82 |
Vector-efficiency ratio store | 29.17 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 37.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 2.06 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.64 |
Bottlenecks | P5, P6, P7, |
Function | sortAtomsInCell |
Source | haloExchange.c:633-642 |
Source loop unroll info | unrolled by 8 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | intermediate |
Unroll factor | 2 |
CQA cycles | 6.00 |
CQA cycles if no scalar integer | 6.00 |
CQA cycles if FP arith vectorized | 6.00 |
CQA cycles if fully vectorized | 2.92 |
Front-end cycles | 3.67 |
DIV/SQRT cycles | 1.00 |
P0 cycles | 1.00 |
P1 cycles | 0.75 |
P2 cycles | 0.75 |
P3 cycles | 0.50 |
P4 cycles | 6.00 |
P5 cycles | 6.00 |
P6 cycles | 6.00 |
P7 cycles | 1.00 |
P8 cycles | 2.00 |
P9 cycles | 2.00 |
P10 cycles | 1.00 |
P11 cycles | 3.00 |
P12 cycles | 3.00 |
P13 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 23.00 |
Nb uops | 22.00 |
Nb loads | 11.00 |
Nb stores | 6.00 |
Nb stack references | 0.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 56.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 224.00 |
Bytes stored | 112.00 |
Stride 0 | 0.00 |
Stride 1 | 2.00 |
Stride n | 3.00 |
Stride unknown | 0.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 66.67 |
Vectorization ratio load | 63.64 |
Vectorization ratio store | 66.67 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 60.00 |
Vector-efficiency ratio all | 34.72 |
Vector-efficiency ratio load | 31.82 |
Vector-efficiency ratio store | 29.17 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 37.50 |
Path / |
Function | sortAtomsInCell |
Source file and lines | haloExchange.c:633-642 |
Module | exec |
nb instructions | 23 |
nb uops | 22 |
loop length | 138 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 3 |
used zmm registers | 3 |
nb stack references | 0 |
micro-operation queue | 3.67 cycles |
front end | 3.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 0.75 | 0.75 | 0.50 | 5.67 | 5.67 | 5.67 | 1.00 | 2.00 | 2.00 | 1.00 | 3.00 | 3.00 |
cycles | 1.00 | 1.00 | 0.75 | 0.75 | 0.50 | 6.00 | 6.00 | 6.00 | 1.00 | 2.00 | 2.00 | 1.00 | 3.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 3.67 |
Dispatch | 6.00 |
Data deps. | 1.00 |
Overall L1 | 6.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 66% |
load | 63% |
store | 66% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 60% |
all | 8% |
load | 6% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 47% |
load | 46% |
store | 37% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 58% |
all | 34% |
load | 31% |
store | 29% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 37% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVD (%R10),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 |
VPINSRD $0x1,0x38(%R10),%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %XMM1,(%RAX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVD 0x4(%R10),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 |
VPINSRD $0x1,0x3c(%R10),%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %XMM1,(%RCX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADD $0x2,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVUPD 0x8(%R10),%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x48(%R10),%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD 0x8(%R10),%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD 0x58(%R10),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD 0x48(%R10),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBLENDPD $0x8,0x28(%R10),%YMM2,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VSHUFPD $0x1,0x68(%R10),%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.50 |
ADD $0x70,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPERMT2PD %ZMM3,%ZMM0,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVUPD %XMM4,0x20(%RDX,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVUPD %YMM2,(%RDX,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVUPD %XMM5,0x20(%RSI,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVUPD %YMM1,(%RSI,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
ADD $0x30,%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 20c180 <sortAtomsInCell+0x4d0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
Function | sortAtomsInCell |
Source file and lines | haloExchange.c:633-642 |
Module | exec |
nb instructions | 23 |
nb uops | 22 |
loop length | 138 |
used x86 registers | 8 |
used mmx registers | 0 |
used xmm registers | 3 |
used ymm registers | 3 |
used zmm registers | 3 |
nb stack references | 0 |
micro-operation queue | 3.67 cycles |
front end | 3.67 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 1.00 | 1.00 | 0.75 | 0.75 | 0.50 | 5.67 | 5.67 | 5.67 | 1.00 | 2.00 | 2.00 | 1.00 | 3.00 | 3.00 |
cycles | 1.00 | 1.00 | 0.75 | 0.75 | 0.50 | 6.00 | 6.00 | 6.00 | 1.00 | 2.00 | 2.00 | 1.00 | 3.00 | 3.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
Front-end | 3.67 |
Dispatch | 6.00 |
Data deps. | 1.00 |
Overall L1 | 6.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 100% |
all | 66% |
load | 63% |
store | 66% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 60% |
all | 8% |
load | 6% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 6% |
all | 47% |
load | 46% |
store | 37% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 58% |
all | 34% |
load | 31% |
store | 29% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 37% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
VMOVD (%R10),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 |
VPINSRD $0x1,0x38(%R10),%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %XMM1,(%RAX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
VMOVD 0x4(%R10),%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 8 | 0.50 |
VPINSRD $0x1,0x3c(%R10),%XMM1,%XMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 1 | 0.50 |
VMOVQ %XMM1,(%RCX,%R8,4) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 1 | 1 |
ADD $0x2,%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VMOVUPD 0x8(%R10),%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD 0x48(%R10),%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD 0x8(%R10),%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD 0x58(%R10),%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVUPD 0x48(%R10),%XMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VBLENDPD $0x8,0x28(%R10),%YMM2,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 1 | 0.50 |
VSHUFPD $0x1,0x68(%R10),%XMM5,%XMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 1 | 0.50 |
ADD $0x70,%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VPERMT2PD %ZMM3,%ZMM0,%ZMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 5 | 1 |
VMOVUPD %XMM4,0x20(%RDX,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVUPD %YMM2,(%RDX,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVUPD %XMM5,0x20(%RSI,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
VMOVUPD %YMM1,(%RSI,%R11,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0.50 | 0.50 | 4 | 1 |
ADD $0x30,%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %R8,%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JNE 20c180 <sortAtomsInCell+0x4d0> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |