Function: .omp_outlined..244 | Module: exec | Source: timestep.c:71-78 | Coverage: 1.22% |
---|
Function: .omp_outlined..244 | Module: exec | Source: timestep.c:71-78 | Coverage: 1.22% |
---|
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-7424/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 71 - 78 |
-------------------------------------------------------------------------------- |
71: #pragma omp parallel for |
72: for (int iBox=0; iBox<nBoxes; iBox++) |
73: { |
74: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
75: { |
76: s->atoms->p[iOff][0] += dt*s->atoms->f[iOff][0]; |
77: s->atoms->p[iOff][1] += dt*s->atoms->f[iOff][1]; |
78: s->atoms->p[iOff][2] += dt*s->atoms->f[iOff][2]; |
0x212720 PUSH %RBP |
0x212721 MOV %RSP,%RBP |
0x212724 PUSH %R15 |
0x212726 PUSH %R14 |
0x212728 PUSH %R13 |
0x21272a PUSH %R12 |
0x21272c PUSH %RBX |
0x21272d SUB $0x48,%RSP |
0x212731 MOV (%RDX),%R14D |
0x212734 TEST %R14D,%R14D |
0x212737 JLE 2127b7 |
0x212739 MOV (%RDI),%ESI |
0x21273b DEC %R14D |
0x21273e MOV %R8,%RBX |
0x212741 MOV %RCX,%R15 |
0x212744 MOVL $0,-0x34(%RBP) |
0x21274b MOVL $0x1,-0x4c(%RBP) |
0x212752 MOVL $0,-0x48(%RBP) |
0x212759 MOV %R14D,-0x30(%RBP) |
0x21275d SUB $0x8,%RSP |
0x212761 LEA -0x4c(%RBP),%RAX |
0x212765 LEA -0x48(%RBP),%RCX |
0x212769 LEA -0x34(%RBP),%R8 |
0x21276d LEA -0x30(%RBP),%R9 |
0x212771 MOV $0x2059e8,%EDI |
0x212776 MOV %ESI,-0x44(%RBP) |
0x212779 MOV $0x22,%EDX |
0x21277e PUSH $0x1 |
0x212780 PUSH $0x1 |
0x212782 PUSH %RAX |
0x212783 CALL 213530 <@plt_start@+0x130> |
0x212788 ADD $0x20,%RSP |
0x21278c MOV -0x30(%RBP),%EAX |
0x21278f CMP %R14D,%EAX |
0x212792 CMOVL %EAX,%R14D |
0x212796 MOVSXD -0x34(%RBP),%RAX |
0x21279a MOV %R14D,-0x30(%RBP) |
0x21279e MOV %RAX,-0x60(%RBP) |
0x2127a2 CMP %R14D,%EAX |
0x2127a5 JLE 2127c6 |
0x2127a7 MOV -0x44(%RBP),%ESI |
0x2127aa MOV $0x205a00,%EDI |
0x2127af VZEROUPPER |
0x2127b2 CALL 213540 <@plt_start@+0x140> |
0x2127b7 ADD $0x48,%RSP |
0x2127bb POP %RBX |
0x2127bc POP %R12 |
0x2127be POP %R13 |
0x2127c0 POP %R14 |
0x2127c2 POP %R15 |
0x2127c4 POP %RBP |
0x2127c5 RET |
0x2127c6 MOV (%R15),%RDI |
0x2127c9 VMOVAPD -0x10751(%RIP),%YMM0 |
0x2127d1 VMOVAPD -0x10799(%RIP),%YMM1 |
0x2127d9 VMOVAPD -0x10781(%RIP),%YMM2 |
0x2127e1 VMOVAPD -0x10729(%RIP),%YMM3 |
0x2127e9 VMOVAPD -0xfd33(%RIP),%ZMM4 |
0x2127f3 VMOVAPD -0x1003d(%RIP),%ZMM5 |
0x2127fd VMOVAPD -0x10007(%RIP),%ZMM6 |
0x212807 VMOVAPD -0xffd1(%RIP),%ZMM7 |
0x212811 VMOVAPD -0xff9b(%RIP),%ZMM8 |
0x21281b VMOVAPD -0xff65(%RIP),%ZMM9 |
0x212825 VMOVAPD -0xff2f(%RIP),%ZMM10 |
0x21282f VMOVAPD -0xfef9(%RIP),%ZMM11 |
0x212839 VMOVAPD -0xfec3(%RIP),%ZMM12 |
0x212843 VMOVAPD -0xfe8d(%RIP),%ZMM13 |
0x21284d VMOVAPD -0xfe57(%RIP),%ZMM14 |
0x212857 VMOVAPD -0xfe21(%RIP),%ZMM15 |
0x212861 VMOVAPD -0xfdeb(%RIP),%ZMM16 |
0x21286b MOV -0x60(%RBP),%R10 |
0x21286f MOVSXD %R14D,%RAX |
0x212872 XOR %R9D,%R9D |
0x212875 MOV %RAX,-0x70(%RBP) |
0x212879 LEA 0x8(%RBX),%RAX |
0x21287d MOV %RAX,-0x68(%RBP) |
0x212881 MOV 0x18(%RDI),%RCX |
0x212885 MOV %R10D,%ESI |
0x212888 SAL $0x6,%ESI |
0x21288b MOV %RDI,-0x58(%RBP) |
0x21288f MOV 0x78(%RCX),%R8 |
0x212893 MOV %R8,-0x40(%RBP) |
0x212897 JMP 2128b7 |
0x212899 NOPL (%RAX) |
(120) 0x2128a0 LEA 0x1(%R10),%RAX |
(120) 0x2128a4 ADD $0x40,%ESI |
(120) 0x2128a7 INC %R9D |
(120) 0x2128aa CMP -0x70(%RBP),%R10 |
(120) 0x2128ae MOV %RAX,%R10 |
(120) 0x2128b1 JGE 2127a7 |
(120) 0x2128b7 MOV (%R8,%R10,4),%R11D |
(120) 0x2128bb TEST %R11D,%R11D |
(120) 0x2128be JLE 2128a0 |
(120) 0x2128c0 MOV 0x20(%RDI),%RCX |
(120) 0x2128c4 MOVSXD %ESI,%R13 |
(120) 0x2128c7 XOR %R14D,%R14D |
(120) 0x2128ca MOV 0x20(%RCX),%R15 |
(120) 0x2128ce MOV 0x28(%RCX),%R12 |
(120) 0x2128d2 LEA -0x1(%R11),%ECX |
(120) 0x2128d6 CMP $0x3,%ECX |
(120) 0x2128d9 JB 212b80 |
(120) 0x2128df MOV -0x60(%RBP),%RAX |
(120) 0x2128e3 LEA (%RAX,%R9,1),%EDX |
(120) 0x2128e7 SAL $0x6,%EDX |
(120) 0x2128ea MOVSXD %EDX,%RDX |
(120) 0x2128ed LEA (,%RDX,8),%R8 |
(120) 0x2128f5 ADD %RCX,%RDX |
(120) 0x2128f8 SAL $0x3,%RDX |
(120) 0x2128fc LEA (%R8,%R8,2),%R8 |
(120) 0x212900 LEA (%RDX,%RDX,2),%RDX |
(120) 0x212904 LEA (%R15,%R8,1),%RDI |
(120) 0x212908 ADD %R12,%R8 |
(120) 0x21290b CMP -0x68(%RBP),%RDI |
(120) 0x21290f LEA 0x18(%R15,%RDX,1),%RAX |
(120) 0x212914 LEA 0x18(%R12,%RDX,1),%RDX |
(120) 0x212919 SETBB -0x2a(%RBP) |
(120) 0x21291d CMP %RBX,%RAX |
(120) 0x212920 SETAB -0x29(%RBP) |
(120) 0x212924 CMP %RDX,%RDI |
(120) 0x212927 MOVZX -0x29(%RBP),%EDI |
(120) 0x21292b SETB %DL |
(120) 0x21292e CMP %RAX,%R8 |
(120) 0x212931 SETB %R8B |
(120) 0x212935 TEST %DIL,-0x2a(%RBP) |
(120) 0x212939 JNE 21295c |
(120) 0x21293b AND %R8B,%DL |
(120) 0x21293e MOV -0x58(%RBP),%RDI |
(120) 0x212942 MOV -0x40(%RBP),%R8 |
(120) 0x212946 JNE 212b80 |
(120) 0x21294c LEA 0x1(%RCX),%RDX |
(120) 0x212950 CMP $0x7,%ECX |
(120) 0x212953 JAE 212969 |
(120) 0x212955 XOR %ECX,%ECX |
(120) 0x212957 JMP 212a9b |
(120) 0x21295c MOV -0x58(%RBP),%RDI |
(120) 0x212960 MOV -0x40(%RBP),%R8 |
(120) 0x212964 JMP 212b80 |
(120) 0x212969 LEA (,%R13,8),%RAX |
(120) 0x212971 MOV %RDX,%RCX |
(120) 0x212974 AND $-0x8,%RCX |
(120) 0x212978 MOV %RCX,%R8 |
(120) 0x21297b LEA (%RAX,%RAX,2),%R14 |
(120) 0x21297f NOP |
(122) 0x212980 VMOVUPD (%R12,%R14,1),%ZMM18 |
(122) 0x212987 VMOVUPD 0x40(%R12,%R14,1),%ZMM19 |
(122) 0x21298f VMOVUPD 0x40(%R15,%R14,1),%ZMM26 |
(122) 0x212997 VMOVUPD 0x80(%R12,%R14,1),%ZMM20 |
(122) 0x21299f VMOVUPD 0x80(%R15,%R14,1),%ZMM23 |
(122) 0x2129a7 VBROADCASTSD (%RBX),%ZMM17 |
(122) 0x2129ad VMOVAPD %ZMM18,%ZMM21 |
(122) 0x2129b3 VPERMT2PD %ZMM19,%ZMM5,%ZMM21 |
(122) 0x2129b9 VMOVAPD %ZMM18,%ZMM22 |
(122) 0x2129bf VPERMT2PD %ZMM19,%ZMM7,%ZMM22 |
(122) 0x2129c5 VPERMT2PD %ZMM18,%ZMM9,%ZMM19 |
(122) 0x2129cb VMOVUPD (%R15,%R14,1),%ZMM18 |
(122) 0x2129d2 VPERMT2PD %ZMM20,%ZMM6,%ZMM21 |
(122) 0x2129d8 VPERMT2PD %ZMM20,%ZMM8,%ZMM22 |
(122) 0x2129de VPERMT2PD %ZMM20,%ZMM10,%ZMM19 |
(122) 0x2129e4 VMOVAPD %ZMM18,%ZMM24 |
(122) 0x2129ea VPERMT2PD %ZMM26,%ZMM5,%ZMM24 |
(122) 0x2129f0 VMOVAPD %ZMM18,%ZMM25 |
(122) 0x2129f6 VPERMT2PD %ZMM26,%ZMM7,%ZMM25 |
(122) 0x2129fc VPERMT2PD %ZMM18,%ZMM9,%ZMM26 |
(122) 0x212a02 VPERMT2PD %ZMM23,%ZMM6,%ZMM24 |
(122) 0x212a08 VPERMT2PD %ZMM23,%ZMM8,%ZMM25 |
(122) 0x212a0e VPERMT2PD %ZMM23,%ZMM10,%ZMM26 |
(122) 0x212a14 VFMADD231PD %ZMM21,%ZMM17,%ZMM24 |
(122) 0x212a1a VFMADD231PD %ZMM22,%ZMM17,%ZMM25 |
(122) 0x212a20 VFMADD231PD %ZMM19,%ZMM17,%ZMM26 |
(122) 0x212a26 VMOVAPD %ZMM25,%ZMM17 |
(122) 0x212a2c VPERMT2PD %ZMM24,%ZMM11,%ZMM17 |
(122) 0x212a32 VMOVAPD %ZMM24,%ZMM18 |
(122) 0x212a38 VPERMT2PD %ZMM25,%ZMM13,%ZMM18 |
(122) 0x212a3e VPERMT2PD %ZMM25,%ZMM15,%ZMM24 |
(122) 0x212a44 VPERMT2PD %ZMM26,%ZMM12,%ZMM17 |
(122) 0x212a4a VPERMT2PD %ZMM26,%ZMM14,%ZMM18 |
(122) 0x212a50 VPERMT2PD %ZMM26,%ZMM16,%ZMM24 |
(122) 0x212a56 VMOVUPD %ZMM24,(%R15,%R14,1) |
(122) 0x212a5d VMOVUPD %ZMM18,0x40(%R15,%R14,1) |
(122) 0x212a65 VMOVUPD %ZMM17,0x80(%R15,%R14,1) |
(122) 0x212a6d ADD $0xc0,%R14 |
(122) 0x212a74 ADD $-0x8,%R8 |
(122) 0x212a78 JNE 212980 |
(120) 0x212a7e MOV -0x40(%RBP),%R8 |
(120) 0x212a82 CMP %RCX,%RDX |
(120) 0x212a85 JE 2128a0 |
(120) 0x212a8b TEST $0x4,%DL |
(120) 0x212a8e JNE 212a9b |
(120) 0x212a90 ADD %RCX,%R13 |
(120) 0x212a93 MOV %ECX,%R14D |
(120) 0x212a96 JMP 212b80 |
(120) 0x212a9b MOV %RCX,%R8 |
(120) 0x212a9e ADD %R13,%RCX |
(120) 0x212aa1 MOV %RDX,%R14 |
(120) 0x212aa4 AND $-0x4,%R14 |
(120) 0x212aa8 SAL $0x3,%RCX |
(120) 0x212aac LEA (%R14,%R13,1),%RAX |
(120) 0x212ab0 SUB %R14,%R8 |
(120) 0x212ab3 LEA (%RCX,%RCX,2),%RCX |
(120) 0x212ab7 NOPW (%RAX,%RAX,1) |
(123) 0x212ac0 VMOVUPD (%R12,%RCX,1),%ZMM18 |
(123) 0x212ac7 VMOVUPD 0x40(%R12,%RCX,1),%YMM19 |
(123) 0x212acf VMOVUPD 0x40(%R15,%RCX,1),%YMM22 |
(123) 0x212ad7 VBROADCASTSD (%RBX),%YMM17 |
(123) 0x212add VMOVAPD %ZMM18,%ZMM20 |
(123) 0x212ae3 VMOVAPD %ZMM18,%ZMM21 |
(123) 0x212ae9 VPERMT2PD %ZMM19,%ZMM0,%ZMM20 |
(123) 0x212aef VPERMT2PD %ZMM19,%ZMM1,%ZMM21 |
(123) 0x212af5 VPERMT2PD %ZMM19,%ZMM2,%ZMM18 |
(123) 0x212afb VMOVUPD (%R15,%RCX,1),%ZMM19 |
(123) 0x212b02 VMOVAPD %ZMM19,%ZMM23 |
(123) 0x212b08 VPERMT2PD %ZMM22,%ZMM0,%ZMM23 |
(123) 0x212b0e VMOVAPD %ZMM19,%ZMM24 |
(123) 0x212b14 VPERMT2PD %ZMM22,%ZMM1,%ZMM24 |
(123) 0x212b1a VPERMT2PD %ZMM22,%ZMM2,%ZMM19 |
(123) 0x212b20 VFMADD231PD %YMM20,%YMM17,%YMM23 |
(123) 0x212b26 VFMADD231PD %YMM21,%YMM17,%YMM24 |
(123) 0x212b2c VFMADD231PD %YMM18,%YMM17,%YMM19 |
(123) 0x212b32 VINSERTF64X4 $0x1,%YMM24,%ZMM23,%ZMM17 |
(123) 0x212b39 VMOVAPD %ZMM17,%ZMM18 |
(123) 0x212b3f VPERMT2PD %ZMM19,%ZMM3,%ZMM18 |
(123) 0x212b45 VPERMT2PD %ZMM19,%ZMM4,%ZMM17 |
(123) 0x212b4b VMOVUPD %ZMM17,(%R15,%RCX,1) |
(123) 0x212b52 VMOVUPD %YMM18,0x40(%R15,%RCX,1) |
(123) 0x212b5a ADD $0x60,%RCX |
(123) 0x212b5e ADD $0x4,%R8 |
(123) 0x212b62 JNE 212ac0 |
(120) 0x212b68 MOV -0x40(%RBP),%R8 |
(120) 0x212b6c MOV %RAX,%R13 |
(120) 0x212b6f CMP %R14,%RDX |
(120) 0x212b72 JE 2128a0 |
(120) 0x212b78 NOPL (%RAX,%RAX,1) |
(120) 0x212b80 LEA (%R13,%R13,2),%RAX |
(120) 0x212b85 SUB %R14D,%R11D |
(120) 0x212b88 LEA 0x10(,%RAX,8),%RCX |
(121) 0x212b90 VMOVSD (%RBX),%XMM17 |
(121) 0x212b96 VMOVSD -0x10(%R12,%RCX,1),%XMM18 |
(121) 0x212b9e VFMADD213SD -0x10(%R15,%RCX,1),%XMM17,%XMM18 |
(121) 0x212ba6 VMOVSD %XMM18,-0x10(%R15,%RCX,1) |
(121) 0x212bae VMOVSD (%RBX),%XMM17 |
(121) 0x212bb4 VMOVSD -0x8(%R12,%RCX,1),%XMM18 |
(121) 0x212bbc VFMADD213SD -0x8(%R15,%RCX,1),%XMM17,%XMM18 |
(121) 0x212bc4 VMOVSD %XMM18,-0x8(%R15,%RCX,1) |
(121) 0x212bcc VMOVSD (%RBX),%XMM17 |
(121) 0x212bd2 VMOVSD (%R12,%RCX,1),%XMM18 |
(121) 0x212bd9 VFMADD213SD (%R15,%RCX,1),%XMM17,%XMM18 |
(121) 0x212be0 VMOVSD %XMM18,(%R15,%RCX,1) |
(121) 0x212be7 ADD $0x18,%RCX |
(121) 0x212beb DEC %R11D |
(121) 0x212bee JNE 212b90 |
(120) 0x212bf0 JMP 2128a0 |
0x212bf5 INT $0x3 |
0x212bf6 INT $0x3 |
0x212bf7 INT $0x3 |
0x212bf8 INT $0x3 |
0x212bf9 INT $0x3 |
0x212bfa INT $0x3 |
0x212bfb INT $0x3 |
0x212bfc INT $0x3 |
0x212bfd INT $0x3 |
0x212bfe INT $0x3 |
0x212bff INT $0x3 |
Path / |
Source file and lines | timestep.c:71-78 |
Module | exec |
nb instructions | 95 |
nb uops | 85 |
loop length | 395 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 4 |
used zmm registers | 13 |
nb stack references | 10 |
micro-operation queue | 14.17 cycles |
front end | 14.17 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.75 | 5.75 | 5.75 | 5.75 | 3.00 | 13.00 | 13.00 | 13.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 5.75 | 5.75 | 5.75 | 5.75 | 3.00 | 17.33 | 17.33 | 17.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 14.17 |
Dispatch | 17.33 |
Overall L1 | 17.33 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 42% |
load | 77% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 8% |
load | 8% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 88% |
load | 88% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 40% |
load | 70% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x48,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RDX),%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %R14D,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 2127b7 <.omp_outlined..244+0x97> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
DEC %R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVL $0,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVL $0x1,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVL $0,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14D,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB $0x8,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x4c(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x48(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x34(%RBP),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x30(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV $0x2059e8,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %ESI,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV $0x22,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CALL 213530 <@plt_start@+0x130> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x20,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %R14D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVL %EAX,%R14D | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVSXD -0x34(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %R14D,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R14D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 2127c6 <.omp_outlined..244+0xa6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x44(%RBP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV $0x205a00,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 213540 <@plt_start@+0x140> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x48,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVAPD -0x10751(%RIP),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD -0x10799(%RIP),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD -0x10781(%RIP),%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD -0x10729(%RIP),%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD -0xfd33(%RIP),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0x1003d(%RIP),%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0x10007(%RIP),%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xffd1(%RIP),%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xff9b(%RIP),%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xff65(%RIP),%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xff2f(%RIP),%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfef9(%RIP),%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfec3(%RIP),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfe8d(%RIP),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfe57(%RIP),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfe21(%RIP),%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfdeb(%RIP),%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVSXD %R14D,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA 0x8(%RBX),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x18(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R10D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%ESI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x78(%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R8,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 2128b7 <.omp_outlined..244+0x197> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 |
Source file and lines | timestep.c:71-78 |
Module | exec |
nb instructions | 95 |
nb uops | 85 |
loop length | 395 |
used x86 registers | 15 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 4 |
used zmm registers | 13 |
nb stack references | 10 |
micro-operation queue | 14.17 cycles |
front end | 14.17 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 5.75 | 5.75 | 5.75 | 5.75 | 3.00 | 13.00 | 13.00 | 13.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 5.75 | 5.75 | 5.75 | 5.75 | 3.00 | 17.33 | 17.33 | 17.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | NA |
Front-end | 14.17 |
Dispatch | 17.33 |
Overall L1 | 17.33 |
all | 4% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 100% |
load | 100% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 42% |
load | 77% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 8% |
load | 8% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 8% |
all | 88% |
load | 88% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 40% |
load | 70% |
store | 9% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 8% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
PUSH %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
SUB $0x48,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV (%RDX),%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
TEST %R14D,%R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 2127b7 <.omp_outlined..244+0x97> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV (%RDI),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
DEC %R14D | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %R8,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVL $0,-0x34(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVL $0x1,-0x4c(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOVL $0,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R14D,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SUB $0x8,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x4c(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x48(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x34(%RBP),%R8 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA -0x30(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV $0x2059e8,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %ESI,-0x44(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV $0x22,%EDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH $0x1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
PUSH %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
CALL 213530 <@plt_start@+0x130> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x20,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV -0x30(%RBP),%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
CMP %R14D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMOVL %EAX,%R14D | 1 | 0.50 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOVSXD -0x34(%RBP),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %R14D,-0x30(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %RAX,-0x60(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
CMP %R14D,%EAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JLE 2127c6 <.omp_outlined..244+0xa6> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV -0x44(%RBP),%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV $0x205a00,%EDI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
VZEROUPPER | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
CALL 213540 <@plt_start@+0x140> | 2 | 0.50 | 0 | 0 | 0 | 0.50 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
ADD $0x48,%RSP | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
POP %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
RET | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV (%R15),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
VMOVAPD -0x10751(%RIP),%YMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD -0x10799(%RIP),%YMM1 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD -0x10781(%RIP),%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD -0x10729(%RIP),%YMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
VMOVAPD -0xfd33(%RIP),%ZMM4 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0x1003d(%RIP),%ZMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0x10007(%RIP),%ZMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xffd1(%RIP),%ZMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xff9b(%RIP),%ZMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xff65(%RIP),%ZMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xff2f(%RIP),%ZMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfef9(%RIP),%ZMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfec3(%RIP),%ZMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfe8d(%RIP),%ZMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfe57(%RIP),%ZMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfe21(%RIP),%ZMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVAPD -0xfdeb(%RIP),%ZMM16 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x60(%RBP),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOVSXD %R14D,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA 0x8(%RBX),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0x68(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x18(%RDI),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R10D,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x6,%ESI | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x58(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV 0x78(%RCX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %R8,-0x40(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
JMP 2128b7 <.omp_outlined..244+0x197> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
NOPL (%RAX) | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.09 |
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 | |||||||||||||||||
INT $0x3 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼.omp_outlined..244– | 1.22 | 0.14 |
▼Loop 120 - timestep.c:72-78 - exec– | 0.01 | 0 |
○Loop 122 - timestep.c:74-78 - exec | 1.16 | 0.13 |
○Loop 121 - timestep.c:74-78 - exec | 0.04 | 0.01 |
○Loop 123 - timestep.c:74-78 - exec | 0.02 | 0 |