Loop Id: 2118 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.05% |
---|
Loop Id: 2118 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.05% |
---|
0x4c4770 MOV 0xb8(%RSP),%RBX |
0x4c4778 MOV 0xe8(%RSP),%R9 |
0x4c4780 MOV %RDX,0xd8(%RSP) |
0x4c4788 XOR %ESI,%ESI |
0x4c478a MOV 0xb0(%RSP),%R8 |
0x4c4792 MOV %RAX,0xd0(%RSP) |
0x4c479a LEA (%RDX,%RBX,1),%R10 |
0x4c479e LEA (%R9,%R10,8),%R12 |
0x4c47a2 LEA (%R8,%RAX,1),%R14 |
0x4c47a6 MOV %R12,0x118(%RSP) |
0x4c47ae XCHG %AX,%AX |
(2117) 0x4c47b0 MOV 0xf0(%RSP),%RAX |
(2117) 0x4c47b8 MOV 0xf8(%RSP),%RCX |
(2117) 0x4c47c0 MOV (%RAX,%RSI,8),%RDX |
(2117) 0x4c47c4 MOVSXD (%RCX,%RSI,4),%R9 |
(2117) 0x4c47c8 LEA (%R9,%RDX,1),%RBX |
(2117) 0x4c47cc MOV %R9,%R12 |
(2117) 0x4c47cf CMP %RBX,%RDX |
(2117) 0x4c47d2 JGE 4c4b50 |
(2117) 0x4c47d8 LEA -0x1(%R9),%R11 |
(2117) 0x4c47dc CMP $0x2,%R11 |
(2117) 0x4c47e0 JBE 4c4b59 |
(2117) 0x4c47e6 MOV %R9,%R11 |
(2117) 0x4c47e9 LEA (,%RDX,8),%RCX |
(2117) 0x4c47f1 XOR %EAX,%EAX |
(2117) 0x4c47f3 XOR %EDI,%EDI |
(2117) 0x4c47f5 SHR $0x2,%R11 |
(2117) 0x4c47f9 LEA (%R15,%RCX,1),%R8 |
(2117) 0x4c47fd VXORPD %XMM0,%XMM0,%XMM0 |
(2117) 0x4c4801 ADD %R13,%RCX |
(2117) 0x4c4804 MOV %R11,%R10 |
(2117) 0x4c4807 AND $0x3,%R10D |
(2117) 0x4c480b JE 4c4b40 |
(2117) 0x4c4811 CMP $0x1,%R10 |
(2117) 0x4c4815 JE 4c48ae |
(2117) 0x4c481b CMP $0x2,%R10 |
(2117) 0x4c481f JE 4c4868 |
(2117) 0x4c4821 VMOVDQU (%R8),%YMM5 |
(2117) 0x4c4826 VMOVAPD %YMM2,%YMM12 |
(2117) 0x4c482a MOV $0x20,%EAX |
(2117) 0x4c482f MOV 0x118(%RSP),%RDI |
(2117) 0x4c4837 VPSRLQ $0x20,%YMM5,%YMM4 |
(2117) 0x4c483c VPMULUDQ %YMM5,%YMM3,%YMM8 |
(2117) 0x4c4840 VPMULUDQ %YMM1,%YMM4,%YMM7 |
(2117) 0x4c4844 VPMULUDQ %YMM1,%YMM5,%YMM6 |
(2117) 0x4c4848 VPADDQ %YMM8,%YMM7,%YMM9 |
(2117) 0x4c484d VPSLLQ $0x20,%YMM9,%YMM10 |
(2117) 0x4c4853 VPADDQ %YMM10,%YMM6,%YMM11 |
(2117) 0x4c4858 VGATHERQPD %YMM12,(%RDI,%YMM11,8),%YMM13 |
(2117) 0x4c485e VFMADD231PD (%RCX),%YMM13,%YMM0 |
(2117) 0x4c4863 MOV $0x1,%EDI |
(2117) 0x4c4868 VMOVDQU (%R8,%RAX,1),%YMM14 |
(2117) 0x4c486e MOV 0x118(%RSP),%R10 |
(2117) 0x4c4876 VMOVAPD %YMM2,%YMM10 |
(2117) 0x4c487a INC %RDI |
(2117) 0x4c487d VPSRLQ $0x20,%YMM14,%YMM5 |
(2117) 0x4c4883 VPMULUDQ %YMM14,%YMM3,%YMM4 |
(2117) 0x4c4888 VPMULUDQ %YMM1,%YMM5,%YMM6 |
(2117) 0x4c488c VPMULUDQ %YMM1,%YMM14,%YMM15 |
(2117) 0x4c4890 VPADDQ %YMM4,%YMM6,%YMM7 |
(2117) 0x4c4894 VPSLLQ $0x20,%YMM7,%YMM8 |
(2117) 0x4c4899 VPADDQ %YMM8,%YMM15,%YMM9 |
(2117) 0x4c489e VGATHERQPD %YMM10,(%R10,%YMM9,8),%YMM11 |
(2117) 0x4c48a4 VFMADD231PD (%RCX,%RAX,1),%YMM11,%YMM0 |
(2117) 0x4c48aa ADD $0x20,%RAX |
(2117) 0x4c48ae VMOVDQU (%R8,%RAX,1),%YMM12 |
(2117) 0x4c48b4 MOV 0x118(%RSP),%R10 |
(2117) 0x4c48bc VMOVAPD %YMM2,%YMM8 |
(2117) 0x4c48c0 INC %RDI |
(2117) 0x4c48c3 VPSRLQ $0x20,%YMM12,%YMM14 |
(2117) 0x4c48c9 VPMULUDQ %YMM12,%YMM3,%YMM5 |
(2117) 0x4c48ce VPMULUDQ %YMM1,%YMM14,%YMM15 |
(2117) 0x4c48d2 VPMULUDQ %YMM1,%YMM12,%YMM13 |
(2117) 0x4c48d6 VPADDQ %YMM5,%YMM15,%YMM6 |
(2117) 0x4c48da VPSLLQ $0x20,%YMM6,%YMM4 |
(2117) 0x4c48df VPADDQ %YMM4,%YMM13,%YMM7 |
(2117) 0x4c48e3 VGATHERQPD %YMM8,(%R10,%YMM7,8),%YMM9 |
(2117) 0x4c48e9 VFMADD231PD (%RCX,%RAX,1),%YMM9,%YMM0 |
(2117) 0x4c48ef ADD $0x20,%RAX |
(2117) 0x4c48f3 CMP %R11,%RDI |
(2117) 0x4c48f6 JE 4c49fa |
(2120) 0x4c48fc VMOVDQU (%R8,%RAX,1),%YMM10 |
(2120) 0x4c4902 VMOVDQU 0x20(%R8,%RAX,1),%YMM8 |
(2120) 0x4c4909 VMOVAPD %YMM2,%YMM7 |
(2120) 0x4c490d ADD $0x4,%RDI |
(2120) 0x4c4911 VPSRLQ $0x20,%YMM10,%YMM12 |
(2120) 0x4c4917 VPMULUDQ %YMM10,%YMM3,%YMM14 |
(2120) 0x4c491c VPMULUDQ %YMM1,%YMM12,%YMM13 |
(2120) 0x4c4920 VPMULUDQ %YMM1,%YMM10,%YMM11 |
(2120) 0x4c4924 VPSRLQ $0x20,%YMM8,%YMM10 |
(2120) 0x4c492a VPMULUDQ %YMM8,%YMM3,%YMM12 |
(2120) 0x4c492f VPMULUDQ %YMM1,%YMM8,%YMM9 |
(2120) 0x4c4933 VPADDQ %YMM14,%YMM13,%YMM15 |
(2120) 0x4c4938 VPSLLQ $0x20,%YMM15,%YMM5 |
(2120) 0x4c493e VPADDQ %YMM5,%YMM11,%YMM6 |
(2120) 0x4c4942 VPMULUDQ %YMM1,%YMM10,%YMM11 |
(2120) 0x4c4946 VMOVAPD %YMM2,%YMM5 |
(2120) 0x4c494a VGATHERQPD %YMM7,(%R10,%YMM6,8),%YMM4 |
(2120) 0x4c4950 VFMADD231PD (%RCX,%RAX,1),%YMM4,%YMM0 |
(2120) 0x4c4956 VMOVDQU 0x40(%R8,%RAX,1),%YMM7 |
(2120) 0x4c495d VPMULUDQ %YMM7,%YMM3,%YMM4 |
(2120) 0x4c4961 VPMULUDQ %YMM1,%YMM7,%YMM8 |
(2120) 0x4c4965 VPADDQ %YMM12,%YMM11,%YMM13 |
(2120) 0x4c496a VPSLLQ $0x20,%YMM13,%YMM14 |
(2120) 0x4c4970 VMOVAPD %YMM2,%YMM13 |
(2120) 0x4c4974 VPADDQ %YMM14,%YMM9,%YMM15 |
(2120) 0x4c4979 VGATHERQPD %YMM5,(%R10,%YMM15,8),%YMM6 |
(2120) 0x4c497f VFMADD132PD 0x20(%RCX,%RAX,1),%YMM0,%YMM6 |
(2120) 0x4c4986 VMOVDQU 0x60(%R8,%RAX,1),%YMM15 |
(2120) 0x4c498d VPSRLQ $0x20,%YMM7,%YMM0 |
(2120) 0x4c4992 VPMULUDQ %YMM1,%YMM0,%YMM9 |
(2120) 0x4c4996 VPMULUDQ %YMM1,%YMM15,%YMM5 |
(2120) 0x4c499a VPADDQ %YMM4,%YMM9,%YMM10 |
(2120) 0x4c499e VPSLLQ $0x20,%YMM10,%YMM11 |
(2120) 0x4c49a4 VMOVAPD %YMM2,%YMM10 |
(2120) 0x4c49a8 VPADDQ %YMM11,%YMM8,%YMM12 |
(2120) 0x4c49ad VPMULUDQ %YMM15,%YMM3,%YMM8 |
(2120) 0x4c49b2 VGATHERQPD %YMM13,(%R10,%YMM12,8),%YMM14 |
(2120) 0x4c49b8 VFMADD132PD 0x40(%RCX,%RAX,1),%YMM6,%YMM14 |
(2120) 0x4c49bf VPSRLQ $0x20,%YMM15,%YMM6 |
(2120) 0x4c49c5 VPMULUDQ %YMM1,%YMM6,%YMM7 |
(2120) 0x4c49c9 VPADDQ %YMM8,%YMM7,%YMM0 |
(2120) 0x4c49ce VPSLLQ $0x20,%YMM0,%YMM9 |
(2120) 0x4c49d3 VPADDQ %YMM9,%YMM5,%YMM4 |
(2120) 0x4c49d8 VGATHERQPD %YMM10,(%R10,%YMM4,8),%YMM0 |
(2120) 0x4c49de VFMADD132PD 0x60(%RCX,%RAX,1),%YMM14,%YMM0 |
(2120) 0x4c49e5 SUB $-0x80,%RAX |
(2120) 0x4c49e9 CMP %R11,%RDI |
(2120) 0x4c49ec JNE 4c48fc |
(2117) 0x4c49f2 MOV %R10,0x118(%RSP) |
(2117) 0x4c49fa VEXTRACTF128 $0x1,%YMM0,%XMM11 |
(2117) 0x4c4a00 AND $0x3,%R12D |
(2117) 0x4c4a04 VADDPD %XMM0,%XMM11,%XMM12 |
(2117) 0x4c4a08 VUNPCKHPD %XMM12,%XMM12,%XMM13 |
(2117) 0x4c4a0d VADDPD %XMM12,%XMM13,%XMM0 |
(2117) 0x4c4a12 JE 4c4a8f |
(2117) 0x4c4a14 AND $-0x4,%R9 |
(2117) 0x4c4a18 ADD %R9,%RDX |
(2117) 0x4c4a1b MOV 0xe0(%RSP),%R12 |
(2117) 0x4c4a23 MOV (%R15,%RDX,8),%RCX |
(2117) 0x4c4a27 LEA 0x1(%RDX),%R8 |
(2117) 0x4c4a2b LEA (,%RDX,8),%R9 |
(2117) 0x4c4a33 MOV 0xe8(%RSP),%R11 |
(2117) 0x4c4a3b VMOVSD (%R13,%RDX,8),%XMM14 |
(2117) 0x4c4a42 IMUL %R12,%RCX |
(2117) 0x4c4a46 ADD %R14,%RCX |
(2117) 0x4c4a49 VFMADD231SD (%R11,%RCX,8),%XMM14,%XMM0 |
(2117) 0x4c4a4f CMP %R8,%RBX |
(2117) 0x4c4a52 JLE 4c4a8f |
(2117) 0x4c4a54 MOV 0x8(%R15,%R9,1),%RDI |
(2117) 0x4c4a59 ADD $0x2,%RDX |
(2117) 0x4c4a5d IMUL %R12,%RDI |
(2117) 0x4c4a61 ADD %R14,%RDI |
(2117) 0x4c4a64 VMOVSD (%R11,%RDI,8),%XMM15 |
(2117) 0x4c4a6a VFMADD231SD 0x8(%R13,%R9,1),%XMM15,%XMM0 |
(2117) 0x4c4a71 CMP %RDX,%RBX |
(2117) 0x4c4a74 JLE 4c4a8f |
(2117) 0x4c4a76 IMUL 0x10(%R15,%R9,1),%R12 |
(2117) 0x4c4a7c MOV %R12,%RDI |
(2117) 0x4c4a7f ADD %R14,%RDI |
(2117) 0x4c4a82 VMOVSD (%R11,%RDI,8),%XMM5 |
(2117) 0x4c4a88 VFMADD231SD 0x10(%R13,%R9,1),%XMM5,%XMM0 |
(2117) 0x4c4a8f MOV 0x100(%RSP),%RBX |
(2117) 0x4c4a97 MOV 0x110(%RSP),%RDX |
(2117) 0x4c4a9f MOV 0x108(%RSP),%RAX |
(2117) 0x4c4aa7 VMOVSD (%RBX,%RSI,8),%XMM6 |
(2117) 0x4c4aac VFMADD132SD (%RDX,%RSI,8),%XMM6,%XMM0 |
(2117) 0x4c4ab2 VMOVSD %XMM0,(%RBX,%RSI,8) |
(2117) 0x4c4ab7 INC %RSI |
(2117) 0x4c4aba CMP %RAX,%RSI |
(2117) 0x4c4abd JNE 4c47b0 |
0x4c4ac3 MOV 0xd8(%RSP),%RDX |
0x4c4acb MOV 0xd0(%RSP),%RAX |
0x4c4ad3 MOV 0xc8(%RSP),%RSI |
0x4c4adb ADD %RSI,0x110(%RSP) |
0x4c4ae3 INC %RAX |
0x4c4ae6 INC %RDX |
0x4c4ae9 CMP %RAX,0xc0(%RSP) |
0x4c4af1 JNE 4c4770 |
(2117) 0x4c4b40 MOV 0x118(%RSP),%R10 |
(2117) 0x4c4b48 JMP 4c48fc |
(2117) 0x4c4b50 VXORPD %XMM0,%XMM0,%XMM0 |
(2117) 0x4c4b54 JMP 4c4a8f |
(2117) 0x4c4b59 VXORPD %XMM0,%XMM0,%XMM0 |
(2117) 0x4c4b5d JMP 4c4a1b |
/scratch_na/users/xoserete/qaas_runs/171-291-3153/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 110 - 110 |
-------------------------------------------------------------------------------- |
110: return data[idx]; |
/scratch_na/users/xoserete/qaas_runs/171-291-3153/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/scratch_na/users/xoserete/qaas_runs/171-291-3153/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/Layout.hpp: 55 - 55 |
-------------------------------------------------------------------------------- |
55: return a * b; |
/scratch_na/users/xoserete/qaas_runs/171-291-3153/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 81 - 81 |
-------------------------------------------------------------------------------- |
81: #pragma omp parallel for private(i0, i1) firstprivate(privatizer) \ |
/scratch_na/users/xoserete/qaas_runs/171-291-3153/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/index/IndexValue.hpp: 83 - 105 |
-------------------------------------------------------------------------------- |
83: value++; |
[...] |
105: return TYPE(value + a); |
/scratch_na/users/xoserete/qaas_runs/171-291-3153/intel/Kripke/build/Kripke/src/Kripke/Kernel/Scattering.cpp: 87 - 97 |
-------------------------------------------------------------------------------- |
87: MixElem mix_start = zone_to_mixelem(z); |
88: MixElem mix_stop = mix_start + zone_to_num_mixelem(z); |
89: |
90: double sigs_z = 0.0; |
91: for(MixElem mix = mix_start;mix < mix_stop;++ mix){ |
92: Material mat = mixelem_to_material(mix); |
93: double fraction = mixelem_to_fraction(mix); |
94: |
95: sigs_z += sigs(mat, n, global_g, global_gp) * fraction; |
96: } |
97: phi_out(nm, g, z) += sigs_z * phi(nm, gp, z); |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 12.67 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.19 |
Bottlenecks | micro-operation queue, |
Function | void RAJA::internal::StatementExecutor |
Source | View.hpp:110-110,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.17 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.25 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.40 |
P1 cycles | 2.67 |
P2 cycles | 2.67 |
P3 cycles | 2.00 |
P4 cycles | 0.40 |
P5 cycles | 0.50 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.20 |
P10 cycles | 2.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.46 |
Stall cycles (UFS) | 0.00 |
Nb insns | 19.00 |
Nb uops | 19.00 |
Nb loads | 8.00 |
Nb stores | 4.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 30.32 |
Bytes prefetched | 0.00 |
Bytes loaded | 64.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 11.46 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.25 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 12.67 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.19 |
Bottlenecks | micro-operation queue, |
Function | void RAJA::internal::StatementExecutor |
Source | View.hpp:110-110,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 3.17 |
CQA cycles if no scalar integer | 3.17 |
CQA cycles if FP arith vectorized | 3.17 |
CQA cycles if fully vectorized | 0.25 |
Front-end cycles | 3.17 |
DIV/SQRT cycles | 0.50 |
P0 cycles | 0.40 |
P1 cycles | 2.67 |
P2 cycles | 2.67 |
P3 cycles | 2.00 |
P4 cycles | 0.40 |
P5 cycles | 0.50 |
P6 cycles | 2.00 |
P7 cycles | 2.00 |
P8 cycles | 2.00 |
P9 cycles | 0.20 |
P10 cycles | 2.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 3.46 |
Stall cycles (UFS) | 0.00 |
Nb insns | 19.00 |
Nb uops | 19.00 |
Nb loads | 8.00 |
Nb stores | 4.00 |
Nb stack references | 9.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 30.32 |
Bytes prefetched | 0.00 |
Bytes loaded | 64.00 |
Bytes stored | 32.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 11.46 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 6.25 |
Path / |
nb instructions | 19 |
nb uops | 19 |
loop length | 116 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.40 | 2.67 | 2.67 | 2.00 | 0.40 | 0.50 | 2.00 | 2.00 | 2.00 | 0.20 | 2.67 |
cycles | 0.50 | 0.40 | 2.67 | 2.67 | 2.00 | 0.40 | 0.50 | 2.00 | 2.00 | 2.00 | 0.20 | 2.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.46 |
Stall cycles | 0.00 |
Front-end | 3.17 |
Dispatch | 2.67 |
Overall L1 | 3.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0xb8(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xb0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDX,%RBX,1),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R9,%R10,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%RAX,1),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,0x110(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,0xc0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4c4770 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_5GroupElPSW_EESW_EESZ_NSO_INSQ_INSR_4ZoneElPS10_EES10_EEEEENSM_IJEEEJZNK14ScatteringSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdES1D_RKNSR_4Core3SetES1H_S1H_RNS1E_5FieldIdJSS_SW_S10_EEES1K_RNS1I_IdJNSR_8MaterialENSR_8LegendreENSR_11GlobalGroupES1N_EEERNS1I_INSR_7MixElemEJS10_EEERNS1I_IiJS10_EEERNS1I_IS1L_JS1Q_EEERNS1I_IdJS1Q_EEERNS1I_IS1M_JSS_EEEEUlSS_SW_SW_S10_E_EEEEEvOS1C_._omp_fn.0+0x340> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
nb instructions | 19 |
nb uops | 19 |
loop length | 116 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 9 |
micro-operation queue | 3.17 cycles |
front end | 3.17 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 0.50 | 0.40 | 2.67 | 2.67 | 2.00 | 0.40 | 0.50 | 2.00 | 2.00 | 2.00 | 0.20 | 2.67 |
cycles | 0.50 | 0.40 | 2.67 | 2.67 | 2.00 | 0.40 | 0.50 | 2.00 | 2.00 | 2.00 | 0.20 | 2.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 3.46 |
Stall cycles | 0.00 |
Front-end | 3.17 |
Dispatch | 2.67 |
Overall L1 | 3.17 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 6% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV 0xb8(%RSP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xe8(%RSP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RDX,0xd8(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XOR %ESI,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xb0(%RSP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,0xd0(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
LEA (%RDX,%RBX,1),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R9,%R10,8),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R8,%RAX,1),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R12,0x118(%RSP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0xd8(%RSP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xd0(%RSP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0xc8(%RSP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,0x110(%RSP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,0xc0(%RSP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JNE 4c4770 <_ZN4RAJA8internal17StatementExecutorINS_9statement8CollapseINS_26omp_parallel_collapse_execEN4camp7int_seqIlJLl0ELl1EEEEJNS2_3ForILl2ENS_6policy4loop9loop_execEJNS8_ILl3ESB_JNS2_6LambdaILl0EJEEEEEEEEEEEEE4execIRNS0_8LoopDataINS5_4listIJSG_EEENS5_5tupleIJNS_4impl4SpanINS_9Iterators16numeric_iteratorIN6Kripke6MomentElPSS_EESS_EENSO_INSQ_INSR_5GroupElPSW_EESW_EESZ_NSO_INSQ_INSR_4ZoneElPS10_EES10_EEEEENSM_IJEEEJZNK14ScatteringSdomclINSR_11ArchLayoutTINSR_12ArchT_OpenMPENSR_11LayoutT_DGZEEEEEvT_NSR_6SdomIdES1D_RKNSR_4Core3SetES1H_S1H_RNS1E_5FieldIdJSS_SW_S10_EEES1K_RNS1I_IdJNSR_8MaterialENSR_8LegendreENSR_11GlobalGroupES1N_EEERNS1I_INSR_7MixElemEJS10_EEERNS1I_IiJS10_EEERNS1I_IS1L_JS1Q_EEERNS1I_IdJS1Q_EEERNS1I_IS1M_JSS_EEEEUlSS_SW_SW_S10_E_EEEEEvOS1C_._omp_fn.0+0x340> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |