Loop Id: 866 | Module: libkripke.so | Source: forall.hpp:59-59 [...] | Coverage: 2.76% |
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Loop Id: 866 | Module: libkripke.so | Source: forall.hpp:59-59 [...] | Coverage: 2.76% |
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0x642f0 MOV -0x2a0(%RBP),%R9 [9] |
0x642f7 ADD %R8,%R9 |
0x642fa ADD %R10,%R9 |
0x642fd ADD %RSI,%R9 |
0x64300 VMOVUPD (%RBX,%R8,8),%YMM13 [8] |
0x64306 VFMADD213PD (%RDX,%R8,8),%YMM5,%YMM13 [2] |
0x6430c MOV -0x130(%RBP),%R15 [9] |
0x64313 ADD %R9,%R15 |
0x64316 VFMADD231PD (%R12,%R15,8),%YMM6,%YMM13 [5] |
0x6431c LEA (%R9,%R11,1),%R15 |
0x64320 VFMADD231PD (%R12,%R15,8),%YMM7,%YMM13 [10] |
0x64326 LEA (%R9,%RDI,1),%R15 |
0x6432a VFMADD231PD (%R12,%R15,8),%YMM8,%YMM13 [1] |
0x64330 LEA (%R9,%RAX,1),%R15 |
0x64334 VFMADD231PD (%R12,%R15,8),%YMM9,%YMM13 [4] |
0x6433a LEA (%R9,%RCX,1),%R15 |
0x6433e VFMADD231PD (%R12,%R15,8),%YMM10,%YMM13 [7] |
0x64344 LEA (%R9,%R14,1),%R15 |
0x64348 VFMADD231PD (%R12,%R15,8),%YMM11,%YMM13 [6] |
0x6434e ADD -0x298(%RBP),%R9 [9] |
0x64355 VFMADD231PD (%R12,%R9,8),%YMM12,%YMM13 [3] |
0x6435b VMOVUPD %YMM13,(%RDX,%R8,8) [2] |
0x64361 ADD $0x4,%R8 |
0x64365 CMP -0x2a8(%RBP),%R8 [9] |
0x6436c JLE 642f0 |
/scratch_na/users/xoserete/qaas_runs/171-291-3153/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/scratch_na/users/xoserete/qaas_runs/171-291-3153/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62 |
-------------------------------------------------------------------------------- |
62: phi(nm,g,z) += ell(nm, d) * psi(d, g, z); |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.33 |
CQA speedup if FP arith vectorized | 1.45 |
CQA speedup if fully vectorized | 2.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.23 |
Bottlenecks | micro-operation queue, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,LTimes.cpp:62-62 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 5.33 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 3.67 |
CQA cycles if fully vectorized | 2.67 |
Front-end cycles | 5.33 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 4.33 |
P2 cycles | 4.33 |
P3 cycles | 0.50 |
P4 cycles | 2.00 |
P5 cycles | 2.00 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 2.00 |
P10 cycles | 4.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 6.44 |
Stall cycles (UFS) | 0.69 |
Nb insns | 25.00 |
Nb uops | 24.00 |
Nb loads | 13.00 |
Nb stores | 1.00 |
Nb stack references | 4.00 |
FLOP/cycle | 12.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 32.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 66.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 320.00 |
Bytes stored | 32.00 |
Stride 0 | 1.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 50.00 |
Vector-efficiency ratio load | 50.00 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.33 |
CQA speedup if FP arith vectorized | 1.45 |
CQA speedup if fully vectorized | 2.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.23 |
Bottlenecks | micro-operation queue, |
Function | void Kripke::DispatchHelper |
Source | forall.hpp:59-59,LTimes.cpp:62-62 |
Source loop unroll info | unrolled by 4 |
Source loop unroll confidence level | high |
Unroll/vectorization loop type | main |
Unroll factor | 4 |
CQA cycles | 5.33 |
CQA cycles if no scalar integer | 4.00 |
CQA cycles if FP arith vectorized | 3.67 |
CQA cycles if fully vectorized | 2.67 |
Front-end cycles | 5.33 |
DIV/SQRT cycles | 4.00 |
P0 cycles | 4.00 |
P1 cycles | 4.33 |
P2 cycles | 4.33 |
P3 cycles | 0.50 |
P4 cycles | 2.00 |
P5 cycles | 2.00 |
P6 cycles | 0.50 |
P7 cycles | 0.50 |
P8 cycles | 0.50 |
P9 cycles | 2.00 |
P10 cycles | 4.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 1 |
FE+BE cycles (UFS) | 6.44 |
Stall cycles (UFS) | 0.69 |
Nb insns | 25.00 |
Nb uops | 24.00 |
Nb loads | 13.00 |
Nb stores | 1.00 |
Nb stack references | 4.00 |
FLOP/cycle | 12.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 32.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 66.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 320.00 |
Bytes stored | 32.00 |
Stride 0 | 1.00 |
Stride 1 | 2.00 |
Stride n | 0.00 |
Stride unknown | 2.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 100.00 |
Vectorization ratio load | 100.00 |
Vectorization ratio store | 100.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | NA |
Vectorization ratio fma | 100.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | NA |
Vector-efficiency ratio all | 50.00 |
Vector-efficiency ratio load | 50.00 |
Vector-efficiency ratio store | 50.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | NA |
Vector-efficiency ratio fma | 50.00 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | NA |
Path / |
nb instructions | 25 |
nb uops | 24 |
loop length | 126 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 9 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 5.33 cycles |
front end | 5.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 4.33 | 4.33 | 0.50 | 2.00 | 2.00 | 0.50 | 0.50 | 0.50 | 2.00 | 4.33 |
cycles | 4.00 | 4.00 | 4.33 | 4.33 | 0.50 | 2.00 | 2.00 | 0.50 | 0.50 | 0.50 | 2.00 | 4.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 6.44 |
Stall cycles | 0.69 |
LM full (events) | 1.07 |
Front-end | 5.33 |
Dispatch | 4.33 |
Data deps. | 1.00 |
Overall L1 | 5.33 |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 50% |
load | 50% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x2a0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R10,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RSI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVUPD (%RBX,%R8,8),%YMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VFMADD213PD (%RDX,%R8,8),%YMM5,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV -0x130(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VFMADD231PD (%R12,%R15,8),%YMM6,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%R11,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM7,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%RDI,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM8,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%RAX,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM9,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%RCX,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM10,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%R14,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM11,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD -0x298(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VFMADD231PD (%R12,%R9,8),%YMM12,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %YMM13,(%RDX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
ADD $0x4,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0x2a8(%RBP),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 642f0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0xa70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
nb instructions | 25 |
nb uops | 24 |
loop length | 126 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 9 |
used zmm registers | 0 |
nb stack references | 4 |
micro-operation queue | 5.33 cycles |
front end | 5.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.00 | 4.00 | 4.33 | 4.33 | 0.50 | 2.00 | 2.00 | 0.50 | 0.50 | 0.50 | 2.00 | 4.33 |
cycles | 4.00 | 4.00 | 4.33 | 4.33 | 0.50 | 2.00 | 2.00 | 0.50 | 0.50 | 0.50 | 2.00 | 4.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 1.00 |
FE+BE cycles | 6.44 |
Stall cycles | 0.69 |
LM full (events) | 1.07 |
Front-end | 5.33 |
Dispatch | 4.33 |
Data deps. | 1.00 |
Overall L1 | 5.33 |
all | 100% |
load | 100% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 100% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 50% |
load | 50% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x2a0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R8,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R10,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RSI,%R9 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVUPD (%RBX,%R8,8),%YMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
VFMADD213PD (%RDX,%R8,8),%YMM5,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
MOV -0x130(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %R9,%R15 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VFMADD231PD (%R12,%R15,8),%YMM6,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%R11,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM7,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%RDI,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM8,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%RAX,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM9,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%RCX,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM10,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA (%R9,%R14,1),%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VFMADD231PD (%R12,%R15,8),%YMM11,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
ADD -0x298(%RBP),%R9 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VFMADD231PD (%R12,%R9,8),%YMM12,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVUPD %YMM13,(%RDX,%R8,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
ADD $0x4,%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP -0x2a8(%RBP),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JLE 642f0 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0xa70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |