Loop Id: 852 | Module: libkripke.so | Source: forall.hpp:59-59 [...] | Coverage: 0.02% |
---|
Loop Id: 852 | Module: libkripke.so | Source: forall.hpp:59-59 [...] | Coverage: 0.02% |
---|
0x4b340 MOV -0x130(%RBP),%RCX |
0x4b347 MOV -0x148(%RBP),%RSI |
0x4b34e ADD %RCX,%RSI |
0x4b351 ADD %RCX,%R10 |
0x4b354 MOV -0x150(%RBP),%RDI |
0x4b35b CMP -0x2a8(%RBP),%RDI |
0x4b362 LEA 0x1(%RDI),%RDI |
0x4b366 MOV -0x2a0(%RBP),%R13 |
0x4b36d JE 4b213 |
0x4b373 MOV %RSI,-0x148(%RBP) |
0x4b37a MOV %R10,-0x140(%RBP) |
0x4b381 MOV -0x298(%RBP),%RCX |
0x4b388 IMUL %RDI,%RCX |
0x4b38c ADD -0x2b0(%RBP),%RCX |
0x4b393 ADD -0x80(%RBP),%RCX |
0x4b397 MOV -0x40(%RBP),%RSI |
0x4b39b ADD %RCX,%RSI |
0x4b39e VMOVSD (%R13,%RSI,8),%XMM9 |
0x4b3a5 MOV -0x288(%RBP),%RSI |
0x4b3ac LEA (%RCX,%RSI,1),%RSI |
0x4b3b0 VMOVSD (%R13,%RSI,8),%XMM1 |
0x4b3b7 MOV -0x280(%RBP),%RSI |
0x4b3be LEA (%RCX,%RSI,1),%RSI |
0x4b3c2 VMOVSD (%R13,%RSI,8),%XMM2 |
0x4b3c9 MOV -0x278(%RBP),%RSI |
0x4b3d0 ADD %RCX,%RSI |
0x4b3d3 VMOVSD (%R13,%RSI,8),%XMM3 |
0x4b3da MOV -0x270(%RBP),%RSI |
0x4b3e1 ADD %RCX,%RSI |
0x4b3e4 VMOVSD (%R13,%RSI,8),%XMM4 |
0x4b3eb MOV -0x268(%RBP),%RSI |
0x4b3f2 ADD %RCX,%RSI |
0x4b3f5 VMOVSD (%R13,%RSI,8),%XMM5 |
0x4b3fc VMOVSD (%R13,%RCX,8),%XMM6 |
0x4b403 ADD -0x290(%RBP),%RCX |
0x4b40a VMOVSD (%R13,%RCX,8),%XMM7 |
0x4b411 MOV -0x138(%RBP),%R14 |
0x4b418 AND $-0x4,%R14 |
0x4b41c MOV %RDI,-0x150(%RBP) |
0x4b423 JE 4b540 |
0x4b429 LEA -0x1(%R14),%RCX |
0x4b42d MOV %RCX,-0x2b8(%RBP) |
0x4b434 VBROADCASTSD %XMM6,%YMM8 |
0x4b439 VMOVUPD %XMM9,-0x2d0(%RBP) |
0x4b441 VBROADCASTSD %XMM9,%YMM9 |
0x4b446 VBROADCASTSD %XMM1,%YMM10 |
0x4b44b VBROADCASTSD %XMM2,%YMM11 |
0x4b450 VBROADCASTSD %XMM3,%YMM12 |
0x4b455 VBROADCASTSD %XMM4,%YMM13 |
0x4b45a VBROADCASTSD %XMM5,%YMM14 |
0x4b45f VBROADCASTSD %XMM7,%YMM15 |
0x4b464 MOV -0x78(%RBP),%RBX |
0x4b468 MOV -0x110(%RBP),%R15 |
0x4b46f MOV -0x118(%RBP),%R11 |
0x4b476 MOV -0x120(%RBP),%R8 |
0x4b47d MOV -0x38(%RBP),%R13 |
0x4b481 IMUL %RDI,%R13 |
0x4b485 XOR %ECX,%ECX |
0x4b487 MOV -0x70(%RBP),%RDI |
0x4b48b MOV -0x148(%RBP),%RAX |
0x4b492 NOPW %CS:(%RAX,%RAX,1) |
(853) 0x4b4a0 LEA (%RCX,%R13,1),%RSI |
(853) 0x4b4a4 ADD %R9,%RSI |
(853) 0x4b4a7 VMOVUPD (%RAX,%RCX,8),%YMM0 |
(853) 0x4b4ac VFMADD213PD (%RDX,%RCX,8),%YMM8,%YMM0 |
(853) 0x4b4b2 ADD %RDI,%RSI |
(853) 0x4b4b5 LEA (%RSI,%R8,1),%R10 |
(853) 0x4b4b9 VFMADD231PD (%R12,%R10,8),%YMM9,%YMM0 |
(853) 0x4b4bf LEA (%RSI,%R15,1),%R10 |
(853) 0x4b4c3 VFMADD231PD (%R12,%R10,8),%YMM10,%YMM0 |
(853) 0x4b4c9 LEA (%RSI,%RBX,1),%R10 |
(853) 0x4b4cd VFMADD231PD (%R12,%R10,8),%YMM11,%YMM0 |
(853) 0x4b4d3 MOV -0x168(%RBP),%R10 |
(853) 0x4b4da ADD %RSI,%R10 |
(853) 0x4b4dd VFMADD231PD (%R12,%R10,8),%YMM12,%YMM0 |
(853) 0x4b4e3 MOV -0x160(%RBP),%R10 |
(853) 0x4b4ea ADD %RSI,%R10 |
(853) 0x4b4ed VFMADD231PD (%R12,%R10,8),%YMM13,%YMM0 |
(853) 0x4b4f3 MOV -0x158(%RBP),%R10 |
(853) 0x4b4fa ADD %RSI,%R10 |
(853) 0x4b4fd VFMADD231PD (%R12,%R10,8),%YMM14,%YMM0 |
(853) 0x4b503 ADD %R11,%RSI |
(853) 0x4b506 VFMADD231PD (%R12,%RSI,8),%YMM15,%YMM0 |
(853) 0x4b50c VMOVUPD %YMM0,(%RDX,%RCX,8) |
(853) 0x4b511 ADD $0x4,%RCX |
(853) 0x4b515 CMP -0x2b8(%RBP),%RCX |
(853) 0x4b51c JLE 4b4a0 |
0x4b51e CMP %R14,-0x138(%RBP) |
0x4b525 MOV -0x48(%RBP),%RAX |
0x4b529 MOV -0x140(%RBP),%R10 |
0x4b530 VMOVUPD -0x2d0(%RBP),%XMM9 |
0x4b538 JE 4b340 |
0x4b53e JMP 4b56b |
0x4b540 XOR %R14D,%R14D |
0x4b543 MOV -0x70(%RBP),%RDI |
0x4b547 MOV -0x48(%RBP),%RAX |
0x4b54b MOV -0x110(%RBP),%R15 |
0x4b552 MOV -0x78(%RBP),%RBX |
0x4b556 MOV -0x118(%RBP),%R11 |
0x4b55d MOV -0x120(%RBP),%R8 |
0x4b564 MOV -0x140(%RBP),%R10 |
0x4b56b MOV -0x38(%RBP),%R13 |
0x4b56f IMUL -0x150(%RBP),%R13 |
0x4b577 NOPW (%RAX,%RAX,1) |
(847) 0x4b580 LEA (%R14,%R13,1),%RCX |
(847) 0x4b584 ADD %R9,%RCX |
(847) 0x4b587 VMOVSD (%R10,%R14,8),%XMM0 |
(847) 0x4b58d VFMADD213SD (%RDX,%R14,8),%XMM6,%XMM0 |
(847) 0x4b593 ADD %RDI,%RCX |
(847) 0x4b596 LEA (%RCX,%R8,1),%RSI |
(847) 0x4b59a VFMADD231SD (%R12,%RSI,8),%XMM9,%XMM0 |
(847) 0x4b5a0 LEA (%RCX,%R15,1),%RSI |
(847) 0x4b5a4 VFMADD231SD (%R12,%RSI,8),%XMM1,%XMM0 |
(847) 0x4b5aa LEA (%RCX,%RBX,1),%RSI |
(847) 0x4b5ae VFMADD231SD (%R12,%RSI,8),%XMM2,%XMM0 |
(847) 0x4b5b4 MOV -0x168(%RBP),%RSI |
(847) 0x4b5bb ADD %RCX,%RSI |
(847) 0x4b5be VFMADD231SD (%R12,%RSI,8),%XMM3,%XMM0 |
(847) 0x4b5c4 MOV -0x160(%RBP),%RSI |
(847) 0x4b5cb ADD %RCX,%RSI |
(847) 0x4b5ce VFMADD231SD (%R12,%RSI,8),%XMM4,%XMM0 |
(847) 0x4b5d4 MOV -0x158(%RBP),%RSI |
(847) 0x4b5db ADD %RCX,%RSI |
(847) 0x4b5de VFMADD231SD (%R12,%RSI,8),%XMM5,%XMM0 |
(847) 0x4b5e4 ADD %R11,%RCX |
(847) 0x4b5e7 VFMADD231SD (%R12,%RCX,8),%XMM7,%XMM0 |
(847) 0x4b5ed VMOVSD %XMM0,(%RDX,%R14,8) |
(847) 0x4b5f3 INC %R14 |
(847) 0x4b5f6 CMP %R14,%RAX |
(847) 0x4b5f9 JNE 4b580 |
0x4b5fb JMP 4b340 |
/scratch_na/users/xoserete/qaas_runs/171-319-6990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 81 - 81 |
-------------------------------------------------------------------------------- |
81: #pragma omp parallel for private(i0, i1) firstprivate(privatizer) \ |
/scratch_na/users/xoserete/qaas_runs/171-319-6990/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62 |
-------------------------------------------------------------------------------- |
62: phi(nm,g,z) += ell(nm, d) * psi(d, g, z); |
/scratch_na/users/xoserete/qaas_runs/171-319-6990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.72 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 8.57 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | |
Function | void Kripke::DispatchHelper |
Source | Collapse.hpp:81-81,LTimes.cpp:62-62,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.67 |
CQA cycles if no scalar integer | 6.78 |
CQA cycles if FP arith vectorized | 11.67 |
CQA cycles if fully vectorized | 1.36 |
Front-end cycles | 10.50 |
DIV/SQRT cycles | 3.93 |
P0 cycles | 4.67 |
P1 cycles | 11.67 |
P2 cycles | 11.67 |
P3 cycles | 2.17 |
P4 cycles | 6.33 |
P5 cycles | 3.93 |
P6 cycles | 2.17 |
P7 cycles | 2.17 |
P8 cycles | 2.17 |
P9 cycles | 3.87 |
P10 cycles | 11.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 13.50 |
Stall cycles (UFS) | 2.85 |
Nb insns | 63.00 |
Nb uops | 63.00 |
Nb loads | 35.00 |
Nb stores | 4.33 |
Nb stack references | 25.33 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 27.84 |
Bytes prefetched | 0.00 |
Bytes loaded | 285.33 |
Bytes stored | 40.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 7.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 4.60 |
Vectorization ratio load | 4.44 |
Vectorization ratio store | 13.33 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.98 |
Vector-efficiency ratio load | 13.06 |
Vector-efficiency ratio store | 14.17 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 11.81 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 2.54 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 11.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.27 |
Bottlenecks | P2, P3, P11, |
Function | void Kripke::DispatchHelper |
Source | Collapse.hpp:81-81,LTimes.cpp:62-62,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.00 |
CQA cycles if no scalar integer | 4.33 |
CQA cycles if FP arith vectorized | 11.00 |
CQA cycles if fully vectorized | 1.00 |
Front-end cycles | 8.67 |
DIV/SQRT cycles | 3.00 |
P0 cycles | 4.20 |
P1 cycles | 11.00 |
P2 cycles | 11.00 |
P3 cycles | 1.50 |
P4 cycles | 3.00 |
P5 cycles | 3.00 |
P6 cycles | 1.50 |
P7 cycles | 1.50 |
P8 cycles | 1.50 |
P9 cycles | 3.00 |
P10 cycles | 11.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 12.14 |
Stall cycles (UFS) | 3.34 |
Nb insns | 52.00 |
Nb uops | 52.00 |
Nb loads | 33.00 |
Nb stores | 3.00 |
Nb stack references | 24.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 26.18 |
Bytes prefetched | 0.00 |
Bytes loaded | 264.00 |
Bytes stored | 24.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 6.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.20 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 10.42 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.54 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 7.79 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.04 |
Bottlenecks | P2, P3, P11, |
Function | void Kripke::DispatchHelper |
Source | Collapse.hpp:81-81,LTimes.cpp:62-62,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 12.33 |
CQA cycles if no scalar integer | 8.00 |
CQA cycles if FP arith vectorized | 12.33 |
CQA cycles if fully vectorized | 1.58 |
Front-end cycles | 11.83 |
DIV/SQRT cycles | 4.50 |
P0 cycles | 5.40 |
P1 cycles | 12.33 |
P2 cycles | 12.33 |
P3 cycles | 2.50 |
P4 cycles | 8.00 |
P5 cycles | 4.50 |
P6 cycles | 2.50 |
P7 cycles | 2.50 |
P8 cycles | 2.50 |
P9 cycles | 4.40 |
P10 cycles | 12.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 14.69 |
Stall cycles (UFS) | 2.70 |
Nb insns | 71.00 |
Nb uops | 71.00 |
Nb loads | 37.00 |
Nb stores | 5.00 |
Nb stack references | 26.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.54 |
Bytes prefetched | 0.00 |
Bytes loaded | 304.00 |
Bytes stored | 48.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 9.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 6.90 |
Vectorization ratio load | 6.67 |
Vectorization ratio store | 20.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 13.36 |
Vector-efficiency ratio load | 13.33 |
Vector-efficiency ratio store | 15.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.46 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 7.78 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 |
Bottlenecks | P2, P3, P11, |
Function | void Kripke::DispatchHelper |
Source | Collapse.hpp:81-81,LTimes.cpp:62-62,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 11.67 |
CQA cycles if no scalar integer | 8.00 |
CQA cycles if FP arith vectorized | 11.67 |
CQA cycles if fully vectorized | 1.50 |
Front-end cycles | 11.00 |
DIV/SQRT cycles | 4.30 |
P0 cycles | 4.40 |
P1 cycles | 11.67 |
P2 cycles | 11.67 |
P3 cycles | 2.50 |
P4 cycles | 8.00 |
P5 cycles | 4.30 |
P6 cycles | 2.50 |
P7 cycles | 2.50 |
P8 cycles | 2.50 |
P9 cycles | 4.20 |
P10 cycles | 11.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | 0 |
FE+BE cycles (UFS) | 13.68 |
Stall cycles (UFS) | 2.52 |
Nb insns | 66.00 |
Nb uops | 66.00 |
Nb loads | 35.00 |
Nb stores | 5.00 |
Nb stack references | 26.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.80 |
Bytes prefetched | 0.00 |
Bytes loaded | 288.00 |
Bytes stored | 48.00 |
Stride 0 | 1.00 |
Stride 1 | 0.00 |
Stride n | 0.00 |
Stride unknown | 6.00 |
Stride indirect | 0.00 |
Vectorization ratio all | 6.90 |
Vectorization ratio load | 6.67 |
Vectorization ratio store | 20.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 13.36 |
Vector-efficiency ratio load | 13.33 |
Vector-efficiency ratio store | 15.00 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 12.50 |
Path / |
nb instructions | 63 |
nb uops | 63 |
loop length | 366 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 5.33 |
used zmm registers | 0 |
nb stack references | 25.33 |
micro-operation queue | 10.50 cycles |
front end | 10.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.93 | 3.93 | 11.67 | 11.67 | 2.17 | 6.33 | 3.93 | 2.17 | 2.17 | 2.17 | 3.87 | 11.67 |
cycles | 3.93 | 4.67 | 11.67 | 11.67 | 2.17 | 6.33 | 3.93 | 2.17 | 2.17 | 2.17 | 3.87 | 11.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 13.50 |
Stall cycles | 2.85 |
LM full (events) | 5.13 |
Front-end | 10.50 |
Dispatch | 11.67 |
Data deps. | 0.00 |
Overall L1 | 11.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 7% |
load | 7% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 4% |
load | 4% |
store | 13% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 11% |
all | 13% |
load | 13% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 12% |
load | 13% |
store | 14% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
nb instructions | 52 |
nb uops | 52 |
loop length | 302 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 8.67 cycles |
front end | 8.67 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 3.00 | 3.00 | 11.00 | 11.00 | 1.50 | 3.00 | 3.00 | 1.50 | 1.50 | 1.50 | 3.00 | 11.00 |
cycles | 3.00 | 4.20 | 11.00 | 11.00 | 1.50 | 3.00 | 3.00 | 1.50 | 1.50 | 1.50 | 3.00 | 11.00 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 12.14 |
Stall cycles | 3.34 |
LM full (events) | 7.34 |
Front-end | 8.67 |
Dispatch | 11.00 |
Data deps. | 0.00 |
Overall L1 | 11.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 10% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x150(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x2a8(%RBP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x2a0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4b213 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x723> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x298(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RDI,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD -0x2b0(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD -0x80(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x288(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RSI,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD (%R13,%RSI,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x280(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RSI,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD (%R13,%RSI,8),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x278(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x270(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%R13,%RCX,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x290(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVSD (%R13,%RCX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND $-0x4,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDI,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4b540 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0xa50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
XOR %R14D,%R14D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x78(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x120(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x150(%RBP),%R13 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b340 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x850> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
nb instructions | 71 |
nb uops | 71 |
loop length | 412 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 8 |
used zmm registers | 0 |
nb stack references | 26 |
micro-operation queue | 11.83 cycles |
front end | 11.83 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.50 | 4.60 | 12.33 | 12.33 | 2.50 | 8.00 | 4.50 | 2.50 | 2.50 | 2.50 | 4.40 | 12.33 |
cycles | 4.50 | 5.40 | 12.33 | 12.33 | 2.50 | 8.00 | 4.50 | 2.50 | 2.50 | 2.50 | 4.40 | 12.33 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 14.69 |
Stall cycles | 2.70 |
LM full (events) | 4.03 |
Front-end | 11.83 |
Dispatch | 12.33 |
Data deps. | 0.00 |
Overall L1 | 12.33 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 11% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 6% |
load | 6% |
store | 20% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 13% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 13% |
store | 15% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x150(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x2a8(%RBP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x2a0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4b213 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x723> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x298(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RDI,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD -0x2b0(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD -0x80(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x288(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RSI,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD (%R13,%RSI,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x280(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RSI,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD (%R13,%RSI,8),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x278(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x270(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%R13,%RCX,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x290(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVSD (%R13,%RCX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND $-0x4,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDI,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4b540 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0xa50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R14),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0x2b8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VBROADCASTSD %XMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM9,-0x2d0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM9,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM1,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM2,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM3,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM4,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM5,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM7,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x78(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x120(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RDI,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R14,-0x138(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD -0x2d0(%RBP),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JE 4b340 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x850> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
JMP 4b56b <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0xa7b> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x38(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0x150(%RBP),%R13 | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
NOPW (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 4b340 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x850> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
nb instructions | 66 |
nb uops | 66 |
loop length | 384 |
used x86 registers | 12 |
used mmx registers | 0 |
used xmm registers | 8 |
used ymm registers | 8 |
used zmm registers | 0 |
nb stack references | 26 |
micro-operation queue | 11.00 cycles |
front end | 11.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.30 | 4.20 | 11.67 | 11.67 | 2.50 | 8.00 | 4.30 | 2.50 | 2.50 | 2.50 | 4.20 | 11.67 |
cycles | 4.30 | 4.40 | 11.67 | 11.67 | 2.50 | 8.00 | 4.30 | 2.50 | 2.50 | 2.50 | 4.20 | 11.67 |
Cycles executing div or sqrt instructions | NA |
Longest recurrence chain latency (RecMII) | 0.00 |
FE+BE cycles | 13.68 |
Stall cycles | 2.52 |
LM full (events) | 4.03 |
Front-end | 11.00 |
Dispatch | 11.67 |
Data deps. | 0.00 |
Overall L1 | 11.67 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 11% |
load | 11% |
store | 100% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 6% |
load | 6% |
store | 20% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 13% |
store | 25% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 13% |
load | 13% |
store | 15% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x130(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %RCX,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x150(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x2a8(%RBP),%RDI | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%RDI),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x2a0(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 4b213 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x723> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %RSI,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x298(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RDI,%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD -0x2b0(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
ADD -0x80(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x40(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x288(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RSI,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD (%R13,%RSI,8),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x280(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%RCX,%RSI,1),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD (%R13,%RSI,8),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x278(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x270(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x268(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%R13,%RSI,8),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%R13,%RCX,8),%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x290(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
VMOVSD (%R13,%RCX,8),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x138(%RBP),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
AND $-0x4,%R14 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
MOV %RDI,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JE 4b540 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0xa50> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
LEA -0x1(%R14),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0x2b8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VBROADCASTSD %XMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VMOVUPD %XMM9,-0x2d0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VBROADCASTSD %XMM9,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM1,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM2,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM3,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM4,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM5,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
VBROADCASTSD %XMM7,%YMM15 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV -0x78(%RBP),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x118(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x120(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x38(%RBP),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL %RDI,%R13 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
XOR %ECX,%ECX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x148(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CMP %R14,-0x138(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x140(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVUPD -0x2d0(%RBP),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
JE 4b340 <_ZNK6Kripke14DispatchHelperINS_12ArchT_OpenMPEEclINS_11LayoutT_DGZE10LTimesSdomJRNS_6SdomIdERKNS_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS_9DirectionENS_5GroupENS_4ZoneEEEERNSC_IdJNS_6MomentESE_SF_EEERNSC_IdJSI_SD_EEEEEEvT_RKT0_DpOT1_.extracted+0x850> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |