Loop Id: 694 | Module: libkripke.so | Source: forall.hpp:59-59 [...] | Coverage: 0.01% |
---|
Loop Id: 694 | Module: libkripke.so | Source: forall.hpp:59-59 [...] | Coverage: 0.01% |
---|
0x40b70 ADD $0x200,%RDX |
0x40b77 ADDQ $0x200,-0xf8(%RBP) |
0x40b82 MOV -0x240(%RBP),%RAX |
0x40b89 ADD $-0x40,%RAX |
0x40b8d ADDQ $0x200,-0x100(%RBP) |
0x40b98 ADD $0x200,%R12 |
0x40b9f MOV -0x238(%RBP),%R8 |
0x40ba6 CMP -0x230(%RBP),%R8 |
0x40bad LEA 0x1(%R8),%R8 |
0x40bb1 JE 40a70 |
0x40bb7 MOV %R10,%R15 |
0x40bba MOV %R12,-0x248(%RBP) |
0x40bc1 CMP $0x3f,%RAX |
0x40bc5 MOV $0x3f,%EDI |
0x40bca MOV %RAX,-0x240(%RBP) |
0x40bd1 CMOVL %RAX,%RDI |
0x40bd5 INC %RDI |
0x40bd8 MOV %RDI,-0x48(%RBP) |
0x40bdc MOV %R8,-0x238(%RBP) |
0x40be3 SAL $0x6,%R8 |
0x40be7 MOV -0xf0(%RBP),%RDI |
0x40bee SUB %R8,%RDI |
0x40bf1 CMP $0x40,%RDI |
0x40bf5 MOV $0x3f,%EAX |
0x40bfa CMOVGE %RAX,%RDI |
0x40bfe MOV %RDI,-0x110(%RBP) |
0x40c05 CMPQ $0x8,-0x108(%RBP) |
0x40c0d MOV -0x80(%RBP),%RDI |
0x40c11 JAE 40cf0 |
0x40c17 MOV -0x108(%RBP),%R8 |
0x40c1e MOV %R8,%RAX |
0x40c21 AND $-0x8,%RAX |
0x40c25 CMP %R8,%RAX |
0x40c28 MOV -0x248(%RBP),%R12 |
0x40c2f MOV -0x48(%RBP),%R8 |
0x40c33 MOV %R15,%R10 |
0x40c36 MOV -0x110(%RBP),%R15 |
0x40c3d JE 40b70 |
0x40c43 INC %R15 |
0x40c46 MOV %R12,%RBX |
0x40c49 JMP 40c65 |
(696) 0x40c50 ADD -0x38(%RBP),%RBX |
(696) 0x40c54 CMP -0x120(%RBP),%RAX |
(696) 0x40c5b LEA 0x1(%RAX),%RAX |
(696) 0x40c5f JE 40b70 |
(696) 0x40c65 MOV -0x148(%RBP),%RSI |
(696) 0x40c6c ADD %RAX,%RSI |
(696) 0x40c6f ADD -0x78(%RBP),%RSI |
(696) 0x40c73 VMOVSD (%RCX,%RSI,8),%XMM0 |
(696) 0x40c78 MOV %R15,%R9 |
(696) 0x40c7b AND $-0x4,%R9 |
(696) 0x40c7f JE 40cc0 |
(696) 0x40c81 LEA -0x1(%R9),%R8 |
(696) 0x40c85 VBROADCASTSD %XMM0,%YMM1 |
(696) 0x40c8a XOR %R11D,%R11D |
(696) 0x40c8d NOPL (%RAX) |
(697) 0x40c90 VMOVUPD (%RBX,%R11,8),%YMM2 |
(697) 0x40c96 VFMADD213PD (%RDX,%R11,8),%YMM1,%YMM2 |
(697) 0x40c9c VMOVUPD %YMM2,(%RDX,%R11,8) |
(697) 0x40ca2 ADD $0x4,%R11 |
(697) 0x40ca6 CMP %R8,%R11 |
(697) 0x40ca9 JLE 40c90 |
(696) 0x40cab CMP %R9,%R15 |
(696) 0x40cae MOV -0x48(%RBP),%R8 |
(696) 0x40cb2 JNE 40cd0 |
(696) 0x40cb4 JMP 40c50 |
(696) 0x40cc0 XOR %R9D,%R9D |
(696) 0x40cc3 NOPW %CS:(%RAX,%RAX,1) |
(695) 0x40cd0 VMOVSD (%RBX,%R9,8),%XMM1 |
(695) 0x40cd6 VFMADD213SD (%RDX,%R9,8),%XMM0,%XMM1 |
(695) 0x40cdc VMOVSD %XMM1,(%RDX,%R9,8) |
(695) 0x40ce2 INC %R9 |
(695) 0x40ce5 CMP %R9,%R8 |
(695) 0x40ce8 JNE 40cd0 |
(696) 0x40cea JMP 40c50 |
0x40cf0 MOV -0x110(%RBP),%RAX |
0x40cf7 INC %RAX |
0x40cfa MOV %RAX,-0x138(%RBP) |
0x40d01 MOV -0x130(%RBP),%RAX |
0x40d08 IMUL -0xe8(%RBP),%RAX |
0x40d10 ADD %R8,%RAX |
0x40d13 MOV %RAX,-0x128(%RBP) |
0x40d1a MOV -0x100(%RBP),%R11 |
0x40d21 MOV -0xf8(%RBP),%RAX |
0x40d28 XOR %R10D,%R10D |
0x40d2b JMP 40d66 |
(698) 0x40d30 MOV -0x130(%RBP),%RCX |
(698) 0x40d37 MOV -0x150(%RBP),%RAX |
(698) 0x40d3e ADD %RCX,%RAX |
(698) 0x40d41 ADD %RCX,%R11 |
(698) 0x40d44 MOV -0x158(%RBP),%R10 |
(698) 0x40d4b CMP -0x258(%RBP),%R10 |
(698) 0x40d52 LEA 0x1(%R10),%R10 |
(698) 0x40d56 MOV -0x250(%RBP),%RCX |
(698) 0x40d5d MOV %R8,%RDI |
(698) 0x40d60 JE 40c17 |
(698) 0x40d66 MOV %RAX,-0x150(%RBP) |
(698) 0x40d6d MOV %R11,-0x140(%RBP) |
(698) 0x40d74 MOV -0x148(%RBP),%RAX |
(698) 0x40d7b LEA (%RAX,%R10,8),%R8 |
(698) 0x40d7f ADD -0x78(%RBP),%R8 |
(698) 0x40d83 VMOVUPD (%RCX,%R8,8),%YMM0 |
(698) 0x40d89 VMOVUPD 0x20(%RCX,%R8,8),%YMM1 |
(698) 0x40d90 MOV -0x138(%RBP),%RBX |
(698) 0x40d97 AND $-0x4,%RBX |
(698) 0x40d9b MOV %R10,-0x158(%RBP) |
(698) 0x40da2 JE 40ed0 |
(698) 0x40da8 LEA -0x1(%RBX),%RAX |
(698) 0x40dac MOV %RAX,-0x260(%RBP) |
(698) 0x40db3 VBROADCASTSD %XMM0,%YMM2 |
(698) 0x40db8 VPERMPD $0x55,%YMM0,%YMM3 |
(698) 0x40dbe VPERMPD $-0x56,%YMM0,%YMM4 |
(698) 0x40dc4 VPERMPD $-0x1,%YMM0,%YMM5 |
(698) 0x40dca VBROADCASTSD %XMM1,%YMM6 |
(698) 0x40dcf VPERMPD $0x55,%YMM1,%YMM7 |
(698) 0x40dd5 VPERMPD $-0x56,%YMM1,%YMM8 |
(698) 0x40ddb VPERMPD $-0x1,%YMM1,%YMM9 |
(698) 0x40de1 MOV -0x160(%RBP),%R9 |
(698) 0x40de8 MOV -0x118(%RBP),%RDI |
(698) 0x40def MOV -0x38(%RBP),%R11 |
(698) 0x40df3 IMUL %R10,%R11 |
(698) 0x40df7 XOR %R8D,%R8D |
(698) 0x40dfa MOV -0x168(%RBP),%RCX |
(698) 0x40e01 MOV -0x70(%RBP),%RAX |
(698) 0x40e05 MOV -0x128(%RBP),%R14 |
(698) 0x40e0c MOV -0x150(%RBP),%R10 |
(698) 0x40e13 NOPW %CS:(%RAX,%RAX,1) |
(699) 0x40e20 LEA (%R11,%R8,1),%R12 |
(699) 0x40e24 ADD %R14,%R12 |
(699) 0x40e27 VMOVUPD (%R10,%R8,8),%YMM10 |
(699) 0x40e2d VFMADD213PD (%RDX,%R8,8),%YMM2,%YMM10 |
(699) 0x40e33 ADD %RAX,%R12 |
(699) 0x40e36 LEA (%R12,%RDI,1),%RSI |
(699) 0x40e3a VFMADD231PD (%R13,%RSI,8),%YMM3,%YMM10 |
(699) 0x40e41 LEA (%R12,%R15,1),%RSI |
(699) 0x40e45 VFMADD231PD (%R13,%RSI,8),%YMM4,%YMM10 |
(699) 0x40e4c LEA (%R12,%R9,1),%RSI |
(699) 0x40e50 VFMADD231PD (%R13,%RSI,8),%YMM5,%YMM10 |
(699) 0x40e57 MOV -0x88(%RBP),%RSI |
(699) 0x40e5e ADD %R12,%RSI |
(699) 0x40e61 VFMADD231PD (%R13,%RSI,8),%YMM6,%YMM10 |
(699) 0x40e68 MOV -0x170(%RBP),%RSI |
(699) 0x40e6f ADD %R12,%RSI |
(699) 0x40e72 VFMADD231PD (%R13,%RSI,8),%YMM7,%YMM10 |
(699) 0x40e79 MOV -0x80(%RBP),%RSI |
(699) 0x40e7d ADD %R12,%RSI |
(699) 0x40e80 VFMADD231PD (%R13,%RSI,8),%YMM8,%YMM10 |
(699) 0x40e87 ADD %RCX,%R12 |
(699) 0x40e8a VFMADD231PD (%R13,%R12,8),%YMM9,%YMM10 |
(699) 0x40e91 VMOVUPD %YMM10,(%RDX,%R8,8) |
(699) 0x40e97 ADD $0x4,%R8 |
(699) 0x40e9b CMP -0x260(%RBP),%R8 |
(699) 0x40ea2 JLE 40e20 |
(698) 0x40ea8 CMP %RBX,-0x138(%RBP) |
(698) 0x40eaf MOV -0x88(%RBP),%R10 |
(698) 0x40eb6 MOV -0x80(%RBP),%R8 |
(698) 0x40eba MOV -0x48(%RBP),%RCX |
(698) 0x40ebe MOV -0x140(%RBP),%R11 |
(698) 0x40ec5 JE 40d30 |
(698) 0x40ecb JMP 40ef9 |
(698) 0x40ed0 XOR %EBX,%EBX |
(698) 0x40ed2 MOV -0x70(%RBP),%RAX |
(698) 0x40ed6 MOV -0x48(%RBP),%RCX |
(698) 0x40eda MOV -0x88(%RBP),%R10 |
(698) 0x40ee1 MOV %RDI,%R8 |
(698) 0x40ee4 MOV -0x118(%RBP),%RDI |
(698) 0x40eeb MOV -0x128(%RBP),%R14 |
(698) 0x40ef2 MOV -0x140(%RBP),%R11 |
(698) 0x40ef9 MOV -0x38(%RBP),%R9 |
(698) 0x40efd IMUL -0x158(%RBP),%R9 |
(698) 0x40f05 NOPW %CS:(%RAX,%RAX,1) |
(693) 0x40f10 LEA (%R9,%RBX,1),%RSI |
(693) 0x40f14 ADD %R14,%RSI |
(693) 0x40f17 ADD %RAX,%RSI |
(693) 0x40f1a MOV %RCX,%R12 |
(693) 0x40f1d MOV %R8,%RCX |
(693) 0x40f20 ADD %RSI,%R8 |
(693) 0x40f23 VMOVSD (%R13,%R8,8),%XMM2 |
(693) 0x40f2a MOV -0x168(%RBP),%R8 |
(693) 0x40f31 LEA (%RSI,%R8,1),%R8 |
(693) 0x40f35 VMOVHPD (%R13,%R8,8),%XMM2,%XMM2 |
(693) 0x40f3c LEA (%RSI,%R10,1),%R8 |
(693) 0x40f40 VMOVSD (%R13,%R8,8),%XMM3 |
(693) 0x40f47 MOV -0x170(%RBP),%R8 |
(693) 0x40f4e LEA (%RSI,%R8,1),%R8 |
(693) 0x40f52 VMOVHPD (%R13,%R8,8),%XMM3,%XMM3 |
(693) 0x40f59 LEA (%RSI,%R15,1),%R8 |
(693) 0x40f5d VMOVSD (%R13,%R8,8),%XMM4 |
(693) 0x40f64 MOV -0x160(%RBP),%R8 |
(693) 0x40f6b LEA (%RSI,%R8,1),%R8 |
(693) 0x40f6f VMOVHPD (%R13,%R8,8),%XMM4,%XMM4 |
(693) 0x40f76 MOV %RCX,%R8 |
(693) 0x40f79 MOV %R12,%RCX |
(693) 0x40f7c LEA (%RSI,%RDI,1),%RSI |
(693) 0x40f80 VMOVSD (%R11,%RBX,8),%XMM5 |
(693) 0x40f86 VMOVHPD (%R13,%RSI,8),%XMM5,%XMM5 |
(693) 0x40f8d VINSERTF128 $0x1,%XMM2,%YMM3,%YMM2 |
(693) 0x40f93 VINSERTF128 $0x1,%XMM4,%YMM5,%YMM3 |
(693) 0x40f99 VMULPD %YMM1,%YMM2,%YMM2 |
(693) 0x40f9d VFMADD231PD %YMM3,%YMM0,%YMM2 |
(693) 0x40fa2 VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(693) 0x40fa8 VADDPD %XMM3,%XMM2,%XMM2 |
(693) 0x40fac VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 |
(693) 0x40fb1 VADDSD %XMM3,%XMM2,%XMM2 |
(693) 0x40fb5 VADDSD (%RDX,%RBX,8),%XMM2,%XMM2 |
(693) 0x40fba VMOVSD %XMM2,(%RDX,%RBX,8) |
(693) 0x40fbf INC %RBX |
(693) 0x40fc2 CMP %RBX,%R12 |
(693) 0x40fc5 JNE 40f10 |
(698) 0x40fcb JMP 40d30 |
/scratch_na/users/xoserete/qaas_runs/171-319-6990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 81 - 81 |
-------------------------------------------------------------------------------- |
81: #pragma omp parallel for private(i0, i1) firstprivate(privatizer) \ |
/scratch_na/users/xoserete/qaas_runs/171-319-6990/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp: 57 - 57 |
-------------------------------------------------------------------------------- |
57: rhs(d,g,z) += ell_plus(d, nm) * phi_out(nm, g, z); |
/scratch_na/users/xoserete/qaas_runs/171-319-6990/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 10.95 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.59 |
Bottlenecks | micro-operation queue, |
Function | void LPlusTimesSdom::operator() |
Source | Collapse.hpp:81-81,LPlusTimes.cpp:57-57,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.00 |
CQA cycles if no scalar integer | 9.00 |
CQA cycles if FP arith vectorized | 9.00 |
CQA cycles if fully vectorized | 0.82 |
Front-end cycles | 9.00 |
DIV/SQRT cycles | 4.20 |
P0 cycles | 4.20 |
P1 cycles | 5.67 |
P2 cycles | 5.67 |
P3 cycles | 4.50 |
P4 cycles | 4.20 |
P5 cycles | 4.20 |
P6 cycles | 4.50 |
P7 cycles | 4.50 |
P8 cycles | 4.50 |
P9 cycles | 4.20 |
P10 cycles | 5.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 9.48 |
Stall cycles (UFS) | 0.00 |
Nb insns | 52.00 |
Nb uops | 54.00 |
Nb loads | 17.00 |
Nb stores | 9.00 |
Nb stack references | 15.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 23.11 |
Bytes prefetched | 0.00 |
Bytes loaded | 136.00 |
Bytes stored | 72.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.10 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 11.46 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 10.95 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.59 |
Bottlenecks | micro-operation queue, |
Function | void LPlusTimesSdom::operator() |
Source | Collapse.hpp:81-81,LPlusTimes.cpp:57-57,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.00 |
CQA cycles if no scalar integer | 9.00 |
CQA cycles if FP arith vectorized | 9.00 |
CQA cycles if fully vectorized | 0.82 |
Front-end cycles | 9.00 |
DIV/SQRT cycles | 4.20 |
P0 cycles | 4.20 |
P1 cycles | 5.67 |
P2 cycles | 5.67 |
P3 cycles | 4.50 |
P4 cycles | 4.20 |
P5 cycles | 4.20 |
P6 cycles | 4.50 |
P7 cycles | 4.50 |
P8 cycles | 4.50 |
P9 cycles | 4.20 |
P10 cycles | 5.67 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 9.48 |
Stall cycles (UFS) | 0.00 |
Nb insns | 52.00 |
Nb uops | 54.00 |
Nb loads | 17.00 |
Nb stores | 9.00 |
Nb stack references | 15.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 23.11 |
Bytes prefetched | 0.00 |
Bytes loaded | 136.00 |
Bytes stored | 72.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.10 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 11.46 |
Path / |
nb instructions | 52 |
nb uops | 54 |
loop length | 280 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 15 |
micro-operation queue | 9.00 cycles |
front end | 9.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.20 | 4.20 | 5.67 | 5.67 | 4.50 | 4.20 | 4.20 | 4.50 | 4.50 | 4.50 | 4.20 | 5.67 |
cycles | 4.20 | 4.20 | 5.67 | 5.67 | 4.50 | 4.20 | 4.20 | 4.50 | 4.50 | 4.50 | 4.20 | 5.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 9.48 |
Stall cycles | 0.00 |
Front-end | 9.00 |
Dispatch | 5.67 |
Overall L1 | 9.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x200,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADDQ $0x200,-0xf8(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 1 |
MOV -0x240(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $-0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADDQ $0x200,-0x100(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 1 |
ADD $0x200,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x238(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x230(%RBP),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%R8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JE 40a70 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x4e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,-0x248(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x3f,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3f,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x240(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVL %RAX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x238(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x6,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x40,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3f,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %RAX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0x8,-0x108(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 40cf0 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x760> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x248(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 40b70 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x5e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 40c65 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x6d5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0xe8(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x100(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40d66 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x7d6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
nb instructions | 52 |
nb uops | 54 |
loop length | 280 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 15 |
micro-operation queue | 9.00 cycles |
front end | 9.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.20 | 4.20 | 5.67 | 5.67 | 4.50 | 4.20 | 4.20 | 4.50 | 4.50 | 4.50 | 4.20 | 5.67 |
cycles | 4.20 | 4.20 | 5.67 | 5.67 | 4.50 | 4.20 | 4.20 | 4.50 | 4.50 | 4.50 | 4.20 | 5.67 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 9.48 |
Stall cycles | 0.00 |
Front-end | 9.00 |
Dispatch | 5.67 |
Overall L1 | 9.00 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x200,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADDQ $0x200,-0xf8(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 1 |
MOV -0x240(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $-0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADDQ $0x200,-0x100(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 1 |
ADD $0x200,%R12 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x238(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x230(%RBP),%R8 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%R8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JE 40a70 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x4e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV %R10,%R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,-0x248(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMP $0x3f,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3f,%EDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x240(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVL %RAX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RDI,-0x48(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R8,-0x238(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SAL $0x6,%R8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB %R8,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x40,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3f,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %RAX,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RDI,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0x8,-0x108(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV -0x80(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JAE 40cf0 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x760> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x108(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R8,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
CMP %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x248(%RBP),%R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x48(%RBP),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV -0x110(%RBP),%R15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JE 40b70 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x5e0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
INC %R15 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %R12,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
JMP 40c65 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x6d5> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x130(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
IMUL -0xe8(%RBP),%RAX | 1 | 0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
ADD %R8,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0x100(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 40d66 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x7d6> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |