Loop Id: 792 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.01% |
---|
Loop Id: 792 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.01% |
---|
0x4664c0 ADD $0x200,%RDX |
0x4664c7 ADDQ $0x200,-0xf0(%RBP) |
0x4664d2 MOV -0x1f0(%RBP),%RAX |
0x4664d9 ADD $-0x40,%RAX |
0x4664dd ADDQ $0x40,-0xf8(%RBP) |
0x4664e5 ADDQ $0x200,-0x108(%RBP) |
0x4664f0 MOV -0x1e8(%RBP),%RCX |
0x4664f7 CMP -0x1e0(%RBP),%RCX |
0x4664fe LEA 0x1(%RCX),%RCX |
0x466502 JE 466380 |
0x466508 CMP $0x3f,%RAX |
0x46650c MOV $0x3f,%R10D |
0x466512 MOV %RAX,-0x1f0(%RBP) |
0x466519 CMOVL %RAX,%R10 |
0x46651d INC %R10 |
0x466520 MOV %RCX,-0x1e8(%RBP) |
0x466527 MOV %RCX,%RAX |
0x46652a SAL $0x6,%RAX |
0x46652e MOV -0xe8(%RBP),%RCX |
0x466535 MOV %RAX,-0x70(%RBP) |
0x466539 SUB %RAX,%RCX |
0x46653c CMP $0x3f,%RCX |
0x466540 MOV $0x3f,%EAX |
0x466545 CMOVGE %RAX,%RCX |
0x466549 MOV %RCX,-0x110(%RBP) |
0x466550 CMPQ $0x8,-0x118(%RBP) |
0x466558 MOV %R10,-0x88(%RBP) |
0x46655f JAE 466680 |
0x466565 MOV -0x100(%RBP),%RAX |
0x46656c CMP -0x118(%RBP),%RAX |
0x466573 JE 4664c0 |
0x466579 MOV -0x110(%RBP),%RAX |
0x466580 INC %RAX |
0x466583 MOV %RAX,%RDI |
0x466586 AND $-0x4,%RAX |
0x46658a LEA -0x1(%RAX),%R8 |
0x46658e MOV -0x108(%RBP),%R10 |
0x466595 MOV -0x100(%RBP),%R11 |
0x46659c JMP 4665d4 |
(794) 0x4665c0 ADD %RSI,%R10 |
(794) 0x4665c3 CMP -0x120(%RBP),%R11 |
(794) 0x4665ca LEA 0x1(%R11),%R11 |
(794) 0x4665ce JE 4664c0 |
(794) 0x4665d4 LEA (%R14,%R11,1),%RCX |
(794) 0x4665d8 ADD %R15,%RCX |
(794) 0x4665db VMOVSD (%R12,%RCX,8),%XMM0 |
(794) 0x4665e1 TEST %RAX,%RAX |
(794) 0x4665e4 JE 466640 |
(794) 0x4665e6 VBROADCASTSD %XMM0,%YMM1 |
(794) 0x4665eb XOR %R9D,%R9D |
(794) 0x4665ee XCHG %AX,%AX |
(795) 0x4665f0 VMOVUPD (%R10,%R9,8),%YMM2 |
(795) 0x4665f6 VFMADD213PD (%RDX,%R9,8),%YMM1,%YMM2 |
(795) 0x4665fc VMOVUPD %YMM2,(%RDX,%R9,8) |
(795) 0x466602 ADD $0x4,%R9 |
(795) 0x466606 CMP %R8,%R9 |
(795) 0x466609 JLE 4665f0 |
(794) 0x46660b MOV %RAX,%R9 |
(794) 0x46660e CMP %RAX,%RDI |
(794) 0x466611 MOV -0x88(%RBP),%RCX |
(794) 0x466618 JNE 466650 |
(794) 0x46661a JMP 4665c0 |
(794) 0x466640 XOR %R9D,%R9D |
(794) 0x466643 MOV -0x88(%RBP),%RCX |
(794) 0x46664a NOPW (%RAX,%RAX,1) |
(793) 0x466650 VMOVSD (%R10,%R9,8),%XMM1 |
(793) 0x466656 VFMADD213SD (%RDX,%R9,8),%XMM0,%XMM1 |
(793) 0x46665c VMOVSD %XMM1,(%RDX,%R9,8) |
(793) 0x466662 INC %R9 |
(793) 0x466665 CMP %R9,%RCX |
(793) 0x466668 JNE 466650 |
(794) 0x46666a JMP 4665c0 |
0x466680 MOV -0x110(%RBP),%RAX |
0x466687 INC %RAX |
0x46668a MOV %RAX,-0x230(%RBP) |
0x466691 MOV %RAX,%R11 |
0x466694 AND $-0x4,%R11 |
0x466698 LEA -0x1(%R11),%RCX |
0x46669c MOV -0x70(%RBP),%RAX |
0x4666a0 ADD -0x1d8(%RBP),%RAX |
0x4666a7 MOV %RAX,-0x70(%RBP) |
0x4666ab MOV -0xf8(%RBP),%RAX |
0x4666b2 MOV -0xf0(%RBP),%RDI |
0x4666b9 XOR %R9D,%R9D |
0x4666bc MOV %RCX,-0x250(%RBP) |
0x4666c3 MOV %R11,-0x228(%RBP) |
0x4666ca JMP 466738 |
(796) 0x466700 MOV -0x128(%RBP),%RDI |
(796) 0x466707 ADD -0x80(%RBP),%RDI |
(796) 0x46670b MOV -0x78(%RBP),%RSI |
(796) 0x46670f ADD %RSI,%RAX |
(796) 0x466712 MOV -0x260(%RBP),%R9 |
(796) 0x466719 CMP -0x248(%RBP),%R9 |
(796) 0x466720 LEA 0x1(%R9),%R9 |
(796) 0x466724 MOV -0x240(%RBP),%R12 |
(796) 0x46672b MOV -0x250(%RBP),%RCX |
(796) 0x466732 JE 466565 |
(796) 0x466738 MOV %RDI,-0x128(%RBP) |
(796) 0x46673f LEA (%R14,%R9,8),%R8 |
(796) 0x466743 ADD %R15,%R8 |
(796) 0x466746 VMOVUPD (%R12,%R8,8),%YMM0 |
(796) 0x46674c VMOVUPD 0x20(%R12,%R8,8),%YMM1 |
(796) 0x466753 TEST %R11,%R11 |
(796) 0x466756 MOV -0x238(%RBP),%RDI |
(796) 0x46675d MOV %R9,-0x260(%RBP) |
(796) 0x466764 JE 4668c0 |
(796) 0x46676a MOV %RAX,-0x258(%RBP) |
(796) 0x466771 VBROADCASTSD %XMM0,%YMM2 |
(796) 0x466776 VXORPS %XMM3,%XMM3,%XMM3 |
(796) 0x46677a VPERMPD $0x55,%YMM0,%YMM3 |
(796) 0x466780 VXORPS %XMM4,%XMM4,%XMM4 |
(796) 0x466784 VPERMPD $-0x56,%YMM0,%YMM4 |
(796) 0x46678a VXORPS %XMM5,%XMM5,%XMM5 |
(796) 0x46678e VPERMPD $-0x1,%YMM0,%YMM5 |
(796) 0x466794 VBROADCASTSD %XMM1,%YMM6 |
(796) 0x466799 VXORPS %XMM7,%XMM7,%XMM7 |
(796) 0x46679d VPERMPD $0x55,%YMM1,%YMM7 |
(796) 0x4667a3 VXORPS %XMM8,%XMM8,%XMM8 |
(796) 0x4667a8 VPERMPD $-0x56,%YMM1,%YMM8 |
(796) 0x4667ae VXORPS %XMM9,%XMM9,%XMM9 |
(796) 0x4667b3 VPERMPD $-0x1,%YMM1,%YMM9 |
(796) 0x4667b9 MOV %RSI,%R8 |
(796) 0x4667bc IMUL %R9,%R8 |
(796) 0x4667c0 ADD -0x70(%RBP),%R8 |
(796) 0x4667c4 XOR %R9D,%R9D |
(796) 0x4667c7 MOV -0x210(%RBP),%R11 |
(796) 0x4667ce MOV -0x208(%RBP),%R15 |
(796) 0x4667d5 MOV -0x200(%RBP),%R10 |
(796) 0x4667dc MOV -0x1f8(%RBP),%RAX |
(796) 0x4667e3 MOV -0x218(%RBP),%R14 |
(796) 0x4667ea MOV %RDI,%RSI |
(796) 0x4667ed MOV %RCX,%RDI |
(796) 0x4667f0 MOV -0x128(%RBP),%RBX |
(796) 0x4667f7 NOPW (%RAX,%RAX,1) |
(797) 0x466800 LEA (%R8,%R9,1),%R12 |
(797) 0x466804 ADD %R14,%R12 |
(797) 0x466807 VMOVUPD (%RBX,%R9,8),%YMM10 |
(797) 0x46680d VFMADD213PD (%RDX,%R9,8),%YMM2,%YMM10 |
(797) 0x466813 MOV -0x130(%RBP),%RCX |
(797) 0x46681a ADD %R12,%RCX |
(797) 0x46681d VFMADD231PD (%R13,%RCX,8),%YMM3,%YMM10 |
(797) 0x466824 LEA (%R12,%RSI,1),%RCX |
(797) 0x466828 VFMADD231PD (%R13,%RCX,8),%YMM4,%YMM10 |
(797) 0x46682f LEA (%R12,%R11,1),%RCX |
(797) 0x466833 VFMADD231PD (%R13,%RCX,8),%YMM5,%YMM10 |
(797) 0x46683a LEA (%R12,%R15,1),%RCX |
(797) 0x46683e VFMADD231PD (%R13,%RCX,8),%YMM6,%YMM10 |
(797) 0x466845 LEA (%R12,%R10,1),%RCX |
(797) 0x466849 VFMADD231PD (%R13,%RCX,8),%YMM7,%YMM10 |
(797) 0x466850 LEA (%R12,%RAX,1),%RCX |
(797) 0x466854 VFMADD231PD (%R13,%RCX,8),%YMM8,%YMM10 |
(797) 0x46685b ADD -0x268(%RBP),%R12 |
(797) 0x466862 VFMADD231PD (%R13,%R12,8),%YMM9,%YMM10 |
(797) 0x466869 VMOVUPD %YMM10,(%RDX,%R9,8) |
(797) 0x46686f ADD $0x4,%R9 |
(797) 0x466873 CMP %RDI,%R9 |
(797) 0x466876 JLE 466800 |
(796) 0x466878 MOV -0x228(%RBP),%R11 |
(796) 0x46687f MOV %R11,%R8 |
(796) 0x466882 CMP %R11,-0x230(%RBP) |
(796) 0x466889 MOV -0x68(%RBP),%R15 |
(796) 0x46688d MOV -0x220(%RBP),%R14 |
(796) 0x466894 MOV -0x88(%RBP),%R10 |
(796) 0x46689b MOV -0x258(%RBP),%RAX |
(796) 0x4668a2 MOV -0x130(%RBP),%RBX |
(796) 0x4668a9 JNE 4668d0 |
(796) 0x4668ab JMP 466700 |
(796) 0x4668c0 XOR %R8D,%R8D |
(796) 0x4668c3 NOPW %CS:(%RAX,%RAX,1) |
(791) 0x4668d0 LEA (%RAX,%R8,1),%RCX |
(791) 0x4668d4 LEA (%RBX,%RCX,1),%R9 |
(791) 0x4668d8 LEA (%RBX,%R9,1),%R12 |
(791) 0x4668dc LEA (%RBX,%R12,1),%RSI |
(791) 0x4668e0 LEA (%RBX,%RSI,1),%RDI |
(791) 0x4668e4 VMOVQ %RDI,%XMM2 |
(791) 0x4668e9 ADD %RBX,%RDI |
(791) 0x4668ec VMOVQ %RDI,%XMM3 |
(791) 0x4668f1 LEA (%RBX,%RDI,1),%RDI |
(791) 0x4668f5 VMOVQ %RDI,%XMM4 |
(791) 0x4668fa LEA (%RBX,%RDI,1),%RDI |
(791) 0x4668fe VMOVQ %RDI,%XMM5 |
(791) 0x466903 VMOVQ %RCX,%XMM6 |
(791) 0x466908 VMOVQ %R9,%XMM7 |
(791) 0x46690d VMOVQ %R12,%XMM8 |
(791) 0x466912 VMOVQ %RSI,%XMM9 |
(791) 0x466917 VPUNPCKLQDQ %XMM7,%XMM6,%XMM6 |
(791) 0x46691b VPUNPCKLQDQ %XMM9,%XMM8,%XMM7 |
(791) 0x466920 VINSERTI128 $0x1,%XMM7,%YMM6,%YMM6 |
(791) 0x466926 KXNORW %K0,%K0,%K1 |
(791) 0x46692a VPXOR %XMM7,%XMM7,%XMM7 |
(791) 0x46692e VGATHERQPD (%R13,%YMM6,8),%YMM7{%K1} |
(791) 0x466936 VPUNPCKLQDQ %XMM3,%XMM2,%XMM2 |
(791) 0x46693a VPUNPCKLQDQ %XMM5,%XMM4,%XMM3 |
(791) 0x46693e VINSERTI128 $0x1,%XMM3,%YMM2,%YMM2 |
(791) 0x466944 KXNORW %K0,%K0,%K1 |
(791) 0x466948 VPXOR %XMM3,%XMM3,%XMM3 |
(791) 0x46694c VGATHERQPD (%R13,%YMM2,8),%YMM3{%K1} |
(791) 0x466954 VMULPD %YMM1,%YMM3,%YMM2 |
(791) 0x466958 VFMADD231PD %YMM7,%YMM0,%YMM2 |
(791) 0x46695d VEXTRACTF128 $0x1,%YMM2,%XMM3 |
(791) 0x466963 VADDPD %XMM3,%XMM2,%XMM2 |
(791) 0x466967 VSHUFPD $0x1,%XMM2,%XMM2,%XMM3 |
(791) 0x46696c VADDSD %XMM3,%XMM2,%XMM2 |
(791) 0x466970 VADDSD (%RDX,%R8,8),%XMM2,%XMM2 |
(791) 0x466976 VMOVSD %XMM2,(%RDX,%R8,8) |
(791) 0x46697c INC %R8 |
(791) 0x46697f CMP %R8,%R10 |
(791) 0x466982 JNE 4668d0 |
(796) 0x466988 JMP 466700 |
/scratch_na/users/xoserete/qaas_runs/171-420-0328/intel/Kripke/build/Kripke/src/Kripke/Kernel/LPlusTimes.cpp: 57 - 57 |
-------------------------------------------------------------------------------- |
57: rhs(d,g,z) += ell_plus(d, nm) * phi_out(nm, g, z); |
/scratch_na/users/xoserete/qaas_runs/171-420-0328/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
/scratch_na/users/xoserete/qaas_runs/171-420-0328/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/util/View.hpp: 110 - 110 |
-------------------------------------------------------------------------------- |
110: return data[idx]; |
Coverage (%) | Name | Source Location | Module |
---|---|---|---|
►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
○ | __kmp_invoke_task_func | libiomp5.so |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 11.52 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.58 |
Bottlenecks | micro-operation queue, |
Function | void LPlusTimesSdom::operator() |
Source | LPlusTimes.cpp:57-57,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.50 |
CQA cycles if no scalar integer | 9.50 |
CQA cycles if FP arith vectorized | 9.50 |
CQA cycles if fully vectorized | 0.82 |
Front-end cycles | 9.50 |
DIV/SQRT cycles | 4.20 |
P0 cycles | 4.20 |
P1 cycles | 6.00 |
P2 cycles | 6.00 |
P3 cycles | 6.00 |
P4 cycles | 4.20 |
P5 cycles | 4.20 |
P6 cycles | 6.00 |
P7 cycles | 6.00 |
P8 cycles | 6.00 |
P9 cycles | 4.20 |
P10 cycles | 6.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 10.12 - 10.13 |
Stall cycles (UFS) | 0.00 |
Nb insns | 54.00 |
Nb uops | 57.00 |
Nb loads | 18.00 |
Nb stores | 12.00 |
Nb stack references | 16.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 25.26 |
Bytes prefetched | 0.00 |
Bytes loaded | 144.00 |
Bytes stored | 96.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.00 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 11.11 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 11.52 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.58 |
Bottlenecks | micro-operation queue, |
Function | void LPlusTimesSdom::operator() |
Source | LPlusTimes.cpp:57-57,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 9.50 |
CQA cycles if no scalar integer | 9.50 |
CQA cycles if FP arith vectorized | 9.50 |
CQA cycles if fully vectorized | 0.82 |
Front-end cycles | 9.50 |
DIV/SQRT cycles | 4.20 |
P0 cycles | 4.20 |
P1 cycles | 6.00 |
P2 cycles | 6.00 |
P3 cycles | 6.00 |
P4 cycles | 4.20 |
P5 cycles | 4.20 |
P6 cycles | 6.00 |
P7 cycles | 6.00 |
P8 cycles | 6.00 |
P9 cycles | 4.20 |
P10 cycles | 6.00 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 10.12 - 10.13 |
Stall cycles (UFS) | 0.00 |
Nb insns | 54.00 |
Nb uops | 57.00 |
Nb loads | 18.00 |
Nb stores | 12.00 |
Nb stack references | 16.00 |
FLOP/cycle | 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 25.26 |
Bytes prefetched | 0.00 |
Bytes loaded | 144.00 |
Bytes stored | 96.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.00 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 11.11 |
Path / |
nb instructions | 54 |
nb uops | 57 |
loop length | 298 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 16 |
micro-operation queue | 9.50 cycles |
front end | 9.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.20 | 4.20 | 6.00 | 6.00 | 6.00 | 4.20 | 4.20 | 6.00 | 6.00 | 6.00 | 4.20 | 6.00 |
cycles | 4.20 | 4.20 | 6.00 | 6.00 | 6.00 | 4.20 | 4.20 | 6.00 | 6.00 | 6.00 | 4.20 | 6.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 10.12-10.13 |
Stall cycles | 0.00 |
Front-end | 9.50 |
Dispatch | 6.00 |
Overall L1 | 9.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x200,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADDQ $0x200,-0xf0(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 1 |
MOV -0x1f0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $-0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADDQ $0x40,-0xf8(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADDQ $0x200,-0x108(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 1 |
MOV -0x1e8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x1e0(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%RCX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JE 466380 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x520> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3f,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3f,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x1f0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVL %RAX,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x1e8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x3f,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3f,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %RAX,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0x8,-0x118(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R10,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 466680 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x820> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x118(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4664c0 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x660> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x1(%RAX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x108(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x100(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4665d4 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x774> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x230(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x1(%R11),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x1d8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0x250(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,-0x228(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 466738 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x8d8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
nb instructions | 54 |
nb uops | 57 |
loop length | 298 |
used x86 registers | 9 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 16 |
micro-operation queue | 9.50 cycles |
front end | 9.50 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 4.20 | 4.20 | 6.00 | 6.00 | 6.00 | 4.20 | 4.20 | 6.00 | 6.00 | 6.00 | 4.20 | 6.00 |
cycles | 4.20 | 4.20 | 6.00 | 6.00 | 6.00 | 4.20 | 4.20 | 6.00 | 6.00 | 6.00 | 4.20 | 6.00 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 10.12-10.13 |
Stall cycles | 0.00 |
Front-end | 9.50 |
Dispatch | 6.00 |
Overall L1 | 9.50 |
all | 0% |
load | 0% |
store | 0% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD $0x200,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADDQ $0x200,-0xf0(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 1 |
MOV -0x1f0(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD $-0x40,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADDQ $0x40,-0xf8(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 0.50 |
ADDQ $0x200,-0x108(%RBP) | 2 | 0.20 | 0.20 | 0.33 | 0.33 | 0.50 | 0.20 | 0.20 | 0.50 | 0.50 | 0.50 | 0.20 | 0.33 | 1 | 1 |
MOV -0x1e8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x1e0(%RBP),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA 0x1(%RCX),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JE 466380 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x520> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x3f,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3f,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV %RAX,-0x1f0(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMOVL %RAX,%R10 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
INC %R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RCX,-0x1e8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RCX,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
SAL $0x6,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
MOV -0xe8(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
SUB %RAX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP $0x3f,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV $0x3f,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMOVGE %RAX,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %RCX,-0x110(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
CMPQ $0x8,-0x118(%RBP) | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %R10,-0x88(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JAE 466680 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x820> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x100(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP -0x118(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
JE 4664c0 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x660> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x1(%RAX),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x108(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x100(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 4665d4 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x774> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |
MOV -0x110(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV %RAX,-0x230(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %RAX,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $-0x4,%R11 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
LEA -0x1(%R11),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD -0x1d8(%RBP),%RAX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV %RAX,-0x70(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV -0xf8(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0xf0(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
XOR %R9D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %RCX,-0x250(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
MOV %R11,-0x228(%RBP) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
JMP 466738 <_ZNK14LPlusTimesSdomclIN6Kripke11ArchLayoutTINS1_12ArchT_OpenMPENS1_11LayoutT_DGZEEEEEvT_NS1_6SdomIdERKNS1_4Core3SetESB_SB_SB_RNS8_5FieldIdJNS1_6MomentENS1_5GroupENS1_4ZoneEEEERNSC_IdJNS1_9DirectionESE_SF_EEERNSC_IdJSI_SD_EEE.extracted+0x8d8> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 5.84 |