Loop Id: 34 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.01% |
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Loop Id: 34 | Module: exec | Source: forall.hpp:59-59 [...] | Coverage: 0.01% |
---|
0x24f840 MOV -0x118(%RBP),%RCX |
0x24f847 MOV -0xf0(%RBP),%R12 |
0x24f84e LEA 0x1(%RCX),%R9 |
0x24f852 CMP %RCX,-0x110(%RBP) |
0x24f859 JLE 24fb5e |
0x24f85f MOV %R9,%RAX |
0x24f862 CQTO |
0x24f864 MOV %R9,-0x118(%RBP) |
0x24f86b IDIV %R12 |
0x24f86e MOV -0x48(%RBP),%RSI |
0x24f872 ADD -0x108(%RBP),%RDX |
0x24f879 MOV %RDX,%RCX |
0x24f87c IMUL -0xf8(%RBP),%RCX |
0x24f884 MOV %RDX,%R10 |
0x24f887 IMUL -0x68(%RBP),%R10 |
0x24f88c IMUL -0xc0(%RBP),%RDX |
0x24f894 ADD -0xc8(%RBP),%RDX |
0x24f89b ADD %RCX,%RSI |
0x24f89e ADD -0x40(%RBP),%RCX |
0x24f8a2 MOV %RAX,%R9 |
0x24f8a5 MOV -0x70(%RBP),%RAX |
0x24f8a9 ADD %R9,%RAX |
0x24f8ac ADD -0xe8(%RBP),%R9 |
0x24f8b3 MOV %RAX,-0x150(%RBP) |
0x24f8ba IMUL -0x100(%RBP),%RAX |
0x24f8c2 ADD %RAX,%RCX |
0x24f8c5 ADD %RAX,%RSI |
0x24f8c8 LEA (%RBX,%RCX,8),%RAX |
0x24f8cc LEA 0x8(,%R9,8),%RCX |
0x24f8d4 SAL $0x3,%R9 |
0x24f8d8 LEA (%RBX,%RSI,8),%R11 |
0x24f8dc MOV %RSI,-0xa8(%RBP) |
0x24f8e3 MOV %R9,-0x148(%RBP) |
0x24f8ea MOV -0xe0(%RBP),%R9 |
0x24f8f1 MOV %RCX,-0x128(%RBP) |
0x24f8f8 MOV -0xd0(%RBP),%RCX |
0x24f8ff MOV %RAX,-0x130(%RBP) |
0x24f906 MOV %R11,-0x138(%RBP) |
0x24f90d XOR %R11D,%R11D |
0x24f910 LEA (%R9,%R10,1),%R12 |
0x24f914 ADD -0xd8(%RBP),%R10 |
0x24f91b LEA (,%R12,8),%RAX |
0x24f923 MOV %RAX,-0x120(%RBP) |
0x24f92a SAL $0x3,%R10 |
0x24f92e MOV %R10,-0x140(%RBP) |
0x24f935 LEA (%RCX,%RSI,8),%R10 |
0x24f939 JMP 24f95a |
(35) 0x24f940 ADD -0xb0(%RBP),%RDX |
(35) 0x24f947 ADD -0x98(%RBP),%R12 |
(35) 0x24f94e INC %R11 |
(35) 0x24f951 CMP %R8,%R11 |
(35) 0x24f954 JE 24f840 |
(35) 0x24f95a MOV -0x50(%RBP),%RAX |
(35) 0x24f95e LEA (%R11,%RAX,1),%R13 |
(35) 0x24f962 IMUL -0xa0(%RBP),%R13 |
(35) 0x24f96a ADD -0x150(%RBP),%R13 |
(35) 0x24f971 CMPB $0,-0x29(%RBP) |
(35) 0x24f975 JE 24f9c0 |
(35) 0x24f977 XOR %ESI,%ESI |
(35) 0x24f979 MOV -0xa8(%RBP),%RAX |
(35) 0x24f980 MOV %R15,%R9 |
(35) 0x24f983 SUB %RSI,%R9 |
(35) 0x24f986 ADD %RSI,%RAX |
(35) 0x24f989 ADD %R12,%RSI |
(35) 0x24f98c LEA (%RBX,%RAX,8),%RCX |
(35) 0x24f990 MOV -0x38(%RBP),%RAX |
(35) 0x24f994 LEA (%RAX,%RSI,8),%RSI |
(35) 0x24f998 XOR %EAX,%EAX |
(35) 0x24f99a NOPW (%RAX,%RAX,1) |
(33) 0x24f9a0 VMOVSD (%R14,%R13,8),%XMM0 |
(33) 0x24f9a6 VMOVSD (%RSI,%RAX,8),%XMM1 |
(33) 0x24f9ab VFMADD213SD (%RCX,%RAX,8),%XMM0,%XMM1 |
(33) 0x24f9b1 VMOVSD %XMM1,(%RCX,%RAX,8) |
(33) 0x24f9b6 INC %RAX |
(33) 0x24f9b9 CMP %RAX,%R9 |
(33) 0x24f9bc JNE 24f9a0 |
(35) 0x24f9be JMP 24f940 |
(35) 0x24f9c0 MOV -0xb0(%RBP),%RSI |
(35) 0x24f9c7 MOV -0x120(%RBP),%R8 |
(35) 0x24f9ce MOV -0x128(%RBP),%RCX |
(35) 0x24f9d5 MOV -0x148(%RBP),%RAX |
(35) 0x24f9dc MOV -0x138(%RBP),%R15 |
(35) 0x24f9e3 IMUL %R11,%RSI |
(35) 0x24f9e7 LEA (%RCX,%R11,8),%RCX |
(35) 0x24f9eb LEA (%RAX,%R11,8),%RAX |
(35) 0x24f9ef ADD %R14,%RCX |
(35) 0x24f9f2 ADD %R14,%RAX |
(35) 0x24f9f5 LEA (%R8,%RSI,1),%R9 |
(35) 0x24f9f9 MOV -0x38(%RBP),%R8 |
(35) 0x24f9fd ADD -0x140(%RBP),%RSI |
(35) 0x24fa04 ADD %R8,%R9 |
(35) 0x24fa07 ADD %R8,%RSI |
(35) 0x24fa0a CMP %RCX,%R15 |
(35) 0x24fa0d MOV -0x130(%RBP),%RCX |
(35) 0x24fa14 SETB %R8B |
(35) 0x24fa18 CMP %RCX,%RAX |
(35) 0x24fa1b SETB %BL |
(35) 0x24fa1e CMP %RSI,%R15 |
(35) 0x24fa21 SETB %AL |
(35) 0x24fa24 CMP %RCX,%R9 |
(35) 0x24fa27 SETB %CL |
(35) 0x24fa2a TEST %BL,%R8B |
(35) 0x24fa2d JNE 24fa5b |
(35) 0x24fa2f MOV -0x90(%RBP),%R8 |
(35) 0x24fa36 MOV -0x88(%RBP),%RBX |
(35) 0x24fa3d MOV -0x80(%RBP),%R15 |
(35) 0x24fa41 AND %CL,%AL |
(35) 0x24fa43 MOV $0,%ESI |
(35) 0x24fa48 JNE 24f979 |
(35) 0x24fa4e CMP $0x20,%R15 |
(35) 0x24fa52 JAE 24fa72 |
(35) 0x24fa54 XOR %EAX,%EAX |
(35) 0x24fa56 JMP 24faff |
(35) 0x24fa5b MOV -0x90(%RBP),%R8 |
(35) 0x24fa62 MOV -0x88(%RBP),%RBX |
(35) 0x24fa69 MOV -0x80(%RBP),%R15 |
(35) 0x24fa6d JMP 24f977 |
(35) 0x24fa72 VBROADCASTSD (%R14,%R13,8),%ZMM0 |
(35) 0x24fa79 XOR %R9D,%R9D |
(35) 0x24fa7c NOPL (%RAX) |
(36) 0x24fa80 VMOVUPD -0xc0(%RDX,%R9,8),%ZMM1 |
(36) 0x24fa88 VMOVUPD -0x80(%RDX,%R9,8),%ZMM2 |
(36) 0x24fa90 VMOVUPD -0x40(%RDX,%R9,8),%ZMM3 |
(36) 0x24fa98 VMOVUPD (%RDX,%R9,8),%ZMM4 |
(36) 0x24fa9f VFMADD213PD -0xc0(%R10,%R9,8),%ZMM0,%ZMM1 |
(36) 0x24faa7 VFMADD213PD -0x80(%R10,%R9,8),%ZMM0,%ZMM2 |
(36) 0x24faaf VFMADD213PD -0x40(%R10,%R9,8),%ZMM0,%ZMM3 |
(36) 0x24fab7 VFMADD213PD (%R10,%R9,8),%ZMM0,%ZMM4 |
(36) 0x24fabe VMOVUPD %ZMM1,-0xc0(%R10,%R9,8) |
(36) 0x24fac6 VMOVUPD %ZMM2,-0x80(%R10,%R9,8) |
(36) 0x24face VMOVUPD %ZMM3,-0x40(%R10,%R9,8) |
(36) 0x24fad6 VMOVUPD %ZMM4,(%R10,%R9,8) |
(36) 0x24fadd ADD $0x20,%R9 |
(36) 0x24fae1 CMP %R9,%RDI |
(36) 0x24fae4 JNE 24fa80 |
(35) 0x24fae6 CMP %RDI,%R15 |
(35) 0x24fae9 JE 24f940 |
(35) 0x24faef MOV %RDI,%RAX |
(35) 0x24faf2 MOV %RDI,%RSI |
(35) 0x24faf5 TEST $0x1c,%R15B |
(35) 0x24faf9 JE 24f979 |
(35) 0x24faff MOV -0xa8(%RBP),%RCX |
(35) 0x24fb06 MOV -0x38(%RBP),%R9 |
(35) 0x24fb0a VBROADCASTSD (%R14,%R13,8),%YMM0 |
(35) 0x24fb10 ADD %RAX,%RCX |
(35) 0x24fb13 LEA (%RBX,%RCX,8),%RSI |
(35) 0x24fb17 LEA (%RAX,%R12,1),%RCX |
(35) 0x24fb1b LEA (%R9,%RCX,8),%RCX |
(35) 0x24fb1f MOV -0x78(%RBP),%R9 |
(35) 0x24fb23 SUB %RAX,%R9 |
(35) 0x24fb26 XOR %EAX,%EAX |
(35) 0x24fb28 NOPL (%RAX,%RAX,1) |
(37) 0x24fb30 VMOVUPD (%RCX,%RAX,8),%YMM1 |
(37) 0x24fb35 VFMADD213PD (%RSI,%RAX,8),%YMM0,%YMM1 |
(37) 0x24fb3b VMOVUPD %YMM1,(%RSI,%RAX,8) |
(37) 0x24fb40 ADD $0x4,%RAX |
(37) 0x24fb44 CMP %RAX,%R9 |
(37) 0x24fb47 JNE 24fb30 |
(35) 0x24fb49 MOV -0x78(%RBP),%RAX |
(35) 0x24fb4d MOV %RAX,%RSI |
(35) 0x24fb50 CMP %RAX,%R15 |
(35) 0x24fb53 JE 24f940 |
(35) 0x24fb59 JMP 24f979 |
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/openmp/kernel/Collapse.hpp: 83 - 83 |
-------------------------------------------------------------------------------- |
83: for (i0 = 0; i0 < l0; ++i0) { |
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/src/Kripke/Kernel/LTimes.cpp: 62 - 62 |
-------------------------------------------------------------------------------- |
62: phi(nm,g,z) += ell(nm, d) * psi(d, g, z); |
/beegfs/hackathon/users/eoseret/qaas_runs/170-850-6313/intel/Kripke/build/Kripke/tpl/raja/include/RAJA/policy/loop/forall.hpp: 59 - 59 |
-------------------------------------------------------------------------------- |
59: for (decltype(distance_it) i = 0; i < distance_it; ++i) { |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.76 - 4.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 - 1.44 |
Bottlenecks | P8, P9, |
Function | .omp_outlined.#0x24f610 |
Source | Collapse.hpp:83-83,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.33 - 12.00 |
CQA cycles if no scalar integer | 8.33 - 12.00 |
CQA cycles if FP arith vectorized | 8.33 - 12.00 |
CQA cycles if fully vectorized | 1.75 - 3.00 |
Front-end cycles | 7.83 |
DIV/SQRT cycles | 6.25 |
P0 cycles | 6.25 |
P1 cycles | 6.25 |
P2 cycles | 6.25 |
P3 cycles | 2.00 |
P4 cycles | 8.33 |
P5 cycles | 8.33 |
P6 cycles | 8.33 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 7.00 - 12.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 47.00 |
Nb uops | 47.00 |
Nb loads | 16.00 |
Nb stores | 9.00 |
Nb stack references | 24.00 |
FLOP/cycle | 0.00 - 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.67 - 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 72.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.19 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 10.94 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.00 |
CQA speedup if FP arith vectorized | 1.00 |
CQA speedup if fully vectorized | 4.76 - 4.00 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.06 - 1.44 |
Bottlenecks | P8, P9, |
Function | .omp_outlined.#0x24f610 |
Source | Collapse.hpp:83-83,forall.hpp:59-59 |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 8.33 - 12.00 |
CQA cycles if no scalar integer | 8.33 - 12.00 |
CQA cycles if FP arith vectorized | 8.33 - 12.00 |
CQA cycles if fully vectorized | 1.75 - 3.00 |
Front-end cycles | 7.83 |
DIV/SQRT cycles | 6.25 |
P0 cycles | 6.25 |
P1 cycles | 6.25 |
P2 cycles | 6.25 |
P3 cycles | 2.00 |
P4 cycles | 8.33 |
P5 cycles | 8.33 |
P6 cycles | 8.33 |
P7 cycles | 0.00 |
P8 cycles | 0.00 |
P9 cycles | 0.00 |
P10 cycles | 0.00 |
P11 cycles | 0.00 |
P12 cycles | 0.00 |
P13 cycles | 7.00 - 12.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | NA |
Stall cycles (UFS) | NA |
Nb insns | 47.00 |
Nb uops | 47.00 |
Nb loads | 16.00 |
Nb stores | 9.00 |
Nb stack references | 24.00 |
FLOP/cycle | 0.00 - 0.00 |
Nb FLOP add-sub | 0.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 0.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 16.67 - 24.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 128.00 |
Bytes stored | 72.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 0.00 |
Vectorization ratio load | 0.00 |
Vectorization ratio store | 0.00 |
Vectorization ratio mul | 0.00 |
Vectorization ratio add_sub | 0.00 |
Vectorization ratio fma | NA |
Vectorization ratio div_sqrt | 0.00 |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 12.19 |
Vector-efficiency ratio load | 12.50 |
Vector-efficiency ratio store | 12.50 |
Vector-efficiency ratio mul | 12.50 |
Vector-efficiency ratio add_sub | 12.50 |
Vector-efficiency ratio fma | NA |
Vector-efficiency ratio div_sqrt | 12.50 |
Vector-efficiency ratio other | 10.94 |
Path / |
Function | .omp_outlined.#0x24f610 |
Source file and lines | forall.hpp:59-59 |
Module | exec |
nb instructions | 47 |
nb uops | 47 |
loop length | 251 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 7.83 cycles |
front end | 7.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.25 | 6.25 | 6.25 | 6.25 | 2.00 | 8.33 | 8.33 | 8.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 6.25 | 6.25 | 6.25 | 6.25 | 2.00 | 8.33 | 8.33 | 8.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 7.00-12.00 |
Front-end | 7.83 |
Dispatch | 8.33 |
DIV/SQRT | 7.00-12.00 |
Overall L1 | 8.33-12.00 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 10% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x118(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xf0(%RBP),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%RCX),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RCX,-0x110(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JLE 24fb5e <.omp_outlined.+0x54e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R9,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CQTO | |||||||||||||||||
MOV %R9,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
MOV -0x48(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD -0x108(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL -0xf8(%RBP),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RDX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL -0x68(%RBP),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL -0xc0(%RBP),%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD -0xc8(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD -0x40(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %R9,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD -0xe8(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL -0x100(%RBP),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RAX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%RCX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x8(,%R9,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x3,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%RSI,8),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RSI,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R9,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xe0(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R11,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%R9,%R10,1),%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD -0xd8(%RBP),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
LEA (,%R12,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x3,%R10 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%RCX,%RSI,8),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JMP 24f95a <.omp_outlined.+0x34a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Function | .omp_outlined.#0x24f610 |
Source file and lines | forall.hpp:59-59 |
Module | exec |
nb instructions | 47 |
nb uops | 47 |
loop length | 251 |
used x86 registers | 10 |
used mmx registers | 0 |
used xmm registers | 0 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 24 |
micro-operation queue | 7.83 cycles |
front end | 7.83 cycles |
ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 6.25 | 6.25 | 6.25 | 6.25 | 2.00 | 8.33 | 8.33 | 8.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
cycles | 6.25 | 6.25 | 6.25 | 6.25 | 2.00 | 8.33 | 8.33 | 8.33 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | 0.00 |
Cycles executing div or sqrt instructions | 7.00-12.00 |
Front-end | 7.83 |
Dispatch | 8.33 |
DIV/SQRT | 7.00-12.00 |
Overall L1 | 8.33-12.00 |
all | 0% |
load | 0% |
store | 0% |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 12% |
load | 12% |
store | 12% |
mul | 12% |
add-sub | 12% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 12% |
other | 10% |
Instruction | Nb FU | ALU0/BRU0 | ALU1 | ALU2 | ALU3 | BRU1 | AGU0 | AGU1 | AGU2 | FP0 | FP1 | FP2 | FP3 | FP4 | FP5 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
MOV -0x118(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV -0xf0(%RBP),%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
LEA 0x1(%RCX),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
CMP %RCX,-0x110(%RBP) | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
JLE 24fb5e <.omp_outlined.+0x54e> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50-1 |
MOV %R9,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
CQTO | |||||||||||||||||
MOV %R9,-0x118(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IDIV %R12 | 2 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 9-19 | 7-12 |
MOV -0x48(%RBP),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD -0x108(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL -0xf8(%RBP),%RCX | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
MOV %RDX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
IMUL -0x68(%RBP),%R10 | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
IMUL -0xc0(%RBP),%RDX | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD -0xc8(%RBP),%RDX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
ADD %RCX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD -0x40(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RAX,%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x70(%RBP),%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
ADD %R9,%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD -0xe8(%RBP),%R9 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
MOV %RAX,-0x150(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
IMUL -0x100(%RBP),%RAX | 1 | 0 | 1 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %RAX,%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD %RAX,%RSI | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA (%RBX,%RCX,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
LEA 0x8(,%R9,8),%RCX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
SAL $0x3,%R9 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
LEA (%RBX,%RSI,8),%R11 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RSI,-0xa8(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R9,-0x148(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xe0(%RBP),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RCX,-0x128(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV -0xd0(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.33 |
MOV %RAX,-0x130(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
MOV %R11,-0x138(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
XOR %R11D,%R11D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
LEA (%R9,%R10,1),%R12 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
ADD -0xd8(%RBP),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
LEA (,%R12,8),%RAX | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
MOV %RAX,-0x120(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
SAL $0x3,%R10 | 1 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
MOV %R10,-0x140(%RBP) | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
LEA (%RCX,%RSI,8),%R10 | 1 | 0.25 | 0.25 | 0.25 | 0.25 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.25 |
JMP 24f95a <.omp_outlined.+0x34a> | 1 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |