Loop Id: 44 | Module: exec | Source: :0-0 | Coverage: 0.07% |
---|
Loop Id: 44 | Module: exec | Source: :0-0 | Coverage: 0.07% |
---|
0x40e362 INC %R13 |
0x40e365 CMP %RAX,%R13 |
0x40e368 JAE 40e628 |
0x40e36e MOV -0x150(%RBP),%RDX |
0x40e375 LEA (,%R13,8),%RSI |
0x40e37d MOV 0x18(%RDX),%RDI |
0x40e381 ADD %RSI,%RDI |
0x40e384 VMOVSD (%RDI),%XMM0 |
0x40e388 VCOMISD 0x1440(%RBX),%XMM0 |
0x40e390 JAE 40e362 |
0x40e392 MOV 0x2830(%RBX),%R14 |
0x40e399 SUB 0x2828(%RBX),%R14 |
0x40e3a0 MOV $-0x5555555555555555,%RAX |
0x40e3aa SAR $0x3,%R14 |
0x40e3ae IMUL %RAX,%R14 |
0x40e3b2 TEST %R14D,%R14D |
0x40e3b5 JLE 40e5c0 |
0x40e3bb MOV -0x1d0(%RBP),%R10 |
0x40e3c2 MOV -0x2e0(%RBP),%R9 |
0x40e3c9 DEC %R14D |
0x40e3cc MOV -0x210(%RBP),%RCX |
0x40e3d3 MOVSXD 0x8(%R10),%RAX |
0x40e3d7 MOV 0x18(%R10),%RDX |
0x40e3db LEA (%R14,%R14,2),%R10 |
0x40e3df ADD 0x40(%R9),%RCX |
0x40e3e3 LEA (%R15,%R10,8),%R14 |
0x40e3e7 LEA (%R10,%R10,2),%R10 |
0x40e3eb LEA (%RAX,%R13,1),%R9 |
0x40e3ef ADD %RDX,%RSI |
0x40e3f2 ADD %R9,%RAX |
0x40e3f5 LEA (%RDX,%R9,8),%R8 |
0x40e3f9 LEA (%RDX,%RAX,8),%R9 |
0x40e3fd MOV -0x120(%RBP),%RAX |
0x40e404 MOV %R15,%RDX |
0x40e407 AND $0x3,%R10D |
0x40e40b JE 40e588 |
0x40e411 VMOVSD (%RSI),%XMM2 |
0x40e415 VMOVDDUP %XMM0,%XMM6 |
0x40e419 ADD $0x18,%RAX |
0x40e41d LEA 0x18(%R15),%RDX |
0x40e421 VMOVSD (%R9),%XMM1 |
0x40e426 VADDSD 0x10(%RCX),%XMM1,%XMM5 |
0x40e42b VMOVHPD (%R8),%XMM2,%XMM7 |
0x40e430 VFMADD231SD 0x10(%R15),%XMM0,%XMM5 |
0x40e436 VADDPD (%RCX),%XMM7,%XMM4 |
0x40e43a VFMADD231PD (%R15),%XMM6,%XMM4 |
0x40e43f VMOVSD %XMM5,-0x8(%RAX) |
0x40e444 VMOVUPD %XMM4,-0x18(%RAX) |
0x40e449 VMOVSD (%RDI),%XMM0 |
0x40e44d CMP $0x1,%R10 |
0x40e451 JE 40e588 |
0x40e457 CMP $0x2,%R10 |
0x40e45b JE 40e499 |
0x40e45d VMOVSD (%RSI),%XMM15 |
0x40e461 VMOVSD (%R9),%XMM10 |
0x40e466 VMOVDDUP %XMM0,%XMM8 |
0x40e46a ADD $0x18,%RAX |
0x40e46e VADDSD 0x10(%RCX),%XMM10,%XMM12 |
0x40e473 VFMADD231SD 0x10(%RDX),%XMM0,%XMM12 |
0x40e479 VMOVHPD (%R8),%XMM15,%XMM13 |
0x40e47e VADDPD (%RCX),%XMM13,%XMM11 |
0x40e482 VFMADD231PD (%RDX),%XMM8,%XMM11 |
0x40e487 LEA 0x30(%R15),%RDX |
0x40e48b VMOVSD %XMM12,-0x8(%RAX) |
0x40e490 VMOVUPD %XMM11,-0x18(%RAX) |
0x40e495 VMOVSD (%RDI),%XMM0 |
0x40e499 VMOVSD (%RSI),%XMM9 |
0x40e49d VMOVDDUP %XMM0,%XMM3 |
0x40e4a1 ADD $0x18,%RAX |
0x40e4a5 ADD $0x18,%RDX |
0x40e4a9 VMOVSD (%R9),%XMM14 |
0x40e4ae VADDSD 0x10(%RCX),%XMM14,%XMM2 |
0x40e4b3 VMOVHPD (%R8),%XMM9,%XMM1 |
0x40e4b8 VFMADD231SD -0x8(%RDX),%XMM0,%XMM2 |
0x40e4be VADDPD (%RCX),%XMM1,%XMM6 |
0x40e4c2 VFMADD231PD -0x18(%RDX),%XMM3,%XMM6 |
0x40e4c8 VMOVSD %XMM2,-0x8(%RAX) |
0x40e4cd VMOVUPD %XMM6,-0x18(%RAX) |
0x40e4d2 VMOVSD (%RDI),%XMM0 |
0x40e4d6 JMP 40e588 |
(45) 0x40e4db VMOVSD (%RDI),%XMM13 |
(45) 0x40e4df VMOVSD (%RSI),%XMM14 |
(45) 0x40e4e3 ADD $0x60,%RAX |
(45) 0x40e4e7 ADD $0x60,%RDX |
(45) 0x40e4eb VMOVSD (%R9),%XMM11 |
(45) 0x40e4f0 VADDSD 0x10(%RCX),%XMM11,%XMM1 |
(45) 0x40e4f5 VMOVHPD (%R8),%XMM14,%XMM3 |
(45) 0x40e4fa VMOVDDUP %XMM13,%XMM12 |
(45) 0x40e4ff VADDPD (%RCX),%XMM3,%XMM9 |
(45) 0x40e503 VFMADD132SD -0x38(%RDX),%XMM1,%XMM13 |
(45) 0x40e509 VFMADD231PD -0x48(%RDX),%XMM12,%XMM9 |
(45) 0x40e50f VMOVSD %XMM13,-0x38(%RAX) |
(45) 0x40e514 VMOVUPD %XMM9,-0x48(%RAX) |
(45) 0x40e519 VMOVSD (%RDI),%XMM6 |
(45) 0x40e51d VMOVSD (%RSI),%XMM0 |
(45) 0x40e521 VMOVSD (%R9),%XMM7 |
(45) 0x40e526 VADDSD 0x10(%RCX),%XMM7,%XMM10 |
(45) 0x40e52b VMOVHPD (%R8),%XMM0,%XMM4 |
(45) 0x40e530 VMOVDDUP %XMM6,%XMM2 |
(45) 0x40e534 VADDPD (%RCX),%XMM4,%XMM5 |
(45) 0x40e538 VFMADD132SD -0x20(%RDX),%XMM10,%XMM6 |
(45) 0x40e53e VFMADD231PD -0x30(%RDX),%XMM2,%XMM5 |
(45) 0x40e544 VMOVSD %XMM6,-0x20(%RAX) |
(45) 0x40e549 VMOVUPD %XMM5,-0x30(%RAX) |
(45) 0x40e54e VMOVSD (%RDI),%XMM8 |
(45) 0x40e552 VMOVSD (%RSI),%XMM11 |
(45) 0x40e556 VMOVSD (%R9),%XMM15 |
(45) 0x40e55b VADDSD 0x10(%RCX),%XMM15,%XMM3 |
(45) 0x40e560 VMOVHPD (%R8),%XMM11,%XMM12 |
(45) 0x40e565 VMOVDDUP %XMM8,%XMM13 |
(45) 0x40e56a VADDPD (%RCX),%XMM12,%XMM14 |
(45) 0x40e56e VFMADD132SD -0x8(%RDX),%XMM3,%XMM8 |
(45) 0x40e574 VFMADD231PD -0x18(%RDX),%XMM13,%XMM14 |
(45) 0x40e57a VMOVSD %XMM8,-0x8(%RAX) |
(45) 0x40e57f VMOVUPD %XMM14,-0x18(%RAX) |
(45) 0x40e584 VMOVSD (%RDI),%XMM0 |
(45) 0x40e588 VMOVSD (%RSI),%XMM5 |
(45) 0x40e58c VMOVSD (%R9),%XMM7 |
(45) 0x40e591 VMOVDDUP %XMM0,%XMM4 |
(45) 0x40e595 VADDSD 0x10(%RCX),%XMM7,%XMM15 |
(45) 0x40e59a VFMADD132SD 0x10(%RDX),%XMM15,%XMM0 |
(45) 0x40e5a0 VMOVHPD (%R8),%XMM5,%XMM10 |
(45) 0x40e5a5 VADDPD (%RCX),%XMM10,%XMM8 |
(45) 0x40e5a9 VFMADD231PD (%RDX),%XMM4,%XMM8 |
(45) 0x40e5ae VMOVSD %XMM0,0x10(%RAX) |
(45) 0x40e5b3 VMOVUPD %XMM8,(%RAX) |
(45) 0x40e5b7 CMP %RDX,%R14 |
(45) 0x40e5ba JNE 40e4db |
0x40e5c0 MOV 0x18(%R11),%R11 |
0x40e5c4 MOV 0x2840(%RBX),%RDI |
0x40e5cb MOV %R13D,%R9D |
0x40e5ce MOV $0x1,%R8D |
0x40e5d4 MOV -0x1f0(%RBP),%EDX |
0x40e5da LEA -0x120(%RBP),%RCX |
0x40e5e1 MOVSXD (%R11,%R13,4),%RSI |
0x40e5e5 MOV (%RDI,%RSI,8),%R14 |
0x40e5e9 MOV -0x2e0(%RBP),%RSI |
0x40e5f0 MOV %R14,%RDI |
0x40e5f3 CALL 404190 <_ZN11qmcplusplus18VirtualParticleSet9makeMovesERKNS_11ParticleSetEiRKSt6vectorINS_10TinyVectorIdLj3EEESaIS6_EEbi@plt> |
0x40e5f8 MOV -0x158(%RBP),%RDI |
0x40e5ff LEA -0x100(%RBP),%RDX |
0x40e606 MOV %R14,%RSI |
0x40e609 CALL 404360 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE@plt> |
0x40e60e MOV 0x2858(%RBX),%R11 |
0x40e615 INC %R13 |
0x40e618 MOV 0x260(%R11),%RAX |
0x40e61f CMP %RAX,%R13 |
0x40e622 JB 40e36e |
*** This Panel is Intentionally Left Blank. *** It is due to a lack of debug symbols in the given object |
Path / |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.70 |
CQA speedup if FP arith vectorized | 1.79 |
CQA speedup if fully vectorized | 9.71 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | micro-operation queue, |
Function | main._omp_fn.1 |
Source | |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 17.00 |
CQA cycles if no scalar integer | 10.00 |
CQA cycles if FP arith vectorized | 9.50 |
CQA cycles if fully vectorized | 1.75 |
Front-end cycles | 17.00 |
DIV/SQRT cycles | 8.20 |
P0 cycles | 8.30 |
P1 cycles | 15.33 |
P2 cycles | 15.33 |
P3 cycles | 4.00 |
P4 cycles | 8.20 |
P5 cycles | 8.10 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 8.20 |
P10 cycles | 15.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 19.27 - 19.35 |
Stall cycles (UFS) | 2.37 - 2.37 |
Nb insns | 100.00 |
Nb uops | 102.00 |
Nb loads | 46.00 |
Nb stores | 6.00 |
Nb stack references | 8.00 |
FLOP/cycle | 1.59 |
Nb FLOP add-sub | 9.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 9.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 404.00 |
Bytes stored | 72.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 23.08 |
Vectorization ratio load | 23.08 |
Vectorization ratio store | 50.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 50.00 |
Vectorization ratio fma | 50.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 15.22 |
Vector-efficiency ratio load | 15.38 |
Vector-efficiency ratio store | 18.75 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 18.75 |
Vector-efficiency ratio fma | 18.75 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 11.72 |
Metric | Value |
---|---|
CQA speedup if no scalar integer | 1.70 |
CQA speedup if FP arith vectorized | 1.79 |
CQA speedup if fully vectorized | 9.71 |
CQA speedup if no inter-iteration dependency | NA |
CQA speedup if next bottleneck killed | 1.11 |
Bottlenecks | micro-operation queue, |
Function | main._omp_fn.1 |
Source | |
Source loop unroll info | NA |
Source loop unroll confidence level | NA |
Unroll/vectorization loop type | NA |
Unroll factor | NA |
CQA cycles | 17.00 |
CQA cycles if no scalar integer | 10.00 |
CQA cycles if FP arith vectorized | 9.50 |
CQA cycles if fully vectorized | 1.75 |
Front-end cycles | 17.00 |
DIV/SQRT cycles | 8.20 |
P0 cycles | 8.30 |
P1 cycles | 15.33 |
P2 cycles | 15.33 |
P3 cycles | 4.00 |
P4 cycles | 8.20 |
P5 cycles | 8.10 |
P6 cycles | 4.00 |
P7 cycles | 4.00 |
P8 cycles | 4.00 |
P9 cycles | 8.20 |
P10 cycles | 15.33 |
P11 cycles | 0.00 |
Inter-iter dependencies cycles | NA |
FE+BE cycles (UFS) | 19.27 - 19.35 |
Stall cycles (UFS) | 2.37 - 2.37 |
Nb insns | 100.00 |
Nb uops | 102.00 |
Nb loads | 46.00 |
Nb stores | 6.00 |
Nb stack references | 8.00 |
FLOP/cycle | 1.59 |
Nb FLOP add-sub | 9.00 |
Nb FLOP mul | 0.00 |
Nb FLOP fma | 9.00 |
Nb FLOP div | 0.00 |
Nb FLOP rcp | 0.00 |
Nb FLOP sqrt | 0.00 |
Nb FLOP rsqrt | 0.00 |
Bytes/cycle | 28.00 |
Bytes prefetched | 0.00 |
Bytes loaded | 404.00 |
Bytes stored | 72.00 |
Stride 0 | NA |
Stride 1 | NA |
Stride n | NA |
Stride unknown | NA |
Stride indirect | NA |
Vectorization ratio all | 23.08 |
Vectorization ratio load | 23.08 |
Vectorization ratio store | 50.00 |
Vectorization ratio mul | NA |
Vectorization ratio add_sub | 50.00 |
Vectorization ratio fma | 50.00 |
Vectorization ratio div_sqrt | NA |
Vectorization ratio other | 0.00 |
Vector-efficiency ratio all | 15.22 |
Vector-efficiency ratio load | 15.38 |
Vector-efficiency ratio store | 18.75 |
Vector-efficiency ratio mul | NA |
Vector-efficiency ratio add_sub | 18.75 |
Vector-efficiency ratio fma | 18.75 |
Vector-efficiency ratio div_sqrt | NA |
Vector-efficiency ratio other | 11.72 |
Path / |
Function | main._omp_fn.1 |
Source file and lines | |
Module | exec |
nb instructions | 100 |
nb uops | 102 |
loop length | 481 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 17.00 cycles |
front end | 17.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 8.30 | 15.33 | 15.33 | 4.00 | 8.20 | 8.10 | 4.00 | 4.00 | 4.00 | 8.20 | 15.33 |
cycles | 8.20 | 8.30 | 15.33 | 15.33 | 4.00 | 8.20 | 8.10 | 4.00 | 4.00 | 4.00 | 8.20 | 15.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 19.27-19.35 |
Stall cycles | 2.37-2.37 |
LM full (events) | 5.04-5.06 |
Front-end | 17.00 |
Dispatch | 15.33 |
Overall L1 | 17.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 23% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 23% |
load | 23% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 10% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 15% |
load | 15% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | 18% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 15% |
load | 15% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | 18% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 40e628 <main._omp_fn.1+0x5238> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x150(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R13,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x18(%RDX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VCOMISD 0x1440(%RBX),%XMM0 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
JAE 40e362 <main._omp_fn.1+0x4f72> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x2830(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB 0x2828(%RBX),%R14 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV $-0x5555555555555555,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
SAR $0x3,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RAX,%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
TEST %R14D,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40e5c0 <main._omp_fn.1+0x51d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x1d0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2e0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DEC %R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x210(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x8(%R10),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R10),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R14,%R14,2),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD 0x40(%R9),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA (%R15,%R10,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R10,%R10,2),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RAX,%R13,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RDX,%R9,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RDX,%RAX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x3,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 40e588 <main._omp_fn.1+0x5198> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD (%RSI),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP %XMM0,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x18(%R15),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD (%R9),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD 0x10(%RCX),%XMM1,%XMM5 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVHPD (%R8),%XMM2,%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
VFMADD231SD 0x10(%R15),%XMM0,%XMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RCX),%XMM7,%XMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231PD (%R15),%XMM6,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM5,-0x8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVUPD %XMM4,-0x18(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x1,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 40e588 <main._omp_fn.1+0x5198> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 40e499 <main._omp_fn.1+0x50a9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD (%RSI),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%R9),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VADDSD 0x10(%RCX),%XMM10,%XMM12 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231SD 0x10(%RDX),%XMM0,%XMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVHPD (%R8),%XMM15,%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
VADDPD (%RCX),%XMM13,%XMM11 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231PD (%RDX),%XMM8,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA 0x30(%R15),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM12,-0x8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVUPD %XMM11,-0x18(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RSI),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP %XMM0,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x18,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD (%R9),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD 0x10(%RCX),%XMM14,%XMM2 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVHPD (%R8),%XMM9,%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
VFMADD231SD -0x8(%RDX),%XMM0,%XMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RCX),%XMM1,%XMM6 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231PD -0x18(%RDX),%XMM3,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM2,-0x8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVUPD %XMM6,-0x18(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 40e588 <main._omp_fn.1+0x5198> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x18(%R11),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x2840(%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x1f0(%RBP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x120(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD (%R11,%R13,4),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI,%RSI,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2e0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 404190 <_ZN11qmcplusplus18VirtualParticleSet9makeMovesERKNS_11ParticleSetEiRKSt6vectorINS_10TinyVectorIdLj3EEESaIS6_EEbi@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x158(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x100(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 404360 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x2858(%RBX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x260(%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 40e36e <main._omp_fn.1+0x4f7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
Function | main._omp_fn.1 |
Source file and lines | |
Module | exec |
nb instructions | 100 |
nb uops | 102 |
loop length | 481 |
used x86 registers | 14 |
used mmx registers | 0 |
used xmm registers | 16 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 8 |
micro-operation queue | 17.00 cycles |
front end | 17.00 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 8.20 | 8.30 | 15.33 | 15.33 | 4.00 | 8.20 | 8.10 | 4.00 | 4.00 | 4.00 | 8.20 | 15.33 |
cycles | 8.20 | 8.30 | 15.33 | 15.33 | 4.00 | 8.20 | 8.10 | 4.00 | 4.00 | 4.00 | 8.20 | 15.33 |
Cycles executing div or sqrt instructions | NA |
FE+BE cycles | 19.27-19.35 |
Stall cycles | 2.37-2.37 |
LM full (events) | 5.04-5.06 |
Front-end | 17.00 |
Dispatch | 15.33 |
Overall L1 | 17.00 |
all | 0% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 25% |
load | 23% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 23% |
load | 23% |
store | 50% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 50% |
fma | 50% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 0% |
all | 10% |
load | NA (no load vectorizable/vectorized instructions) |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 10% |
all | 15% |
load | 15% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | 18% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 12% |
all | 15% |
load | 15% |
store | 18% |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | 18% |
fma | 18% |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | 11% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JAE 40e628 <main._omp_fn.1+0x5238> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x150(%RBP),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (,%R13,8),%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV 0x18(%RDX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
ADD %RSI,%RDI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VCOMISD 0x1440(%RBX),%XMM0 | 2 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
JAE 40e362 <main._omp_fn.1+0x4f72> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV 0x2830(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
SUB 0x2828(%RBX),%R14 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
MOV $-0x5555555555555555,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.28 |
SAR $0x3,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
IMUL %RAX,%R14 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
TEST %R14D,%R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 2 | 0.20 |
JLE 40e5c0 <main._omp_fn.1+0x51d0> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
MOV -0x1d0(%RBP),%R10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2e0(%RBP),%R9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
DEC %R14D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x210(%RBP),%RCX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD 0x8(%R10),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%R10),%RDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R14,%R14,2),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD 0x40(%R9),%RCX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
LEA (%R15,%R10,8),%R14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%R10,%R10,2),%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RAX,%R13,1),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
ADD %RDX,%RSI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %R9,%RAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
LEA (%RDX,%R9,8),%R8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
LEA (%RDX,%RAX,8),%R9 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV -0x120(%RBP),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R15,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
AND $0x3,%R10D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1-2 | 0.20 |
JE 40e588 <main._omp_fn.1+0x5198> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD (%RSI),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP %XMM0,%XMM6 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
LEA 0x18(%R15),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD (%R9),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD 0x10(%RCX),%XMM1,%XMM5 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVHPD (%R8),%XMM2,%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
VFMADD231SD 0x10(%R15),%XMM0,%XMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RCX),%XMM7,%XMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231PD (%R15),%XMM6,%XMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM5,-0x8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVUPD %XMM4,-0x18(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP $0x1,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 40e588 <main._omp_fn.1+0x5198> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
CMP $0x2,%R10 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JE 40e499 <main._omp_fn.1+0x50a9> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD (%RSI),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%R9),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP %XMM0,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VADDSD 0x10(%RCX),%XMM10,%XMM12 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231SD 0x10(%RDX),%XMM0,%XMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVHPD (%R8),%XMM15,%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
VADDPD (%RCX),%XMM13,%XMM11 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231PD (%RDX),%XMM8,%XMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
LEA 0x30(%R15),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
VMOVSD %XMM12,-0x8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVUPD %XMM11,-0x18(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVSD (%RSI),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VMOVDDUP %XMM0,%XMM3 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
ADD $0x18,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
VMOVSD (%R9),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
VADDSD 0x10(%RCX),%XMM14,%XMM2 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VMOVHPD (%R8),%XMM9,%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
VFMADD231SD -0x8(%RDX),%XMM0,%XMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VADDPD (%RCX),%XMM1,%XMM6 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
VFMADD231PD -0x18(%RDX),%XMM3,%XMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
VMOVSD %XMM2,-0x8(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
VMOVUPD %XMM6,-0x18(%RAX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
VMOVSD (%RDI),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
JMP 40e588 <main._omp_fn.1+0x5198> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
MOV 0x18(%R11),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x2840(%RBX),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R13D,%R9D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV $0x1,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
MOV -0x1f0(%RBP),%EDX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x120(%RBP),%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOVSXD (%R11,%R13,4),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV (%RDI,%RSI,8),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV -0x2e0(%RBP),%RSI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV %R14,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 404190 <_ZN11qmcplusplus18VirtualParticleSet9makeMovesERKNS_11ParticleSetEiRKSt6vectorINS_10TinyVectorIdLj3EEESaIS6_EEbi@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV -0x158(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA -0x100(%RBP),%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
MOV %R14,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 404360 <_ZN11qmcplusplus12WaveFunction14evaluateRatiosERNS_18VirtualParticleSetERSt6vectorIdSaIdEE@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV 0x2858(%RBX),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
INC %R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0x260(%R11),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CMP %RAX,%R13 | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JB 40e36e <main._omp_fn.1+0x4f7e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |