Loops
Particles3D.cpp: 214 - 2.22 %
| Run oneapi_2025.1_native_fast.13904.all.one.maqao | Run oneapi_2025.1_native.13904.all.one.maqao | Run oneapi_2025.1_avx2.13904.all.one.maqao | Run oneapi_2025.1_novect.13904.all.one.maqao | Run llvm_20.1.1_native_fast.13904.all.one.maqao | Run llvm_20.1.1_native.13904.all.one.maqao | Run llvm_20.1.1_avx2.13904.all.one.maqao | Run llvm_20.1.1_novect.13904.all.one.maqao | Run gcc_14.2.0_native_fast.13904.all.one.maqao | Run gcc_14.2.0_avx2.13904.all.one.maqao | Run gcc_14.2.0_novect.13904.all.one.maqao | |||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
| Loop Source Regions |
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| ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) | ASM Loop ID | Max Time Over Threads (s) | Time w.r.t. Wall Time (s) | Cov (%) | Vect. Ratio (%) | Vector Length Use (%) |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1783 | 0.49 | 0.41 | 0.21 | 38.54 | 15.56 | 1783 | 0.75 | 0.41 | 0.21 | 38.54 | 15.56 | 1778 | 0.50 | 0.41 | 0.20 | 37.5 | 15.43 | 1341 | 0.46 | 0.19 | 0.08 | 32.43 | 15.15 | 1694 | 0.56 | 0.45 | 0.21 | 26.53 | 14.6 | 1694 | 0.53 | 0.44 | 0.21 | 26.53 | 14.6 | 1666 | 0.54 | 0.45 | 0.21 | 26.53 | 14.6 | 1501 | 0.57 | 0.47 | 0.20 | 32.43 | 15.48 | 1280 | 0.64 | 0.52 | 0.24 | 16.38 | 14.66 | 1273 | 0.65 | 0.53 | 0.24 | 15.65 | 14.57 | 1109 | 0.66 | 0.53 | 0.22 | 9.38 | 12.7 |
| Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1783) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1783) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1778) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1341) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1694) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1694) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1666) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1501) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1280) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1273) | Sum on 1 analyzed binary loop (libiPIC3Dlib.so - 1109) | |||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | Analysis | Count | ||||||||||||||||||||||||||||||||||||||||||||
| Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | Loop Computation Issues | |||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | Presence of expensive FP instructions | 1 | ||||||||||||||||||||||||||||||||||||||||||||
| Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 0 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 0 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 0 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 0 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 0 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 0 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 0 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 0 | Less than 10% of the FP ADD/SUB/MUL arithmetic operations are performed using FMA | 1 | ||||||||||||||||||||||||||||||||||||||||||||
| Presence of a large number of scalar integer instructions | 1 | Presence of a large number of scalar integer instructions | 1 | Presence of a large number of scalar integer instructions | 1 | Presence of a large number of scalar integer instructions | 1 | Presence of a large number of scalar integer instructions | 0 | Presence of a large number of scalar integer instructions | 0 | Presence of a large number of scalar integer instructions | 0 | Presence of a large number of scalar integer instructions | 0 | Presence of a large number of scalar integer instructions | 0 | Presence of a large number of scalar integer instructions | 0 | Presence of a large number of scalar integer instructions | 0 | ||||||||||||||||||||||||||||||||||||||||||||
| Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | Control Flow Issues | |||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | ||||||||||||||||||||||||||||||||||||||||||||
| Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | ||||||||||||||||||||||||||||||||||||||||||||
| Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | Data Access Issues | |||||||||||||||||||||||||||||||||||||||||||||||||||||||
| More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 1 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 1 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 0 | More than 10% of the vector loads instructions are unaligned | 0 | ||||||||||||||||||||||||||||||||||||||||||||
| Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 0 | ||||||||||||||||||||||||||||||||||||||||||||
| More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | More than 20% of the loads are accessing the stack | 1 | ||||||||||||||||||||||||||||||||||||||||||||
| Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | Vectorization Roadblocks | |||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | Presence of calls | 1 | ||||||||||||||||||||||||||||||||||||||||||||
| Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | Presence of more than 4 paths | 1 | ||||||||||||||||||||||||||||||||||||||||||||
| Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | Inefficient Vectorization | |||||||||||||||||||||||||||||||||||||||||||||||||||||||
| Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | 1 | Presence of special instructions executing on a single port | |||||||||||||||||||||||||||||||||||||||||||||